filename | test/timer.c |
changeset | 731:ee2e929cca3a |
prev | 272:fb6be85235e8 |
author | nkeynes |
date | Fri Dec 02 18:18:04 2011 +1000 (11 years ago) |
permissions | -rw-r--r-- |
last change | SH4 shadow-mode tweaks - Fix exceptions generated by the translator to account for the excepting instruction(s) in the cycle counts. - Compare floating point regs bitwise rather than with FP comparisons (otherwise can fail due to nan != nan) - Dump the translated block when we abort with an inconsistency |
file | annotate | diff | log | raw |
nkeynes@731 | 1 | #include "lib.h" |
nkeynes@225 | 2 | #define TMU_CHANNEL 2 |
nkeynes@262 | 3 | #define BASE_TICKS_PER_US 200 |
nkeynes@262 | 4 | #define CLOCK_DIVIDER 16 |
nkeynes@225 | 5 | #define TOCR 0xFFD80000 /* Output control register */ |
nkeynes@225 | 6 | #define TSTR 0xFFD80004 /* Start register */ |
nkeynes@225 | 7 | #define TCOR(c) (0xFFD80008 + (c*12)) /* Constant register */ |
nkeynes@225 | 8 | #define TCNT(c) (0xFFD8000C + (c*12)) /* Count register */ |
nkeynes@225 | 9 | #define TCR(c) (0xFFD80010 + (c*12)) /* Control register */ |
nkeynes@225 | 10 | |
nkeynes@225 | 11 | /** |
nkeynes@225 | 12 | * Initialize the on-chip timer controller. We snag TMU channel 2 in its |
nkeynes@225 | 13 | * highest resolution mode, and start it counting down from max_int. |
nkeynes@225 | 14 | */ |
nkeynes@272 | 15 | void timer_init() { |
nkeynes@262 | 16 | unsigned int val = byte_read(TSTR); |
nkeynes@262 | 17 | byte_write( TSTR, val & (~(1<<TMU_CHANNEL)) ); /* Stop counter */ |
nkeynes@225 | 18 | long_write( TCOR(TMU_CHANNEL), 0xFFFFFFFF ); |
nkeynes@225 | 19 | long_write( TCNT(TMU_CHANNEL), 0xFFFFFFFF ); |
nkeynes@262 | 20 | word_write( TCR(TMU_CHANNEL), 0x00000000 ); |
nkeynes@272 | 21 | } |
nkeynes@272 | 22 | |
nkeynes@272 | 23 | void timer_run() { |
nkeynes@272 | 24 | byte_write( TSTR, byte_read(TSTR) | (1<<TMU_CHANNEL) ); |
nkeynes@272 | 25 | } |
nkeynes@272 | 26 | |
nkeynes@272 | 27 | void timer_start() { |
nkeynes@272 | 28 | timer_init(); |
nkeynes@272 | 29 | timer_run(); |
nkeynes@225 | 30 | } |
nkeynes@225 | 31 | |
nkeynes@225 | 32 | /** |
nkeynes@225 | 33 | * Report the current value of TMU2. |
nkeynes@225 | 34 | */ |
nkeynes@262 | 35 | unsigned int timer_gettime() { |
nkeynes@225 | 36 | return long_read(TCNT(TMU_CHANNEL)); |
nkeynes@225 | 37 | } |
nkeynes@225 | 38 | |
nkeynes@225 | 39 | /** |
nkeynes@225 | 40 | * Stop TMU2 and report the current value. |
nkeynes@225 | 41 | */ |
nkeynes@262 | 42 | unsigned int timer_stop() { |
nkeynes@225 | 43 | long_write( TSTR, long_read(TSTR) & (~(1<<TMU_CHANNEL)) ); |
nkeynes@225 | 44 | return long_read( TCNT(TMU_CHANNEL) ); |
nkeynes@225 | 45 | } |
nkeynes@225 | 46 | |
nkeynes@225 | 47 | |
nkeynes@225 | 48 | /** |
nkeynes@225 | 49 | * Convert the supplied timer value to a number of micro seconds since the timer |
nkeynes@225 | 50 | * was started. |
nkeynes@225 | 51 | */ |
nkeynes@262 | 52 | unsigned int timer_to_microsecs( unsigned int value ) { |
nkeynes@262 | 53 | return (0xFFFFFFFF - value) * CLOCK_DIVIDER / BASE_TICKS_PER_US; |
nkeynes@225 | 54 | } |
nkeynes@262 | 55 | |
nkeynes@262 | 56 | unsigned int timer_gettime_us() { |
nkeynes@262 | 57 | return timer_to_microsecs( timer_gettime() ); |
nkeynes@262 | 58 | } |
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