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lxdream.org :: lxdream/src/sh4/sh4core.in
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.in
changeset 391:16afb90b5d47
prev384:c9d5c194984b
next401:f79327f39818
author nkeynes
date Tue Sep 18 09:14:20 2007 +0000 (12 years ago)
permissions -rw-r--r--
last change Add sh4_raise_trap() routine
Share the new fsca/ftrv code between core + trans
file annotate diff log raw
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/**
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 * $Id: sh4core.in,v 1.7 2007-09-18 09:14:20 nkeynes Exp $
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 * 
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 * SH4 emulation core, and parent module for all the SH4 peripheral
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 * modules.
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE sh4_module
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#include <math.h>
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#include "dream.h"
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#include "sh4/sh4core.h"
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#include "sh4/sh4mmio.h"
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#include "sh4/intc.h"
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#include "mem.h"
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#include "clock.h"
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#include "syscall.h"
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#define SH4_CALLTRACE 1
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#define MAX_INT 0x7FFFFFFF
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#define MIN_INT 0x80000000
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#define MAX_INTF 2147483647.0
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#define MIN_INTF -2147483648.0
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#define EXV_EXCEPTION    0x100  /* General exception vector */
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#define EXV_TLBMISS      0x400  /* TLB-miss exception vector */
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#define EXV_INTERRUPT    0x600  /* External interrupt vector */
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/********************** SH4 Module Definition ****************************/
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uint32_t sh4_run_slice( uint32_t );
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uint16_t *sh4_icache = NULL;
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uint32_t sh4_icache_addr = 0;
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uint32_t sh4_run_slice( uint32_t nanosecs ) 
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{
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    int i;
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    sh4r.slice_cycle = 0;
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    if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
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	if( sh4r.event_pending < nanosecs ) {
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	    sh4r.sh4_state = SH4_STATE_RUNNING;
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	    sh4r.slice_cycle = sh4r.event_pending;
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	}
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    }
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    if( sh4_breakpoint_count == 0 ) {
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	for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    //	    sh4_stats_add( sh4r.pc );
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	    if( !sh4_execute_instruction() ) {
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		break;
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	    }
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	}
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    } else {
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	for( ;sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    if( !sh4_execute_instruction() )
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		break;
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#ifdef ENABLE_DEBUG_MODE
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	    for( i=0; i<sh4_breakpoint_count; i++ ) {
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		if( sh4_breakpoints[i].address == sh4r.pc ) {
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		    break;
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		}
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	    }
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	    if( i != sh4_breakpoint_count ) {
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		dreamcast_stop();
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		if( sh4_breakpoints[i].type == BREAK_ONESHOT )
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		    sh4_clear_breakpoint( sh4r.pc, BREAK_ONESHOT );
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		break;
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	    }
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#endif	
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	}
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    }
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    /* If we aborted early, but the cpu is still technically running,
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     * we're doing a hard abort - cut the timeslice back to what we
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     * actually executed
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     */
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    if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
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	nanosecs = sh4r.slice_cycle;
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    }
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    if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
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	TMU_run_slice( nanosecs );
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	SCIF_run_slice( nanosecs );
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    }
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    return nanosecs;
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}
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/********************** SH4 emulation core  ****************************/
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void sh4_set_pc( int pc )
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{
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    sh4r.pc = pc;
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    sh4r.new_pc = pc+2;
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}
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#define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
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#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); dreamcast_stop(); return FALSE; }while(0)
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#if(SH4_CALLTRACE == 1)
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#define MAX_CALLSTACK 32
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static struct call_stack {
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    sh4addr_t call_addr;
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    sh4addr_t target_addr;
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    sh4addr_t stack_pointer;
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} call_stack[MAX_CALLSTACK];
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static int call_stack_depth = 0;
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int sh4_call_trace_on = 0;
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static inline trace_call( sh4addr_t source, sh4addr_t dest ) 
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{
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    if( call_stack_depth < MAX_CALLSTACK ) {
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	call_stack[call_stack_depth].call_addr = source;
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	call_stack[call_stack_depth].target_addr = dest;
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	call_stack[call_stack_depth].stack_pointer = sh4r.r[15];
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    }
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    call_stack_depth++;
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}
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static inline trace_return( sh4addr_t source, sh4addr_t dest )
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{
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    if( call_stack_depth > 0 ) {
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	call_stack_depth--;
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    }
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}
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void fprint_stack_trace( FILE *f )
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{
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    int i = call_stack_depth -1;
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    if( i >= MAX_CALLSTACK )
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	i = MAX_CALLSTACK - 1;
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    for( ; i >= 0; i-- ) {
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	fprintf( f, "%d. Call from %08X => %08X, SP=%08X\n", 
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		 (call_stack_depth - i), call_stack[i].call_addr,
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		 call_stack[i].target_addr, call_stack[i].stack_pointer );
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    }
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}
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#define TRACE_CALL( source, dest ) trace_call(source, dest)
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#define TRACE_RETURN( source, dest ) trace_return(source, dest)
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#else
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#define TRACE_CALL( dest, rts ) 
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#define TRACE_RETURN( source, dest )
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#endif
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#define RAISE( x, v ) do{			\
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    if( sh4r.vbr == 0 ) { \
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        ERROR( "%08X: VBR not initialized while raising exception %03X, halting", sh4r.pc, x ); \
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        dreamcast_stop(); return FALSE;	\
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    } else { \
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        sh4r.spc = sh4r.pc;	\
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        sh4r.ssr = sh4_read_sr(); \
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        sh4r.sgr = sh4r.r[15]; \
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        MMIO_WRITE(MMU,EXPEVT,x); \
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        sh4r.pc = sh4r.vbr + v; \
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        sh4r.new_pc = sh4r.pc + 2; \
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        sh4_write_sr( sh4r.ssr |SR_MD|SR_BL|SR_RB ); \
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	if( sh4r.in_delay_slot ) { \
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	    sh4r.in_delay_slot = 0; \
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	    sh4r.spc -= 2; \
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	} \
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    } \
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    return TRUE; } while(0)
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#define MEM_READ_BYTE( addr ) sh4_read_byte(addr)
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#define MEM_READ_WORD( addr ) sh4_read_word(addr)
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#define MEM_READ_LONG( addr ) sh4_read_long(addr)
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#define MEM_WRITE_BYTE( addr, val ) sh4_write_byte(addr, val)
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#define MEM_WRITE_WORD( addr, val ) sh4_write_word(addr, val)
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#define MEM_WRITE_LONG( addr, val ) sh4_write_long(addr, val)
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#define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
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#define MEM_FP_READ( addr, reg ) sh4_read_float( addr, reg );
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#define MEM_FP_WRITE( addr, reg ) sh4_write_float( addr, reg );
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#define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL )
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#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
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#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
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#define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
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static void sh4_switch_banks( )
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{
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    uint32_t tmp[8];
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    memcpy( tmp, sh4r.r, sizeof(uint32_t)*8 );
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    memcpy( sh4r.r, sh4r.r_bank, sizeof(uint32_t)*8 );
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    memcpy( sh4r.r_bank, tmp, sizeof(uint32_t)*8 );
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}
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void sh4_write_sr( uint32_t newval )
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{
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    if( (newval ^ sh4r.sr) & SR_RB )
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        sh4_switch_banks();
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    sh4r.sr = newval;
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    sh4r.t = (newval&SR_T) ? 1 : 0;
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    sh4r.s = (newval&SR_S) ? 1 : 0;
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    sh4r.m = (newval&SR_M) ? 1 : 0;
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    sh4r.q = (newval&SR_Q) ? 1 : 0;
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    intc_mask_changed();
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}
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static void sh4_write_float( uint32_t addr, int reg )
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{
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    if( IS_FPU_DOUBLESIZE() ) {
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	if( reg & 1 ) {
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	    sh4_write_long( addr, *((uint32_t *)&XF((reg)&0x0E)) );
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	    sh4_write_long( addr+4, *((uint32_t *)&XF(reg)) );
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	} else {
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	    sh4_write_long( addr, *((uint32_t *)&FR(reg)) ); 
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	    sh4_write_long( addr+4, *((uint32_t *)&FR((reg)|0x01)) );
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	}
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    } else {
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	sh4_write_long( addr, *((uint32_t *)&FR((reg))) );
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    }
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}
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static void sh4_read_float( uint32_t addr, int reg )
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{
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    if( IS_FPU_DOUBLESIZE() ) {
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	if( reg & 1 ) {
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	    *((uint32_t *)&XF((reg) & 0x0E)) = sh4_read_long(addr);
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	    *((uint32_t *)&XF(reg)) = sh4_read_long(addr+4);
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	} else {
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	    *((uint32_t *)&FR(reg)) = sh4_read_long(addr);
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	    *((uint32_t *)&FR((reg) | 0x01)) = sh4_read_long(addr+4);
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	}
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    } else {
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	*((uint32_t *)&FR(reg)) = sh4_read_long(addr);
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    }
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}
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uint32_t sh4_read_sr( void )
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{
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    /* synchronize sh4r.sr with the various bitflags */
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    sh4r.sr &= SR_MQSTMASK;
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    if( sh4r.t ) sh4r.sr |= SR_T;
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    if( sh4r.s ) sh4r.sr |= SR_S;
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    if( sh4r.m ) sh4r.sr |= SR_M;
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    if( sh4r.q ) sh4r.sr |= SR_Q;
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    return sh4r.sr;
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}
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/**
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 * Raise a general CPU exception for the specified exception code.
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 * (NOT for TRAPA or TLB exceptions)
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 */
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gboolean sh4_raise_exception( int code )
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{
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    RAISE( code, EXV_EXCEPTION );
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}
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gboolean sh4_raise_trap( int trap )
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{
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    MMIO_WRITE( MMU, TRA, trap<<2 );
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    return sh4_raise_exception( EXC_TRAP );
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}
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gboolean sh4_raise_slot_exception( int normal_code, int slot_code ) {
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    if( sh4r.in_delay_slot ) {
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	return sh4_raise_exception(slot_code);
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    } else {
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	return sh4_raise_exception(normal_code);
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    }
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}
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gboolean sh4_raise_tlb_exception( int code )
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{
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    RAISE( code, EXV_TLBMISS );
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}
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void sh4_accept_interrupt( void )
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{
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    uint32_t code = intc_accept_interrupt();
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    sh4r.ssr = sh4_read_sr();
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    sh4r.spc = sh4r.pc;
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    sh4r.sgr = sh4r.r[15];
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    sh4_write_sr( sh4r.ssr|SR_BL|SR_MD|SR_RB );
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    MMIO_WRITE( MMU, INTEVT, code );
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    sh4r.pc = sh4r.vbr + 0x600;
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    sh4r.new_pc = sh4r.pc + 2;
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    //    WARN( "Accepting interrupt %03X, from %08X => %08X", code, sh4r.spc, sh4r.pc );
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}
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gboolean sh4_execute_instruction( void )
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{
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    uint32_t pc;
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    unsigned short ir;
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    uint32_t tmp;
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    float ftmp;
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    double dtmp;
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#define R0 sh4r.r[0]
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    pc = sh4r.pc;
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    if( pc > 0xFFFFFF00 ) {
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	/* SYSCALL Magic */
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	syscall_invoke( pc );
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	sh4r.in_delay_slot = 0;
nkeynes@359
   336
	pc = sh4r.pc = sh4r.pr;
nkeynes@359
   337
	sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   338
    }
nkeynes@359
   339
    CHECKRALIGN16(pc);
nkeynes@359
   340
nkeynes@359
   341
    /* Read instruction */
nkeynes@359
   342
    uint32_t pageaddr = pc >> 12;
nkeynes@359
   343
    if( sh4_icache != NULL && pageaddr == sh4_icache_addr ) {
nkeynes@359
   344
	ir = sh4_icache[(pc&0xFFF)>>1];
nkeynes@359
   345
    } else {
nkeynes@359
   346
	sh4_icache = (uint16_t *)mem_get_page(pc);
nkeynes@359
   347
	if( ((uint32_t)sh4_icache) < MAX_IO_REGIONS ) {
nkeynes@359
   348
	    /* If someone's actually been so daft as to try to execute out of an IO
nkeynes@359
   349
	     * region, fallback on the full-blown memory read
nkeynes@359
   350
	     */
nkeynes@359
   351
	    sh4_icache = NULL;
nkeynes@359
   352
	    ir = MEM_READ_WORD(pc);
nkeynes@359
   353
	} else {
nkeynes@359
   354
	    sh4_icache_addr = pageaddr;
nkeynes@359
   355
	    ir = sh4_icache[(pc&0xFFF)>>1];
nkeynes@359
   356
	}
nkeynes@359
   357
    }
nkeynes@359
   358
%%
nkeynes@359
   359
AND Rm, Rn {: sh4r.r[Rn] &= sh4r.r[Rm]; :}
nkeynes@359
   360
AND #imm, R0 {: R0 &= imm; :}
nkeynes@359
   361
AND.B #imm, @(R0, GBR) {: MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & MEM_READ_BYTE(R0 + sh4r.gbr) ); :}
nkeynes@359
   362
NOT Rm, Rn {: sh4r.r[Rn] = ~sh4r.r[Rm]; :}
nkeynes@359
   363
OR Rm, Rn {: sh4r.r[Rn] |= sh4r.r[Rm]; :}
nkeynes@359
   364
OR #imm, R0  {: R0 |= imm; :}
nkeynes@359
   365
OR.B #imm, @(R0, GBR) {: MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | MEM_READ_BYTE(R0 + sh4r.gbr) ); :}
nkeynes@359
   366
TAS.B @Rn {:
nkeynes@359
   367
    tmp = MEM_READ_BYTE( sh4r.r[Rn] );
nkeynes@359
   368
    sh4r.t = ( tmp == 0 ? 1 : 0 );
nkeynes@359
   369
    MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );
nkeynes@359
   370
:}
nkeynes@359
   371
TST Rm, Rn {: sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1); :}
nkeynes@359
   372
TST #imm, R0 {: sh4r.t = (R0 & imm ? 0 : 1); :}
nkeynes@359
   373
TST.B #imm, @(R0, GBR) {: sh4r.t = ( MEM_READ_BYTE(R0 + sh4r.gbr) & imm ? 0 : 1 ); :}
nkeynes@359
   374
XOR Rm, Rn {: sh4r.r[Rn] ^= sh4r.r[Rm]; :}
nkeynes@359
   375
XOR #imm, R0 {: R0 ^= imm; :}
nkeynes@359
   376
XOR.B #imm, @(R0, GBR) {: MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ MEM_READ_BYTE(R0 + sh4r.gbr) ); :}
nkeynes@359
   377
XTRCT Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rn]>>16) | (sh4r.r[Rm]<<16); :}
nkeynes@359
   378
nkeynes@359
   379
ROTL Rn {:
nkeynes@359
   380
    sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359
   381
    sh4r.r[Rn] <<= 1;
nkeynes@359
   382
    sh4r.r[Rn] |= sh4r.t;
nkeynes@359
   383
:}
nkeynes@359
   384
ROTR Rn {:
nkeynes@359
   385
    sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359
   386
    sh4r.r[Rn] >>= 1;
nkeynes@359
   387
    sh4r.r[Rn] |= (sh4r.t << 31);
nkeynes@359
   388
:}
nkeynes@359
   389
ROTCL Rn {:
nkeynes@359
   390
    tmp = sh4r.r[Rn] >> 31;
nkeynes@359
   391
    sh4r.r[Rn] <<= 1;
nkeynes@359
   392
    sh4r.r[Rn] |= sh4r.t;
nkeynes@359
   393
    sh4r.t = tmp;
nkeynes@359
   394
:}
nkeynes@359
   395
ROTCR Rn {:
nkeynes@359
   396
    tmp = sh4r.r[Rn] & 0x00000001;
nkeynes@359
   397
    sh4r.r[Rn] >>= 1;
nkeynes@359
   398
    sh4r.r[Rn] |= (sh4r.t << 31 );
nkeynes@359
   399
    sh4r.t = tmp;
nkeynes@359
   400
:}
nkeynes@359
   401
SHAD Rm, Rn {:
nkeynes@359
   402
    tmp = sh4r.r[Rm];
nkeynes@359
   403
    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359
   404
    else if( (tmp & 0x1F) == 0 )  
nkeynes@359
   405
        sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 31;
nkeynes@359
   406
    else 
nkeynes@359
   407
	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> (((~sh4r.r[Rm]) & 0x1F)+1);
nkeynes@359
   408
:}
nkeynes@359
   409
SHLD Rm, Rn {:
nkeynes@359
   410
    tmp = sh4r.r[Rm];
nkeynes@359
   411
    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359
   412
    else if( (tmp & 0x1F) == 0 ) sh4r.r[Rn] = 0;
nkeynes@359
   413
    else sh4r.r[Rn] >>= (((~tmp) & 0x1F)+1);
nkeynes@359
   414
:}
nkeynes@359
   415
SHAL Rn {:
nkeynes@359
   416
    sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359
   417
    sh4r.r[Rn] <<= 1;
nkeynes@359
   418
:}
nkeynes@359
   419
SHAR Rn {:
nkeynes@359
   420
    sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359
   421
    sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 1;
nkeynes@359
   422
:}
nkeynes@359
   423
SHLL Rn {: sh4r.t = sh4r.r[Rn] >> 31; sh4r.r[Rn] <<= 1; :}
nkeynes@359
   424
SHLR Rn {: sh4r.t = sh4r.r[Rn] & 0x00000001; sh4r.r[Rn] >>= 1; :}
nkeynes@359
   425
SHLL2 Rn {: sh4r.r[Rn] <<= 2; :}
nkeynes@359
   426
SHLR2 Rn {: sh4r.r[Rn] >>= 2; :}
nkeynes@359
   427
SHLL8 Rn {: sh4r.r[Rn] <<= 8; :}
nkeynes@359
   428
SHLR8 Rn {: sh4r.r[Rn] >>= 8; :}
nkeynes@359
   429
SHLL16 Rn {: sh4r.r[Rn] <<= 16; :}
nkeynes@359
   430
SHLR16 Rn {: sh4r.r[Rn] >>= 16; :}
nkeynes@359
   431
nkeynes@359
   432
EXTU.B Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x000000FF; :}
nkeynes@359
   433
EXTU.W Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x0000FFFF; :}
nkeynes@359
   434
EXTS.B Rm, Rn {: sh4r.r[Rn] = SIGNEXT8( sh4r.r[Rm]&0x000000FF ); :}
nkeynes@359
   435
EXTS.W Rm, Rn {: sh4r.r[Rn] = SIGNEXT16( sh4r.r[Rm]&0x0000FFFF ); :}
nkeynes@359
   436
SWAP.B Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]&0xFFFF0000) | ((sh4r.r[Rm]&0x0000FF00)>>8) | ((sh4r.r[Rm]&0x000000FF)<<8); :}
nkeynes@359
   437
SWAP.W Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]>>16) | (sh4r.r[Rm]<<16); :}
nkeynes@359
   438
nkeynes@359
   439
CLRT {: sh4r.t = 0; :}
nkeynes@359
   440
SETT {: sh4r.t = 1; :}
nkeynes@359
   441
CLRMAC {: sh4r.mac = 0; :}
nkeynes@359
   442
LDTLB {: /* TODO */ :}
nkeynes@359
   443
CLRS {: sh4r.s = 0; :}
nkeynes@359
   444
SETS {: sh4r.s = 1; :}
nkeynes@359
   445
MOVT Rn {: sh4r.r[Rn] = sh4r.t; :}
nkeynes@359
   446
NOP {: /* NOP */ :}
nkeynes@359
   447
nkeynes@359
   448
PREF @Rn {:
nkeynes@359
   449
     tmp = sh4r.r[Rn];
nkeynes@359
   450
     if( (tmp & 0xFC000000) == 0xE0000000 ) {
nkeynes@369
   451
	 sh4_flush_store_queue(tmp);
nkeynes@359
   452
     }
nkeynes@359
   453
:}
nkeynes@359
   454
OCBI @Rn {: :}
nkeynes@359
   455
OCBP @Rn {: :}
nkeynes@359
   456
OCBWB @Rn {: :}
nkeynes@359
   457
MOVCA.L R0, @Rn {:
nkeynes@359
   458
    tmp = sh4r.r[Rn];
nkeynes@359
   459
    CHECKWALIGN32(tmp);
nkeynes@359
   460
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   461
:}
nkeynes@359
   462
MOV.B Rm, @(R0, Rn) {: MEM_WRITE_BYTE( R0 + sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   463
MOV.W Rm, @(R0, Rn) {: 
nkeynes@359
   464
    CHECKWALIGN16( R0 + sh4r.r[Rn] );
nkeynes@359
   465
    MEM_WRITE_WORD( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   466
:}
nkeynes@359
   467
MOV.L Rm, @(R0, Rn) {:
nkeynes@359
   468
    CHECKWALIGN32( R0 + sh4r.r[Rn] );
nkeynes@359
   469
    MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   470
:}
nkeynes@359
   471
MOV.B @(R0, Rm), Rn {: sh4r.r[Rn] = MEM_READ_BYTE( R0 + sh4r.r[Rm] ); :}
nkeynes@359
   472
MOV.W @(R0, Rm), Rn {: CHECKRALIGN16( R0 + sh4r.r[Rm] );
nkeynes@359
   473
                    sh4r.r[Rn] = MEM_READ_WORD( R0 + sh4r.r[Rm] );
nkeynes@359
   474
:}
nkeynes@359
   475
MOV.L @(R0, Rm), Rn {: CHECKRALIGN32( R0 + sh4r.r[Rm] );
nkeynes@359
   476
                    sh4r.r[Rn] = MEM_READ_LONG( R0 + sh4r.r[Rm] );
nkeynes@359
   477
:}
nkeynes@359
   478
MOV.L Rm, @(disp, Rn) {:
nkeynes@359
   479
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   480
    CHECKWALIGN32( tmp );
nkeynes@359
   481
    MEM_WRITE_LONG( tmp, sh4r.r[Rm] );
nkeynes@359
   482
:}
nkeynes@359
   483
MOV.B Rm, @Rn {: MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   484
MOV.W Rm, @Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   485
MOV.L Rm, @Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   486
MOV.B Rm, @-Rn {: sh4r.r[Rn] --; MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   487
MOV.W Rm, @-Rn {: sh4r.r[Rn] -= 2; CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   488
MOV.L Rm, @-Rn {: sh4r.r[Rn] -= 4; CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   489
MOV.L @(disp, Rm), Rn {:
nkeynes@359
   490
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   491
    CHECKRALIGN32( tmp );
nkeynes@359
   492
    sh4r.r[Rn] = MEM_READ_LONG( tmp );
nkeynes@359
   493
:}
nkeynes@359
   494
MOV.B @Rm, Rn {: sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] ); :}
nkeynes@359
   495
MOV.W @Rm, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] ); :}
nkeynes@359
   496
MOV.L @Rm, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] ); :}
nkeynes@359
   497
MOV Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]; :}
nkeynes@359
   498
MOV.B @Rm+, Rn {: sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] ); sh4r.r[Rm] ++; :}
nkeynes@359
   499
MOV.W @Rm+, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] ); sh4r.r[Rm] += 2; :}
nkeynes@359
   500
MOV.L @Rm+, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] ); sh4r.r[Rm] += 4; :}
nkeynes@359
   501
MOV.L @(disp, PC), Rn {:
nkeynes@359
   502
    CHECKSLOTILLEGAL();
nkeynes@359
   503
    tmp = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359
   504
    sh4r.r[Rn] = MEM_READ_LONG( tmp );
nkeynes@359
   505
:}
nkeynes@359
   506
MOV.B R0, @(disp, GBR) {: MEM_WRITE_BYTE( sh4r.gbr + disp, R0 ); :}
nkeynes@359
   507
MOV.W R0, @(disp, GBR) {:
nkeynes@359
   508
    tmp = sh4r.gbr + disp;
nkeynes@359
   509
    CHECKWALIGN16( tmp );
nkeynes@359
   510
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   511
:}
nkeynes@359
   512
MOV.L R0, @(disp, GBR) {:
nkeynes@359
   513
    tmp = sh4r.gbr + disp;
nkeynes@359
   514
    CHECKWALIGN32( tmp );
nkeynes@359
   515
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   516
:}
nkeynes@359
   517
MOV.B @(disp, GBR), R0 {: R0 = MEM_READ_BYTE( sh4r.gbr + disp ); :}
nkeynes@359
   518
MOV.W @(disp, GBR), R0 {: 
nkeynes@359
   519
    tmp = sh4r.gbr + disp;
nkeynes@359
   520
    CHECKRALIGN16( tmp );
nkeynes@359
   521
    R0 = MEM_READ_WORD( tmp );
nkeynes@359
   522
:}
nkeynes@359
   523
MOV.L @(disp, GBR), R0 {:
nkeynes@359
   524
    tmp = sh4r.gbr + disp;
nkeynes@359
   525
    CHECKRALIGN32( tmp );
nkeynes@359
   526
    R0 = MEM_READ_LONG( tmp );
nkeynes@359
   527
:}
nkeynes@359
   528
MOV.B R0, @(disp, Rn) {: MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 ); :}
nkeynes@359
   529
MOV.W R0, @(disp, Rn) {: 
nkeynes@359
   530
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   531
    CHECKWALIGN16( tmp );
nkeynes@359
   532
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   533
:}
nkeynes@359
   534
MOV.B @(disp, Rm), R0 {: R0 = MEM_READ_BYTE( sh4r.r[Rm] + disp ); :}
nkeynes@359
   535
MOV.W @(disp, Rm), R0 {: 
nkeynes@359
   536
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   537
    CHECKRALIGN16( tmp );
nkeynes@359
   538
    R0 = MEM_READ_WORD( tmp );
nkeynes@359
   539
:}
nkeynes@359
   540
MOV.W @(disp, PC), Rn {:
nkeynes@359
   541
    CHECKSLOTILLEGAL();
nkeynes@359
   542
    tmp = pc + 4 + disp;
nkeynes@359
   543
    sh4r.r[Rn] = MEM_READ_WORD( tmp );
nkeynes@359
   544
:}
nkeynes@359
   545
MOVA @(disp, PC), R0 {:
nkeynes@359
   546
    CHECKSLOTILLEGAL();
nkeynes@359
   547
    R0 = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359
   548
:}
nkeynes@359
   549
MOV #imm, Rn {:  sh4r.r[Rn] = imm; :}
nkeynes@359
   550
nkeynes@359
   551
CMP/EQ #imm, R0 {: sh4r.t = ( R0 == imm ? 1 : 0 ); :}
nkeynes@359
   552
CMP/EQ Rm, Rn {: sh4r.t = ( sh4r.r[Rm] == sh4r.r[Rn] ? 1 : 0 ); :}
nkeynes@359
   553
CMP/GE Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   554
CMP/GT Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   555
CMP/HI Rm, Rn {: sh4r.t = ( sh4r.r[Rn] > sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   556
CMP/HS Rm, Rn {: sh4r.t = ( sh4r.r[Rn] >= sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   557
CMP/PL Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > 0 ? 1 : 0 ); :}
nkeynes@359
   558
CMP/PZ Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= 0 ? 1 : 0 ); :}
nkeynes@359
   559
CMP/STR Rm, Rn {: 
nkeynes@359
   560
    /* set T = 1 if any byte in RM & RN is the same */
nkeynes@359
   561
    tmp = sh4r.r[Rm] ^ sh4r.r[Rn];
nkeynes@359
   562
    sh4r.t = ((tmp&0x000000FF)==0 || (tmp&0x0000FF00)==0 ||
nkeynes@359
   563
             (tmp&0x00FF0000)==0 || (tmp&0xFF000000)==0)?1:0;
nkeynes@359
   564
:}
nkeynes@359
   565
nkeynes@359
   566
ADD Rm, Rn {: sh4r.r[Rn] += sh4r.r[Rm]; :}
nkeynes@359
   567
ADD #imm, Rn {: sh4r.r[Rn] += imm; :}
nkeynes@359
   568
ADDC Rm, Rn {:
nkeynes@359
   569
    tmp = sh4r.r[Rn];
nkeynes@359
   570
    sh4r.r[Rn] += sh4r.r[Rm] + sh4r.t;
nkeynes@359
   571
    sh4r.t = ( sh4r.r[Rn] < tmp || (sh4r.r[Rn] == tmp && sh4r.t != 0) ? 1 : 0 );
nkeynes@359
   572
:}
nkeynes@359
   573
ADDV Rm, Rn {:
nkeynes@359
   574
    tmp = sh4r.r[Rn] + sh4r.r[Rm];
nkeynes@359
   575
    sh4r.t = ( (sh4r.r[Rn]>>31) == (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
nkeynes@359
   576
    sh4r.r[Rn] = tmp;
nkeynes@359
   577
:}
nkeynes@359
   578
DIV0U {: sh4r.m = sh4r.q = sh4r.t = 0; :}
nkeynes@359
   579
DIV0S Rm, Rn {: 
nkeynes@359
   580
    sh4r.q = sh4r.r[Rn]>>31;
nkeynes@359
   581
    sh4r.m = sh4r.r[Rm]>>31;
nkeynes@359
   582
    sh4r.t = sh4r.q ^ sh4r.m;
nkeynes@359
   583
:}
nkeynes@359
   584
DIV1 Rm, Rn {:
nkeynes@384
   585
    /* This is derived from the sh4 manual with some simplifications */
nkeynes@359
   586
    uint32_t tmp0, tmp1, tmp2, dir;
nkeynes@359
   587
nkeynes@359
   588
    dir = sh4r.q ^ sh4r.m;
nkeynes@359
   589
    sh4r.q = (sh4r.r[Rn] >> 31);
nkeynes@359
   590
    tmp2 = sh4r.r[Rm];
nkeynes@359
   591
    sh4r.r[Rn] = (sh4r.r[Rn] << 1) | sh4r.t;
nkeynes@359
   592
    tmp0 = sh4r.r[Rn];
nkeynes@359
   593
    if( dir ) {
nkeynes@359
   594
         sh4r.r[Rn] += tmp2;
nkeynes@359
   595
         tmp1 = (sh4r.r[Rn]<tmp0 ? 1 : 0 );
nkeynes@359
   596
    } else {
nkeynes@359
   597
         sh4r.r[Rn] -= tmp2;
nkeynes@359
   598
         tmp1 = (sh4r.r[Rn]>tmp0 ? 1 : 0 );
nkeynes@359
   599
    }
nkeynes@359
   600
    sh4r.q ^= sh4r.m ^ tmp1;
nkeynes@359
   601
    sh4r.t = ( sh4r.q == sh4r.m ? 1 : 0 );
nkeynes@359
   602
:}
nkeynes@359
   603
DMULS.L Rm, Rn {: sh4r.mac = SIGNEXT32(sh4r.r[Rm]) * SIGNEXT32(sh4r.r[Rn]); :}
nkeynes@359
   604
DMULU.L Rm, Rn {: sh4r.mac = ((uint64_t)sh4r.r[Rm]) * ((uint64_t)sh4r.r[Rn]); :}
nkeynes@359
   605
DT Rn {:
nkeynes@359
   606
    sh4r.r[Rn] --;
nkeynes@359
   607
    sh4r.t = ( sh4r.r[Rn] == 0 ? 1 : 0 );
nkeynes@359
   608
:}
nkeynes@359
   609
MAC.W @Rm+, @Rn+ {:
nkeynes@359
   610
    CHECKRALIGN16( sh4r.r[Rn] );
nkeynes@359
   611
    CHECKRALIGN16( sh4r.r[Rm] );
nkeynes@359
   612
    int32_t stmp = SIGNEXT16(MEM_READ_WORD(sh4r.r[Rn]));
nkeynes@359
   613
    sh4r.r[Rn] += 2;
nkeynes@359
   614
    stmp = stmp * SIGNEXT16(MEM_READ_WORD(sh4r.r[Rm]));
nkeynes@359
   615
    sh4r.r[Rm] += 2;
nkeynes@359
   616
    if( sh4r.s ) {
nkeynes@359
   617
	int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
nkeynes@359
   618
	if( tmpl > (int64_t)0x000000007FFFFFFFLL ) {
nkeynes@359
   619
	    sh4r.mac = 0x000000017FFFFFFFLL;
nkeynes@359
   620
	} else if( tmpl < (int64_t)0xFFFFFFFF80000000LL ) {
nkeynes@359
   621
	    sh4r.mac = 0x0000000180000000LL;
nkeynes@359
   622
	} else {
nkeynes@359
   623
	    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   624
		((uint32_t)(sh4r.mac + stmp));
nkeynes@359
   625
	}
nkeynes@359
   626
    } else {
nkeynes@359
   627
	sh4r.mac += SIGNEXT32(stmp);
nkeynes@359
   628
    }
nkeynes@359
   629
:}
nkeynes@359
   630
MAC.L @Rm+, @Rn+ {:
nkeynes@359
   631
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   632
    CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@359
   633
    int64_t tmpl = SIGNEXT32(MEM_READ_LONG(sh4r.r[Rn]));
nkeynes@359
   634
    sh4r.r[Rn] += 4;
nkeynes@359
   635
    tmpl = tmpl * SIGNEXT32(MEM_READ_LONG(sh4r.r[Rm])) + sh4r.mac;
nkeynes@359
   636
    sh4r.r[Rm] += 4;
nkeynes@359
   637
    if( sh4r.s ) {
nkeynes@359
   638
        /* 48-bit Saturation. Yuch */
nkeynes@359
   639
        if( tmpl < (int64_t)0xFFFF800000000000LL )
nkeynes@359
   640
            tmpl = 0xFFFF800000000000LL;
nkeynes@359
   641
        else if( tmpl > (int64_t)0x00007FFFFFFFFFFFLL )
nkeynes@359
   642
            tmpl = 0x00007FFFFFFFFFFFLL;
nkeynes@359
   643
    }
nkeynes@359
   644
    sh4r.mac = tmpl;
nkeynes@359
   645
:}
nkeynes@359
   646
MUL.L Rm, Rn {: sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   647
                        (sh4r.r[Rm] * sh4r.r[Rn]); :}
nkeynes@359
   648
MULU.W Rm, Rn {:
nkeynes@359
   649
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   650
               (uint32_t)((sh4r.r[Rm]&0xFFFF) * (sh4r.r[Rn]&0xFFFF));
nkeynes@359
   651
:}
nkeynes@359
   652
MULS.W Rm, Rn {:
nkeynes@359
   653
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   654
               (uint32_t)(SIGNEXT32(sh4r.r[Rm]&0xFFFF) * SIGNEXT32(sh4r.r[Rn]&0xFFFF));
nkeynes@359
   655
:}
nkeynes@359
   656
NEGC Rm, Rn {:
nkeynes@359
   657
    tmp = 0 - sh4r.r[Rm];
nkeynes@359
   658
    sh4r.r[Rn] = tmp - sh4r.t;
nkeynes@359
   659
    sh4r.t = ( 0<tmp || tmp<sh4r.r[Rn] ? 1 : 0 );
nkeynes@359
   660
:}
nkeynes@359
   661
NEG Rm, Rn {: sh4r.r[Rn] = 0 - sh4r.r[Rm]; :}
nkeynes@359
   662
SUB Rm, Rn {: sh4r.r[Rn] -= sh4r.r[Rm]; :}
nkeynes@359
   663
SUBC Rm, Rn {: 
nkeynes@359
   664
    tmp = sh4r.r[Rn];
nkeynes@359
   665
    sh4r.r[Rn] = sh4r.r[Rn] - sh4r.r[Rm] - sh4r.t;
nkeynes@359
   666
    sh4r.t = (sh4r.r[Rn] > tmp || (sh4r.r[Rn] == tmp && sh4r.t == 1));
nkeynes@359
   667
:}
nkeynes@359
   668
nkeynes@359
   669
BRAF Rn {:
nkeynes@359
   670
     CHECKSLOTILLEGAL();
nkeynes@359
   671
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   672
     sh4r.in_delay_slot = 1;
nkeynes@359
   673
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   674
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   675
     return TRUE;
nkeynes@359
   676
:}
nkeynes@359
   677
BSRF Rn {:
nkeynes@359
   678
     CHECKSLOTILLEGAL();
nkeynes@359
   679
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   680
     sh4r.in_delay_slot = 1;
nkeynes@359
   681
     sh4r.pr = sh4r.pc + 4;
nkeynes@359
   682
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   683
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   684
     TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   685
     return TRUE;
nkeynes@359
   686
:}
nkeynes@359
   687
BT disp {:
nkeynes@359
   688
    CHECKSLOTILLEGAL();
nkeynes@359
   689
    if( sh4r.t ) {
nkeynes@359
   690
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   691
        sh4r.pc += disp + 4;
nkeynes@359
   692
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   693
        return TRUE;
nkeynes@359
   694
    }
nkeynes@359
   695
:}
nkeynes@359
   696
BF disp {:
nkeynes@359
   697
    CHECKSLOTILLEGAL();
nkeynes@359
   698
    if( !sh4r.t ) {
nkeynes@359
   699
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   700
        sh4r.pc += disp + 4;
nkeynes@359
   701
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   702
        return TRUE;
nkeynes@359
   703
    }
nkeynes@359
   704
:}
nkeynes@359
   705
BT/S disp {:
nkeynes@359
   706
    CHECKSLOTILLEGAL();
nkeynes@359
   707
    if( sh4r.t ) {
nkeynes@359
   708
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   709
        sh4r.in_delay_slot = 1;
nkeynes@359
   710
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   711
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   712
        sh4r.in_delay_slot = 1;
nkeynes@359
   713
        return TRUE;
nkeynes@359
   714
    }
nkeynes@359
   715
:}
nkeynes@359
   716
BF/S disp {:
nkeynes@359
   717
    CHECKSLOTILLEGAL();
nkeynes@359
   718
    if( !sh4r.t ) {
nkeynes@359
   719
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   720
        sh4r.in_delay_slot = 1;
nkeynes@359
   721
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   722
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   723
        return TRUE;
nkeynes@359
   724
    }
nkeynes@359
   725
:}
nkeynes@359
   726
BRA disp {:
nkeynes@359
   727
    CHECKSLOTILLEGAL();
nkeynes@359
   728
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   729
    sh4r.in_delay_slot = 1;
nkeynes@359
   730
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   731
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   732
    return TRUE;
nkeynes@359
   733
:}
nkeynes@359
   734
BSR disp {:
nkeynes@359
   735
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   736
    CHECKSLOTILLEGAL();
nkeynes@359
   737
    sh4r.in_delay_slot = 1;
nkeynes@359
   738
    sh4r.pr = pc + 4;
nkeynes@359
   739
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   740
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   741
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   742
    return TRUE;
nkeynes@359
   743
:}
nkeynes@359
   744
TRAPA #imm {:
nkeynes@359
   745
    CHECKSLOTILLEGAL();
nkeynes@359
   746
    MMIO_WRITE( MMU, TRA, imm<<2 );
nkeynes@359
   747
    sh4r.pc += 2;
nkeynes@359
   748
    sh4_raise_exception( EXC_TRAP );
nkeynes@359
   749
:}
nkeynes@359
   750
RTS {: 
nkeynes@359
   751
    CHECKSLOTILLEGAL();
nkeynes@359
   752
    CHECKDEST( sh4r.pr );
nkeynes@359
   753
    sh4r.in_delay_slot = 1;
nkeynes@359
   754
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   755
    sh4r.new_pc = sh4r.pr;
nkeynes@359
   756
    TRACE_RETURN( pc, sh4r.new_pc );
nkeynes@359
   757
    return TRUE;
nkeynes@359
   758
:}
nkeynes@359
   759
SLEEP {:
nkeynes@359
   760
    if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
nkeynes@359
   761
	sh4r.sh4_state = SH4_STATE_STANDBY;
nkeynes@359
   762
    } else {
nkeynes@359
   763
	sh4r.sh4_state = SH4_STATE_SLEEP;
nkeynes@359
   764
    }
nkeynes@359
   765
    return FALSE; /* Halt CPU */
nkeynes@359
   766
:}
nkeynes@359
   767
RTE {:
nkeynes@359
   768
    CHECKPRIV();
nkeynes@359
   769
    CHECKDEST( sh4r.spc );
nkeynes@359
   770
    CHECKSLOTILLEGAL();
nkeynes@359
   771
    sh4r.in_delay_slot = 1;
nkeynes@359
   772
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   773
    sh4r.new_pc = sh4r.spc;
nkeynes@374
   774
    sh4_write_sr( sh4r.ssr );
nkeynes@359
   775
    return TRUE;
nkeynes@359
   776
:}
nkeynes@359
   777
JMP @Rn {:
nkeynes@359
   778
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   779
    CHECKSLOTILLEGAL();
nkeynes@359
   780
    sh4r.in_delay_slot = 1;
nkeynes@359
   781
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   782
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   783
    return TRUE;
nkeynes@359
   784
:}
nkeynes@359
   785
JSR @Rn {:
nkeynes@359
   786
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   787
    CHECKSLOTILLEGAL();
nkeynes@359
   788
    sh4r.in_delay_slot = 1;
nkeynes@359
   789
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   790
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   791
    sh4r.pr = pc + 4;
nkeynes@359
   792
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   793
    return TRUE;
nkeynes@359
   794
:}
nkeynes@359
   795
STS MACH, Rn {: sh4r.r[Rn] = (sh4r.mac>>32); :}
nkeynes@359
   796
STS.L MACH, @-Rn {:
nkeynes@359
   797
    sh4r.r[Rn] -= 4;
nkeynes@359
   798
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   799
    MEM_WRITE_LONG( sh4r.r[Rn], (sh4r.mac>>32) );
nkeynes@359
   800
:}
nkeynes@359
   801
STC.L SR, @-Rn {:
nkeynes@359
   802
    CHECKPRIV();
nkeynes@359
   803
    sh4r.r[Rn] -= 4;
nkeynes@359
   804
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   805
    MEM_WRITE_LONG( sh4r.r[Rn], sh4_read_sr() );
nkeynes@359
   806
:}
nkeynes@359
   807
LDS.L @Rm+, MACH {:
nkeynes@359
   808
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   809
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@359
   810
               (((uint64_t)MEM_READ_LONG(sh4r.r[Rm]))<<32);
nkeynes@359
   811
    sh4r.r[Rm] += 4;
nkeynes@359
   812
:}
nkeynes@359
   813
LDC.L @Rm+, SR {:
nkeynes@359
   814
    CHECKSLOTILLEGAL();
nkeynes@359
   815
    CHECKPRIV();
nkeynes@359
   816
    CHECKWALIGN32( sh4r.r[Rm] );
nkeynes@374
   817
    sh4_write_sr( MEM_READ_LONG(sh4r.r[Rm]) );
nkeynes@359
   818
    sh4r.r[Rm] +=4;
nkeynes@359
   819
:}
nkeynes@359
   820
LDS Rm, MACH {:
nkeynes@359
   821
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@359
   822
               (((uint64_t)sh4r.r[Rm])<<32);
nkeynes@359
   823
:}
nkeynes@359
   824
LDC Rm, SR {:
nkeynes@359
   825
    CHECKSLOTILLEGAL();
nkeynes@359
   826
    CHECKPRIV();
nkeynes@374
   827
    sh4_write_sr( sh4r.r[Rm] );
nkeynes@359
   828
:}
nkeynes@359
   829
LDC Rm, SGR {:
nkeynes@359
   830
    CHECKPRIV();
nkeynes@359
   831
    sh4r.sgr = sh4r.r[Rm];
nkeynes@359
   832
:}
nkeynes@359
   833
LDC.L @Rm+, SGR {:
nkeynes@359
   834
    CHECKPRIV();
nkeynes@359
   835
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   836
    sh4r.sgr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   837
    sh4r.r[Rm] +=4;
nkeynes@359
   838
:}
nkeynes@359
   839
STS MACL, Rn {: sh4r.r[Rn] = (uint32_t)sh4r.mac; :}
nkeynes@359
   840
STS.L MACL, @-Rn {:
nkeynes@359
   841
    sh4r.r[Rn] -= 4;
nkeynes@359
   842
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   843
    MEM_WRITE_LONG( sh4r.r[Rn], (uint32_t)sh4r.mac );
nkeynes@359
   844
:}
nkeynes@359
   845
STC.L GBR, @-Rn {:
nkeynes@359
   846
    sh4r.r[Rn] -= 4;
nkeynes@359
   847
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   848
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.gbr );
nkeynes@359
   849
:}
nkeynes@359
   850
LDS.L @Rm+, MACL {:
nkeynes@359
   851
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   852
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   853
               (uint64_t)((uint32_t)MEM_READ_LONG(sh4r.r[Rm]));
nkeynes@359
   854
    sh4r.r[Rm] += 4;
nkeynes@359
   855
:}
nkeynes@359
   856
LDC.L @Rm+, GBR {:
nkeynes@359
   857
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   858
    sh4r.gbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   859
    sh4r.r[Rm] +=4;
nkeynes@359
   860
:}
nkeynes@359
   861
LDS Rm, MACL {:
nkeynes@359
   862
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   863
               (uint64_t)((uint32_t)(sh4r.r[Rm]));
nkeynes@359
   864
:}
nkeynes@359
   865
LDC Rm, GBR {: sh4r.gbr = sh4r.r[Rm]; :}
nkeynes@359
   866
STS PR, Rn {: sh4r.r[Rn] = sh4r.pr; :}
nkeynes@359
   867
STS.L PR, @-Rn {:
nkeynes@359
   868
    sh4r.r[Rn] -= 4;
nkeynes@359
   869
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   870
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.pr );
nkeynes@359
   871
:}
nkeynes@359
   872
STC.L VBR, @-Rn {:
nkeynes@359
   873
    CHECKPRIV();
nkeynes@359
   874
    sh4r.r[Rn] -= 4;
nkeynes@359
   875
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   876
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.vbr );
nkeynes@359
   877
:}
nkeynes@359
   878
LDS.L @Rm+, PR {:
nkeynes@359
   879
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   880
    sh4r.pr = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359
   881
    sh4r.r[Rm] += 4;
nkeynes@359
   882
:}
nkeynes@359
   883
LDC.L @Rm+, VBR {:
nkeynes@359
   884
    CHECKPRIV();
nkeynes@359
   885
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   886
    sh4r.vbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   887
    sh4r.r[Rm] +=4;
nkeynes@359
   888
:}
nkeynes@359
   889
LDS Rm, PR {: sh4r.pr = sh4r.r[Rm]; :}
nkeynes@359
   890
LDC Rm, VBR {:
nkeynes@359
   891
    CHECKPRIV();
nkeynes@359
   892
    sh4r.vbr = sh4r.r[Rm];
nkeynes@359
   893
:}
nkeynes@359
   894
STC SGR, Rn {:
nkeynes@359
   895
    CHECKPRIV();
nkeynes@359
   896
    sh4r.r[Rn] = sh4r.sgr;
nkeynes@359
   897
:}
nkeynes@359
   898
STC.L SGR, @-Rn {:
nkeynes@359
   899
    CHECKPRIV();
nkeynes@359
   900
    sh4r.r[Rn] -= 4;
nkeynes@359
   901
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   902
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.sgr );
nkeynes@359
   903
:}
nkeynes@359
   904
STC.L SSR, @-Rn {:
nkeynes@359
   905
    CHECKPRIV();
nkeynes@359
   906
    sh4r.r[Rn] -= 4;
nkeynes@359
   907
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   908
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.ssr );
nkeynes@359
   909
:}
nkeynes@359
   910
LDC.L @Rm+, SSR {:
nkeynes@359
   911
    CHECKPRIV();
nkeynes@359
   912
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   913
    sh4r.ssr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   914
    sh4r.r[Rm] +=4;
nkeynes@359
   915
:}
nkeynes@359
   916
LDC Rm, SSR {:
nkeynes@359
   917
    CHECKPRIV();
nkeynes@359
   918
    sh4r.ssr = sh4r.r[Rm];
nkeynes@359
   919
:}
nkeynes@359
   920
STC.L SPC, @-Rn {:
nkeynes@359
   921
    CHECKPRIV();
nkeynes@359
   922
    sh4r.r[Rn] -= 4;
nkeynes@359
   923
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   924
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.spc );
nkeynes@359
   925
:}
nkeynes@359
   926
LDC.L @Rm+, SPC {:
nkeynes@359
   927
    CHECKPRIV();
nkeynes@359
   928
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   929
    sh4r.spc = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   930
    sh4r.r[Rm] +=4;
nkeynes@359
   931
:}
nkeynes@359
   932
LDC Rm, SPC {:
nkeynes@359
   933
    CHECKPRIV();
nkeynes@359
   934
    sh4r.spc = sh4r.r[Rm];
nkeynes@359
   935
:}
nkeynes@359
   936
STS FPUL, Rn {: sh4r.r[Rn] = sh4r.fpul; :}
nkeynes@359
   937
STS.L FPUL, @-Rn {:
nkeynes@359
   938
    sh4r.r[Rn] -= 4;
nkeynes@359
   939
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   940
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpul );
nkeynes@359
   941
:}
nkeynes@359
   942
LDS.L @Rm+, FPUL {:
nkeynes@359
   943
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   944
    sh4r.fpul = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   945
    sh4r.r[Rm] +=4;
nkeynes@359
   946
:}
nkeynes@359
   947
LDS Rm, FPUL {: sh4r.fpul = sh4r.r[Rm]; :}
nkeynes@359
   948
STS FPSCR, Rn {: sh4r.r[Rn] = sh4r.fpscr; :}
nkeynes@359
   949
STS.L FPSCR, @-Rn {:
nkeynes@359
   950
    sh4r.r[Rn] -= 4;
nkeynes@359
   951
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   952
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpscr );
nkeynes@359
   953
:}
nkeynes@359
   954
LDS.L @Rm+, FPSCR {:
nkeynes@359
   955
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   956
    sh4r.fpscr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   957
    sh4r.r[Rm] +=4;
nkeynes@374
   958
    sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
nkeynes@359
   959
:}
nkeynes@374
   960
LDS Rm, FPSCR {: 
nkeynes@374
   961
    sh4r.fpscr = sh4r.r[Rm]; 
nkeynes@374
   962
    sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
nkeynes@374
   963
:}
nkeynes@359
   964
STC DBR, Rn {: CHECKPRIV(); sh4r.r[Rn] = sh4r.dbr; :}
nkeynes@359
   965
STC.L DBR, @-Rn {:
nkeynes@359
   966
    CHECKPRIV();
nkeynes@359
   967
    sh4r.r[Rn] -= 4;
nkeynes@359
   968
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   969
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.dbr );
nkeynes@359
   970
:}
nkeynes@359
   971
LDC.L @Rm+, DBR {:
nkeynes@359
   972
    CHECKPRIV();
nkeynes@359
   973
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   974
    sh4r.dbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359
   975
    sh4r.r[Rm] +=4;
nkeynes@359
   976
:}
nkeynes@359
   977
LDC Rm, DBR {:
nkeynes@359
   978
    CHECKPRIV();
nkeynes@359
   979
    sh4r.dbr = sh4r.r[Rm];
nkeynes@359
   980
:}
nkeynes@359
   981
STC.L Rm_BANK, @-Rn {:
nkeynes@359
   982
    CHECKPRIV();
nkeynes@359
   983
    sh4r.r[Rn] -= 4;
nkeynes@359
   984
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   985
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r_bank[Rm_BANK] );
nkeynes@359
   986
:}
nkeynes@359
   987
LDC.L @Rm+, Rn_BANK {:
nkeynes@359
   988
    CHECKPRIV();
nkeynes@359
   989
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   990
    sh4r.r_bank[Rn_BANK] = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359
   991
    sh4r.r[Rm] += 4;
nkeynes@359
   992
:}
nkeynes@359
   993
LDC Rm, Rn_BANK {:
nkeynes@359
   994
    CHECKPRIV();
nkeynes@359
   995
    sh4r.r_bank[Rn_BANK] = sh4r.r[Rm];
nkeynes@359
   996
:}
nkeynes@359
   997
STC SR, Rn {: 
nkeynes@359
   998
    CHECKPRIV();
nkeynes@359
   999
    sh4r.r[Rn] = sh4_read_sr();
nkeynes@359
  1000
:}
nkeynes@359
  1001
STC GBR, Rn {:
nkeynes@359
  1002
    CHECKPRIV();
nkeynes@359
  1003
    sh4r.r[Rn] = sh4r.gbr;
nkeynes@359
  1004
:}
nkeynes@359
  1005
STC VBR, Rn {:
nkeynes@359
  1006
    CHECKPRIV();
nkeynes@359
  1007
    sh4r.r[Rn] = sh4r.vbr;
nkeynes@359
  1008
:}
nkeynes@359
  1009
STC SSR, Rn {:
nkeynes@359
  1010
    CHECKPRIV();
nkeynes@359
  1011
    sh4r.r[Rn] = sh4r.ssr;
nkeynes@359
  1012
:}
nkeynes@359
  1013
STC SPC, Rn {:
nkeynes@359
  1014
    CHECKPRIV();
nkeynes@359
  1015
    sh4r.r[Rn] = sh4r.spc;
nkeynes@359
  1016
:}
nkeynes@359
  1017
STC Rm_BANK, Rn {:
nkeynes@359
  1018
    CHECKPRIV();
nkeynes@359
  1019
    sh4r.r[Rn] = sh4r.r_bank[Rm_BANK];
nkeynes@359
  1020
:}
nkeynes@359
  1021
nkeynes@359
  1022
FADD FRm, FRn {:
nkeynes@359
  1023
    CHECKFPUEN();
nkeynes@359
  1024
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1025
	DR(FRn) += DR(FRm);
nkeynes@359
  1026
    } else {
nkeynes@359
  1027
	FR(FRn) += FR(FRm);
nkeynes@359
  1028
    }
nkeynes@359
  1029
:}
nkeynes@359
  1030
FSUB FRm, FRn {:
nkeynes@359
  1031
    CHECKFPUEN();
nkeynes@359
  1032
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1033
	DR(FRn) -= DR(FRm);
nkeynes@359
  1034
    } else {
nkeynes@359
  1035
	FR(FRn) -= FR(FRm);
nkeynes@359
  1036
    }
nkeynes@359
  1037
:}
nkeynes@359
  1038
nkeynes@359
  1039
FMUL FRm, FRn {:
nkeynes@359
  1040
    CHECKFPUEN();
nkeynes@359
  1041
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1042
	DR(FRn) *= DR(FRm);
nkeynes@359
  1043
    } else {
nkeynes@359
  1044
	FR(FRn) *= FR(FRm);
nkeynes@359
  1045
    }
nkeynes@359
  1046
:}
nkeynes@359
  1047
nkeynes@359
  1048
FDIV FRm, FRn {:
nkeynes@359
  1049
    CHECKFPUEN();
nkeynes@359
  1050
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1051
	DR(FRn) /= DR(FRm);
nkeynes@359
  1052
    } else {
nkeynes@359
  1053
	FR(FRn) /= FR(FRm);
nkeynes@359
  1054
    }
nkeynes@359
  1055
:}
nkeynes@359
  1056
nkeynes@359
  1057
FCMP/EQ FRm, FRn {:
nkeynes@359
  1058
    CHECKFPUEN();
nkeynes@359
  1059
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1060
	sh4r.t = ( DR(FRn) == DR(FRm) ? 1 : 0 );
nkeynes@359
  1061
    } else {
nkeynes@359
  1062
	sh4r.t = ( FR(FRn) == FR(FRm) ? 1 : 0 );
nkeynes@359
  1063
    }
nkeynes@359
  1064
:}
nkeynes@359
  1065
nkeynes@359
  1066
FCMP/GT FRm, FRn {:
nkeynes@359
  1067
    CHECKFPUEN();
nkeynes@359
  1068
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1069
	sh4r.t = ( DR(FRn) > DR(FRm) ? 1 : 0 );
nkeynes@359
  1070
    } else {
nkeynes@359
  1071
	sh4r.t = ( FR(FRn) > FR(FRm) ? 1 : 0 );
nkeynes@359
  1072
    }
nkeynes@359
  1073
:}
nkeynes@359
  1074
nkeynes@359
  1075
FMOV @(R0, Rm), FRn {: MEM_FP_READ( sh4r.r[Rm] + R0, FRn ); :}
nkeynes@359
  1076
FMOV FRm, @(R0, Rn) {: MEM_FP_WRITE( sh4r.r[Rn] + R0, FRm ); :}
nkeynes@359
  1077
FMOV @Rm, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); :}
nkeynes@359
  1078
FMOV @Rm+, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); sh4r.r[Rm] += FP_WIDTH; :}
nkeynes@359
  1079
FMOV FRm, @Rn {: MEM_FP_WRITE( sh4r.r[Rn], FRm ); :}
nkeynes@359
  1080
FMOV FRm, @-Rn {: sh4r.r[Rn] -= FP_WIDTH; MEM_FP_WRITE( sh4r.r[Rn], FRm ); :}
nkeynes@359
  1081
FMOV FRm, FRn {: 
nkeynes@359
  1082
    if( IS_FPU_DOUBLESIZE() )
nkeynes@359
  1083
	DR(FRn) = DR(FRm);
nkeynes@359
  1084
    else
nkeynes@359
  1085
	FR(FRn) = FR(FRm);
nkeynes@359
  1086
:}
nkeynes@359
  1087
FSTS FPUL, FRn {: CHECKFPUEN(); FR(FRn) = FPULf; :}
nkeynes@359
  1088
FLDS FRm, FPUL {: CHECKFPUEN(); FPULf = FR(FRm); :}
nkeynes@359
  1089
FLOAT FPUL, FRn {: 
nkeynes@359
  1090
    CHECKFPUEN();
nkeynes@374
  1091
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
  1092
	if( FRn&1 ) { // No, really...
nkeynes@374
  1093
	    dtmp = (double)FPULi;
nkeynes@374
  1094
	    FR(FRn) = *(((float *)&dtmp)+1);
nkeynes@374
  1095
	} else {
nkeynes@374
  1096
	    DRF(FRn>>1) = (double)FPULi;
nkeynes@374
  1097
	}
nkeynes@374
  1098
    } else {
nkeynes@359
  1099
	FR(FRn) = (float)FPULi;
nkeynes@374
  1100
    }
nkeynes@359
  1101
:}
nkeynes@359
  1102
FTRC FRm, FPUL {:
nkeynes@359
  1103
    CHECKFPUEN();
nkeynes@359
  1104
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
  1105
	if( FRm&1 ) {
nkeynes@374
  1106
	    dtmp = 0;
nkeynes@374
  1107
	    *(((float *)&dtmp)+1) = FR(FRm);
nkeynes@374
  1108
	} else {
nkeynes@374
  1109
	    dtmp = DRF(FRm>>1);
nkeynes@374
  1110
	}
nkeynes@359
  1111
        if( dtmp >= MAX_INTF )
nkeynes@359
  1112
            FPULi = MAX_INT;
nkeynes@359
  1113
        else if( dtmp <= MIN_INTF )
nkeynes@359
  1114
            FPULi = MIN_INT;
nkeynes@359
  1115
        else 
nkeynes@359
  1116
            FPULi = (int32_t)dtmp;
nkeynes@359
  1117
    } else {
nkeynes@359
  1118
	ftmp = FR(FRm);
nkeynes@359
  1119
	if( ftmp >= MAX_INTF )
nkeynes@359
  1120
	    FPULi = MAX_INT;
nkeynes@359
  1121
	else if( ftmp <= MIN_INTF )
nkeynes@359
  1122
	    FPULi = MIN_INT;
nkeynes@359
  1123
	else
nkeynes@359
  1124
	    FPULi = (int32_t)ftmp;
nkeynes@359
  1125
    }
nkeynes@359
  1126
:}
nkeynes@359
  1127
FNEG FRn {:
nkeynes@359
  1128
    CHECKFPUEN();
nkeynes@359
  1129
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1130
	DR(FRn) = -DR(FRn);
nkeynes@359
  1131
    } else {
nkeynes@359
  1132
        FR(FRn) = -FR(FRn);
nkeynes@359
  1133
    }
nkeynes@359
  1134
:}
nkeynes@359
  1135
FABS FRn {:
nkeynes@359
  1136
    CHECKFPUEN();
nkeynes@359
  1137
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1138
	DR(FRn) = fabs(DR(FRn));
nkeynes@359
  1139
    } else {
nkeynes@359
  1140
        FR(FRn) = fabsf(FR(FRn));
nkeynes@359
  1141
    }
nkeynes@359
  1142
:}
nkeynes@359
  1143
FSQRT FRn {:
nkeynes@359
  1144
    CHECKFPUEN();
nkeynes@359
  1145
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1146
	DR(FRn) = sqrt(DR(FRn));
nkeynes@359
  1147
    } else {
nkeynes@359
  1148
        FR(FRn) = sqrtf(FR(FRn));
nkeynes@359
  1149
    }
nkeynes@359
  1150
:}
nkeynes@359
  1151
FLDI0 FRn {:
nkeynes@359
  1152
    CHECKFPUEN();
nkeynes@359
  1153
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1154
	DR(FRn) = 0.0;
nkeynes@359
  1155
    } else {
nkeynes@359
  1156
        FR(FRn) = 0.0;
nkeynes@359
  1157
    }
nkeynes@359
  1158
:}
nkeynes@359
  1159
FLDI1 FRn {:
nkeynes@359
  1160
    CHECKFPUEN();
nkeynes@359
  1161
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1162
	DR(FRn) = 1.0;
nkeynes@359
  1163
    } else {
nkeynes@359
  1164
        FR(FRn) = 1.0;
nkeynes@359
  1165
    }
nkeynes@359
  1166
:}
nkeynes@359
  1167
FMAC FR0, FRm, FRn {:
nkeynes@359
  1168
    CHECKFPUEN();
nkeynes@359
  1169
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1170
        DR(FRn) += DR(FRm)*DR(0);
nkeynes@359
  1171
    } else {
nkeynes@359
  1172
	FR(FRn) += FR(FRm)*FR(0);
nkeynes@359
  1173
    }
nkeynes@359
  1174
:}
nkeynes@374
  1175
FRCHG {: 
nkeynes@374
  1176
    CHECKFPUEN(); 
nkeynes@374
  1177
    sh4r.fpscr ^= FPSCR_FR; 
nkeynes@374
  1178
    sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
nkeynes@374
  1179
:}
nkeynes@359
  1180
FSCHG {: CHECKFPUEN(); sh4r.fpscr ^= FPSCR_SZ; :}
nkeynes@359
  1181
FCNVSD FPUL, FRn {:
nkeynes@359
  1182
    CHECKFPUEN();
nkeynes@359
  1183
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1184
	DR(FRn) = (double)FPULf;
nkeynes@359
  1185
    }
nkeynes@359
  1186
:}
nkeynes@359
  1187
FCNVDS FRm, FPUL {:
nkeynes@359
  1188
    CHECKFPUEN();
nkeynes@359
  1189
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1190
	FPULf = (float)DR(FRm);
nkeynes@359
  1191
    }
nkeynes@359
  1192
:}
nkeynes@359
  1193
nkeynes@359
  1194
FSRRA FRn {:
nkeynes@359
  1195
    CHECKFPUEN();
nkeynes@359
  1196
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1197
	FR(FRn) = 1.0/sqrtf(FR(FRn));
nkeynes@359
  1198
    }
nkeynes@359
  1199
:}
nkeynes@359
  1200
FIPR FVm, FVn {:
nkeynes@359
  1201
    CHECKFPUEN();
nkeynes@359
  1202
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1203
        int tmp2 = FVn<<2;
nkeynes@359
  1204
        tmp = FVm<<2;
nkeynes@359
  1205
        FR(tmp2+3) = FR(tmp)*FR(tmp2) +
nkeynes@359
  1206
            FR(tmp+1)*FR(tmp2+1) +
nkeynes@359
  1207
            FR(tmp+2)*FR(tmp2+2) +
nkeynes@359
  1208
            FR(tmp+3)*FR(tmp2+3);
nkeynes@359
  1209
    }
nkeynes@359
  1210
:}
nkeynes@359
  1211
FSCA FPUL, FRn {:
nkeynes@359
  1212
    CHECKFPUEN();
nkeynes@359
  1213
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@391
  1214
	sh4_fsca( FPULi, &(DRF(FRn>>1)) );
nkeynes@391
  1215
	/*
nkeynes@359
  1216
        float angle = (((float)(FPULi&0xFFFF))/65536.0) * 2 * M_PI;
nkeynes@359
  1217
        FR(FRn) = sinf(angle);
nkeynes@359
  1218
        FR((FRn)+1) = cosf(angle);
nkeynes@391
  1219
	*/
nkeynes@359
  1220
    }
nkeynes@359
  1221
:}
nkeynes@359
  1222
FTRV XMTRX, FVn {:
nkeynes@359
  1223
    CHECKFPUEN();
nkeynes@359
  1224
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@391
  1225
	sh4_ftrv(&(DRF(FVn<<1)), &sh4r.fr[((~sh4r.fpscr)&FPSCR_FR)>>21][0]);
nkeynes@391
  1226
	/*
nkeynes@359
  1227
        tmp = FVn<<2;
nkeynes@374
  1228
	float *xf = &sh4r.fr[((~sh4r.fpscr)&FPSCR_FR)>>21][0];
nkeynes@359
  1229
        float fv[4] = { FR(tmp), FR(tmp+1), FR(tmp+2), FR(tmp+3) };
nkeynes@374
  1230
        FR(tmp) = xf[1] * fv[0] + xf[5]*fv[1] +
nkeynes@374
  1231
	    xf[9]*fv[2] + xf[13]*fv[3];
nkeynes@374
  1232
        FR(tmp+1) = xf[0] * fv[0] + xf[4]*fv[1] +
nkeynes@374
  1233
	    xf[8]*fv[2] + xf[12]*fv[3];
nkeynes@374
  1234
        FR(tmp+2) = xf[3] * fv[0] + xf[7]*fv[1] +
nkeynes@374
  1235
	    xf[11]*fv[2] + xf[15]*fv[3];
nkeynes@374
  1236
        FR(tmp+3) = xf[2] * fv[0] + xf[6]*fv[1] +
nkeynes@374
  1237
	    xf[10]*fv[2] + xf[14]*fv[3];
nkeynes@391
  1238
	*/
nkeynes@359
  1239
    }
nkeynes@359
  1240
:}
nkeynes@359
  1241
UNDEF {:
nkeynes@359
  1242
    UNDEF(ir);
nkeynes@359
  1243
:}
nkeynes@359
  1244
%%
nkeynes@359
  1245
    sh4r.pc = sh4r.new_pc;
nkeynes@359
  1246
    sh4r.new_pc += 2;
nkeynes@359
  1247
    sh4r.in_delay_slot = 0;
nkeynes@359
  1248
    return TRUE;
nkeynes@359
  1249
}
.