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lxdream.org :: lxdream/src/aica/aica.c
lxdream 0.9.1
released Jun 29
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filename src/aica/aica.c
changeset 301:1ace395139c3
prev241:776e46e58d6d
next431:248dd77a9e44
author nkeynes
date Wed Jan 17 09:37:22 2007 +0000 (14 years ago)
permissions -rw-r--r--
last change Implement writing to the RTC registers
file annotate diff log raw
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/**
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 * $Id: aica.c,v 1.21 2007-01-17 09:37:22 nkeynes Exp $
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 * 
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 * This is the core sound system (ie the bit which does the actual work)
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE aica_module
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#include <time.h>
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#include "dream.h"
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#include "dreamcast.h"
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#include "mem.h"
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#include "aica/aica.h"
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#include "armcore.h"
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#include "aica/audio.h"
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#define MMIO_IMPL
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#include "aica.h"
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MMIO_REGION_READ_DEFFN( AICA0 )
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MMIO_REGION_READ_DEFFN( AICA1 )
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MMIO_REGION_READ_DEFFN( AICA2 )
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void aica_init( void );
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void aica_reset( void );
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void aica_start( void );
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void aica_stop( void );
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void aica_save_state( FILE *f );
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int aica_load_state( FILE *f );
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uint32_t aica_run_slice( uint32_t );
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struct dreamcast_module aica_module = { "AICA", aica_init, aica_reset, 
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					aica_start, aica_run_slice, aica_stop,
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					aica_save_state, aica_load_state };
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/* 20 years in seconds */
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#define RTC_OFFSET 631152000
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unsigned int aica_time_of_day = 0;
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/**
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 * Initialize the AICA subsystem. Note requires that 
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 */
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void aica_init( void )
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{
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    register_io_regions( mmio_list_spu );
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    MMIO_NOTRACE(AICA0);
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    MMIO_NOTRACE(AICA1);
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    arm_mem_init();
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    aica_reset();
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}
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void aica_reset( void )
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{
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    struct timeval tv;
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    arm_reset();
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    aica_event(2); /* Pre-deliver a timer interrupt */
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    // gettimeofday( &tv, NULL );
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    // aica_time_of_day = tv.tv_sec + RTC_OFFSET;
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    aica_time_of_day = 0x5bfc8900;
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}
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void aica_start( void )
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{
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}
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/**
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 * Keep track of what we've done so far this second, to try to keep the
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 * precision of samples/second.
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 */
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int samples_done = 0;
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uint32_t nanosecs_done = 0;
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uint32_t aica_run_slice( uint32_t nanosecs )
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{
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    /* Run arm instructions */
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    int reset = MMIO_READ( AICA2, AICA_RESET );
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    if( (reset & 1) == 0 ) { /* Running */
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	int num_samples = (int)((uint64_t)AICA_SAMPLE_RATE * (nanosecs_done + nanosecs) / 1000000000) - samples_done;
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	num_samples = arm_run_slice( num_samples );
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	audio_mix_samples( num_samples );
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	samples_done += num_samples;
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	nanosecs_done += nanosecs;
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    }
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    if( nanosecs_done > 1000000000 ) {
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	samples_done -= AICA_SAMPLE_RATE;
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	nanosecs_done -= 1000000000;
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	aica_time_of_day++;
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    }
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    return nanosecs;
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}
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void aica_stop( void )
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{
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}
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void aica_save_state( FILE *f )
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{
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    arm_save_state( f );
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}
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int aica_load_state( FILE *f )
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{
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    return arm_load_state( f );
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}
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int aica_event_pending = 0;
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int aica_clear_count = 0;
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/* Note: This is probably not necessarily technically correct but it should
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 * work in the meantime.
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 */
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void aica_event( int event )
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{
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    if( aica_event_pending == 0 )
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	armr.int_pending |= CPSR_F;
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    aica_event_pending |= (1<<event);
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    int pending = MMIO_READ( AICA2, AICA_IRQ );
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    if( pending == 0 || event < pending )
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	MMIO_WRITE( AICA2, AICA_IRQ, event );
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}
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void aica_clear_event( )
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{
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    aica_clear_count++;
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    if( aica_clear_count == 4 ) {
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	int i;
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	aica_clear_count = 0;
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	for( i=0; i<8; i++ ) {
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	    if( aica_event_pending & (1<<i) ) {
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		aica_event_pending &= ~(1<<i);
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		break;
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	    }
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	}
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	for( ;i<8; i++ ) {
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	    if( aica_event_pending & (1<<i) ) {
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		MMIO_WRITE( AICA2, AICA_IRQ, i );
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		break;
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	    }
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	}
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	if( aica_event_pending == 0 )
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	    armr.int_pending &= ~CPSR_F;
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    }
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}
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void aica_enable( void )
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{
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    mmio_region_AICA2_write( AICA_RESET, MMIO_READ(AICA2,AICA_RESET) & ~1 );
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}
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/** Channel register structure:
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 * 00  4  Channel config
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 * 04  4  Waveform address lo (16 bits)
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 * 08  4  Loop start address
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 * 0C  4  Loop end address
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 * 10  4  Volume envelope
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 * 14  4  Init to 0x1F
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 * 18  4  Frequency (floating point)
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 * 1C  4  ?? 
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 * 20  4  ??
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 * 24  1  Pan
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 * 25  1  ??
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 * 26  
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 * 27  
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 * 28  1  ??
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 * 29  1  Volume
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 * 2C
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 * 30
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 * 
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/* Write to channels 0-31 */
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void mmio_region_AICA0_write( uint32_t reg, uint32_t val )
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{
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    MMIO_WRITE( AICA0, reg, val );
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    aica_write_channel( reg >> 7, reg % 128, val );
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    //    DEBUG( "AICA0 Write %08X => %08X", val, reg );
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}
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/* Write to channels 32-64 */
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void mmio_region_AICA1_write( uint32_t reg, uint32_t val )
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{
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    MMIO_WRITE( AICA1, reg, val );
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    aica_write_channel( (reg >> 7) + 32, reg % 128, val );
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    // DEBUG( "AICA1 Write %08X => %08X", val, reg );
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}
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/**
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 * AICA control registers 
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 */
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void mmio_region_AICA2_write( uint32_t reg, uint32_t val )
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{
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    uint32_t tmp;
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    switch( reg ) {
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    case AICA_RESET:
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	tmp = MMIO_READ( AICA2, AICA_RESET );
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	if( (tmp & 1) == 1 && (val & 1) == 0 ) {
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	    /* ARM enabled - execute a core reset */
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	    DEBUG( "ARM enabled" );
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	    arm_reset();
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	    samples_done = 0;
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	    nanosecs_done = 0;
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	} else if( (tmp&1) == 0 && (val&1) == 1 ) {
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	    DEBUG( "ARM disabled" );
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	}
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	MMIO_WRITE( AICA2, AICA_RESET, val );
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	break;
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    case AICA_IRQCLEAR:
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	aica_clear_event();
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	break;
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    default:
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	MMIO_WRITE( AICA2, reg, val );
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	break;
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    }
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}
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int32_t mmio_region_AICARTC_read( uint32_t reg )
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{
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    struct timeval tv;
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    int32_t rv = 0;
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    switch( reg ) {
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    case AICA_RTCHI:
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        rv = (aica_time_of_day >> 16) & 0xFFFF;
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	break;
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    case AICA_RTCLO:
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	rv = aica_time_of_day & 0xFFFF;
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	break;
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    }
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    // DEBUG( "Read AICA RTC %d => %08X", reg, rv );
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    return rv;
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}
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void mmio_region_AICARTC_write( uint32_t reg, uint32_t val )
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{
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    switch( reg ) {
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    case AICA_RTCEN:
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	MMIO_WRITE( AICARTC, reg, val&0x01 );
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	break;
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    case AICA_RTCLO:
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	if( MMIO_READ( AICARTC, AICA_RTCEN ) & 0x01 ) {
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	    aica_time_of_day = (aica_time_of_day & 0xFFFF0000) | (val & 0xFFFF);
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	}
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	break;
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    case AICA_RTCHI:
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	if( MMIO_READ( AICARTC, AICA_RTCEN ) & 0x01 ) {
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	    aica_time_of_day = (aica_time_of_day & 0xFFFF) | (val<<16);
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	    MMIO_WRITE( AICARTC, AICA_RTCEN, 0 );
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	}
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	break;
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    }
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}
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/**
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 * Translate the channel frequency to a sample rate. The frequency is a
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 * 14-bit floating point number, where bits 0..9 is the mantissa,
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 * 11..14 is the signed exponent (-8 to +7). Bit 10 appears to
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 * be unused.
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 *
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 * @return sample rate in samples per second.
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 */
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uint32_t aica_frequency_to_sample_rate( uint32_t freq )
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{
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    uint32_t exponent = (freq & 0x3800) >> 11;
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    uint32_t mantissa = freq & 0x03FF;
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    uint32_t rate;
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    if( freq & 0x4000 ) {
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	/* neg exponent - rate < 44100 */
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	exponent = 8 - exponent;
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	rate = (44100 >> exponent) +
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	    ((44100 * mantissa) >> (10+exponent));
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    } else {
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	/* pos exponent - rate > 44100 */
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	rate = (44100 << exponent) +
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	    ((44100 * mantissa) >> (10-exponent));
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    }
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    return rate;
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   295
}
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/**
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 * Derived directly from Dan Potter's log table
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 */
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uint8_t aica_volume_table[256] = {
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      0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   1,
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      1,   1,   1,   1,   1,   1,   2,   2,   2,   2,   2,   3,   3,   3,   3,   4,
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      4,   4,   4,   5,   5,   5,   5,   6,   6,   6,   7,   7,   7,   8,   8,   9,
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      9,   9,  10,  10,  11,  11,  11,  12,  12,  13,  13,  14,  14,  15,  15,  16,
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     16,  17,  17,  18,  18,  19,  19,  20,  20,  21,  22,  22,  23,  23,  24,  25,
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     25,  26,  27,  27,  28,  29,  29,  30,  31,  31,  32,  33,  34,  34,  35,  36,
nkeynes@82
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     37,  37,  38,  39,  40,  40,  41,  42,  43,  44,  45,  45,  46,  47,  48,  49,
nkeynes@82
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     50,  51,  52,  52,  53,  54,  55,  56,  57,  58,  59,  60,  61,  62,  63,  64,
nkeynes@82
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     65,  66,  67,  68,  69,  70,  71,  72,  73,  74,  76,  77,  78,  79,  80,  81,
nkeynes@82
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     82,  83,  85,  86,  87,  88,  89,  90,  92,  93,  94,  95,  97,  98,  99, 100,
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   311
    102, 103, 104, 105, 107, 108, 109, 111, 112, 113, 115, 116, 117, 119, 120, 121,
nkeynes@82
   312
    123, 124, 126, 127, 128, 130, 131, 133, 134, 136, 137, 139, 140, 142, 143, 145,
nkeynes@82
   313
    146, 148, 149, 151, 152, 154, 155, 157, 159, 160, 162, 163, 165, 167, 168, 170,
nkeynes@82
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    171, 173, 175, 176, 178, 180, 181, 183, 185, 187, 188, 190, 192, 194, 195, 197,
nkeynes@82
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    199, 201, 202, 204, 206, 208, 210, 211, 213, 215, 217, 219, 221, 223, 224, 226,
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    228, 230, 232, 234, 236, 238, 240, 242, 244, 246, 248, 250, 252, 253, 254, 255 };
nkeynes@82
   317
nkeynes@82
   318
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void aica_write_channel( int channelNo, uint32_t reg, uint32_t val ) 
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   320
{
nkeynes@66
   321
    val &= 0x0000FFFF;
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   322
    audio_channel_t channel = audio_get_channel(channelNo);
nkeynes@66
   323
    switch( reg ) {
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   324
    case 0x00: /* Config + high address bits*/
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   325
	channel->start = (channel->start & 0xFFFF) | ((val&0x1F) << 16);
nkeynes@66
   326
	if( val & 0x200 ) 
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   327
	    channel->loop = TRUE;
nkeynes@66
   328
	else 
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   329
	    channel->loop = FALSE;
nkeynes@66
   330
	switch( (val >> 7) & 0x03 ) {
nkeynes@66
   331
	case 0:
nkeynes@66
   332
	    channel->sample_format = AUDIO_FMT_16BIT;
nkeynes@66
   333
	    break;
nkeynes@66
   334
	case 1:
nkeynes@66
   335
	    channel->sample_format = AUDIO_FMT_8BIT;
nkeynes@66
   336
	    break;
nkeynes@66
   337
	case 2:
nkeynes@66
   338
	case 3:
nkeynes@66
   339
	    channel->sample_format = AUDIO_FMT_ADPCM;
nkeynes@66
   340
	    break;
nkeynes@66
   341
	}
nkeynes@66
   342
	switch( (val >> 14) & 0x03 ) {
nkeynes@66
   343
	case 2: 
nkeynes@66
   344
	    audio_stop_channel( channelNo ); 
nkeynes@66
   345
	    break;
nkeynes@66
   346
	case 3: 
nkeynes@66
   347
	    audio_start_channel( channelNo ); 
nkeynes@66
   348
	    break;
nkeynes@66
   349
	default:
nkeynes@66
   350
	    break;
nkeynes@66
   351
	    /* Hrmm... */
nkeynes@66
   352
	}
nkeynes@66
   353
	break;
nkeynes@66
   354
    case 0x04: /* Low 16 address bits */
nkeynes@66
   355
	channel->start = (channel->start & 0x001F0000) | val;
nkeynes@66
   356
	break;
nkeynes@66
   357
    case 0x08: /* Loop start */
nkeynes@66
   358
	channel->loop_start = val;
nkeynes@66
   359
	break;
nkeynes@73
   360
    case 0x0C: /* End */
nkeynes@73
   361
	channel->end = val;
nkeynes@66
   362
	break;
nkeynes@66
   363
    case 0x10: /* Envelope register 1 */
nkeynes@66
   364
	break;
nkeynes@66
   365
    case 0x14: /* Envelope register 2 */
nkeynes@66
   366
	break;
nkeynes@66
   367
    case 0x18: /* Frequency */
nkeynes@66
   368
	channel->sample_rate = aica_frequency_to_sample_rate ( val );
nkeynes@66
   369
	break;
nkeynes@66
   370
    case 0x1C: /* ??? */
nkeynes@66
   371
    case 0x20: /* ??? */
nkeynes@66
   372
    case 0x24: /* Volume? /pan */
nkeynes@82
   373
	val = val & 0x1F;
nkeynes@82
   374
	if( val <= 0x0F ) 
nkeynes@82
   375
	    val = 0x0F - val; /* Convert to smooth pan over 0..31 */
nkeynes@82
   376
	channel->pan = val;
nkeynes@66
   377
	break;
nkeynes@66
   378
    case 0x28: /* Volume */
nkeynes@82
   379
	channel->vol = aica_volume_table[val & 0xFF];
nkeynes@66
   380
	break;
nkeynes@66
   381
    default: /* ??? */
nkeynes@66
   382
	break;
nkeynes@66
   383
    }
nkeynes@66
   384
nkeynes@66
   385
}
.