nkeynes@31 | 1 | /**
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nkeynes@103 | 2 | * $Id: pvr2.h,v 1.9 2006-03-13 12:39:07 nkeynes Exp $
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nkeynes@31 | 3 | *
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nkeynes@103 | 4 | * PVR2 (video chip) functions and macros.
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nkeynes@31 | 5 | *
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nkeynes@31 | 6 | * Copyright (c) 2005 Nathan Keynes.
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nkeynes@31 | 7 | *
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nkeynes@31 | 8 | * This program is free software; you can redistribute it and/or modify
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nkeynes@31 | 9 | * it under the terms of the GNU General Public License as published by
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nkeynes@31 | 10 | * the Free Software Foundation; either version 2 of the License, or
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nkeynes@31 | 11 | * (at your option) any later version.
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nkeynes@31 | 12 | *
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nkeynes@31 | 13 | * This program is distributed in the hope that it will be useful,
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nkeynes@31 | 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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nkeynes@31 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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nkeynes@31 | 16 | * GNU General Public License for more details.
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nkeynes@31 | 17 | */
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nkeynes@31 | 18 |
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nkeynes@103 | 19 | #include "dream.h"
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nkeynes@103 | 20 | #include "mem.h"
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nkeynes@103 | 21 | #include "video.h"
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nkeynes@103 | 22 | #include "pvr2/pvr2mmio.h"
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nkeynes@103 | 23 | #include <GL/gl.h>
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nkeynes@1 | 24 |
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nkeynes@1 | 25 |
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nkeynes@1 | 26 | #define DISPMODE_DE 0x00000001 /* Display enable */
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nkeynes@1 | 27 | #define DISPMODE_SD 0x00000002 /* Scan double */
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nkeynes@1 | 28 | #define DISPMODE_COL 0x0000000C /* Colour mode */
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nkeynes@1 | 29 | #define DISPMODE_CD 0x08000000 /* Clock double */
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nkeynes@1 | 30 |
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nkeynes@94 | 31 | #define COLFMT_RGB15 0x00000000
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nkeynes@94 | 32 | #define COLFMT_RGB16 0x00000004
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nkeynes@94 | 33 | #define COLFMT_RGB24 0x00000008
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nkeynes@94 | 34 | #define COLFMT_RGB32 0x0000000C
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nkeynes@1 | 35 |
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nkeynes@1 | 36 | #define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
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nkeynes@1 | 37 | #define DISPSIZE_LPF 0x000FFC00 /* lines per field */
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nkeynes@1 | 38 | #define DISPSIZE_PPL 0x000003FF /* pixel words (32 bit) per line */
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nkeynes@1 | 39 |
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nkeynes@103 | 40 | #define DISPCFG_VP 0x00000001 /* V-sync polarity */
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nkeynes@103 | 41 | #define DISPCFG_HP 0x00000002 /* H-sync polarity */
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nkeynes@103 | 42 | #define DISPCFG_I 0x00000010 /* Interlace enable */
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nkeynes@103 | 43 | #define DISPCFG_BS 0x000000C0 /* Broadcast standard */
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nkeynes@103 | 44 | #define DISPCFG_VO 0x00000100 /* Video output enable */
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nkeynes@1 | 45 |
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nkeynes@1 | 46 | #define BS_NTSC 0x00000000
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nkeynes@1 | 47 | #define BS_PAL 0x00000040
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nkeynes@1 | 48 | #define BS_PALM 0x00000080 /* ? */
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nkeynes@1 | 49 | #define BS_PALN 0x000000C0 /* ? */
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nkeynes@1 | 50 |
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nkeynes@103 | 51 | #define PVR2_RAM_BASE 0x05000000
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nkeynes@103 | 52 | #define PVR2_RAM_BASE_INT 0x04000000
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nkeynes@103 | 53 | #define PVR2_RAM_SIZE (8 * 1024 * 1024)
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nkeynes@103 | 54 | #define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
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nkeynes@103 | 55 |
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nkeynes@1 | 56 | void pvr2_next_frame( void );
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nkeynes@19 | 57 | void pvr2_set_base_address( uint32_t );
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nkeynes@56 | 58 |
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nkeynes@103 | 59 | #define PVR2_CMD_END_OF_LIST 0x00
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nkeynes@103 | 60 | #define PVR2_CMD_USER_CLIP 0x20
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nkeynes@103 | 61 | #define PVR2_CMD_POLY_OPAQUE 0x80
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nkeynes@103 | 62 | #define PVR2_CMD_MOD_OPAQUE 0x81
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nkeynes@103 | 63 | #define PVR2_CMD_POLY_TRANS 0x82
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nkeynes@103 | 64 | #define PVR2_CMD_MOD_TRANS 0x83
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nkeynes@103 | 65 | #define PVR2_CMD_POLY_PUNCHOUT 0x84
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nkeynes@103 | 66 | #define PVR2_CMD_VERTEX 0xE0
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nkeynes@103 | 67 | #define PVR2_CMD_VERTEX_LAST 0xF0
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nkeynes@103 | 68 |
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nkeynes@103 | 69 | #define PVR2_POLY_TEXTURED 0x00000008
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nkeynes@103 | 70 | #define PVR2_POLY_SPECULAR 0x00000004
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nkeynes@103 | 71 | #define PVR2_POLY_SHADED 0x00000002
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nkeynes@103 | 72 | #define PVR2_POLY_UV_16BIT 0x00000001
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nkeynes@103 | 73 |
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nkeynes@103 | 74 | #define PVR2_TEX_FORMAT_ARGB1555 0x00000000
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nkeynes@103 | 75 | #define PVR2_TEX_FORMAT_RGB565 0x08000000
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nkeynes@103 | 76 | #define PVR2_TEX_FORMAT_ARGB4444 0x10000000
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nkeynes@103 | 77 | #define PVR2_TEX_FORMAT_YUV422 0x18000000
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nkeynes@103 | 78 | #define PVR2_TEX_FORMAT_BUMPMAP 0x20000000
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nkeynes@103 | 79 | #define PVR2_TEX_FORMAT_IDX4 0x28000000
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nkeynes@103 | 80 | #define PVR2_TEX_FORMAT_IDX8 0x30000000
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nkeynes@103 | 81 |
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nkeynes@103 | 82 | #define PVR2_TEX_MIPMAP 0x80000000
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nkeynes@103 | 83 | #define PVR2_TEX_COMPRESSED 0x40000000
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nkeynes@103 | 84 | #define PVR2_TEX_FORMAT_MASK 0x38000000
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nkeynes@103 | 85 | #define PVR2_TEX_UNTWIDDLED 0x04000000
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nkeynes@103 | 86 |
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nkeynes@103 | 87 | #define PVR2_TEX_ADDR(x) ( ((x)&0x1FFFFF)<<3 );
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nkeynes@103 | 88 | #define PVR2_TEX_IS_MIPMAPPED(x) ( (x) & PVR2_TEX_MIPMAP )
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nkeynes@103 | 89 | #define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
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nkeynes@103 | 90 | #define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
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nkeynes@103 | 91 |
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nkeynes@103 | 92 | extern video_driver_t video_driver;
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nkeynes@103 | 93 |
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nkeynes@103 | 94 | /****************************** Frame Buffer *****************************/
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nkeynes@103 | 95 |
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nkeynes@103 | 96 | /**
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nkeynes@103 | 97 | * Write to the interleaved memory address space (aka 64-bit address space).
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nkeynes@103 | 98 | */
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nkeynes@103 | 99 | void pvr2_vram64_write( sh4addr_t dest, char *src, uint32_t length );
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nkeynes@103 | 100 |
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nkeynes@103 | 101 | /**
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nkeynes@103 | 102 | * Read from the interleaved memory address space (aka 64-bit address space)
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nkeynes@103 | 103 | */
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nkeynes@103 | 104 | void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
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nkeynes@103 | 105 |
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nkeynes@103 | 106 | /**************************** Tile Accelerator ***************************/
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nkeynes@56 | 107 | /**
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nkeynes@56 | 108 | * Process the data in the supplied buffer as an array of TA command lists.
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nkeynes@56 | 109 | * Any excess bytes are held pending until a complete list is sent
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nkeynes@56 | 110 | */
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nkeynes@100 | 111 | void pvr2_ta_write( char *buf, uint32_t length );
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nkeynes@100 | 112 |
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nkeynes@100 | 113 |
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nkeynes@103 | 114 | /**
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nkeynes@103 | 115 | * (Re)initialize the tile accelerator in preparation for the next scene.
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nkeynes@103 | 116 | * Normally called immediately before commencing polygon transmission.
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nkeynes@103 | 117 | */
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nkeynes@103 | 118 | void pvr2_ta_init( void );
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nkeynes@103 | 119 |
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nkeynes@103 | 120 | /********************************* Renderer ******************************/
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nkeynes@103 | 121 |
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nkeynes@103 | 122 | /**
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nkeynes@103 | 123 | * Initialize the rendering pipeline.
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nkeynes@103 | 124 | * @return TRUE on success, FALSE on failure.
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nkeynes@103 | 125 | */
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nkeynes@103 | 126 | gboolean pvr2_render_init( void );
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nkeynes@103 | 127 |
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nkeynes@103 | 128 | /**
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nkeynes@103 | 129 | * Render the current scene stored in PVR ram to the GL back buffer.
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nkeynes@103 | 130 | */
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nkeynes@100 | 131 | void pvr2_render_scene( void );
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nkeynes@103 | 132 |
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nkeynes@103 | 133 | /**
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nkeynes@103 | 134 | * Display the scene rendered to the supplied address.
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nkeynes@103 | 135 | * @return TRUE if there was an available render that was displayed,
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nkeynes@103 | 136 | * otherwise FALSE (and no action was taken)
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nkeynes@103 | 137 | */
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nkeynes@103 | 138 | gboolean pvr2_render_display_frame( uint32_t address );
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nkeynes@103 | 139 |
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nkeynes@103 | 140 | /****************************** Texture Cache ****************************/
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nkeynes@103 | 141 |
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nkeynes@103 | 142 | /**
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nkeynes@103 | 143 | * Initialize the texture cache. Note that the GL context must have been
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nkeynes@103 | 144 | * initialized before calling this function.
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nkeynes@103 | 145 | */
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nkeynes@103 | 146 | void texcache_init( void );
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nkeynes@103 | 147 |
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nkeynes@103 | 148 |
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nkeynes@103 | 149 | /**
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nkeynes@103 | 150 | * Flush all textures and delete. The cache will be non-functional until
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nkeynes@103 | 151 | * the next call to texcache_init(). This would typically be done if
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nkeynes@103 | 152 | * switching GL targets.
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nkeynes@103 | 153 | */
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nkeynes@103 | 154 | void texcache_shutdown( void );
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nkeynes@103 | 155 |
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nkeynes@103 | 156 | /**
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nkeynes@103 | 157 | * Evict all textures contained in the page identified by a texture address.
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nkeynes@103 | 158 | */
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nkeynes@103 | 159 | void texcache_invalidate_page( uint32_t texture_addr );
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nkeynes@103 | 160 |
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nkeynes@103 | 161 | /**
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nkeynes@103 | 162 | * Return a texture ID for the texture specified at the supplied address
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nkeynes@103 | 163 | * and given parameters (the same sequence of bytes could in theory have
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nkeynes@103 | 164 | * multiple interpretations). We use the texture address as the primary
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nkeynes@103 | 165 | * index, but allow for multiple instances at each address. The texture
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nkeynes@103 | 166 | * will be bound to the GL_TEXTURE_2D target before being returned.
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nkeynes@103 | 167 | *
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nkeynes@103 | 168 | * If the texture has already been bound, return the ID to which it was
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nkeynes@103 | 169 | * bound. Otherwise obtain an unused texture ID and set it up appropriately.
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nkeynes@103 | 170 | */
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nkeynes@103 | 171 | GLuint texcache_get_texture( uint32_t texture_addr, int width, int height,
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nkeynes@103 | 172 | int mode );
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