| nkeynes@228 | 1 | .section .text
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| nkeynes@228 | 2 | .include "sh4/inc.s"
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| nkeynes@228 | 3 |
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| nkeynes@228 | 4 | ! expect_interrupt( int intevt )
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| nkeynes@228 | 5 | .global _expect_interrupt
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| nkeynes@228 | 6 | _expect_interrupt:
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| nkeynes@228 | 7 | stc sr, r3 ! Mask off interrupts
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| nkeynes@228 | 8 | mov.l bl_mask, r0
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| nkeynes@228 | 9 | or r3, r0
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| nkeynes@228 | 10 | ldc r0, sr
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| nkeynes@228 | 11 | mova expected_intevt, r0
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| nkeynes@228 | 12 | mov.l r4, @r0
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| nkeynes@228 | 13 | xor r1, r1
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| nkeynes@228 | 14 | mova expected_expevt, r0
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| nkeynes@228 | 15 | mov.l r1, @r0
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| nkeynes@228 | 16 | mova _interrupt_count, r0
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| nkeynes@228 | 17 | mov.l r1, @r0
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| nkeynes@228 | 18 | mova _interrupt_pc, r0
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| nkeynes@228 | 19 | mov.l r1, @r0
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| nkeynes@228 | 20 | ldc r3, sr ! Restore old SR state
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| nkeynes@228 | 21 | rts
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| nkeynes@228 | 22 | nop
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| nkeynes@228 | 23 |
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| nkeynes@228 | 24 | .global _expect_exception
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| nkeynes@228 | 25 | _expect_exception:
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| nkeynes@228 | 26 | stc sr, r3 ! Mask off interrupts
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| nkeynes@228 | 27 | mov.l bl_mask, r0
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| nkeynes@228 | 28 | or r3, r0
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| nkeynes@228 | 29 | ldc r0, sr
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| nkeynes@228 | 30 | mova expected_expevt, r0
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| nkeynes@228 | 31 | mov.l r4, @r0
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| nkeynes@228 | 32 | xor r1, r1
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| nkeynes@228 | 33 | mova expected_intevt, r0
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| nkeynes@228 | 34 | mov.l r1, @r0
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| nkeynes@228 | 35 | mova _interrupt_count, r0
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| nkeynes@228 | 36 | mov.l r1, @r0
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| nkeynes@228 | 37 | mova _interrupt_pc, r0
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| nkeynes@228 | 38 | mov.l r1, @r0
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| nkeynes@228 | 39 | ldc r3, sr ! Restore old SR state
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| nkeynes@228 | 40 | rts
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| nkeynes@228 | 41 | nop
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| nkeynes@228 | 42 |
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| nkeynes@228 | 43 | .align 4
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| nkeynes@228 | 44 | .global _interrupt_count
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| nkeynes@228 | 45 | _interrupt_count:
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| nkeynes@228 | 46 | .long 0x00000000
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| nkeynes@228 | 47 | .global _interrupt_pc
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| nkeynes@228 | 48 | _interrupt_pc:
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| nkeynes@228 | 49 | .long 0x00000000
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| nkeynes@228 | 50 | bl_mask:
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| nkeynes@228 | 51 | .long 0x10000000
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| nkeynes@228 | 52 |
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| nkeynes@228 | 53 | .global _install_interrupt_handler
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| nkeynes@228 | 54 | _install_interrupt_handler:
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| nkeynes@228 | 55 | stc vbr, r1
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| nkeynes@228 | 56 | mova old_vbr, r0
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| nkeynes@228 | 57 | mov.l r1, @r0
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| nkeynes@228 | 58 | mova __interrupt_handler, r0
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| nkeynes@228 | 59 | ldc r0, vbr
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| nkeynes@228 | 60 | rts
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| nkeynes@228 | 61 | nop
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| nkeynes@228 | 62 |
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| nkeynes@228 | 63 | .global _remove_interrupt_handler
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| nkeynes@228 | 64 | _remove_interrupt_handler:
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| nkeynes@228 | 65 | mov.l old_vbr, r1
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| nkeynes@228 | 66 | ldc r1, vbr
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| nkeynes@228 | 67 | rts
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| nkeynes@228 | 68 | nop
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| nkeynes@228 | 69 | .align 4
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| nkeynes@228 | 70 | old_vbr:
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| nkeynes@228 | 71 | .long 0x00000000
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| nkeynes@228 | 72 | expected_intevt:
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| nkeynes@228 | 73 | .long 0x00000000
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| nkeynes@228 | 74 | expected_expevt:
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| nkeynes@228 | 75 | .long 0x00000000
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| nkeynes@228 | 76 |
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| nkeynes@228 | 77 |
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| nkeynes@228 | 78 | __interrupt_handler:
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| nkeynes@228 | 79 | .skip 0x100
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| nkeynes@228 | 80 | general_exception:
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| nkeynes@228 | 81 | mov.l handler_stack_ptr_k, r15
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| nkeynes@228 | 82 | mov.l @r15, r15
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| nkeynes@228 | 83 | mov.l r0, @-r15
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| nkeynes@228 | 84 | mov.l r1, @-r15
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| nkeynes@228 | 85 | mov.l r2, @-r15
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| nkeynes@228 | 86 |
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| nkeynes@228 | 87 | mov.l expevt_k, r0
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| nkeynes@228 | 88 | mov.l @r0, r1
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| nkeynes@228 | 89 | mov.l expected_expevt_k, r2
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| nkeynes@228 | 90 | mov.l @r2, r2
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| nkeynes@228 | 91 | cmp/eq r1, r2
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| nkeynes@228 | 92 | bf general_not_expected
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| nkeynes@228 | 93 | bra ex_expected
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| nkeynes@228 | 94 | nop
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| nkeynes@228 | 95 | general_not_expected:
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| nkeynes@228 | 96 | bra ex_dontcare
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| nkeynes@228 | 97 | nop
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| nkeynes@228 | 98 | nop
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| nkeynes@228 | 99 | expevt_k:
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| nkeynes@228 | 100 | .long 0xFF000024
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| nkeynes@228 | 101 | expected_expevt_k:
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| nkeynes@228 | 102 | .long expected_expevt
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| nkeynes@228 | 103 | handler_stack_ptr_k:
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| nkeynes@228 | 104 | .long handler_stack_ptr
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| nkeynes@228 | 105 | .skip 0x2D4 ! Pad up to 0x400
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| nkeynes@228 | 106 |
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| nkeynes@228 | 107 | tlb_exception:
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| nkeynes@228 | 108 | mov.l handler_stack_ptr, r15
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| nkeynes@228 | 109 | mov.l r0, @-r15
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| nkeynes@228 | 110 | mov.l r1, @-r15
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| nkeynes@228 | 111 | mov.l r2, @-r15
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| nkeynes@228 | 112 |
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| nkeynes@228 | 113 | mov.l expevt1_k, r0
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| nkeynes@228 | 114 | mov.l @r0, r1
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| nkeynes@228 | 115 | mov.l expected_expevt1_k, r2
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| nkeynes@228 | 116 | mov.l @r2, r2
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| nkeynes@228 | 117 | cmp/eq r1, r2
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| nkeynes@228 | 118 | bf tlb_not_expected
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| nkeynes@228 | 119 | bra ex_expected
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| nkeynes@228 | 120 | nop
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| nkeynes@228 | 121 | tlb_not_expected:
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| nkeynes@228 | 122 | bra ex_dontcare
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| nkeynes@228 | 123 | nop
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| nkeynes@228 | 124 | expevt1_k:
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| nkeynes@228 | 125 | .long 0xFF000024
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| nkeynes@228 | 126 | expected_expevt1_k:
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| nkeynes@228 | 127 | .long expected_expevt
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| nkeynes@228 | 128 |
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| nkeynes@228 | 129 | .skip 0x1DC ! Pad up to 0x600
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| nkeynes@228 | 130 |
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| nkeynes@228 | 131 | irq_raised:
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| nkeynes@228 | 132 | mov.l handler_stack_ptr, r15
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| nkeynes@228 | 133 | mov.l r0, @-r15
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| nkeynes@228 | 134 | mov.l r1, @-r15
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| nkeynes@228 | 135 | mov.l r2, @-r15
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| nkeynes@228 | 136 |
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| nkeynes@228 | 137 | mov.l intevt_k, r0
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| nkeynes@228 | 138 | mov.l @r0, r1
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| nkeynes@228 | 139 | mov.l expected_intevt_k, r2
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| nkeynes@228 | 140 | mov.l @r2, r2
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| nkeynes@228 | 141 | cmp/eq r1, r2
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| nkeynes@228 | 142 | bf ex_dontcare
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| nkeynes@228 | 143 |
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| nkeynes@228 | 144 | ex_expected:
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| nkeynes@228 | 145 | mov.l interrupt_count_k, r0
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| nkeynes@228 | 146 | mov.l @r0, r2
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| nkeynes@228 | 147 | add #1, r2
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| nkeynes@228 | 148 | mov.l r2, @r0
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| nkeynes@228 | 149 | stc spc, r2
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| nkeynes@228 | 150 | mov.l interrupt_pc_k, r0
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| nkeynes@228 | 151 | mov.l r2, @r0
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| nkeynes@228 | 152 |
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| nkeynes@228 | 153 | ! For most instructions, spc = raising instruction, so add 2 to get the next
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| nkeynes@228 | 154 | ! instruction. Exceptions are the slot illegals (need pc+4), and trapa/
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| nkeynes@228 | 155 | ! user-break-after-instruction where the pc is already correct
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| nkeynes@228 | 156 | mov.l slot_illegal_k, r0
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| nkeynes@228 | 157 | cmp/eq r0, r1
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| nkeynes@228 | 158 | bt ex_slot_spc
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| nkeynes@228 | 159 | mov.l slot_fpu_disable_k, r0
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| nkeynes@228 | 160 | cmp/eq r0, r1
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| nkeynes@228 | 161 | bt ex_slot_spc
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| nkeynes@228 | 162 | mov.l trapa_exc_k, r0
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| nkeynes@228 | 163 | cmp/eq r0, r1
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| nkeynes@228 | 164 | bt ex_nochain
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| nkeynes@228 | 165 | mov.l break_after_k, r0
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| nkeynes@228 | 166 | cmp/eq r0, r1
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| nkeynes@228 | 167 | bt ex_nochain
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| nkeynes@228 | 168 | ! For everything else, spc += 2
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| nkeynes@228 | 169 | add #2, r2
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| nkeynes@228 | 170 | ldc r2, spc
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| nkeynes@228 | 171 | bra ex_nochain
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| nkeynes@228 | 172 | nop
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| nkeynes@228 | 173 | ex_slot_spc:
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| nkeynes@228 | 174 | add #4, r2
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| nkeynes@228 | 175 | ldc r2, spc
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| nkeynes@228 | 176 | bra ex_nochain
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| nkeynes@228 | 177 | nop
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| nkeynes@228 | 178 |
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| nkeynes@228 | 179 | ex_dontcare: ! Not the event we were waiting for.
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| nkeynes@233 | 180 | ! Check if its a trapa #42 ("Switch to system mode")
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| nkeynes@233 | 181 | mov.l trapa_exc_k, r0
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| nkeynes@233 | 182 | cmp/eq r0,r1
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| nkeynes@233 | 183 | bf ex_chain
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| nkeynes@233 | 184 | mov.l trapa_k, r0
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| nkeynes@233 | 185 | mov.l @r0, r0
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| nkeynes@233 | 186 | shlr2 r0
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| nkeynes@233 | 187 | cmp/eq #42, r0
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| nkeynes@233 | 188 | bf ex_chain
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| nkeynes@233 | 189 | ! Yes, yes it is - update SSR and return without chaining
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| nkeynes@233 | 190 | stc ssr, r0
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| nkeynes@233 | 191 | mov #0x40, r1
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| nkeynes@233 | 192 | mov #24, r2
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| nkeynes@233 | 193 | shld r2, r1
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| nkeynes@233 | 194 | or r0, r1
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| nkeynes@233 | 195 | ldc r1, ssr
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| nkeynes@233 | 196 | bra ex_nochain
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| nkeynes@233 | 197 | nop
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| nkeynes@233 | 198 |
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| nkeynes@233 | 199 | ex_chain:
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| nkeynes@228 | 200 | mov.l old_vbr_k, r2
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| nkeynes@228 | 201 | mov.l @r2, r2
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| nkeynes@228 | 202 | xor r0, r0
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| nkeynes@228 | 203 | cmp/eq r0, r2
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| nkeynes@228 | 204 | bt ex_nochain
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| nkeynes@228 | 205 |
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| nkeynes@228 | 206 | stc ssr, r0
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| nkeynes@228 | 207 | mov.l r0, @-r15
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| nkeynes@228 | 208 | stc spc, r0
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| nkeynes@228 | 209 | mov.l r0, @-r15
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| nkeynes@228 | 210 | stc sgr, r0
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| nkeynes@228 | 211 | mov.l r0, @-r15
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| nkeynes@228 | 212 | mov.l ex_chainreturn, r0
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| nkeynes@228 | 213 | ldc r0, spc
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| nkeynes@228 | 214 | mova handler_stack_ptr, r0
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| nkeynes@228 | 215 | mov.l r15, @r0
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| nkeynes@228 | 216 | braf r2 ! Chain on
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| nkeynes@228 | 217 | nop
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| nkeynes@228 | 218 |
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| nkeynes@228 | 219 | ex_chainreturn:
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| nkeynes@228 | 220 | mov.l handler_stack_ptr, r15
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| nkeynes@228 | 221 | mov.l @r15+, r0
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| nkeynes@228 | 222 | ldc r0, sgr
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| nkeynes@228 | 223 | mov.l @r15+, r0
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| nkeynes@228 | 224 | ldc r0, spc
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| nkeynes@228 | 225 | mov.l @r15+, r0
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| nkeynes@228 | 226 | ldc r0, ssr
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| nkeynes@228 | 227 |
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| nkeynes@228 | 228 | ex_nochain: ! No previous vbr to chain to
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| nkeynes@228 | 229 | mova handler_stack_ptr, r0
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| nkeynes@228 | 230 | mov r15, r1
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| nkeynes@228 | 231 | add #12, r1
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| nkeynes@228 | 232 | mov.l r1, @r0
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| nkeynes@228 | 233 | mov.l @r15+, r2
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| nkeynes@228 | 234 | mov.l @r15+, r1
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| nkeynes@228 | 235 | mov.l @r15+, r0
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| nkeynes@233 | 236 | stc sgr, r15
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| nkeynes@228 | 237 | rte
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| nkeynes@233 | 238 | nop
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| nkeynes@228 | 239 | .align 4
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| nkeynes@228 | 240 | expected_intevt_k:
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| nkeynes@228 | 241 | .long expected_intevt
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| nkeynes@228 | 242 | interrupt_count_k:
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| nkeynes@228 | 243 | .long _interrupt_count
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| nkeynes@228 | 244 | interrupt_pc_k:
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| nkeynes@228 | 245 | .long _interrupt_pc
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| nkeynes@228 | 246 | old_vbr_k:
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| nkeynes@228 | 247 | .long old_vbr
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| nkeynes@228 | 248 | trapa_k:
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| nkeynes@228 | 249 | .long 0xFF000020
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| nkeynes@228 | 250 | intevt_k:
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| nkeynes@228 | 251 | .long 0xFF000028
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| nkeynes@228 | 252 |
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| nkeynes@228 | 253 | slot_illegal_k:
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| nkeynes@228 | 254 | .long 0x000001A0
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| nkeynes@228 | 255 | slot_fpu_disable_k:
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| nkeynes@228 | 256 | .long 0x00000820
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| nkeynes@228 | 257 | trapa_exc_k:
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| nkeynes@228 | 258 | .long 0x00000160
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| nkeynes@228 | 259 | break_after_k:
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| nkeynes@228 | 260 | .long 0x000001E0
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| nkeynes@228 | 261 |
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| nkeynes@228 | 262 | handler_stack_ptr:
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| nkeynes@228 | 263 | .long handler_stack_end
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| nkeynes@228 | 264 |
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| nkeynes@228 | 265 | handler_stack:
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| nkeynes@228 | 266 | .skip 0x200
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| nkeynes@228 | 267 | handler_stack_end:
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| nkeynes@815 | 268 |
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| nkeynes@815 | 269 |
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| nkeynes@815 | 270 | .globl _irq_disable
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| nkeynes@815 | 271 | _irq_disable:
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| nkeynes@815 | 272 | mov.l _irqd_and,r1
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| nkeynes@815 | 273 | mov.l _irqd_or,r2
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| nkeynes@815 | 274 | stc sr,r0
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| nkeynes@815 | 275 | and r0,r1
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| nkeynes@815 | 276 | or r2,r1
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| nkeynes@815 | 277 | ldc r1,sr
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| nkeynes@815 | 278 | rts
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| nkeynes@815 | 279 | nop
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| nkeynes@815 | 280 |
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| nkeynes@815 | 281 | .align 2
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| nkeynes@815 | 282 | _irqd_and:
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| nkeynes@815 | 283 | .long 0xefffff0f
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| nkeynes@815 | 284 | _irqd_or:
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| nkeynes@815 | 285 | .long 0x000000f0
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| nkeynes@815 | 286 |
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| nkeynes@815 | 287 |
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| nkeynes@815 | 288 | .globl _irq_enable
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| nkeynes@815 | 289 | _irq_enable:
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| nkeynes@815 | 290 | mov.l _irqe_and,r1
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| nkeynes@815 | 291 | stc sr,r0
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| nkeynes@815 | 292 | and r0,r1
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| nkeynes@815 | 293 | ldc r1,sr
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| nkeynes@815 | 294 | rts
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| nkeynes@815 | 295 | nop
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| nkeynes@815 | 296 |
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| nkeynes@815 | 297 | .align 2
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| nkeynes@815 | 298 | _irqe_and:
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| nkeynes@815 | 299 | .long 0xefffff0f
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lxdream 0.9.1