Search
lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
Download Now
filename src/pvr2/pvr2.h
changeset 850:28782ebbd01d
prev827:d333f4248727
next856:02ac5f37bfc9
author nkeynes
date Mon Sep 08 07:56:33 2008 +0000 (15 years ago)
permissions -rw-r--r--
last change Add lightgun support
file annotate diff log raw
nkeynes@31
     1
/**
nkeynes@561
     2
 * $Id$
nkeynes@31
     3
 *
nkeynes@103
     4
 * PVR2 (video chip) functions and macros.
nkeynes@31
     5
 *
nkeynes@31
     6
 * Copyright (c) 2005 Nathan Keynes.
nkeynes@31
     7
 *
nkeynes@31
     8
 * This program is free software; you can redistribute it and/or modify
nkeynes@31
     9
 * it under the terms of the GNU General Public License as published by
nkeynes@31
    10
 * the Free Software Foundation; either version 2 of the License, or
nkeynes@31
    11
 * (at your option) any later version.
nkeynes@31
    12
 *
nkeynes@31
    13
 * This program is distributed in the hope that it will be useful,
nkeynes@31
    14
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@31
    15
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
nkeynes@31
    16
 * GNU General Public License for more details.
nkeynes@31
    17
 */
nkeynes@31
    18
nkeynes@653
    19
#ifndef lxdream_pvr2_H
nkeynes@653
    20
#define lxdream_pvr2_H 1
nkeynes@653
    21
nkeynes@653
    22
#include <stdio.h>
nkeynes@653
    23
#include "lxdream.h"
nkeynes@103
    24
#include "mem.h"
nkeynes@144
    25
#include "display.h"
nkeynes@1
    26
nkeynes@736
    27
#ifdef __cplusplus
nkeynes@736
    28
extern "C" {
nkeynes@736
    29
#endif
nkeynes@736
    30
nkeynes@189
    31
typedef unsigned int pvraddr_t;
nkeynes@189
    32
typedef unsigned int pvr64addr_t;
nkeynes@1
    33
nkeynes@335
    34
#define DISPMODE_ENABLE      0x00000001 /* Display enable */
nkeynes@335
    35
#define DISPMODE_LINEDOUBLE  0x00000002 /* scanline double */
nkeynes@335
    36
#define DISPMODE_COLFMT      0x0000000C /* Colour mode */
nkeynes@335
    37
#define DISPMODE_CLOCKDIV    0x08000000 /* Clock divide-by-2 */
nkeynes@1
    38
nkeynes@1
    39
#define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
nkeynes@1
    40
#define DISPSIZE_LPF    0x000FFC00 /* lines per field */
nkeynes@1
    41
#define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
nkeynes@1
    42
nkeynes@103
    43
#define DISPCFG_VP 0x00000001 /* V-sync polarity */
nkeynes@103
    44
#define DISPCFG_HP 0x00000002 /* H-sync polarity */
nkeynes@103
    45
#define DISPCFG_I  0x00000010 /* Interlace enable */
nkeynes@103
    46
#define DISPCFG_BS 0x000000C0 /* Broadcast standard */
nkeynes@103
    47
#define DISPCFG_VO 0x00000100 /* Video output enable */
nkeynes@1
    48
nkeynes@432
    49
#define DISPSYNC_LINE_MASK  0x000003FF
nkeynes@432
    50
#define DISPSYNC_EVEN_FIELD 0x00000000
nkeynes@432
    51
#define DISPSYNC_ODD_FIELD  0x00000400
nkeynes@432
    52
#define DISPSYNC_ACTIVE     0x00000800
nkeynes@432
    53
#define DISPSYNC_HSYNC      0x00001000
nkeynes@432
    54
#define DISPSYNC_VSYNC      0x00002000
nkeynes@432
    55
nkeynes@1
    56
#define BS_NTSC 0x00000000
nkeynes@1
    57
#define BS_PAL  0x00000040
nkeynes@1
    58
#define BS_PALM 0x00000080 /* ? */
nkeynes@1
    59
#define BS_PALN 0x000000C0 /* ? */
nkeynes@1
    60
nkeynes@827
    61
#define SCALER_HSCALE 0x00010000
nkeynes@827
    62
nkeynes@103
    63
#define PVR2_RAM_BASE 0x05000000
nkeynes@103
    64
#define PVR2_RAM_BASE_INT 0x04000000
nkeynes@103
    65
#define PVR2_RAM_SIZE (8 * 1024 * 1024)
nkeynes@103
    66
#define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
nkeynes@189
    67
#define PVR2_RAM_MASK 0x7FFFFF
nkeynes@103
    68
nkeynes@222
    69
#define RENDER_ZONLY  0
nkeynes@222
    70
#define RENDER_NORMAL 1     /* Render non-modified polygons */
nkeynes@222
    71
#define RENDER_CHEAPMOD 2   /* Render cheap-modified polygons */
nkeynes@222
    72
#define RENDER_FULLMOD 3    /* Render the fully-modified version of the polygons */
nkeynes@222
    73
nkeynes@1
    74
void pvr2_next_frame( void );
nkeynes@19
    75
void pvr2_set_base_address( uint32_t );
nkeynes@133
    76
int pvr2_get_frame_count( void );
nkeynes@677
    77
void pvr2_redraw_display();
nkeynes@295
    78
gboolean pvr2_save_next_scene( const gchar *filename );
nkeynes@56
    79
nkeynes@103
    80
#define PVR2_CMD_END_OF_LIST 0x00
nkeynes@103
    81
#define PVR2_CMD_USER_CLIP   0x20
nkeynes@103
    82
#define PVR2_CMD_POLY_OPAQUE 0x80
nkeynes@103
    83
#define PVR2_CMD_MOD_OPAQUE  0x81
nkeynes@103
    84
#define PVR2_CMD_POLY_TRANS  0x82
nkeynes@103
    85
#define PVR2_CMD_MOD_TRANS   0x83
nkeynes@103
    86
#define PVR2_CMD_POLY_PUNCHOUT 0x84
nkeynes@103
    87
#define PVR2_CMD_VERTEX      0xE0
nkeynes@103
    88
#define PVR2_CMD_VERTEX_LAST 0xF0
nkeynes@103
    89
nkeynes@103
    90
#define PVR2_POLY_TEXTURED 0x00000008
nkeynes@103
    91
#define PVR2_POLY_SPECULAR 0x00000004
nkeynes@103
    92
#define PVR2_POLY_SHADED   0x00000002
nkeynes@103
    93
#define PVR2_POLY_UV_16BIT 0x00000001
nkeynes@103
    94
nkeynes@133
    95
#define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
nkeynes@133
    96
#define PVR2_POLY_MODE_ALPHA    0x00100000
nkeynes@133
    97
#define PVR2_POLY_MODE_TEXALPHA 0x00080000
nkeynes@133
    98
#define PVR2_POLY_MODE_FLIP_S   0x00040000
nkeynes@133
    99
#define PVR2_POLY_MODE_FLIP_T   0x00020000
nkeynes@133
   100
#define PVR2_POLY_MODE_CLAMP_S  0x00010000
nkeynes@133
   101
#define PVR2_POLY_MODE_CLAMP_T  0x00008000
nkeynes@133
   102
nkeynes@337
   103
#define PVR2_POLY_FOG_LOOKUP    0x00000000
nkeynes@337
   104
#define PVR2_POLY_FOG_VERTEX    0x00400000
nkeynes@337
   105
#define PVR2_POLY_FOG_DISABLED  0x00800000
nkeynes@337
   106
#define PVR2_POLY_FOG_LOOKUP2   0x00C00000
nkeynes@337
   107
nkeynes@337
   108
nkeynes@103
   109
#define PVR2_TEX_FORMAT_ARGB1555 0x00000000
nkeynes@103
   110
#define PVR2_TEX_FORMAT_RGB565   0x08000000
nkeynes@103
   111
#define PVR2_TEX_FORMAT_ARGB4444 0x10000000
nkeynes@103
   112
#define PVR2_TEX_FORMAT_YUV422   0x18000000
nkeynes@103
   113
#define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
nkeynes@103
   114
#define PVR2_TEX_FORMAT_IDX4     0x28000000
nkeynes@103
   115
#define PVR2_TEX_FORMAT_IDX8     0x30000000
nkeynes@103
   116
nkeynes@103
   117
#define PVR2_TEX_MIPMAP      0x80000000
nkeynes@103
   118
#define PVR2_TEX_COMPRESSED  0x40000000
nkeynes@103
   119
#define PVR2_TEX_FORMAT_MASK 0x38000000
nkeynes@103
   120
#define PVR2_TEX_UNTWIDDLED  0x04000000
nkeynes@284
   121
#define PVR2_TEX_STRIDE      0x02000000
nkeynes@337
   122
#define PVR2_TEX_IS_PALETTE(mode) ( (mode & PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX4 || (mode&PVR2_TEX_FORMAT_MASK) == PVR2_TEX_FORMAT_IDX8 )
nkeynes@337
   123
nkeynes@103
   124
nkeynes@108
   125
#define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
nkeynes@348
   126
#define PVR2_TEX_IS_MIPMAPPED(x) ( ((x) & 0x84000000) == 0x80000000 )
nkeynes@103
   127
#define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
nkeynes@103
   128
#define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
nkeynes@284
   129
#define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
nkeynes@103
   130
nkeynes@103
   131
/****************************** Frame Buffer *****************************/
nkeynes@103
   132
nkeynes@103
   133
/**
nkeynes@827
   134
 * Write a block of data to an address in the DMA range (0x10000000 -
nkeynes@325
   135
 * 0x13FFFFFF), ie TA, YUV, or texture ram.
nkeynes@325
   136
 */
nkeynes@429
   137
void pvr2_dma_write( sh4addr_t dest, unsigned char *src, uint32_t length );
nkeynes@325
   138
nkeynes@325
   139
/**
nkeynes@103
   140
 * Write to the interleaved memory address space (aka 64-bit address space).
nkeynes@103
   141
 */
nkeynes@429
   142
void pvr2_vram64_write( sh4addr_t dest, unsigned char *src, uint32_t length );
nkeynes@103
   143
nkeynes@103
   144
/**
nkeynes@282
   145
 * Write to the interleaved memory address space (aka 64-bit address space),
nkeynes@282
   146
 * using a line length and stride.
nkeynes@282
   147
 */
nkeynes@429
   148
void pvr2_vram64_write_stride( sh4addr_t dest, unsigned char *src, uint32_t line_bytes,
nkeynes@736
   149
                               uint32_t line_stride_bytes, uint32_t line_count );
nkeynes@282
   150
nkeynes@282
   151
/**
nkeynes@103
   152
 * Read from the interleaved memory address space (aka 64-bit address space)
nkeynes@103
   153
 */
nkeynes@429
   154
void pvr2_vram64_read( unsigned char *dest, sh4addr_t src, uint32_t length );
nkeynes@103
   155
nkeynes@127
   156
/**
nkeynes@310
   157
 * Read a twiddled image from interleaved memory address space (aka 64-bit address
nkeynes@827
   158
 * space), writing the image to the destination buffer in detwiddled format.
nkeynes@310
   159
 * Width and height must be powers of 2
nkeynes@315
   160
 * This version reads 4-bit pixels.
nkeynes@315
   161
 */
nkeynes@429
   162
void pvr2_vram64_read_twiddled_4( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
nkeynes@315
   163
nkeynes@315
   164
nkeynes@315
   165
/**
nkeynes@315
   166
 * Read a twiddled image from interleaved memory address space (aka 64-bit address
nkeynes@827
   167
 * space), writing the image to the destination buffer in detwiddled format.
nkeynes@315
   168
 * Width and height must be powers of 2
nkeynes@310
   169
 * This version reads 8-bit pixels.
nkeynes@310
   170
 */
nkeynes@429
   171
void pvr2_vram64_read_twiddled_8( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
nkeynes@310
   172
nkeynes@310
   173
/**
nkeynes@310
   174
 * Read a twiddled image from interleaved memory address space (aka 64-bit address
nkeynes@827
   175
 * space), writing the image to the destination buffer in detwiddled format.
nkeynes@310
   176
 * Width and height must be powers of 2, and src must be 16-bit aligned.
nkeynes@310
   177
 * This version reads 16-bit pixels.
nkeynes@310
   178
 */
nkeynes@429
   179
void pvr2_vram64_read_twiddled_16( unsigned char *dest, sh4addr_t src, uint32_t width, uint32_t height );
nkeynes@310
   180
nkeynes@310
   181
/**
nkeynes@827
   182
 * Read an image from the interleaved memory address space (aka 64-bit address space)
nkeynes@284
   183
 * where the source and destination line sizes may differ. Note that both byte
nkeynes@284
   184
 * counts must be a multiple of 4, and the src address must be 32-bit aligned.
nkeynes@284
   185
 */
nkeynes@429
   186
void pvr2_vram64_read_stride( unsigned char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
nkeynes@736
   187
                              uint32_t src_line_bytes, uint32_t line_count );
nkeynes@284
   188
/**
nkeynes@827
   189
 * Dump a portion of vram to a stream from the interleaved memory address
nkeynes@127
   190
 * space.
nkeynes@127
   191
 */
nkeynes@127
   192
void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
nkeynes@127
   193
nkeynes@315
   194
/**
nkeynes@315
   195
 * Flush the indicated render buffer back to PVR. Caller is responsible for
nkeynes@315
   196
 * tracking whether there is actually anything in the buffer.
nkeynes@315
   197
 *
nkeynes@315
   198
 * @param buffer A render buffer indicating the address to store to, and the
nkeynes@315
   199
 * format the data needs to be in.
nkeynes@827
   200
 * @param backBuffer TRUE to flush the back buffer, FALSE for
nkeynes@315
   201
 * the front buffer.
nkeynes@315
   202
 */
nkeynes@352
   203
void pvr2_render_buffer_copy_to_sh4( render_buffer_t buffer );
nkeynes@315
   204
nkeynes@315
   205
/**
nkeynes@315
   206
 * Invalidate any caching on the supplied SH4 address
nkeynes@315
   207
 */
nkeynes@352
   208
gboolean pvr2_render_buffer_invalidate( sh4addr_t addr, gboolean isWrite );
nkeynes@315
   209
nkeynes@315
   210
nkeynes@103
   211
/**************************** Tile Accelerator ***************************/
nkeynes@56
   212
/**
nkeynes@56
   213
 * Process the data in the supplied buffer as an array of TA command lists.
nkeynes@56
   214
 * Any excess bytes are held pending until a complete list is sent
nkeynes@56
   215
 */
nkeynes@429
   216
void pvr2_ta_write( unsigned char *buf, uint32_t length );
nkeynes@100
   217
nkeynes@753
   218
/**
nkeynes@753
   219
 * Find the first polygon or sprite context in the supplied buffer of TA
nkeynes@753
   220
 * data.
nkeynes@827
   221
 * @return A pointer to the context, or NULL if it cannot be found
nkeynes@753
   222
 */
nkeynes@753
   223
uint32_t *pvr2_ta_find_polygon_context( uint32_t *buf, uint32_t length );
nkeynes@100
   224
nkeynes@103
   225
/**
nkeynes@103
   226
 * (Re)initialize the tile accelerator in preparation for the next scene.
nkeynes@103
   227
 * Normally called immediately before commencing polygon transmission.
nkeynes@103
   228
 */
nkeynes@103
   229
void pvr2_ta_init( void );
nkeynes@103
   230
nkeynes@429
   231
void pvr2_ta_reset( void );
nkeynes@429
   232
nkeynes@429
   233
void pvr2_ta_save_state( FILE *f );
nkeynes@429
   234
nkeynes@429
   235
int pvr2_ta_load_state( FILE *f );
nkeynes@282
   236
nkeynes@282
   237
/****************************** YUV Converter ****************************/
nkeynes@282
   238
nkeynes@282
   239
/**
nkeynes@282
   240
 * Process a block of YUV data.
nkeynes@282
   241
 */
nkeynes@429
   242
void pvr2_yuv_write( unsigned char *buf, uint32_t length );
nkeynes@282
   243
nkeynes@282
   244
/**
nkeynes@282
   245
 * Initialize the YUV converter.
nkeynes@282
   246
 */
nkeynes@284
   247
void pvr2_yuv_init( uint32_t target_addr );
nkeynes@284
   248
nkeynes@284
   249
void pvr2_yuv_set_config( uint32_t config );
nkeynes@282
   250
nkeynes@429
   251
void pvr2_yuv_save_state( FILE *f );
nkeynes@429
   252
nkeynes@429
   253
int pvr2_yuv_load_state( FILE *f );
nkeynes@429
   254
nkeynes@103
   255
/********************************* Renderer ******************************/
nkeynes@103
   256
nkeynes@103
   257
/**
nkeynes@103
   258
 * Render the current scene stored in PVR ram to the GL back buffer.
nkeynes@103
   259
 */
nkeynes@669
   260
void pvr2_scene_render( render_buffer_t buffer );
nkeynes@103
   261
nkeynes@103
   262
/**
nkeynes@669
   263
 * Perform the initial once-off GL setup, usually immediately after the GL
nkeynes@669
   264
 * context is first bound.
nkeynes@103
   265
 */
nkeynes@669
   266
void pvr2_setup_gl_context();
nkeynes@219
   267
nkeynes@219
   268
void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
nkeynes@219
   269
nkeynes@669
   270
void render_autosort_tile( pvraddr_t tile_entry, int render_mode );
nkeynes@669
   271
nkeynes@219
   272
void render_set_context( uint32_t *context, int render_mode );
nkeynes@219
   273
nkeynes@669
   274
void gl_render_tilelist( pvraddr_t tile_entry );
nkeynes@429
   275
nkeynes@319
   276
/**
nkeynes@319
   277
 * Structure to hold a complete unpacked vertex (excluding modifier
nkeynes@319
   278
 * volume parameters - generate separate vertexes in that case).
nkeynes@319
   279
 */
nkeynes@319
   280
struct vertex_unpacked {
nkeynes@319
   281
    float x,y,z;
nkeynes@319
   282
    float u,v;            /* Texture coordinates */
nkeynes@319
   283
    float rgba[4];        /* Fragment colour (RGBA order) */
nkeynes@319
   284
    float offset_rgba[4]; /* Offset color (RGBA order) */
nkeynes@319
   285
};
nkeynes@319
   286
nkeynes@103
   287
/****************************** Texture Cache ****************************/
nkeynes@103
   288
nkeynes@103
   289
/**
nkeynes@108
   290
 * Initialize the texture cache.
nkeynes@103
   291
 */
nkeynes@103
   292
void texcache_init( void );
nkeynes@103
   293
nkeynes@108
   294
/**
nkeynes@108
   295
 * Initialize the GL side of the texture cache (texture ids and such).
nkeynes@108
   296
 */
nkeynes@108
   297
void texcache_gl_init( void );
nkeynes@103
   298
nkeynes@103
   299
/**
nkeynes@103
   300
 * Flush all textures and delete. The cache will be non-functional until
nkeynes@103
   301
 * the next call to texcache_init(). This would typically be done if
nkeynes@103
   302
 * switching GL targets.
nkeynes@827
   303
 */
nkeynes@103
   304
void texcache_shutdown( void );
nkeynes@103
   305
nkeynes@103
   306
/**
nkeynes@432
   307
 * Flush (ie free) all textures.
nkeynes@432
   308
 */
nkeynes@432
   309
void texcache_flush( void );
nkeynes@432
   310
nkeynes@432
   311
/**
nkeynes@432
   312
 * Flush all palette-based textures (if any)
nkeynes@432
   313
 */
nkeynes@432
   314
void texcache_invalidate_palette(void);
nkeynes@432
   315
nkeynes@432
   316
/**
nkeynes@103
   317
 * Evict all textures contained in the page identified by a texture address.
nkeynes@103
   318
 */
nkeynes@103
   319
void texcache_invalidate_page( uint32_t texture_addr );
nkeynes@103
   320
nkeynes@103
   321
/**
nkeynes@103
   322
 * Return a texture ID for the texture specified at the supplied address
nkeynes@103
   323
 * and given parameters (the same sequence of bytes could in theory have
nkeynes@103
   324
 * multiple interpretations). We use the texture address as the primary
nkeynes@103
   325
 * index, but allow for multiple instances at each address. The texture
nkeynes@103
   326
 * will be bound to the GL_TEXTURE_2D target before being returned.
nkeynes@827
   327
 *
nkeynes@103
   328
 * If the texture has already been bound, return the ID to which it was
nkeynes@103
   329
 * bound. Otherwise obtain an unused texture ID and set it up appropriately.
nkeynes@103
   330
 */
nkeynes@653
   331
GLuint texcache_get_texture( uint32_t texture_word, int width, int height );
nkeynes@221
   332
nkeynes@429
   333
void pvr2_check_palette_changed(void);
nkeynes@429
   334
nkeynes@432
   335
int pvr2_render_save_scene( const gchar *filename );
nkeynes@432
   336
nkeynes@850
   337
/**
nkeynes@850
   338
 * Queue a gun position event to occur at the specified position. Unless
nkeynes@850
   339
 * cancelled, when the display reaches the position:
nkeynes@850
   340
 *   GUNPOS is updated with the position, and
nkeynes@850
   341
 *   EVENT_MAPLE_DMA is fired.
nkeynes@850
   342
 */
nkeynes@850
   343
void pvr2_queue_gun_event( int xpos, int ypos );
nkeynes@432
   344
nkeynes@221
   345
/************************* Rendering support macros **************************/
nkeynes@221
   346
#define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
nkeynes@653
   347
#define POLY1_DEPTH_WRITE(poly1) (((poly1)&0x04000000) == 0 )
nkeynes@221
   348
#define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
nkeynes@653
   349
#define POLY1_CULL_ENABLE(poly1) (((poly1)>>28)&0x01)
nkeynes@221
   350
#define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
nkeynes@221
   351
#define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
nkeynes@319
   352
#define POLY1_GOURAUD_SHADED(poly1) ((poly1)&0x00800000)
nkeynes@221
   353
#define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
nkeynes@221
   354
#define POLY1_UV16(poly1)   (((poly1)&0x00400000))
nkeynes@221
   355
#define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
nkeynes@221
   356
nkeynes@221
   357
#define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
nkeynes@221
   358
#define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
nkeynes@322
   359
#define POLY2_SRC_BLEND_TARGET(poly2)    ((poly2)&0x02000000)
nkeynes@322
   360
#define POLY2_DEST_BLEND_TARGET(poly2)   ((poly2)&0x01000000)
nkeynes@337
   361
#define POLY2_FOG_MODE(poly2)            ((poly2)&0x00C00000)
nkeynes@221
   362
#define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
nkeynes@322
   363
#define POLY2_ALPHA_ENABLE(poly2)        ((poly2)&0x00100000)
nkeynes@322
   364
#define POLY2_TEX_ALPHA_ENABLE(poly2)   (((poly2)&0x00080000) == 0 )
nkeynes@655
   365
#define POLY2_TEX_MIRROR_U(poly2)        ((poly2)&0x00040000)
nkeynes@655
   366
#define POLY2_TEX_MIRROR_V(poly2)        ((poly2)&0x00020000)
nkeynes@322
   367
#define POLY2_TEX_CLAMP_U(poly2)         ((poly2)&0x00010000)
nkeynes@322
   368
#define POLY2_TEX_CLAMP_V(poly2)         ((poly2)&0x00008000)
nkeynes@221
   369
#define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
nkeynes@221
   370
#define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
nkeynes@338
   371
#define POLY2_TEX_BLEND(poly2) (((poly2) >> 6)&0x03)
nkeynes@221
   372
extern int pvr2_poly_depthmode[8];
nkeynes@221
   373
extern int pvr2_poly_srcblend[8];
nkeynes@221
   374
extern int pvr2_poly_dstblend[8];
nkeynes@221
   375
extern int pvr2_poly_texblend[4];
nkeynes@221
   376
extern int pvr2_render_colour_format[8];
nkeynes@221
   377
nkeynes@653
   378
#define CULL_NONE 0
nkeynes@653
   379
#define CULL_SMALL 1
nkeynes@653
   380
#define CULL_CCW 2
nkeynes@653
   381
#define CULL_CW 3
nkeynes@653
   382
nkeynes@653
   383
#define SEGMENT_END         0x80000000
nkeynes@653
   384
#define SEGMENT_ZCLEAR      0x40000000
nkeynes@653
   385
#define SEGMENT_SORT_TRANS  0x20000000
nkeynes@653
   386
#define SEGMENT_START       0x10000000
nkeynes@653
   387
#define SEGMENT_X(c)        (((c) >> 2) & 0x3F)
nkeynes@653
   388
#define SEGMENT_Y(c)        (((c) >> 8) & 0x3F)
nkeynes@653
   389
#define NO_POINTER          0x80000000
nkeynes@653
   390
#define IS_TILE_PTR(p)      ( ((p)&NO_POINTER) == 0 )
nkeynes@653
   391
#define IS_LAST_SEGMENT(s)  (((s)->control) & SEGMENT_END)
nkeynes@653
   392
nkeynes@653
   393
struct tile_segment {
nkeynes@653
   394
    uint32_t control;
nkeynes@653
   395
    pvraddr_t opaque_ptr;
nkeynes@653
   396
    pvraddr_t opaquemod_ptr;
nkeynes@653
   397
    pvraddr_t trans_ptr;
nkeynes@653
   398
    pvraddr_t transmod_ptr;
nkeynes@653
   399
    pvraddr_t punchout_ptr;
nkeynes@653
   400
};
nkeynes@653
   401
nkeynes@736
   402
#ifdef __cplusplus
nkeynes@736
   403
}
nkeynes@736
   404
#endif
nkeynes@736
   405
nkeynes@653
   406
#endif /* !lxdream_pvr2_H */
.