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lxdream.org :: lxdream/src/sh4/sh4core.in
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.in
changeset 586:2a3ba82cf243
prev550:a27e31340147
next587:739a3136f269
author nkeynes
date Tue Jan 15 20:50:23 2008 +0000 (11 years ago)
permissions -rw-r--r--
last change Merged lxdream-mmu r570:596 to trunk
file annotate diff log raw
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/**
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 * $Id$
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 * 
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 * SH4 emulation core, and parent module for all the SH4 peripheral
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 * modules.
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE sh4_module
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#include <assert.h>
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#include <math.h>
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#include "dream.h"
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#include "dreamcast.h"
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#include "eventq.h"
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#include "mem.h"
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#include "clock.h"
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#include "syscall.h"
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#include "sh4/sh4core.h"
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#include "sh4/sh4mmio.h"
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#include "sh4/intc.h"
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#define SH4_CALLTRACE 1
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#define MAX_INT 0x7FFFFFFF
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#define MIN_INT 0x80000000
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#define MAX_INTF 2147483647.0
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#define MIN_INTF -2147483648.0
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/********************** SH4 Module Definition ****************************/
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uint32_t sh4_run_slice( uint32_t nanosecs ) 
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{
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    int i;
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    sh4r.slice_cycle = 0;
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    if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
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	if( sh4r.event_pending < nanosecs ) {
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	    sh4r.sh4_state = SH4_STATE_RUNNING;
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	    sh4r.slice_cycle = sh4r.event_pending;
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	}
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    }
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    if( sh4_breakpoint_count == 0 ) {
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	for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    if( !sh4_execute_instruction() ) {
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		break;
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	    }
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	}
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    } else {
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	for( ;sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    if( !sh4_execute_instruction() )
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		break;
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#ifdef ENABLE_DEBUG_MODE
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	    for( i=0; i<sh4_breakpoint_count; i++ ) {
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		if( sh4_breakpoints[i].address == sh4r.pc ) {
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		    break;
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		}
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	    }
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	    if( i != sh4_breakpoint_count ) {
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		dreamcast_stop();
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		if( sh4_breakpoints[i].type == BREAK_ONESHOT )
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		    sh4_clear_breakpoint( sh4r.pc, BREAK_ONESHOT );
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		break;
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	    }
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#endif	
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	}
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    }
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    /* If we aborted early, but the cpu is still technically running,
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     * we're doing a hard abort - cut the timeslice back to what we
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     * actually executed
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     */
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    if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
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	nanosecs = sh4r.slice_cycle;
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    }
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    if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
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	TMU_run_slice( nanosecs );
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	SCIF_run_slice( nanosecs );
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    }
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    return nanosecs;
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}
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/********************** SH4 emulation core  ****************************/
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#define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
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#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); dreamcast_stop(); return FALSE; }while(0)
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#if(SH4_CALLTRACE == 1)
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#define MAX_CALLSTACK 32
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static struct call_stack {
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    sh4addr_t call_addr;
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    sh4addr_t target_addr;
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    sh4addr_t stack_pointer;
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} call_stack[MAX_CALLSTACK];
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static int call_stack_depth = 0;
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int sh4_call_trace_on = 0;
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static inline void trace_call( sh4addr_t source, sh4addr_t dest ) 
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{
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    if( call_stack_depth < MAX_CALLSTACK ) {
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	call_stack[call_stack_depth].call_addr = source;
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	call_stack[call_stack_depth].target_addr = dest;
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	call_stack[call_stack_depth].stack_pointer = sh4r.r[15];
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    }
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    call_stack_depth++;
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}
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static inline void trace_return( sh4addr_t source, sh4addr_t dest )
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{
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    if( call_stack_depth > 0 ) {
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	call_stack_depth--;
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    }
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}
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void fprint_stack_trace( FILE *f )
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{
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    int i = call_stack_depth -1;
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    if( i >= MAX_CALLSTACK )
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	i = MAX_CALLSTACK - 1;
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    for( ; i >= 0; i-- ) {
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	fprintf( f, "%d. Call from %08X => %08X, SP=%08X\n", 
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		 (call_stack_depth - i), call_stack[i].call_addr,
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		 call_stack[i].target_addr, call_stack[i].stack_pointer );
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    }
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}
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#define TRACE_CALL( source, dest ) trace_call(source, dest)
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#define TRACE_RETURN( source, dest ) trace_return(source, dest)
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#else
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#define TRACE_CALL( dest, rts ) 
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#define TRACE_RETURN( source, dest )
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#endif
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#define MEM_READ_BYTE( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_byte(memtmp); }
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#define MEM_READ_WORD( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_word(memtmp); }
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#define MEM_READ_LONG( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_long(memtmp); }
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#define MEM_WRITE_BYTE( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_byte(memtmp, val); }
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#define MEM_WRITE_WORD( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_word(memtmp, val); }
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#define MEM_WRITE_LONG( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_long(memtmp, val); }
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#define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
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#define MEM_FP_READ( addr, reg ) sh4_read_float( addr, reg );
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#define MEM_FP_WRITE( addr, reg ) sh4_write_float( addr, reg );
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#define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL )
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#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
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#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
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#define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
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static void sh4_write_float( uint32_t addr, int reg )
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{
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    if( IS_FPU_DOUBLESIZE() ) {
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	if( reg & 1 ) {
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	    sh4_write_long( addr, *((uint32_t *)&XF((reg)&0x0E)) );
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	    sh4_write_long( addr+4, *((uint32_t *)&XF(reg)) );
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	} else {
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	    sh4_write_long( addr, *((uint32_t *)&FR(reg)) ); 
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	    sh4_write_long( addr+4, *((uint32_t *)&FR((reg)|0x01)) );
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	}
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    } else {
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	sh4_write_long( addr, *((uint32_t *)&FR((reg))) );
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    }
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}
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static void sh4_read_float( uint32_t addr, int reg )
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{
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    if( IS_FPU_DOUBLESIZE() ) {
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	if( reg & 1 ) {
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	    *((uint32_t *)&XF((reg) & 0x0E)) = sh4_read_long(addr);
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	    *((uint32_t *)&XF(reg)) = sh4_read_long(addr+4);
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	} else {
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	    *((uint32_t *)&FR(reg)) = sh4_read_long(addr);
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	    *((uint32_t *)&FR((reg) | 0x01)) = sh4_read_long(addr+4);
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	}
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    } else {
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	*((uint32_t *)&FR(reg)) = sh4_read_long(addr);
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    }
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}
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gboolean sh4_execute_instruction( void )
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{
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    uint32_t pc;
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    unsigned short ir;
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    uint32_t tmp;
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    float ftmp;
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    double dtmp;
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    int64_t memtmp; // temporary holder for memory reads
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#define R0 sh4r.r[0]
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    pc = sh4r.pc;
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    if( pc > 0xFFFFFF00 ) {
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	/* SYSCALL Magic */
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	syscall_invoke( pc );
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	sh4r.in_delay_slot = 0;
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	pc = sh4r.pc = sh4r.pr;
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	sh4r.new_pc = sh4r.pc + 2;
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    }
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    CHECKRALIGN16(pc);
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    /* Read instruction */
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    if( !IS_IN_ICACHE(pc) ) {
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	if( !mmu_update_icache(pc) ) {
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	    // Fault - look for the fault handler
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	    if( !mmu_update_icache(sh4r.pc) ) {
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		// double fault - halt
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		ERROR( "Double fault - halting" );
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		dreamcast_stop();
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		return FALSE;
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	    }
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	}
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	pc = sh4r.pc;
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    }
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    assert( IS_IN_ICACHE(pc) );
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    ir = *(uint16_t *)GET_ICACHE_PTR(sh4r.pc);
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%%
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AND Rm, Rn {: sh4r.r[Rn] &= sh4r.r[Rm]; :}
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AND #imm, R0 {: R0 &= imm; :}
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 AND.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp ); :}
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NOT Rm, Rn {: sh4r.r[Rn] = ~sh4r.r[Rm]; :}
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OR Rm, Rn {: sh4r.r[Rn] |= sh4r.r[Rm]; :}
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OR #imm, R0  {: R0 |= imm; :}
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 OR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp ); :}
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TAS.B @Rn {:
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    MEM_READ_BYTE( sh4r.r[Rn], tmp );
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    sh4r.t = ( tmp == 0 ? 1 : 0 );
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    MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );
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:}
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TST Rm, Rn {: sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1); :}
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TST #imm, R0 {: sh4r.t = (R0 & imm ? 0 : 1); :}
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 TST.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); sh4r.t = ( tmp & imm ? 0 : 1 ); :}
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XOR Rm, Rn {: sh4r.r[Rn] ^= sh4r.r[Rm]; :}
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XOR #imm, R0 {: R0 ^= imm; :}
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 XOR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp ); :}
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XTRCT Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rn]>>16) | (sh4r.r[Rm]<<16); :}
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ROTL Rn {:
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    sh4r.t = sh4r.r[Rn] >> 31;
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    sh4r.r[Rn] <<= 1;
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    sh4r.r[Rn] |= sh4r.t;
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:}
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ROTR Rn {:
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    sh4r.t = sh4r.r[Rn] & 0x00000001;
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    sh4r.r[Rn] >>= 1;
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    sh4r.r[Rn] |= (sh4r.t << 31);
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:}
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ROTCL Rn {:
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    tmp = sh4r.r[Rn] >> 31;
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    sh4r.r[Rn] <<= 1;
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    sh4r.r[Rn] |= sh4r.t;
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    sh4r.t = tmp;
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:}
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ROTCR Rn {:
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    tmp = sh4r.r[Rn] & 0x00000001;
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    sh4r.r[Rn] >>= 1;
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    sh4r.r[Rn] |= (sh4r.t << 31 );
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    sh4r.t = tmp;
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:}
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SHAD Rm, Rn {:
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    tmp = sh4r.r[Rm];
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    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
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    else if( (tmp & 0x1F) == 0 )  
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        sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 31;
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    else 
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	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> (((~sh4r.r[Rm]) & 0x1F)+1);
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:}
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SHLD Rm, Rn {:
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    tmp = sh4r.r[Rm];
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    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
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    else if( (tmp & 0x1F) == 0 ) sh4r.r[Rn] = 0;
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    else sh4r.r[Rn] >>= (((~tmp) & 0x1F)+1);
nkeynes@359
   308
:}
nkeynes@359
   309
SHAL Rn {:
nkeynes@359
   310
    sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359
   311
    sh4r.r[Rn] <<= 1;
nkeynes@359
   312
:}
nkeynes@359
   313
SHAR Rn {:
nkeynes@359
   314
    sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359
   315
    sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 1;
nkeynes@359
   316
:}
nkeynes@359
   317
SHLL Rn {: sh4r.t = sh4r.r[Rn] >> 31; sh4r.r[Rn] <<= 1; :}
nkeynes@359
   318
SHLR Rn {: sh4r.t = sh4r.r[Rn] & 0x00000001; sh4r.r[Rn] >>= 1; :}
nkeynes@359
   319
SHLL2 Rn {: sh4r.r[Rn] <<= 2; :}
nkeynes@359
   320
SHLR2 Rn {: sh4r.r[Rn] >>= 2; :}
nkeynes@359
   321
SHLL8 Rn {: sh4r.r[Rn] <<= 8; :}
nkeynes@359
   322
SHLR8 Rn {: sh4r.r[Rn] >>= 8; :}
nkeynes@359
   323
SHLL16 Rn {: sh4r.r[Rn] <<= 16; :}
nkeynes@359
   324
SHLR16 Rn {: sh4r.r[Rn] >>= 16; :}
nkeynes@359
   325
nkeynes@359
   326
EXTU.B Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x000000FF; :}
nkeynes@359
   327
EXTU.W Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x0000FFFF; :}
nkeynes@359
   328
EXTS.B Rm, Rn {: sh4r.r[Rn] = SIGNEXT8( sh4r.r[Rm]&0x000000FF ); :}
nkeynes@359
   329
EXTS.W Rm, Rn {: sh4r.r[Rn] = SIGNEXT16( sh4r.r[Rm]&0x0000FFFF ); :}
nkeynes@359
   330
SWAP.B Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]&0xFFFF0000) | ((sh4r.r[Rm]&0x0000FF00)>>8) | ((sh4r.r[Rm]&0x000000FF)<<8); :}
nkeynes@359
   331
SWAP.W Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]>>16) | (sh4r.r[Rm]<<16); :}
nkeynes@359
   332
nkeynes@359
   333
CLRT {: sh4r.t = 0; :}
nkeynes@359
   334
SETT {: sh4r.t = 1; :}
nkeynes@359
   335
CLRMAC {: sh4r.mac = 0; :}
nkeynes@550
   336
LDTLB {: MMU_ldtlb(); :}
nkeynes@359
   337
CLRS {: sh4r.s = 0; :}
nkeynes@359
   338
SETS {: sh4r.s = 1; :}
nkeynes@359
   339
MOVT Rn {: sh4r.r[Rn] = sh4r.t; :}
nkeynes@359
   340
NOP {: /* NOP */ :}
nkeynes@359
   341
nkeynes@359
   342
PREF @Rn {:
nkeynes@359
   343
     tmp = sh4r.r[Rn];
nkeynes@359
   344
     if( (tmp & 0xFC000000) == 0xE0000000 ) {
nkeynes@369
   345
	 sh4_flush_store_queue(tmp);
nkeynes@359
   346
     }
nkeynes@359
   347
:}
nkeynes@359
   348
OCBI @Rn {: :}
nkeynes@359
   349
OCBP @Rn {: :}
nkeynes@359
   350
OCBWB @Rn {: :}
nkeynes@359
   351
MOVCA.L R0, @Rn {:
nkeynes@359
   352
    tmp = sh4r.r[Rn];
nkeynes@359
   353
    CHECKWALIGN32(tmp);
nkeynes@359
   354
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   355
:}
nkeynes@359
   356
MOV.B Rm, @(R0, Rn) {: MEM_WRITE_BYTE( R0 + sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   357
MOV.W Rm, @(R0, Rn) {: 
nkeynes@359
   358
    CHECKWALIGN16( R0 + sh4r.r[Rn] );
nkeynes@359
   359
    MEM_WRITE_WORD( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   360
:}
nkeynes@359
   361
MOV.L Rm, @(R0, Rn) {:
nkeynes@359
   362
    CHECKWALIGN32( R0 + sh4r.r[Rn] );
nkeynes@359
   363
    MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   364
:}
nkeynes@586
   365
MOV.B @(R0, Rm), Rn {: MEM_READ_BYTE( R0 + sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@359
   366
MOV.W @(R0, Rm), Rn {: CHECKRALIGN16( R0 + sh4r.r[Rm] );
nkeynes@586
   367
    MEM_READ_WORD( R0 + sh4r.r[Rm], sh4r.r[Rn] );
nkeynes@359
   368
:}
nkeynes@359
   369
MOV.L @(R0, Rm), Rn {: CHECKRALIGN32( R0 + sh4r.r[Rm] );
nkeynes@586
   370
    MEM_READ_LONG( R0 + sh4r.r[Rm], sh4r.r[Rn] );
nkeynes@359
   371
:}
nkeynes@359
   372
MOV.L Rm, @(disp, Rn) {:
nkeynes@359
   373
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   374
    CHECKWALIGN32( tmp );
nkeynes@359
   375
    MEM_WRITE_LONG( tmp, sh4r.r[Rm] );
nkeynes@359
   376
:}
nkeynes@359
   377
MOV.B Rm, @Rn {: MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   378
MOV.W Rm, @Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   379
MOV.L Rm, @Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   380
MOV.B Rm, @-Rn {: sh4r.r[Rn] --; MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   381
MOV.W Rm, @-Rn {: sh4r.r[Rn] -= 2; CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   382
MOV.L Rm, @-Rn {: sh4r.r[Rn] -= 4; CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   383
MOV.L @(disp, Rm), Rn {:
nkeynes@359
   384
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   385
    CHECKRALIGN32( tmp );
nkeynes@586
   386
    MEM_READ_LONG( tmp, sh4r.r[Rn] );
nkeynes@359
   387
:}
nkeynes@586
   388
MOV.B @Rm, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@586
   389
 MOV.W @Rm, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@586
   390
 MOV.L @Rm, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@359
   391
MOV Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]; :}
nkeynes@586
   392
 MOV.B @Rm+, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] ++; :}
nkeynes@586
   393
 MOV.W @Rm+, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 2; :}
nkeynes@586
   394
 MOV.L @Rm+, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 4; :}
nkeynes@359
   395
MOV.L @(disp, PC), Rn {:
nkeynes@359
   396
    CHECKSLOTILLEGAL();
nkeynes@359
   397
    tmp = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@586
   398
    MEM_READ_LONG( tmp, sh4r.r[Rn] );
nkeynes@359
   399
:}
nkeynes@359
   400
MOV.B R0, @(disp, GBR) {: MEM_WRITE_BYTE( sh4r.gbr + disp, R0 ); :}
nkeynes@359
   401
MOV.W R0, @(disp, GBR) {:
nkeynes@359
   402
    tmp = sh4r.gbr + disp;
nkeynes@359
   403
    CHECKWALIGN16( tmp );
nkeynes@359
   404
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   405
:}
nkeynes@359
   406
MOV.L R0, @(disp, GBR) {:
nkeynes@359
   407
    tmp = sh4r.gbr + disp;
nkeynes@359
   408
    CHECKWALIGN32( tmp );
nkeynes@359
   409
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   410
:}
nkeynes@586
   411
 MOV.B @(disp, GBR), R0 {: MEM_READ_BYTE( sh4r.gbr + disp, R0 ); :}
nkeynes@359
   412
MOV.W @(disp, GBR), R0 {: 
nkeynes@359
   413
    tmp = sh4r.gbr + disp;
nkeynes@359
   414
    CHECKRALIGN16( tmp );
nkeynes@586
   415
    MEM_READ_WORD( tmp, R0 );
nkeynes@359
   416
:}
nkeynes@359
   417
MOV.L @(disp, GBR), R0 {:
nkeynes@359
   418
    tmp = sh4r.gbr + disp;
nkeynes@359
   419
    CHECKRALIGN32( tmp );
nkeynes@586
   420
    MEM_READ_LONG( tmp, R0 );
nkeynes@359
   421
:}
nkeynes@359
   422
MOV.B R0, @(disp, Rn) {: MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 ); :}
nkeynes@359
   423
MOV.W R0, @(disp, Rn) {: 
nkeynes@359
   424
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   425
    CHECKWALIGN16( tmp );
nkeynes@359
   426
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   427
:}
nkeynes@586
   428
 MOV.B @(disp, Rm), R0 {: MEM_READ_BYTE( sh4r.r[Rm] + disp, R0 ); :}
nkeynes@359
   429
MOV.W @(disp, Rm), R0 {: 
nkeynes@359
   430
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   431
    CHECKRALIGN16( tmp );
nkeynes@586
   432
    MEM_READ_WORD( tmp, R0 );
nkeynes@359
   433
:}
nkeynes@359
   434
MOV.W @(disp, PC), Rn {:
nkeynes@359
   435
    CHECKSLOTILLEGAL();
nkeynes@359
   436
    tmp = pc + 4 + disp;
nkeynes@586
   437
    MEM_READ_WORD( tmp, sh4r.r[Rn] );
nkeynes@359
   438
:}
nkeynes@359
   439
MOVA @(disp, PC), R0 {:
nkeynes@359
   440
    CHECKSLOTILLEGAL();
nkeynes@359
   441
    R0 = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359
   442
:}
nkeynes@359
   443
MOV #imm, Rn {:  sh4r.r[Rn] = imm; :}
nkeynes@359
   444
nkeynes@359
   445
CMP/EQ #imm, R0 {: sh4r.t = ( R0 == imm ? 1 : 0 ); :}
nkeynes@359
   446
CMP/EQ Rm, Rn {: sh4r.t = ( sh4r.r[Rm] == sh4r.r[Rn] ? 1 : 0 ); :}
nkeynes@359
   447
CMP/GE Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   448
CMP/GT Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   449
CMP/HI Rm, Rn {: sh4r.t = ( sh4r.r[Rn] > sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   450
CMP/HS Rm, Rn {: sh4r.t = ( sh4r.r[Rn] >= sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   451
CMP/PL Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > 0 ? 1 : 0 ); :}
nkeynes@359
   452
CMP/PZ Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= 0 ? 1 : 0 ); :}
nkeynes@359
   453
CMP/STR Rm, Rn {: 
nkeynes@359
   454
    /* set T = 1 if any byte in RM & RN is the same */
nkeynes@359
   455
    tmp = sh4r.r[Rm] ^ sh4r.r[Rn];
nkeynes@359
   456
    sh4r.t = ((tmp&0x000000FF)==0 || (tmp&0x0000FF00)==0 ||
nkeynes@359
   457
             (tmp&0x00FF0000)==0 || (tmp&0xFF000000)==0)?1:0;
nkeynes@359
   458
:}
nkeynes@359
   459
nkeynes@359
   460
ADD Rm, Rn {: sh4r.r[Rn] += sh4r.r[Rm]; :}
nkeynes@359
   461
ADD #imm, Rn {: sh4r.r[Rn] += imm; :}
nkeynes@359
   462
ADDC Rm, Rn {:
nkeynes@359
   463
    tmp = sh4r.r[Rn];
nkeynes@359
   464
    sh4r.r[Rn] += sh4r.r[Rm] + sh4r.t;
nkeynes@359
   465
    sh4r.t = ( sh4r.r[Rn] < tmp || (sh4r.r[Rn] == tmp && sh4r.t != 0) ? 1 : 0 );
nkeynes@359
   466
:}
nkeynes@359
   467
ADDV Rm, Rn {:
nkeynes@359
   468
    tmp = sh4r.r[Rn] + sh4r.r[Rm];
nkeynes@359
   469
    sh4r.t = ( (sh4r.r[Rn]>>31) == (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
nkeynes@359
   470
    sh4r.r[Rn] = tmp;
nkeynes@359
   471
:}
nkeynes@359
   472
DIV0U {: sh4r.m = sh4r.q = sh4r.t = 0; :}
nkeynes@359
   473
DIV0S Rm, Rn {: 
nkeynes@359
   474
    sh4r.q = sh4r.r[Rn]>>31;
nkeynes@359
   475
    sh4r.m = sh4r.r[Rm]>>31;
nkeynes@359
   476
    sh4r.t = sh4r.q ^ sh4r.m;
nkeynes@359
   477
:}
nkeynes@359
   478
DIV1 Rm, Rn {:
nkeynes@384
   479
    /* This is derived from the sh4 manual with some simplifications */
nkeynes@359
   480
    uint32_t tmp0, tmp1, tmp2, dir;
nkeynes@359
   481
nkeynes@359
   482
    dir = sh4r.q ^ sh4r.m;
nkeynes@359
   483
    sh4r.q = (sh4r.r[Rn] >> 31);
nkeynes@359
   484
    tmp2 = sh4r.r[Rm];
nkeynes@359
   485
    sh4r.r[Rn] = (sh4r.r[Rn] << 1) | sh4r.t;
nkeynes@359
   486
    tmp0 = sh4r.r[Rn];
nkeynes@359
   487
    if( dir ) {
nkeynes@359
   488
         sh4r.r[Rn] += tmp2;
nkeynes@359
   489
         tmp1 = (sh4r.r[Rn]<tmp0 ? 1 : 0 );
nkeynes@359
   490
    } else {
nkeynes@359
   491
         sh4r.r[Rn] -= tmp2;
nkeynes@359
   492
         tmp1 = (sh4r.r[Rn]>tmp0 ? 1 : 0 );
nkeynes@359
   493
    }
nkeynes@359
   494
    sh4r.q ^= sh4r.m ^ tmp1;
nkeynes@359
   495
    sh4r.t = ( sh4r.q == sh4r.m ? 1 : 0 );
nkeynes@359
   496
:}
nkeynes@359
   497
DMULS.L Rm, Rn {: sh4r.mac = SIGNEXT32(sh4r.r[Rm]) * SIGNEXT32(sh4r.r[Rn]); :}
nkeynes@359
   498
DMULU.L Rm, Rn {: sh4r.mac = ((uint64_t)sh4r.r[Rm]) * ((uint64_t)sh4r.r[Rn]); :}
nkeynes@359
   499
DT Rn {:
nkeynes@359
   500
    sh4r.r[Rn] --;
nkeynes@359
   501
    sh4r.t = ( sh4r.r[Rn] == 0 ? 1 : 0 );
nkeynes@359
   502
:}
nkeynes@359
   503
MAC.W @Rm+, @Rn+ {:
nkeynes@359
   504
    CHECKRALIGN16( sh4r.r[Rn] );
nkeynes@359
   505
    CHECKRALIGN16( sh4r.r[Rm] );
nkeynes@586
   506
    MEM_READ_WORD(sh4r.r[Rn], tmp);
nkeynes@586
   507
    int32_t stmp = SIGNEXT16(tmp);
nkeynes@359
   508
    sh4r.r[Rn] += 2;
nkeynes@586
   509
    MEM_READ_WORD(sh4r.r[Rm], tmp);
nkeynes@586
   510
    stmp = stmp * SIGNEXT16(tmp);
nkeynes@359
   511
    sh4r.r[Rm] += 2;
nkeynes@359
   512
    if( sh4r.s ) {
nkeynes@359
   513
	int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
nkeynes@359
   514
	if( tmpl > (int64_t)0x000000007FFFFFFFLL ) {
nkeynes@359
   515
	    sh4r.mac = 0x000000017FFFFFFFLL;
nkeynes@359
   516
	} else if( tmpl < (int64_t)0xFFFFFFFF80000000LL ) {
nkeynes@359
   517
	    sh4r.mac = 0x0000000180000000LL;
nkeynes@359
   518
	} else {
nkeynes@359
   519
	    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   520
		((uint32_t)(sh4r.mac + stmp));
nkeynes@359
   521
	}
nkeynes@359
   522
    } else {
nkeynes@359
   523
	sh4r.mac += SIGNEXT32(stmp);
nkeynes@359
   524
    }
nkeynes@359
   525
:}
nkeynes@359
   526
MAC.L @Rm+, @Rn+ {:
nkeynes@359
   527
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359
   528
    CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@586
   529
    MEM_READ_LONG(sh4r.r[Rn], tmp);
nkeynes@586
   530
    int64_t tmpl = SIGNEXT32(tmp);
nkeynes@359
   531
    sh4r.r[Rn] += 4;
nkeynes@586
   532
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@586
   533
    tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
nkeynes@359
   534
    sh4r.r[Rm] += 4;
nkeynes@359
   535
    if( sh4r.s ) {
nkeynes@359
   536
        /* 48-bit Saturation. Yuch */
nkeynes@359
   537
        if( tmpl < (int64_t)0xFFFF800000000000LL )
nkeynes@359
   538
            tmpl = 0xFFFF800000000000LL;
nkeynes@359
   539
        else if( tmpl > (int64_t)0x00007FFFFFFFFFFFLL )
nkeynes@359
   540
            tmpl = 0x00007FFFFFFFFFFFLL;
nkeynes@359
   541
    }
nkeynes@359
   542
    sh4r.mac = tmpl;
nkeynes@359
   543
:}
nkeynes@359
   544
MUL.L Rm, Rn {: sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   545
                        (sh4r.r[Rm] * sh4r.r[Rn]); :}
nkeynes@359
   546
MULU.W Rm, Rn {:
nkeynes@359
   547
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   548
               (uint32_t)((sh4r.r[Rm]&0xFFFF) * (sh4r.r[Rn]&0xFFFF));
nkeynes@359
   549
:}
nkeynes@359
   550
MULS.W Rm, Rn {:
nkeynes@359
   551
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   552
               (uint32_t)(SIGNEXT32(sh4r.r[Rm]&0xFFFF) * SIGNEXT32(sh4r.r[Rn]&0xFFFF));
nkeynes@359
   553
:}
nkeynes@359
   554
NEGC Rm, Rn {:
nkeynes@359
   555
    tmp = 0 - sh4r.r[Rm];
nkeynes@359
   556
    sh4r.r[Rn] = tmp - sh4r.t;
nkeynes@359
   557
    sh4r.t = ( 0<tmp || tmp<sh4r.r[Rn] ? 1 : 0 );
nkeynes@359
   558
:}
nkeynes@359
   559
NEG Rm, Rn {: sh4r.r[Rn] = 0 - sh4r.r[Rm]; :}
nkeynes@359
   560
SUB Rm, Rn {: sh4r.r[Rn] -= sh4r.r[Rm]; :}
nkeynes@359
   561
SUBC Rm, Rn {: 
nkeynes@359
   562
    tmp = sh4r.r[Rn];
nkeynes@359
   563
    sh4r.r[Rn] = sh4r.r[Rn] - sh4r.r[Rm] - sh4r.t;
nkeynes@359
   564
    sh4r.t = (sh4r.r[Rn] > tmp || (sh4r.r[Rn] == tmp && sh4r.t == 1));
nkeynes@359
   565
:}
nkeynes@359
   566
nkeynes@359
   567
BRAF Rn {:
nkeynes@359
   568
     CHECKSLOTILLEGAL();
nkeynes@359
   569
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   570
     sh4r.in_delay_slot = 1;
nkeynes@359
   571
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   572
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   573
     return TRUE;
nkeynes@359
   574
:}
nkeynes@359
   575
BSRF Rn {:
nkeynes@359
   576
     CHECKSLOTILLEGAL();
nkeynes@359
   577
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   578
     sh4r.in_delay_slot = 1;
nkeynes@359
   579
     sh4r.pr = sh4r.pc + 4;
nkeynes@359
   580
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   581
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   582
     TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   583
     return TRUE;
nkeynes@359
   584
:}
nkeynes@359
   585
BT disp {:
nkeynes@359
   586
    CHECKSLOTILLEGAL();
nkeynes@359
   587
    if( sh4r.t ) {
nkeynes@359
   588
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   589
        sh4r.pc += disp + 4;
nkeynes@359
   590
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   591
        return TRUE;
nkeynes@359
   592
    }
nkeynes@359
   593
:}
nkeynes@359
   594
BF disp {:
nkeynes@359
   595
    CHECKSLOTILLEGAL();
nkeynes@359
   596
    if( !sh4r.t ) {
nkeynes@359
   597
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   598
        sh4r.pc += disp + 4;
nkeynes@359
   599
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   600
        return TRUE;
nkeynes@359
   601
    }
nkeynes@359
   602
:}
nkeynes@359
   603
BT/S disp {:
nkeynes@359
   604
    CHECKSLOTILLEGAL();
nkeynes@359
   605
    if( sh4r.t ) {
nkeynes@359
   606
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   607
        sh4r.in_delay_slot = 1;
nkeynes@359
   608
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   609
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   610
        sh4r.in_delay_slot = 1;
nkeynes@359
   611
        return TRUE;
nkeynes@359
   612
    }
nkeynes@359
   613
:}
nkeynes@359
   614
BF/S disp {:
nkeynes@359
   615
    CHECKSLOTILLEGAL();
nkeynes@359
   616
    if( !sh4r.t ) {
nkeynes@359
   617
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   618
        sh4r.in_delay_slot = 1;
nkeynes@359
   619
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   620
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   621
        return TRUE;
nkeynes@359
   622
    }
nkeynes@359
   623
:}
nkeynes@359
   624
BRA disp {:
nkeynes@359
   625
    CHECKSLOTILLEGAL();
nkeynes@359
   626
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   627
    sh4r.in_delay_slot = 1;
nkeynes@359
   628
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   629
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   630
    return TRUE;
nkeynes@359
   631
:}
nkeynes@359
   632
BSR disp {:
nkeynes@359
   633
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   634
    CHECKSLOTILLEGAL();
nkeynes@359
   635
    sh4r.in_delay_slot = 1;
nkeynes@359
   636
    sh4r.pr = pc + 4;
nkeynes@359
   637
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   638
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   639
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   640
    return TRUE;
nkeynes@359
   641
:}
nkeynes@359
   642
TRAPA #imm {:
nkeynes@359
   643
    CHECKSLOTILLEGAL();
nkeynes@359
   644
    sh4r.pc += 2;
nkeynes@586
   645
    sh4_raise_trap( imm );
nkeynes@586
   646
    return TRUE;
nkeynes@359
   647
:}
nkeynes@359
   648
RTS {: 
nkeynes@359
   649
    CHECKSLOTILLEGAL();
nkeynes@359
   650
    CHECKDEST( sh4r.pr );
nkeynes@359
   651
    sh4r.in_delay_slot = 1;
nkeynes@359
   652
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   653
    sh4r.new_pc = sh4r.pr;
nkeynes@359
   654
    TRACE_RETURN( pc, sh4r.new_pc );
nkeynes@359
   655
    return TRUE;
nkeynes@359
   656
:}
nkeynes@359
   657
SLEEP {:
nkeynes@359
   658
    if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
nkeynes@359
   659
	sh4r.sh4_state = SH4_STATE_STANDBY;
nkeynes@359
   660
    } else {
nkeynes@359
   661
	sh4r.sh4_state = SH4_STATE_SLEEP;
nkeynes@359
   662
    }
nkeynes@359
   663
    return FALSE; /* Halt CPU */
nkeynes@359
   664
:}
nkeynes@359
   665
RTE {:
nkeynes@359
   666
    CHECKPRIV();
nkeynes@359
   667
    CHECKDEST( sh4r.spc );
nkeynes@359
   668
    CHECKSLOTILLEGAL();
nkeynes@359
   669
    sh4r.in_delay_slot = 1;
nkeynes@359
   670
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   671
    sh4r.new_pc = sh4r.spc;
nkeynes@374
   672
    sh4_write_sr( sh4r.ssr );
nkeynes@359
   673
    return TRUE;
nkeynes@359
   674
:}
nkeynes@359
   675
JMP @Rn {:
nkeynes@359
   676
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   677
    CHECKSLOTILLEGAL();
nkeynes@359
   678
    sh4r.in_delay_slot = 1;
nkeynes@359
   679
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   680
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   681
    return TRUE;
nkeynes@359
   682
:}
nkeynes@359
   683
JSR @Rn {:
nkeynes@359
   684
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   685
    CHECKSLOTILLEGAL();
nkeynes@359
   686
    sh4r.in_delay_slot = 1;
nkeynes@359
   687
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   688
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   689
    sh4r.pr = pc + 4;
nkeynes@359
   690
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   691
    return TRUE;
nkeynes@359
   692
:}
nkeynes@359
   693
STS MACH, Rn {: sh4r.r[Rn] = (sh4r.mac>>32); :}
nkeynes@359
   694
STS.L MACH, @-Rn {:
nkeynes@359
   695
    sh4r.r[Rn] -= 4;
nkeynes@359
   696
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   697
    MEM_WRITE_LONG( sh4r.r[Rn], (sh4r.mac>>32) );
nkeynes@359
   698
:}
nkeynes@359
   699
STC.L SR, @-Rn {:
nkeynes@359
   700
    CHECKPRIV();
nkeynes@359
   701
    sh4r.r[Rn] -= 4;
nkeynes@359
   702
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   703
    MEM_WRITE_LONG( sh4r.r[Rn], sh4_read_sr() );
nkeynes@359
   704
:}
nkeynes@359
   705
LDS.L @Rm+, MACH {:
nkeynes@359
   706
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   707
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   708
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@586
   709
	(((uint64_t)tmp)<<32);
nkeynes@359
   710
    sh4r.r[Rm] += 4;
nkeynes@359
   711
:}
nkeynes@359
   712
LDC.L @Rm+, SR {:
nkeynes@359
   713
    CHECKSLOTILLEGAL();
nkeynes@359
   714
    CHECKPRIV();
nkeynes@359
   715
    CHECKWALIGN32( sh4r.r[Rm] );
nkeynes@586
   716
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@586
   717
    sh4_write_sr( tmp );
nkeynes@359
   718
    sh4r.r[Rm] +=4;
nkeynes@359
   719
:}
nkeynes@359
   720
LDS Rm, MACH {:
nkeynes@359
   721
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@359
   722
               (((uint64_t)sh4r.r[Rm])<<32);
nkeynes@359
   723
:}
nkeynes@359
   724
LDC Rm, SR {:
nkeynes@359
   725
    CHECKSLOTILLEGAL();
nkeynes@359
   726
    CHECKPRIV();
nkeynes@374
   727
    sh4_write_sr( sh4r.r[Rm] );
nkeynes@359
   728
:}
nkeynes@359
   729
LDC Rm, SGR {:
nkeynes@359
   730
    CHECKPRIV();
nkeynes@359
   731
    sh4r.sgr = sh4r.r[Rm];
nkeynes@359
   732
:}
nkeynes@359
   733
LDC.L @Rm+, SGR {:
nkeynes@359
   734
    CHECKPRIV();
nkeynes@359
   735
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   736
    MEM_READ_LONG(sh4r.r[Rm], sh4r.sgr);
nkeynes@359
   737
    sh4r.r[Rm] +=4;
nkeynes@359
   738
:}
nkeynes@359
   739
STS MACL, Rn {: sh4r.r[Rn] = (uint32_t)sh4r.mac; :}
nkeynes@359
   740
STS.L MACL, @-Rn {:
nkeynes@359
   741
    sh4r.r[Rn] -= 4;
nkeynes@359
   742
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   743
    MEM_WRITE_LONG( sh4r.r[Rn], (uint32_t)sh4r.mac );
nkeynes@359
   744
:}
nkeynes@359
   745
STC.L GBR, @-Rn {:
nkeynes@359
   746
    sh4r.r[Rn] -= 4;
nkeynes@359
   747
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   748
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.gbr );
nkeynes@359
   749
:}
nkeynes@359
   750
LDS.L @Rm+, MACL {:
nkeynes@359
   751
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   752
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   753
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@586
   754
               (uint64_t)((uint32_t)tmp);
nkeynes@359
   755
    sh4r.r[Rm] += 4;
nkeynes@359
   756
:}
nkeynes@359
   757
LDC.L @Rm+, GBR {:
nkeynes@359
   758
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   759
    MEM_READ_LONG(sh4r.r[Rm], sh4r.gbr);
nkeynes@359
   760
    sh4r.r[Rm] +=4;
nkeynes@359
   761
:}
nkeynes@359
   762
LDS Rm, MACL {:
nkeynes@359
   763
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   764
               (uint64_t)((uint32_t)(sh4r.r[Rm]));
nkeynes@359
   765
:}
nkeynes@359
   766
LDC Rm, GBR {: sh4r.gbr = sh4r.r[Rm]; :}
nkeynes@359
   767
STS PR, Rn {: sh4r.r[Rn] = sh4r.pr; :}
nkeynes@359
   768
STS.L PR, @-Rn {:
nkeynes@359
   769
    sh4r.r[Rn] -= 4;
nkeynes@359
   770
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   771
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.pr );
nkeynes@359
   772
:}
nkeynes@359
   773
STC.L VBR, @-Rn {:
nkeynes@359
   774
    CHECKPRIV();
nkeynes@359
   775
    sh4r.r[Rn] -= 4;
nkeynes@359
   776
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   777
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.vbr );
nkeynes@359
   778
:}
nkeynes@359
   779
LDS.L @Rm+, PR {:
nkeynes@359
   780
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   781
    MEM_READ_LONG( sh4r.r[Rm], sh4r.pr );
nkeynes@359
   782
    sh4r.r[Rm] += 4;
nkeynes@359
   783
:}
nkeynes@359
   784
LDC.L @Rm+, VBR {:
nkeynes@359
   785
    CHECKPRIV();
nkeynes@359
   786
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   787
    MEM_READ_LONG(sh4r.r[Rm], sh4r.vbr);
nkeynes@359
   788
    sh4r.r[Rm] +=4;
nkeynes@359
   789
:}
nkeynes@359
   790
LDS Rm, PR {: sh4r.pr = sh4r.r[Rm]; :}
nkeynes@359
   791
LDC Rm, VBR {:
nkeynes@359
   792
    CHECKPRIV();
nkeynes@359
   793
    sh4r.vbr = sh4r.r[Rm];
nkeynes@359
   794
:}
nkeynes@359
   795
STC SGR, Rn {:
nkeynes@359
   796
    CHECKPRIV();
nkeynes@359
   797
    sh4r.r[Rn] = sh4r.sgr;
nkeynes@359
   798
:}
nkeynes@359
   799
STC.L SGR, @-Rn {:
nkeynes@359
   800
    CHECKPRIV();
nkeynes@359
   801
    sh4r.r[Rn] -= 4;
nkeynes@359
   802
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   803
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.sgr );
nkeynes@359
   804
:}
nkeynes@359
   805
STC.L SSR, @-Rn {:
nkeynes@359
   806
    CHECKPRIV();
nkeynes@359
   807
    sh4r.r[Rn] -= 4;
nkeynes@359
   808
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   809
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.ssr );
nkeynes@359
   810
:}
nkeynes@359
   811
LDC.L @Rm+, SSR {:
nkeynes@359
   812
    CHECKPRIV();
nkeynes@359
   813
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   814
    MEM_READ_LONG(sh4r.r[Rm], sh4r.ssr);
nkeynes@359
   815
    sh4r.r[Rm] +=4;
nkeynes@359
   816
:}
nkeynes@359
   817
LDC Rm, SSR {:
nkeynes@359
   818
    CHECKPRIV();
nkeynes@359
   819
    sh4r.ssr = sh4r.r[Rm];
nkeynes@359
   820
:}
nkeynes@359
   821
STC.L SPC, @-Rn {:
nkeynes@359
   822
    CHECKPRIV();
nkeynes@359
   823
    sh4r.r[Rn] -= 4;
nkeynes@359
   824
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   825
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.spc );
nkeynes@359
   826
:}
nkeynes@359
   827
LDC.L @Rm+, SPC {:
nkeynes@359
   828
    CHECKPRIV();
nkeynes@359
   829
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   830
    MEM_READ_LONG(sh4r.r[Rm], sh4r.spc);
nkeynes@359
   831
    sh4r.r[Rm] +=4;
nkeynes@359
   832
:}
nkeynes@359
   833
LDC Rm, SPC {:
nkeynes@359
   834
    CHECKPRIV();
nkeynes@359
   835
    sh4r.spc = sh4r.r[Rm];
nkeynes@359
   836
:}
nkeynes@359
   837
STS FPUL, Rn {: sh4r.r[Rn] = sh4r.fpul; :}
nkeynes@359
   838
STS.L FPUL, @-Rn {:
nkeynes@359
   839
    sh4r.r[Rn] -= 4;
nkeynes@359
   840
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   841
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpul );
nkeynes@359
   842
:}
nkeynes@359
   843
LDS.L @Rm+, FPUL {:
nkeynes@359
   844
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   845
    MEM_READ_LONG(sh4r.r[Rm], sh4r.fpul);
nkeynes@359
   846
    sh4r.r[Rm] +=4;
nkeynes@359
   847
:}
nkeynes@359
   848
LDS Rm, FPUL {: sh4r.fpul = sh4r.r[Rm]; :}
nkeynes@359
   849
STS FPSCR, Rn {: sh4r.r[Rn] = sh4r.fpscr; :}
nkeynes@359
   850
STS.L FPSCR, @-Rn {:
nkeynes@359
   851
    sh4r.r[Rn] -= 4;
nkeynes@359
   852
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   853
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpscr );
nkeynes@359
   854
:}
nkeynes@359
   855
LDS.L @Rm+, FPSCR {:
nkeynes@359
   856
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   857
    MEM_READ_LONG(sh4r.r[Rm], sh4r.fpscr);
nkeynes@359
   858
    sh4r.r[Rm] +=4;
nkeynes@374
   859
    sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
nkeynes@359
   860
:}
nkeynes@374
   861
LDS Rm, FPSCR {: 
nkeynes@374
   862
    sh4r.fpscr = sh4r.r[Rm]; 
nkeynes@374
   863
    sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
nkeynes@374
   864
:}
nkeynes@359
   865
STC DBR, Rn {: CHECKPRIV(); sh4r.r[Rn] = sh4r.dbr; :}
nkeynes@359
   866
STC.L DBR, @-Rn {:
nkeynes@359
   867
    CHECKPRIV();
nkeynes@359
   868
    sh4r.r[Rn] -= 4;
nkeynes@359
   869
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   870
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.dbr );
nkeynes@359
   871
:}
nkeynes@359
   872
LDC.L @Rm+, DBR {:
nkeynes@359
   873
    CHECKPRIV();
nkeynes@359
   874
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   875
    MEM_READ_LONG(sh4r.r[Rm], sh4r.dbr);
nkeynes@359
   876
    sh4r.r[Rm] +=4;
nkeynes@359
   877
:}
nkeynes@359
   878
LDC Rm, DBR {:
nkeynes@359
   879
    CHECKPRIV();
nkeynes@359
   880
    sh4r.dbr = sh4r.r[Rm];
nkeynes@359
   881
:}
nkeynes@359
   882
STC.L Rm_BANK, @-Rn {:
nkeynes@359
   883
    CHECKPRIV();
nkeynes@359
   884
    sh4r.r[Rn] -= 4;
nkeynes@359
   885
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359
   886
    MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r_bank[Rm_BANK] );
nkeynes@359
   887
:}
nkeynes@359
   888
LDC.L @Rm+, Rn_BANK {:
nkeynes@359
   889
    CHECKPRIV();
nkeynes@359
   890
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   891
    MEM_READ_LONG( sh4r.r[Rm], sh4r.r_bank[Rn_BANK] );
nkeynes@359
   892
    sh4r.r[Rm] += 4;
nkeynes@359
   893
:}
nkeynes@359
   894
LDC Rm, Rn_BANK {:
nkeynes@359
   895
    CHECKPRIV();
nkeynes@359
   896
    sh4r.r_bank[Rn_BANK] = sh4r.r[Rm];
nkeynes@359
   897
:}
nkeynes@359
   898
STC SR, Rn {: 
nkeynes@359
   899
    CHECKPRIV();
nkeynes@359
   900
    sh4r.r[Rn] = sh4_read_sr();
nkeynes@359
   901
:}
nkeynes@359
   902
STC GBR, Rn {:
nkeynes@359
   903
    CHECKPRIV();
nkeynes@359
   904
    sh4r.r[Rn] = sh4r.gbr;
nkeynes@359
   905
:}
nkeynes@359
   906
STC VBR, Rn {:
nkeynes@359
   907
    CHECKPRIV();
nkeynes@359
   908
    sh4r.r[Rn] = sh4r.vbr;
nkeynes@359
   909
:}
nkeynes@359
   910
STC SSR, Rn {:
nkeynes@359
   911
    CHECKPRIV();
nkeynes@359
   912
    sh4r.r[Rn] = sh4r.ssr;
nkeynes@359
   913
:}
nkeynes@359
   914
STC SPC, Rn {:
nkeynes@359
   915
    CHECKPRIV();
nkeynes@359
   916
    sh4r.r[Rn] = sh4r.spc;
nkeynes@359
   917
:}
nkeynes@359
   918
STC Rm_BANK, Rn {:
nkeynes@359
   919
    CHECKPRIV();
nkeynes@359
   920
    sh4r.r[Rn] = sh4r.r_bank[Rm_BANK];
nkeynes@359
   921
:}
nkeynes@359
   922
nkeynes@359
   923
FADD FRm, FRn {:
nkeynes@359
   924
    CHECKFPUEN();
nkeynes@359
   925
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   926
	DR(FRn) += DR(FRm);
nkeynes@359
   927
    } else {
nkeynes@359
   928
	FR(FRn) += FR(FRm);
nkeynes@359
   929
    }
nkeynes@359
   930
:}
nkeynes@359
   931
FSUB FRm, FRn {:
nkeynes@359
   932
    CHECKFPUEN();
nkeynes@359
   933
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   934
	DR(FRn) -= DR(FRm);
nkeynes@359
   935
    } else {
nkeynes@359
   936
	FR(FRn) -= FR(FRm);
nkeynes@359
   937
    }
nkeynes@359
   938
:}
nkeynes@359
   939
nkeynes@359
   940
FMUL FRm, FRn {:
nkeynes@359
   941
    CHECKFPUEN();
nkeynes@359
   942
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   943
	DR(FRn) *= DR(FRm);
nkeynes@359
   944
    } else {
nkeynes@359
   945
	FR(FRn) *= FR(FRm);
nkeynes@359
   946
    }
nkeynes@359
   947
:}
nkeynes@359
   948
nkeynes@359
   949
FDIV FRm, FRn {:
nkeynes@359
   950
    CHECKFPUEN();
nkeynes@359
   951
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   952
	DR(FRn) /= DR(FRm);
nkeynes@359
   953
    } else {
nkeynes@359
   954
	FR(FRn) /= FR(FRm);
nkeynes@359
   955
    }
nkeynes@359
   956
:}
nkeynes@359
   957
nkeynes@359
   958
FCMP/EQ FRm, FRn {:
nkeynes@359
   959
    CHECKFPUEN();
nkeynes@359
   960
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   961
	sh4r.t = ( DR(FRn) == DR(FRm) ? 1 : 0 );
nkeynes@359
   962
    } else {
nkeynes@359
   963
	sh4r.t = ( FR(FRn) == FR(FRm) ? 1 : 0 );
nkeynes@359
   964
    }
nkeynes@359
   965
:}
nkeynes@359
   966
nkeynes@359
   967
FCMP/GT FRm, FRn {:
nkeynes@359
   968
    CHECKFPUEN();
nkeynes@359
   969
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   970
	sh4r.t = ( DR(FRn) > DR(FRm) ? 1 : 0 );
nkeynes@359
   971
    } else {
nkeynes@359
   972
	sh4r.t = ( FR(FRn) > FR(FRm) ? 1 : 0 );
nkeynes@359
   973
    }
nkeynes@359
   974
:}
nkeynes@359
   975
nkeynes@359
   976
FMOV @(R0, Rm), FRn {: MEM_FP_READ( sh4r.r[Rm] + R0, FRn ); :}
nkeynes@359
   977
FMOV FRm, @(R0, Rn) {: MEM_FP_WRITE( sh4r.r[Rn] + R0, FRm ); :}
nkeynes@359
   978
FMOV @Rm, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); :}
nkeynes@359
   979
FMOV @Rm+, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); sh4r.r[Rm] += FP_WIDTH; :}
nkeynes@359
   980
FMOV FRm, @Rn {: MEM_FP_WRITE( sh4r.r[Rn], FRm ); :}
nkeynes@359
   981
FMOV FRm, @-Rn {: sh4r.r[Rn] -= FP_WIDTH; MEM_FP_WRITE( sh4r.r[Rn], FRm ); :}
nkeynes@359
   982
FMOV FRm, FRn {: 
nkeynes@359
   983
    if( IS_FPU_DOUBLESIZE() )
nkeynes@359
   984
	DR(FRn) = DR(FRm);
nkeynes@359
   985
    else
nkeynes@359
   986
	FR(FRn) = FR(FRm);
nkeynes@359
   987
:}
nkeynes@359
   988
FSTS FPUL, FRn {: CHECKFPUEN(); FR(FRn) = FPULf; :}
nkeynes@359
   989
FLDS FRm, FPUL {: CHECKFPUEN(); FPULf = FR(FRm); :}
nkeynes@359
   990
FLOAT FPUL, FRn {: 
nkeynes@359
   991
    CHECKFPUEN();
nkeynes@374
   992
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
   993
	if( FRn&1 ) { // No, really...
nkeynes@374
   994
	    dtmp = (double)FPULi;
nkeynes@374
   995
	    FR(FRn) = *(((float *)&dtmp)+1);
nkeynes@374
   996
	} else {
nkeynes@374
   997
	    DRF(FRn>>1) = (double)FPULi;
nkeynes@374
   998
	}
nkeynes@374
   999
    } else {
nkeynes@359
  1000
	FR(FRn) = (float)FPULi;
nkeynes@374
  1001
    }
nkeynes@359
  1002
:}
nkeynes@359
  1003
FTRC FRm, FPUL {:
nkeynes@359
  1004
    CHECKFPUEN();
nkeynes@359
  1005
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
  1006
	if( FRm&1 ) {
nkeynes@374
  1007
	    dtmp = 0;
nkeynes@374
  1008
	    *(((float *)&dtmp)+1) = FR(FRm);
nkeynes@374
  1009
	} else {
nkeynes@374
  1010
	    dtmp = DRF(FRm>>1);
nkeynes@374
  1011
	}
nkeynes@359
  1012
        if( dtmp >= MAX_INTF )
nkeynes@359
  1013
            FPULi = MAX_INT;
nkeynes@359
  1014
        else if( dtmp <= MIN_INTF )
nkeynes@359
  1015
            FPULi = MIN_INT;
nkeynes@359
  1016
        else 
nkeynes@359
  1017
            FPULi = (int32_t)dtmp;
nkeynes@359
  1018
    } else {
nkeynes@359
  1019
	ftmp = FR(FRm);
nkeynes@359
  1020
	if( ftmp >= MAX_INTF )
nkeynes@359
  1021
	    FPULi = MAX_INT;
nkeynes@359
  1022
	else if( ftmp <= MIN_INTF )
nkeynes@359
  1023
	    FPULi = MIN_INT;
nkeynes@359
  1024
	else
nkeynes@359
  1025
	    FPULi = (int32_t)ftmp;
nkeynes@359
  1026
    }
nkeynes@359
  1027
:}
nkeynes@359
  1028
FNEG FRn {:
nkeynes@359
  1029
    CHECKFPUEN();
nkeynes@359
  1030
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1031
	DR(FRn) = -DR(FRn);
nkeynes@359
  1032
    } else {
nkeynes@359
  1033
        FR(FRn) = -FR(FRn);
nkeynes@359
  1034
    }
nkeynes@359
  1035
:}
nkeynes@359
  1036
FABS FRn {:
nkeynes@359
  1037
    CHECKFPUEN();
nkeynes@359
  1038
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1039
	DR(FRn) = fabs(DR(FRn));
nkeynes@359
  1040
    } else {
nkeynes@359
  1041
        FR(FRn) = fabsf(FR(FRn));
nkeynes@359
  1042
    }
nkeynes@359
  1043
:}
nkeynes@359
  1044
FSQRT FRn {:
nkeynes@359
  1045
    CHECKFPUEN();
nkeynes@359
  1046
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1047
	DR(FRn) = sqrt(DR(FRn));
nkeynes@359
  1048
    } else {
nkeynes@359
  1049
        FR(FRn) = sqrtf(FR(FRn));
nkeynes@359
  1050
    }
nkeynes@359
  1051
:}
nkeynes@359
  1052
FLDI0 FRn {:
nkeynes@359
  1053
    CHECKFPUEN();
nkeynes@359
  1054
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1055
	DR(FRn) = 0.0;
nkeynes@359
  1056
    } else {
nkeynes@359
  1057
        FR(FRn) = 0.0;
nkeynes@359
  1058
    }
nkeynes@359
  1059
:}
nkeynes@359
  1060
FLDI1 FRn {:
nkeynes@359
  1061
    CHECKFPUEN();
nkeynes@359
  1062
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1063
	DR(FRn) = 1.0;
nkeynes@359
  1064
    } else {
nkeynes@359
  1065
        FR(FRn) = 1.0;
nkeynes@359
  1066
    }
nkeynes@359
  1067
:}
nkeynes@359
  1068
FMAC FR0, FRm, FRn {:
nkeynes@359
  1069
    CHECKFPUEN();
nkeynes@359
  1070
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1071
        DR(FRn) += DR(FRm)*DR(0);
nkeynes@359
  1072
    } else {
nkeynes@359
  1073
	FR(FRn) += FR(FRm)*FR(0);
nkeynes@359
  1074
    }
nkeynes@359
  1075
:}
nkeynes@374
  1076
FRCHG {: 
nkeynes@374
  1077
    CHECKFPUEN(); 
nkeynes@374
  1078
    sh4r.fpscr ^= FPSCR_FR; 
nkeynes@374
  1079
    sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
nkeynes@374
  1080
:}
nkeynes@359
  1081
FSCHG {: CHECKFPUEN(); sh4r.fpscr ^= FPSCR_SZ; :}
nkeynes@359
  1082
FCNVSD FPUL, FRn {:
nkeynes@359
  1083
    CHECKFPUEN();
nkeynes@359
  1084
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1085
	DR(FRn) = (double)FPULf;
nkeynes@359
  1086
    }
nkeynes@359
  1087
:}
nkeynes@359
  1088
FCNVDS FRm, FPUL {:
nkeynes@359
  1089
    CHECKFPUEN();
nkeynes@359
  1090
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1091
	FPULf = (float)DR(FRm);
nkeynes@359
  1092
    }
nkeynes@359
  1093
:}
nkeynes@359
  1094
nkeynes@359
  1095
FSRRA FRn {:
nkeynes@359
  1096
    CHECKFPUEN();
nkeynes@359
  1097
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1098
	FR(FRn) = 1.0/sqrtf(FR(FRn));
nkeynes@359
  1099
    }
nkeynes@359
  1100
:}
nkeynes@359
  1101
FIPR FVm, FVn {:
nkeynes@359
  1102
    CHECKFPUEN();
nkeynes@359
  1103
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1104
        int tmp2 = FVn<<2;
nkeynes@359
  1105
        tmp = FVm<<2;
nkeynes@359
  1106
        FR(tmp2+3) = FR(tmp)*FR(tmp2) +
nkeynes@359
  1107
            FR(tmp+1)*FR(tmp2+1) +
nkeynes@359
  1108
            FR(tmp+2)*FR(tmp2+2) +
nkeynes@359
  1109
            FR(tmp+3)*FR(tmp2+3);
nkeynes@359
  1110
    }
nkeynes@359
  1111
:}
nkeynes@359
  1112
FSCA FPUL, FRn {:
nkeynes@359
  1113
    CHECKFPUEN();
nkeynes@359
  1114
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@391
  1115
	sh4_fsca( FPULi, &(DRF(FRn>>1)) );
nkeynes@391
  1116
	/*
nkeynes@359
  1117
        float angle = (((float)(FPULi&0xFFFF))/65536.0) * 2 * M_PI;
nkeynes@359
  1118
        FR(FRn) = sinf(angle);
nkeynes@359
  1119
        FR((FRn)+1) = cosf(angle);
nkeynes@391
  1120
	*/
nkeynes@359
  1121
    }
nkeynes@359
  1122
:}
nkeynes@359
  1123
FTRV XMTRX, FVn {:
nkeynes@359
  1124
    CHECKFPUEN();
nkeynes@359
  1125
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@391
  1126
	sh4_ftrv(&(DRF(FVn<<1)), &sh4r.fr[((~sh4r.fpscr)&FPSCR_FR)>>21][0]);
nkeynes@391
  1127
	/*
nkeynes@359
  1128
        tmp = FVn<<2;
nkeynes@374
  1129
	float *xf = &sh4r.fr[((~sh4r.fpscr)&FPSCR_FR)>>21][0];
nkeynes@359
  1130
        float fv[4] = { FR(tmp), FR(tmp+1), FR(tmp+2), FR(tmp+3) };
nkeynes@374
  1131
        FR(tmp) = xf[1] * fv[0] + xf[5]*fv[1] +
nkeynes@374
  1132
	    xf[9]*fv[2] + xf[13]*fv[3];
nkeynes@374
  1133
        FR(tmp+1) = xf[0] * fv[0] + xf[4]*fv[1] +
nkeynes@374
  1134
	    xf[8]*fv[2] + xf[12]*fv[3];
nkeynes@374
  1135
        FR(tmp+2) = xf[3] * fv[0] + xf[7]*fv[1] +
nkeynes@374
  1136
	    xf[11]*fv[2] + xf[15]*fv[3];
nkeynes@374
  1137
        FR(tmp+3) = xf[2] * fv[0] + xf[6]*fv[1] +
nkeynes@374
  1138
	    xf[10]*fv[2] + xf[14]*fv[3];
nkeynes@391
  1139
	*/
nkeynes@359
  1140
    }
nkeynes@359
  1141
:}
nkeynes@359
  1142
UNDEF {:
nkeynes@359
  1143
    UNDEF(ir);
nkeynes@359
  1144
:}
nkeynes@359
  1145
%%
nkeynes@359
  1146
    sh4r.pc = sh4r.new_pc;
nkeynes@359
  1147
    sh4r.new_pc += 2;
nkeynes@359
  1148
    sh4r.in_delay_slot = 0;
nkeynes@359
  1149
    return TRUE;
nkeynes@359
  1150
}
.