filename | test/asic.c |
changeset | 815:866c103d72cd |
prev | 753:1fe39c3a9bbc |
author | nkeynes |
date | Mon Feb 14 08:12:41 2011 +1000 (13 years ago) |
permissions | -rw-r--r-- |
last change | Add default read/write burst methods for IO regions. (There's almost certainly a bug somewhere if these are actually invoked, but try to do the right thing anyway rather than crashing) |
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nkeynes@185 | 1 | /** |
nkeynes@561 | 2 | * $Id$ |
nkeynes@185 | 3 | * |
nkeynes@185 | 4 | * General ASIC support code |
nkeynes@185 | 5 | * |
nkeynes@185 | 6 | * Copyright (c) 2006 Nathan Keynes. |
nkeynes@185 | 7 | * |
nkeynes@185 | 8 | * This program is free software; you can redistribute it and/or modify |
nkeynes@185 | 9 | * it under the terms of the GNU General Public License as published by |
nkeynes@185 | 10 | * the Free Software Foundation; either version 2 of the License, or |
nkeynes@185 | 11 | * (at your option) any later version. |
nkeynes@185 | 12 | * |
nkeynes@185 | 13 | * This program is distributed in the hope that it will be useful, |
nkeynes@185 | 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
nkeynes@185 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
nkeynes@185 | 16 | * GNU General Public License for more details. |
nkeynes@185 | 17 | */ |
nkeynes@185 | 18 | |
nkeynes@185 | 19 | #include "lib.h" |
nkeynes@185 | 20 | |
nkeynes@185 | 21 | #define ASIC_BASE 0xA05F6000 |
nkeynes@185 | 22 | #define ASIC_PIRQ(n) (ASIC_BASE + 0x900 + (n<<2)) |
nkeynes@185 | 23 | #define ASIC_IRQA(n) (ASIC_BASE + 0x910 + (n<<2)) |
nkeynes@185 | 24 | #define ASIC_IRQB(n) (ASIC_BASE + 0x920 + (n<<2)) |
nkeynes@185 | 25 | #define ASIC_IRQC(n) (ASIC_BASE + 0x930 + (n<<2)) |
nkeynes@815 | 26 | #define G2_FIFO (ASIC_BASE + 0x88C) |
nkeynes@185 | 27 | #define TIMEOUT 10000000 |
nkeynes@185 | 28 | |
nkeynes@185 | 29 | /** |
nkeynes@185 | 30 | * Wait for an ASIC event. |
nkeynes@185 | 31 | * @return 0 if the event occurred, otherwise -1 if the wait timed out. |
nkeynes@185 | 32 | */ |
nkeynes@185 | 33 | int asic_wait( int event ) |
nkeynes@185 | 34 | { |
nkeynes@185 | 35 | int n = event >> 5; |
nkeynes@185 | 36 | unsigned int mask = (1<< (event&0x1f)); |
nkeynes@185 | 37 | int i; |
nkeynes@185 | 38 | for( i=0; i<TIMEOUT; i++ ) { |
nkeynes@185 | 39 | if( long_read(ASIC_PIRQ(n)) & mask ) { |
nkeynes@185 | 40 | return 0; |
nkeynes@185 | 41 | } |
nkeynes@185 | 42 | } |
nkeynes@185 | 43 | return -1; /* Timeout */ |
nkeynes@185 | 44 | } |
nkeynes@185 | 45 | |
nkeynes@185 | 46 | /** |
nkeynes@753 | 47 | * Wait for either of 2 ASIC events. |
nkeynes@753 | 48 | * @return the event id if the event occurred, otherwise -1 if the wait timed out. |
nkeynes@753 | 49 | */ |
nkeynes@753 | 50 | int asic_wait2( int event1, int event2 ) |
nkeynes@753 | 51 | { |
nkeynes@753 | 52 | int n1 = event1 >> 5; |
nkeynes@753 | 53 | int n2 = event2 >> 5; |
nkeynes@753 | 54 | unsigned int mask1 = (1<< (event1&0x1f)); |
nkeynes@753 | 55 | unsigned int mask2 = (1<< (event2&0x1f)); |
nkeynes@753 | 56 | int i; |
nkeynes@753 | 57 | for( i=0; i<TIMEOUT; i++ ) { |
nkeynes@753 | 58 | if( long_read(ASIC_PIRQ(n1)) & mask1 ) { |
nkeynes@753 | 59 | return event1; |
nkeynes@753 | 60 | } |
nkeynes@753 | 61 | if( long_read(ASIC_PIRQ(n2)) & mask2 ) { |
nkeynes@753 | 62 | return event2; |
nkeynes@753 | 63 | } |
nkeynes@753 | 64 | } |
nkeynes@753 | 65 | return -1; /* Timeout */ |
nkeynes@753 | 66 | } |
nkeynes@753 | 67 | |
nkeynes@753 | 68 | /** |
nkeynes@185 | 69 | * Clear all asic events |
nkeynes@185 | 70 | */ |
nkeynes@185 | 71 | void asic_clear() |
nkeynes@185 | 72 | { |
nkeynes@185 | 73 | long_write(ASIC_PIRQ(0), 0xFFFFFFFF); |
nkeynes@185 | 74 | long_write(ASIC_PIRQ(1), 0xFFFFFFFF); |
nkeynes@185 | 75 | long_write(ASIC_PIRQ(2), 0xFFFFFFFF); |
nkeynes@185 | 76 | } |
nkeynes@185 | 77 | |
nkeynes@193 | 78 | int asic_check( int event ) |
nkeynes@193 | 79 | { |
nkeynes@193 | 80 | int n = event >> 5; |
nkeynes@193 | 81 | unsigned int mask = (1<< (event&0x1f)); |
nkeynes@193 | 82 | return (long_read(ASIC_PIRQ(n)) & mask) != 0; |
nkeynes@193 | 83 | } |
nkeynes@193 | 84 | |
nkeynes@185 | 85 | void asic_mask_all() |
nkeynes@185 | 86 | { |
nkeynes@185 | 87 | long_write(ASIC_IRQA(0), 0); |
nkeynes@185 | 88 | long_write(ASIC_IRQA(1), 0); |
nkeynes@185 | 89 | long_write(ASIC_IRQA(2), 0); |
nkeynes@185 | 90 | long_write(ASIC_IRQB(0), 0); |
nkeynes@185 | 91 | long_write(ASIC_IRQB(1), 0); |
nkeynes@185 | 92 | long_write(ASIC_IRQB(2), 0); |
nkeynes@185 | 93 | long_write(ASIC_IRQC(0), 0); |
nkeynes@185 | 94 | long_write(ASIC_IRQC(1), 0); |
nkeynes@185 | 95 | long_write(ASIC_IRQC(2), 0); |
nkeynes@185 | 96 | } |
nkeynes@185 | 97 | |
nkeynes@185 | 98 | /** |
nkeynes@185 | 99 | * Print the contents of the ASIC event registers to the supplied FILE |
nkeynes@185 | 100 | */ |
nkeynes@185 | 101 | void asic_dump( FILE *f ) |
nkeynes@185 | 102 | { |
nkeynes@185 | 103 | int i,j; |
nkeynes@185 | 104 | fprintf( f, "Events: " ); |
nkeynes@185 | 105 | for( i=0; i<3; i++ ) { |
nkeynes@185 | 106 | uint32_t val = long_read(ASIC_PIRQ(i)); |
nkeynes@185 | 107 | for( j=0; j<32; j++ ) { |
nkeynes@185 | 108 | if( val & (1<<j) ) { |
nkeynes@185 | 109 | fprintf( f, "%d ", (i<<5)+j ); |
nkeynes@185 | 110 | } |
nkeynes@185 | 111 | } |
nkeynes@185 | 112 | } |
nkeynes@185 | 113 | fprintf( f, "\n" ); |
nkeynes@185 | 114 | } |
nkeynes@815 | 115 | |
nkeynes@815 | 116 | /** |
nkeynes@815 | 117 | * Wait until the g2 fifo is clear to write more data. |
nkeynes@815 | 118 | */ |
nkeynes@815 | 119 | int g2_fifo_wait() |
nkeynes@815 | 120 | { |
nkeynes@815 | 121 | int i; |
nkeynes@815 | 122 | for (i=0; i<0x1800; i++) { |
nkeynes@815 | 123 | if (!(long_read(G2_FIFO) & 0x11)) { |
nkeynes@815 | 124 | return 0; |
nkeynes@815 | 125 | } |
nkeynes@815 | 126 | |
nkeynes@815 | 127 | } |
nkeynes@815 | 128 | return -1; |
nkeynes@815 | 129 | } |
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