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lxdream.org :: lxdream/src/aica/aica.c
lxdream 0.9.1
released Jun 29
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filename src/aica/aica.c
changeset 66:2ec5b6eb75e5
prev61:eb7a73c9bcae
next73:0bb57e51ac9e
author nkeynes
date Tue Jan 10 13:56:54 2006 +0000 (15 years ago)
permissions -rw-r--r--
last change Go go gadget audio!
Slow, but it works :)
file annotate diff log raw
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/**
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 * $Id: aica.c,v 1.11 2006-01-10 13:56:54 nkeynes Exp $
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 * 
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 * This is the core sound system (ie the bit which does the actual work)
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE aica_module
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#include "dream.h"
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#include "dreamcast.h"
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#include "mem.h"
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#include "aica.h"
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#include "armcore.h"
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#include "audio.h"
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#define MMIO_IMPL
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#include "aica.h"
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MMIO_REGION_READ_DEFFN( AICA0 )
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MMIO_REGION_READ_DEFFN( AICA1 )
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MMIO_REGION_READ_DEFFN( AICA2 )
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void aica_init( void );
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void aica_reset( void );
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void aica_start( void );
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void aica_stop( void );
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void aica_save_state( FILE *f );
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int aica_load_state( FILE *f );
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uint32_t aica_run_slice( uint32_t );
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#define IS_TIMER_ENABLED() (MMIO_READ( AICA2, AICA_TCR ) & 0x40)
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struct dreamcast_module aica_module = { "AICA", aica_init, aica_reset, 
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					aica_start, aica_run_slice, aica_stop,
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					aica_save_state, aica_load_state };
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/**
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 * Initialize the AICA subsystem. Note requires that 
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 */
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void aica_init( void )
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{
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    register_io_regions( mmio_list_spu );
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    MMIO_NOTRACE(AICA0);
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    MMIO_NOTRACE(AICA1);
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    arm_mem_init();
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    aica_reset();
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    audio_set_output( &esd_audio_driver, 44100, AUDIO_FMT_16BIT|AUDIO_FMT_STEREO );
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}
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void aica_reset( void )
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{
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    arm_reset();
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    aica_event(2); /* Pre-deliver a timer interrupt */
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}
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void aica_start( void )
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{
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}
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/**
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 * Keep track of what we've done so far this second, to try to keep the
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 * precision of samples/second.
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 */
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int samples_done = 0;
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uint32_t nanosecs_done = 0;
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uint32_t aica_run_slice( uint32_t nanosecs )
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{
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    /* Run arm instructions */
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    int reset = MMIO_READ( AICA2, AICA_RESET );
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    if( (reset & 1) == 0 ) { /* Running */
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	int num_samples = (nanosecs_done + nanosecs) / AICA_SAMPLE_RATE - samples_done;
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	int i;
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	for( i=0; i<num_samples; i++ ) {
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	    nanosecs = arm_run_slice( AICA_SAMPLE_PERIOD );
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	    audio_mix_sample();
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	    if( IS_TIMER_ENABLED() ) {
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		uint8_t val = MMIO_READ( AICA2, AICA_TIMER );
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		val++;
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		if( val == 0 )
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		    aica_event( AICA_EVENT_TIMER );
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		MMIO_WRITE( AICA2, AICA_TIMER, val );
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	    }
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	    if( !dreamcast_is_running() )
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		break;
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	}
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	samples_done += num_samples;
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	nanosecs_done += nanosecs;
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    }
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    return nanosecs;
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}
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void aica_stop( void )
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{
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}
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void aica_save_state( FILE *f )
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{
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    arm_save_state( f );
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}
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int aica_load_state( FILE *f )
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{
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    return arm_load_state( f );
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}
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int aica_event_pending = 0;
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int aica_clear_count = 0;
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/* Note: This is probably not necessarily technically correct but it should
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 * work in the meantime.
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 */
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void aica_event( int event )
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{
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    if( aica_event_pending == 0 )
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	armr.int_pending |= CPSR_F;
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    aica_event_pending |= (1<<event);
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    int pending = MMIO_READ( AICA2, AICA_IRQ );
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    if( pending == 0 || event < pending )
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	MMIO_WRITE( AICA2, AICA_IRQ, event );
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}
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void aica_clear_event( )
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{
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    aica_clear_count++;
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    if( aica_clear_count == 4 ) {
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	int i;
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	aica_clear_count = 0;
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	for( i=0; i<8; i++ ) {
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	    if( aica_event_pending & (1<<i) ) {
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		aica_event_pending &= ~(1<<i);
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		break;
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	    }
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	}
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	for( ;i<8; i++ ) {
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	    if( aica_event_pending & (1<<i) ) {
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		MMIO_WRITE( AICA2, AICA_IRQ, i );
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		break;
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	    }
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	}
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	if( aica_event_pending == 0 )
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	    armr.int_pending &= ~CPSR_F;
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    }
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}
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/** Channel register structure:
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 * 00  4  Channel config
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 * 04  4  Waveform address lo (16 bits)
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 * 08  4  Loop start address
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 * 0C  4  Loop end address
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 * 10  4  Volume envelope
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 * 14  4  Init to 0x1F
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 * 18  4  Frequency (floating point)
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 * 1C  4  ?? 
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 * 20  4  ??
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 * 24  1  Pan
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 * 25  1  ??
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 * 26  
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 * 27  
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 * 28  1  ??
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 * 29  1  Volume
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 * 2C
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 * 30
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 * 
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/* Write to channels 0-31 */
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void mmio_region_AICA0_write( uint32_t reg, uint32_t val )
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{
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    MMIO_WRITE( AICA0, reg, val );
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    aica_write_channel( reg >> 7, reg % 128, val );
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    //    DEBUG( "AICA0 Write %08X => %08X", val, reg );
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}
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/* Write to channels 32-64 */
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void mmio_region_AICA1_write( uint32_t reg, uint32_t val )
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{
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    MMIO_WRITE( AICA1, reg, val );
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    aica_write_channel( (reg >> 7) + 32, reg % 128, val );
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    // DEBUG( "AICA1 Write %08X => %08X", val, reg );
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}
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/**
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 * AICA control registers 
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 */
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void mmio_region_AICA2_write( uint32_t reg, uint32_t val )
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{
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    uint32_t tmp;
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    switch( reg ) {
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    case AICA_RESET:
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	tmp = MMIO_READ( AICA2, AICA_RESET );
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	if( (tmp & 1) == 1 && (val & 1) == 0 ) {
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	    /* ARM enabled - execute a core reset */
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	    DEBUG( "ARM enabled" );
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	    arm_reset();
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	    samples_done = 0;
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	    nanosecs_done = 0;
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	} else if( (tmp&1) == 0 && (val&1) == 1 ) {
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	    DEBUG( "ARM disabled" );
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	}
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	MMIO_WRITE( AICA2, AICA_RESET, val );
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	break;
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    case AICA_IRQCLEAR:
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	aica_clear_event();
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	break;
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    default:
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	MMIO_WRITE( AICA2, reg, val );
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	break;
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    }
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}
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/**
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 * Translate the channel frequency to a sample rate. The frequency is a
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 * 14-bit floating point number, where bits 0..9 is the mantissa,
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 * 11..14 is the signed exponent (-8 to +7). Bit 10 appears to
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 * be unused.
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 *
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 * @return sample rate in samples per second.
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 */
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uint32_t aica_frequency_to_sample_rate( uint32_t freq )
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{
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    uint32_t exponent = (freq & 0x3800) >> 11;
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    uint32_t mantissa = freq & 0x03FF;
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    if( freq & 0x4000 ) {
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	/* neg exponent - rate < 44100 */
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	exponent = 8 - exponent;
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	return (44100 >> exponent) +
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	    ((44100 * mantissa) >> (10+exponent));
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    } else {
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	/* pos exponent - rate > 44100 */
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	return (44100 << exponent) +
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	    ((44100 * mantissa) >> (10-exponent));
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    }
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}
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void aica_write_channel( int channelNo, uint32_t reg, uint32_t val ) 
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{
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    val &= 0x0000FFFF;
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    audio_channel_t channel = audio_get_channel(channelNo);
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    switch( reg ) {
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    case 0x00: /* Config + high address bits*/
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	channel->start = (channel->start & 0xFFFF) | ((val&0x1F) << 16);
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	if( val & 0x200 ) 
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	    channel->loop_count = -1;
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	else 
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	    channel->loop_count = 0;
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	switch( (val >> 7) & 0x03 ) {
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	case 0:
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	    channel->sample_format = AUDIO_FMT_16BIT;
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	    break;
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	case 1:
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	    channel->sample_format = AUDIO_FMT_8BIT;
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	    break;
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	case 2:
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	case 3:
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	    channel->sample_format = AUDIO_FMT_ADPCM;
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	    break;
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	}
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	switch( (val >> 14) & 0x03 ) {
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	case 2: 
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	    audio_stop_channel( channelNo ); 
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	    break;
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	case 3: 
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	    audio_start_channel( channelNo ); 
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	    break;
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	default:
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	    break;
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	    /* Hrmm... */
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	}
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	break;
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    case 0x04: /* Low 16 address bits */
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	channel->start = (channel->start & 0x001F0000) | val;
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	break;
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    case 0x08: /* Loop start */
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	channel->loop_start = val;
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	break;
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    case 0x0C: /* Loop end */
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	channel->loop_end = channel->end = val;
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	break;
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    case 0x10: /* Envelope register 1 */
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	break;
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    case 0x14: /* Envelope register 2 */
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	break;
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    case 0x18: /* Frequency */
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	channel->sample_rate = aica_frequency_to_sample_rate ( val );
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	break;
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    case 0x1C: /* ??? */
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    case 0x20: /* ??? */
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    case 0x24: /* Volume? /pan */
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	break;
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    case 0x28: /* Volume */
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	channel->vol_left = channel->vol_right = val & 0xFF;
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	break;
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    default: /* ??? */
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	break;
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    }
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}
.