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lxdream.org :: lxdream/src/sh4/mmu.c
lxdream 0.9.1
released Jun 29
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filename src/sh4/mmu.c
changeset 934:3acd3b3ee6d1
prev933:880c37bb1909
next939:6f2302afeb89
author nkeynes
date Fri Dec 26 14:25:23 2008 +0000 (13 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change Change RAM regions to use static arrays rather than mmap regions, for a 2-3% performance gain.
General mem cleanups, including some save state fixes that break states again.
file annotate diff log raw
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     1
/**
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 * $Id$
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 *
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 * MMU implementation
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE sh4_module
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#include <stdio.h>
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#include <assert.h>
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#include "sh4/sh4mmio.h"
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#include "sh4/sh4core.h"
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#include "sh4/sh4trans.h"
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#include "dreamcast.h"
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#include "mem.h"
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#include "mmu.h"
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#ifdef HAVE_FRAME_ADDRESS
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#define RETURN_VIA(exc) do{ *(((void **)__builtin_frame_address(0))+1) = exc; return; } while(0)
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#else
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#define RETURN_VIA(exc) return MMU_VMA_ERROR
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#endif
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/* The MMU (practically unique in the system) is allowed to raise exceptions
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 * directly, with a return code indicating that one was raised and the caller
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 * had better behave appropriately.
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 */
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#define RAISE_TLB_ERROR(code, vpn) \
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    MMIO_WRITE(MMU, TEA, vpn); \
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    MMIO_WRITE(MMU, PTEH, ((MMIO_READ(MMU, PTEH) & 0x000003FF) | (vpn&0xFFFFFC00))); \
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    sh4_raise_tlb_exception(code);
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#define RAISE_MEM_ERROR(code, vpn) \
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    MMIO_WRITE(MMU, TEA, vpn); \
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    MMIO_WRITE(MMU, PTEH, ((MMIO_READ(MMU, PTEH) & 0x000003FF) | (vpn&0xFFFFFC00))); \
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    sh4_raise_exception(code);
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#define RAISE_OTHER_ERROR(code) \
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    sh4_raise_exception(code);
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/**
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 * Abort with a non-MMU address error. Caused by user-mode code attempting
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 * to access privileged regions, or alignment faults.
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 */
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#define MMU_READ_ADDR_ERROR() RAISE_OTHER_ERROR(EXC_DATA_ADDR_READ)
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#define MMU_WRITE_ADDR_ERROR() RAISE_OTHER_ERROR(EXC_DATA_ADDR_WRITE)
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#define MMU_TLB_READ_MISS_ERROR(vpn) RAISE_TLB_ERROR(EXC_TLB_MISS_READ, vpn)
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#define MMU_TLB_WRITE_MISS_ERROR(vpn) RAISE_TLB_ERROR(EXC_TLB_MISS_WRITE, vpn)
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#define MMU_TLB_INITIAL_WRITE_ERROR(vpn) RAISE_MEM_ERROR(EXC_INIT_PAGE_WRITE, vpn)
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#define MMU_TLB_READ_PROT_ERROR(vpn) RAISE_MEM_ERROR(EXC_TLB_PROT_READ, vpn)
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#define MMU_TLB_WRITE_PROT_ERROR(vpn) RAISE_MEM_ERROR(EXC_TLB_PROT_WRITE, vpn)
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#define MMU_TLB_MULTI_HIT_ERROR(vpn) sh4_raise_reset(EXC_TLB_MULTI_HIT); \
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    MMIO_WRITE(MMU, TEA, vpn); \
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    MMIO_WRITE(MMU, PTEH, ((MMIO_READ(MMU, PTEH) & 0x000003FF) | (vpn&0xFFFFFC00)));
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#define OCRAM_START (0x1C000000>>LXDREAM_PAGE_BITS)
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#define OCRAM_END   (0x20000000>>LXDREAM_PAGE_BITS)
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static struct itlb_entry mmu_itlb[ITLB_ENTRY_COUNT];
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static struct utlb_entry mmu_utlb[UTLB_ENTRY_COUNT];
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static uint32_t mmu_urc;
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static uint32_t mmu_urb;
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static uint32_t mmu_lrui;
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static uint32_t mmu_asid; // current asid
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static struct utlb_sort_entry mmu_utlb_sorted[UTLB_ENTRY_COUNT];
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static uint32_t mmu_utlb_entries; // Number of entries in mmu_utlb_sorted. 
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static sh4ptr_t cache = NULL;
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static void mmu_invalidate_tlb();
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static void mmu_utlb_sorted_reset();
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static void mmu_utlb_sorted_reload();
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static uint32_t get_mask_for_flags( uint32_t flags )
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{
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    switch( flags & TLB_SIZE_MASK ) {
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    case TLB_SIZE_1K: return MASK_1K;
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    case TLB_SIZE_4K: return MASK_4K;
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    case TLB_SIZE_64K: return MASK_64K;
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    case TLB_SIZE_1M: return MASK_1M;
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    default: return 0; /* Unreachable */
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    }
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}
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MMIO_REGION_READ_FN( MMU, reg )
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{
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    reg &= 0xFFF;
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    switch( reg ) {
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    case MMUCR:
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        return MMIO_READ( MMU, MMUCR) | (mmu_urc<<10) | (mmu_urb<<18) | (mmu_lrui<<26);
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    default:
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        return MMIO_READ( MMU, reg );
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    }
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}
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MMIO_REGION_WRITE_FN( MMU, reg, val )
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{
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    uint32_t tmp;
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    reg &= 0xFFF;
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    switch(reg) {
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    case SH4VER:
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        return;
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    case PTEH:
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        val &= 0xFFFFFCFF;
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        if( (val & 0xFF) != mmu_asid ) {
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            mmu_asid = val&0xFF;
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            sh4_icache.page_vma = -1; // invalidate icache as asid has changed
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        }
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        break;
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    case PTEL:
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        val &= 0x1FFFFDFF;
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        break;
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    case PTEA:
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        val &= 0x0000000F;
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        break;
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    case TRA:
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    	val &= 0x000003FC;
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    	break;
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    case EXPEVT:
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    case INTEVT:
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    	val &= 0x00000FFF;
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    	break;
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    case MMUCR:
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        if( val & MMUCR_TI ) {
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            mmu_invalidate_tlb();
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        }
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        mmu_urc = (val >> 10) & 0x3F;
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        mmu_urb = (val >> 18) & 0x3F;
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        mmu_lrui = (val >> 26) & 0x3F;
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        val &= 0x00000301;
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        tmp = MMIO_READ( MMU, MMUCR );
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        if( (val ^ tmp) & (MMUCR_AT|MMUCR_SV) ) {
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            // AT flag has changed state - flush the xlt cache as all bets
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            // are off now. We also need to force an immediate exit from the
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            // current block
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            MMIO_WRITE( MMU, MMUCR, val );
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            sh4_flush_icache();
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        }
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        break;
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    case CCR:
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        CCN_set_cache_control( val );
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        val &= 0x81A7;
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        break;
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    case MMUUNK1:
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    	/* Note that if the high bit is set, this appears to reset the machine.
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    	 * Not emulating this behaviour yet until we know why...
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    	 */
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    	val &= 0x00010007;
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    	break;
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    case QACR0:
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    case QACR1:
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    	val &= 0x0000001C;
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    	break;
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    case PMCR1:
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        PMM_write_control(0, val);
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        val &= 0x0000C13F;
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        break;
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    case PMCR2:
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        PMM_write_control(1, val);
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        val &= 0x0000C13F;
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        break;
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    default:
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        break;
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    }
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    MMIO_WRITE( MMU, reg, val );
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}
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void MMU_init()
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{
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}
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void MMU_reset()
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{
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    mmio_region_MMU_write( CCR, 0 );
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    mmio_region_MMU_write( MMUCR, 0 );
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    mmu_utlb_sorted_reload();
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}
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void MMU_save_state( FILE *f )
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{
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    fwrite( &mmu_itlb, sizeof(mmu_itlb), 1, f );
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    fwrite( &mmu_utlb, sizeof(mmu_utlb), 1, f );
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    fwrite( &mmu_urc, sizeof(mmu_urc), 1, f );
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    fwrite( &mmu_urb, sizeof(mmu_urb), 1, f );
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    fwrite( &mmu_lrui, sizeof(mmu_lrui), 1, f );
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    fwrite( &mmu_asid, sizeof(mmu_asid), 1, f );
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}
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int MMU_load_state( FILE *f )
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{
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    if( fread( &mmu_itlb, sizeof(mmu_itlb), 1, f ) != 1 ) {
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        return 1;
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    }
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    if( fread( &mmu_utlb, sizeof(mmu_utlb), 1, f ) != 1 ) {
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        return 1;
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    }
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    if( fread( &mmu_urc, sizeof(mmu_urc), 1, f ) != 1 ) {
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        return 1;
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    }
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    if( fread( &mmu_urc, sizeof(mmu_urb), 1, f ) != 1 ) {
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        return 1;
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    }
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    if( fread( &mmu_lrui, sizeof(mmu_lrui), 1, f ) != 1 ) {
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        return 1;
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    }
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    if( fread( &mmu_asid, sizeof(mmu_asid), 1, f ) != 1 ) {
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        return 1;
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    }
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    mmu_utlb_sorted_reload();
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    return 0;
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}
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nkeynes@550
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/******************* Sorted TLB data structure ****************/
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/*
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 * mmu_utlb_sorted maintains a list of all active (valid) entries,
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 * sorted by masked VPN and then ASID. Multi-hit entries are resolved 
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 * ahead of time, and have -1 recorded as the corresponding PPN.
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 * 
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 * FIXME: Multi-hit detection doesn't pick up cases where two pages 
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 * overlap due to different sizes (and don't share the same base
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 * address). 
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 */ 
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static void mmu_utlb_sorted_reset() 
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{
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   241
    mmu_utlb_entries = 0;
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   242
}
nkeynes@915
   243
nkeynes@915
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/**
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 * Find an entry in the sorted table (VPN+ASID check). 
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   246
 */
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static inline int mmu_utlb_sorted_find( sh4addr_t vma )
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   248
{
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   249
    int low = 0;
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   250
    int high = mmu_utlb_entries;
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    uint32_t lookup = (vma & 0xFFFFFC00) + mmu_asid;
nkeynes@915
   252
nkeynes@915
   253
    mmu_urc++;
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   254
    if( mmu_urc == mmu_urb || mmu_urc == 0x40 ) {
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   255
        mmu_urc = 0;
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   256
    }
nkeynes@915
   257
nkeynes@915
   258
    while( low != high ) {
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   259
        int posn = (high+low)>>1;
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        int masked = lookup & mmu_utlb_sorted[posn].mask;
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   261
        if( mmu_utlb_sorted[posn].key < masked ) {
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   262
            low = posn+1;
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   263
        } else if( mmu_utlb_sorted[posn].key > masked ) {
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   264
            high = posn;
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   265
        } else {
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   266
            return mmu_utlb_sorted[posn].entryNo;
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   267
        }
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   268
    }
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   269
    return -1;
nkeynes@915
   270
nkeynes@915
   271
}
nkeynes@915
   272
nkeynes@915
   273
static void mmu_utlb_insert_entry( int entry )
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   274
{
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   275
    int low = 0;
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   276
    int high = mmu_utlb_entries;
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   277
    uint32_t key = (mmu_utlb[entry].vpn & mmu_utlb[entry].mask) + mmu_utlb[entry].asid;
nkeynes@915
   278
nkeynes@915
   279
    assert( mmu_utlb_entries < UTLB_ENTRY_COUNT );
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   280
    /* Find the insertion point */
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   281
    while( low != high ) {
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   282
        int posn = (high+low)>>1;
nkeynes@915
   283
        if( mmu_utlb_sorted[posn].key < key ) {
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   284
            low = posn+1;
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   285
        } else if( mmu_utlb_sorted[posn].key > key ) {
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   286
            high = posn;
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   287
        } else {
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   288
            /* Exact match - multi-hit */
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   289
            mmu_utlb_sorted[posn].entryNo = -2;
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   290
            return;
nkeynes@915
   291
        }
nkeynes@915
   292
    } /* 0 2 4 6 */
nkeynes@915
   293
    memmove( &mmu_utlb_sorted[low+1], &mmu_utlb_sorted[low], 
nkeynes@915
   294
             (mmu_utlb_entries - low) * sizeof(struct utlb_sort_entry) );
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   295
    mmu_utlb_sorted[low].key = key;
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   296
    mmu_utlb_sorted[low].mask = mmu_utlb[entry].mask | 0x000000FF;
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   297
    mmu_utlb_sorted[low].entryNo = entry;
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   298
    mmu_utlb_entries++;
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   299
}
nkeynes@915
   300
nkeynes@915
   301
static void mmu_utlb_remove_entry( int entry )
nkeynes@915
   302
{
nkeynes@915
   303
    int low = 0;
nkeynes@915
   304
    int high = mmu_utlb_entries;
nkeynes@915
   305
    uint32_t key = (mmu_utlb[entry].vpn & mmu_utlb[entry].mask) + mmu_utlb[entry].asid;
nkeynes@915
   306
    while( low != high ) {
nkeynes@915
   307
        int posn = (high+low)>>1;
nkeynes@915
   308
        if( mmu_utlb_sorted[posn].key < key ) {
nkeynes@915
   309
            low = posn+1;
nkeynes@915
   310
        } else if( mmu_utlb_sorted[posn].key > key ) {
nkeynes@915
   311
            high = posn;
nkeynes@915
   312
        } else {
nkeynes@915
   313
            if( mmu_utlb_sorted[posn].entryNo == -2 ) {
nkeynes@915
   314
                /* Multiple-entry recorded - rebuild the whole table minus entry */
nkeynes@915
   315
                int i;
nkeynes@915
   316
                mmu_utlb_entries = 0;
nkeynes@915
   317
                for( i=0; i< UTLB_ENTRY_COUNT; i++ ) {
nkeynes@915
   318
                    if( i != entry && (mmu_utlb[i].flags & TLB_VALID)  ) {
nkeynes@915
   319
                        mmu_utlb_insert_entry(i);
nkeynes@915
   320
                    }
nkeynes@915
   321
                }
nkeynes@915
   322
            } else {
nkeynes@915
   323
                mmu_utlb_entries--;
nkeynes@915
   324
                memmove( &mmu_utlb_sorted[posn], &mmu_utlb_sorted[posn+1],
nkeynes@915
   325
                         (mmu_utlb_entries - posn)*sizeof(struct utlb_sort_entry) );
nkeynes@915
   326
            }
nkeynes@915
   327
            return;
nkeynes@915
   328
        }
nkeynes@915
   329
    }
nkeynes@915
   330
    assert( 0 && "UTLB key not found!" );
nkeynes@915
   331
}
nkeynes@915
   332
nkeynes@915
   333
static void mmu_utlb_sorted_reload()
nkeynes@915
   334
{
nkeynes@915
   335
    int i;
nkeynes@915
   336
    mmu_utlb_entries = 0;
nkeynes@915
   337
    for( i=0; i<UTLB_ENTRY_COUNT; i++ ) {
nkeynes@915
   338
        if( mmu_utlb[i].flags & TLB_VALID ) 
nkeynes@915
   339
            mmu_utlb_insert_entry( i );
nkeynes@915
   340
    }
nkeynes@915
   341
}
nkeynes@915
   342
nkeynes@550
   343
/* TLB maintanence */
nkeynes@550
   344
nkeynes@550
   345
/**
nkeynes@550
   346
 * LDTLB instruction implementation. Copies PTEH, PTEL and PTEA into the UTLB
nkeynes@550
   347
 * entry identified by MMUCR.URC. Does not modify MMUCR or the ITLB.
nkeynes@550
   348
 */
nkeynes@550
   349
void MMU_ldtlb()
nkeynes@550
   350
{
nkeynes@915
   351
    if( mmu_utlb[mmu_urc].flags & TLB_VALID )
nkeynes@915
   352
        mmu_utlb_remove_entry( mmu_urc );
nkeynes@550
   353
    mmu_utlb[mmu_urc].vpn = MMIO_READ(MMU, PTEH) & 0xFFFFFC00;
nkeynes@550
   354
    mmu_utlb[mmu_urc].asid = MMIO_READ(MMU, PTEH) & 0x000000FF;
nkeynes@550
   355
    mmu_utlb[mmu_urc].ppn = MMIO_READ(MMU, PTEL) & 0x1FFFFC00;
nkeynes@550
   356
    mmu_utlb[mmu_urc].flags = MMIO_READ(MMU, PTEL) & 0x00001FF;
nkeynes@550
   357
    mmu_utlb[mmu_urc].pcmcia = MMIO_READ(MMU, PTEA);
nkeynes@586
   358
    mmu_utlb[mmu_urc].mask = get_mask_for_flags(mmu_utlb[mmu_urc].flags);
nkeynes@915
   359
    if( mmu_utlb[mmu_urc].ppn >= 0x1C000000 )
nkeynes@915
   360
        mmu_utlb[mmu_urc].ppn |= 0xE0000000;
nkeynes@915
   361
    if( mmu_utlb[mmu_urc].flags & TLB_VALID )
nkeynes@915
   362
        mmu_utlb_insert_entry( mmu_urc );
nkeynes@550
   363
}
nkeynes@550
   364
nkeynes@550
   365
static void mmu_invalidate_tlb()
nkeynes@550
   366
{
nkeynes@550
   367
    int i;
nkeynes@550
   368
    for( i=0; i<ITLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   369
        mmu_itlb[i].flags &= (~TLB_VALID);
nkeynes@550
   370
    }
nkeynes@550
   371
    for( i=0; i<UTLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   372
        mmu_utlb[i].flags &= (~TLB_VALID);
nkeynes@550
   373
    }
nkeynes@915
   374
    mmu_utlb_entries = 0;
nkeynes@550
   375
}
nkeynes@550
   376
nkeynes@550
   377
#define ITLB_ENTRY(addr) ((addr>>7)&0x03)
nkeynes@550
   378
nkeynes@929
   379
int32_t FASTCALL mmu_itlb_addr_read( sh4addr_t addr )
nkeynes@550
   380
{
nkeynes@550
   381
    struct itlb_entry *ent = &mmu_itlb[ITLB_ENTRY(addr)];
nkeynes@550
   382
    return ent->vpn | ent->asid | (ent->flags & TLB_VALID);
nkeynes@550
   383
}
nkeynes@929
   384
int32_t FASTCALL mmu_itlb_data_read( sh4addr_t addr )
nkeynes@550
   385
{
nkeynes@550
   386
    struct itlb_entry *ent = &mmu_itlb[ITLB_ENTRY(addr)];
nkeynes@915
   387
    return (ent->ppn & 0x1FFFFC00) | ent->flags;
nkeynes@550
   388
}
nkeynes@550
   389
nkeynes@929
   390
void FASTCALL mmu_itlb_addr_write( sh4addr_t addr, uint32_t val )
nkeynes@550
   391
{
nkeynes@550
   392
    struct itlb_entry *ent = &mmu_itlb[ITLB_ENTRY(addr)];
nkeynes@550
   393
    ent->vpn = val & 0xFFFFFC00;
nkeynes@550
   394
    ent->asid = val & 0x000000FF;
nkeynes@550
   395
    ent->flags = (ent->flags & ~(TLB_VALID)) | (val&TLB_VALID);
nkeynes@550
   396
}
nkeynes@550
   397
nkeynes@929
   398
void FASTCALL mmu_itlb_data_write( sh4addr_t addr, uint32_t val )
nkeynes@550
   399
{
nkeynes@550
   400
    struct itlb_entry *ent = &mmu_itlb[ITLB_ENTRY(addr)];
nkeynes@550
   401
    ent->ppn = val & 0x1FFFFC00;
nkeynes@550
   402
    ent->flags = val & 0x00001DA;
nkeynes@586
   403
    ent->mask = get_mask_for_flags(val);
nkeynes@915
   404
    if( ent->ppn >= 0x1C000000 )
nkeynes@915
   405
        ent->ppn |= 0xE0000000;
nkeynes@550
   406
}
nkeynes@550
   407
nkeynes@550
   408
#define UTLB_ENTRY(addr) ((addr>>8)&0x3F)
nkeynes@550
   409
#define UTLB_ASSOC(addr) (addr&0x80)
nkeynes@550
   410
#define UTLB_DATA2(addr) (addr&0x00800000)
nkeynes@550
   411
nkeynes@929
   412
int32_t FASTCALL mmu_utlb_addr_read( sh4addr_t addr )
nkeynes@550
   413
{
nkeynes@550
   414
    struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
nkeynes@550
   415
    return ent->vpn | ent->asid | (ent->flags & TLB_VALID) |
nkeynes@736
   416
    ((ent->flags & TLB_DIRTY)<<7);
nkeynes@550
   417
}
nkeynes@929
   418
int32_t FASTCALL mmu_utlb_data_read( sh4addr_t addr )
nkeynes@550
   419
{
nkeynes@550
   420
    struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
nkeynes@550
   421
    if( UTLB_DATA2(addr) ) {
nkeynes@736
   422
        return ent->pcmcia;
nkeynes@550
   423
    } else {
nkeynes@915
   424
        return (ent->ppn&0x1FFFFC00) | ent->flags;
nkeynes@550
   425
    }
nkeynes@550
   426
}
nkeynes@550
   427
nkeynes@586
   428
/**
nkeynes@586
   429
 * Find a UTLB entry for the associative TLB write - same as the normal
nkeynes@586
   430
 * lookup but ignores the valid bit.
nkeynes@586
   431
 */
nkeynes@669
   432
static inline int mmu_utlb_lookup_assoc( uint32_t vpn, uint32_t asid )
nkeynes@586
   433
{
nkeynes@586
   434
    int result = -1;
nkeynes@586
   435
    unsigned int i;
nkeynes@586
   436
    for( i = 0; i < UTLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   437
        if( (mmu_utlb[i].flags & TLB_VALID) &&
nkeynes@826
   438
                ((mmu_utlb[i].flags & TLB_SHARE) || asid == mmu_utlb[i].asid) &&
nkeynes@736
   439
                ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
nkeynes@736
   440
            if( result != -1 ) {
nkeynes@736
   441
                fprintf( stderr, "TLB Multi hit: %d %d\n", result, i );
nkeynes@736
   442
                return -2;
nkeynes@736
   443
            }
nkeynes@736
   444
            result = i;
nkeynes@736
   445
        }
nkeynes@586
   446
    }
nkeynes@586
   447
    return result;
nkeynes@586
   448
}
nkeynes@586
   449
nkeynes@586
   450
/**
nkeynes@586
   451
 * Find a ITLB entry for the associative TLB write - same as the normal
nkeynes@586
   452
 * lookup but ignores the valid bit.
nkeynes@586
   453
 */
nkeynes@669
   454
static inline int mmu_itlb_lookup_assoc( uint32_t vpn, uint32_t asid )
nkeynes@586
   455
{
nkeynes@586
   456
    int result = -1;
nkeynes@586
   457
    unsigned int i;
nkeynes@586
   458
    for( i = 0; i < ITLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   459
        if( (mmu_itlb[i].flags & TLB_VALID) &&
nkeynes@826
   460
                ((mmu_itlb[i].flags & TLB_SHARE) || asid == mmu_itlb[i].asid) &&
nkeynes@736
   461
                ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
nkeynes@736
   462
            if( result != -1 ) {
nkeynes@736
   463
                return -2;
nkeynes@736
   464
            }
nkeynes@736
   465
            result = i;
nkeynes@736
   466
        }
nkeynes@586
   467
    }
nkeynes@586
   468
    return result;
nkeynes@586
   469
}
nkeynes@586
   470
nkeynes@929
   471
void FASTCALL mmu_utlb_addr_write( sh4addr_t addr, uint32_t val )
nkeynes@550
   472
{
nkeynes@550
   473
    if( UTLB_ASSOC(addr) ) {
nkeynes@736
   474
        int utlb = mmu_utlb_lookup_assoc( val, mmu_asid );
nkeynes@736
   475
        if( utlb >= 0 ) {
nkeynes@736
   476
            struct utlb_entry *ent = &mmu_utlb[utlb];
nkeynes@915
   477
            uint32_t old_flags = ent->flags;
nkeynes@736
   478
            ent->flags = ent->flags & ~(TLB_DIRTY|TLB_VALID);
nkeynes@736
   479
            ent->flags |= (val & TLB_VALID);
nkeynes@736
   480
            ent->flags |= ((val & 0x200)>>7);
nkeynes@915
   481
            if( (old_flags & TLB_VALID) && !(ent->flags&TLB_VALID) ) {
nkeynes@915
   482
                mmu_utlb_remove_entry( utlb );
nkeynes@915
   483
            } else if( !(old_flags & TLB_VALID) && (ent->flags&TLB_VALID) ) {
nkeynes@915
   484
                mmu_utlb_insert_entry( utlb );
nkeynes@915
   485
            }
nkeynes@736
   486
        }
nkeynes@586
   487
nkeynes@736
   488
        int itlb = mmu_itlb_lookup_assoc( val, mmu_asid );
nkeynes@736
   489
        if( itlb >= 0 ) {
nkeynes@736
   490
            struct itlb_entry *ent = &mmu_itlb[itlb];
nkeynes@736
   491
            ent->flags = (ent->flags & (~TLB_VALID)) | (val & TLB_VALID);
nkeynes@736
   492
        }
nkeynes@586
   493
nkeynes@736
   494
        if( itlb == -2 || utlb == -2 ) {
nkeynes@736
   495
            MMU_TLB_MULTI_HIT_ERROR(addr);
nkeynes@736
   496
            return;
nkeynes@736
   497
        }
nkeynes@550
   498
    } else {
nkeynes@736
   499
        struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
nkeynes@915
   500
        if( ent->flags & TLB_VALID ) 
nkeynes@915
   501
            mmu_utlb_remove_entry( UTLB_ENTRY(addr) );
nkeynes@736
   502
        ent->vpn = (val & 0xFFFFFC00);
nkeynes@736
   503
        ent->asid = (val & 0xFF);
nkeynes@736
   504
        ent->flags = (ent->flags & ~(TLB_DIRTY|TLB_VALID));
nkeynes@736
   505
        ent->flags |= (val & TLB_VALID);
nkeynes@736
   506
        ent->flags |= ((val & 0x200)>>7);
nkeynes@915
   507
        if( ent->flags & TLB_VALID ) 
nkeynes@915
   508
            mmu_utlb_insert_entry( UTLB_ENTRY(addr) );
nkeynes@550
   509
    }
nkeynes@550
   510
}
nkeynes@550
   511
nkeynes@929
   512
void FASTCALL mmu_utlb_data_write( sh4addr_t addr, uint32_t val )
nkeynes@550
   513
{
nkeynes@550
   514
    struct utlb_entry *ent = &mmu_utlb[UTLB_ENTRY(addr)];
nkeynes@550
   515
    if( UTLB_DATA2(addr) ) {
nkeynes@736
   516
        ent->pcmcia = val & 0x0000000F;
nkeynes@550
   517
    } else {
nkeynes@915
   518
        if( ent->flags & TLB_VALID ) 
nkeynes@915
   519
            mmu_utlb_remove_entry( UTLB_ENTRY(addr) );
nkeynes@736
   520
        ent->ppn = (val & 0x1FFFFC00);
nkeynes@736
   521
        ent->flags = (val & 0x000001FF);
nkeynes@736
   522
        ent->mask = get_mask_for_flags(val);
nkeynes@915
   523
        if( mmu_utlb[mmu_urc].ppn >= 0x1C000000 )
nkeynes@915
   524
            mmu_utlb[mmu_urc].ppn |= 0xE0000000;
nkeynes@915
   525
        if( ent->flags & TLB_VALID ) 
nkeynes@915
   526
            mmu_utlb_insert_entry( UTLB_ENTRY(addr) );
nkeynes@550
   527
    }
nkeynes@550
   528
}
nkeynes@550
   529
nkeynes@586
   530
/******************************************************************************/
nkeynes@586
   531
/*                        MMU TLB address translation                         */
nkeynes@586
   532
/******************************************************************************/
nkeynes@586
   533
nkeynes@586
   534
/**
nkeynes@826
   535
 * The translations are excessively complicated, but unfortunately it's a
nkeynes@586
   536
 * complicated system. TODO: make this not be painfully slow.
nkeynes@586
   537
 */
nkeynes@586
   538
nkeynes@586
   539
/**
nkeynes@586
   540
 * Perform the actual utlb lookup w/ asid matching.
nkeynes@586
   541
 * Possible utcomes are:
nkeynes@586
   542
 *   0..63 Single match - good, return entry found
nkeynes@586
   543
 *   -1 No match - raise a tlb data miss exception
nkeynes@586
   544
 *   -2 Multiple matches - raise a multi-hit exception (reset)
nkeynes@586
   545
 * @param vpn virtual address to resolve
nkeynes@586
   546
 * @return the resultant UTLB entry, or an error.
nkeynes@586
   547
 */
nkeynes@586
   548
static inline int mmu_utlb_lookup_vpn_asid( uint32_t vpn )
nkeynes@586
   549
{
nkeynes@586
   550
    int result = -1;
nkeynes@586
   551
    unsigned int i;
nkeynes@586
   552
nkeynes@586
   553
    mmu_urc++;
nkeynes@586
   554
    if( mmu_urc == mmu_urb || mmu_urc == 0x40 ) {
nkeynes@736
   555
        mmu_urc = 0;
nkeynes@586
   556
    }
nkeynes@586
   557
nkeynes@586
   558
    for( i = 0; i < UTLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   559
        if( (mmu_utlb[i].flags & TLB_VALID) &&
nkeynes@826
   560
                ((mmu_utlb[i].flags & TLB_SHARE) || mmu_asid == mmu_utlb[i].asid) &&
nkeynes@736
   561
                ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
nkeynes@736
   562
            if( result != -1 ) {
nkeynes@736
   563
                return -2;
nkeynes@736
   564
            }
nkeynes@736
   565
            result = i;
nkeynes@736
   566
        }
nkeynes@586
   567
    }
nkeynes@586
   568
    return result;
nkeynes@586
   569
}
nkeynes@586
   570
nkeynes@586
   571
/**
nkeynes@586
   572
 * Perform the actual utlb lookup matching on vpn only
nkeynes@586
   573
 * Possible utcomes are:
nkeynes@586
   574
 *   0..63 Single match - good, return entry found
nkeynes@586
   575
 *   -1 No match - raise a tlb data miss exception
nkeynes@586
   576
 *   -2 Multiple matches - raise a multi-hit exception (reset)
nkeynes@586
   577
 * @param vpn virtual address to resolve
nkeynes@586
   578
 * @return the resultant UTLB entry, or an error.
nkeynes@586
   579
 */
nkeynes@586
   580
static inline int mmu_utlb_lookup_vpn( uint32_t vpn )
nkeynes@586
   581
{
nkeynes@586
   582
    int result = -1;
nkeynes@586
   583
    unsigned int i;
nkeynes@586
   584
nkeynes@586
   585
    mmu_urc++;
nkeynes@586
   586
    if( mmu_urc == mmu_urb || mmu_urc == 0x40 ) {
nkeynes@736
   587
        mmu_urc = 0;
nkeynes@586
   588
    }
nkeynes@586
   589
nkeynes@586
   590
    for( i = 0; i < UTLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   591
        if( (mmu_utlb[i].flags & TLB_VALID) &&
nkeynes@736
   592
                ((mmu_utlb[i].vpn ^ vpn) & mmu_utlb[i].mask) == 0 ) {
nkeynes@736
   593
            if( result != -1 ) {
nkeynes@736
   594
                return -2;
nkeynes@736
   595
            }
nkeynes@736
   596
            result = i;
nkeynes@736
   597
        }
nkeynes@586
   598
    }
nkeynes@586
   599
nkeynes@586
   600
    return result;
nkeynes@586
   601
}
nkeynes@586
   602
nkeynes@586
   603
/**
nkeynes@586
   604
 * Update the ITLB by replacing the LRU entry with the specified UTLB entry.
nkeynes@586
   605
 * @return the number (0-3) of the replaced entry.
nkeynes@586
   606
 */
nkeynes@586
   607
static int inline mmu_itlb_update_from_utlb( int entryNo )
nkeynes@586
   608
{
nkeynes@586
   609
    int replace;
nkeynes@586
   610
    /* Determine entry to replace based on lrui */
nkeynes@586
   611
    if( (mmu_lrui & 0x38) == 0x38 ) {
nkeynes@736
   612
        replace = 0;
nkeynes@736
   613
        mmu_lrui = mmu_lrui & 0x07;
nkeynes@586
   614
    } else if( (mmu_lrui & 0x26) == 0x06 ) {
nkeynes@736
   615
        replace = 1;
nkeynes@736
   616
        mmu_lrui = (mmu_lrui & 0x19) | 0x20;
nkeynes@586
   617
    } else if( (mmu_lrui & 0x15) == 0x01 ) {
nkeynes@736
   618
        replace = 2;
nkeynes@736
   619
        mmu_lrui = (mmu_lrui & 0x3E) | 0x14;
nkeynes@586
   620
    } else { // Note - gets invalid entries too
nkeynes@736
   621
        replace = 3;
nkeynes@736
   622
        mmu_lrui = (mmu_lrui | 0x0B);
nkeynes@826
   623
    }
nkeynes@586
   624
nkeynes@586
   625
    mmu_itlb[replace].vpn = mmu_utlb[entryNo].vpn;
nkeynes@586
   626
    mmu_itlb[replace].mask = mmu_utlb[entryNo].mask;
nkeynes@586
   627
    mmu_itlb[replace].ppn = mmu_utlb[entryNo].ppn;
nkeynes@586
   628
    mmu_itlb[replace].asid = mmu_utlb[entryNo].asid;
nkeynes@586
   629
    mmu_itlb[replace].flags = mmu_utlb[entryNo].flags & 0x01DA;
nkeynes@586
   630
    return replace;
nkeynes@586
   631
}
nkeynes@586
   632
nkeynes@586
   633
/**
nkeynes@586
   634
 * Perform the actual itlb lookup w/ asid protection
nkeynes@586
   635
 * Possible utcomes are:
nkeynes@586
   636
 *   0..63 Single match - good, return entry found
nkeynes@586
   637
 *   -1 No match - raise a tlb data miss exception
nkeynes@586
   638
 *   -2 Multiple matches - raise a multi-hit exception (reset)
nkeynes@586
   639
 * @param vpn virtual address to resolve
nkeynes@586
   640
 * @return the resultant ITLB entry, or an error.
nkeynes@586
   641
 */
nkeynes@586
   642
static inline int mmu_itlb_lookup_vpn_asid( uint32_t vpn )
nkeynes@586
   643
{
nkeynes@586
   644
    int result = -1;
nkeynes@586
   645
    unsigned int i;
nkeynes@586
   646
nkeynes@586
   647
    for( i = 0; i < ITLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   648
        if( (mmu_itlb[i].flags & TLB_VALID) &&
nkeynes@826
   649
                ((mmu_itlb[i].flags & TLB_SHARE) || mmu_asid == mmu_itlb[i].asid) &&
nkeynes@736
   650
                ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
nkeynes@736
   651
            if( result != -1 ) {
nkeynes@736
   652
                return -2;
nkeynes@736
   653
            }
nkeynes@736
   654
            result = i;
nkeynes@736
   655
        }
nkeynes@586
   656
    }
nkeynes@586
   657
nkeynes@586
   658
    if( result == -1 ) {
nkeynes@915
   659
        int utlbEntry = mmu_utlb_sorted_find( vpn );
nkeynes@736
   660
        if( utlbEntry < 0 ) {
nkeynes@736
   661
            return utlbEntry;
nkeynes@736
   662
        } else {
nkeynes@736
   663
            return mmu_itlb_update_from_utlb( utlbEntry );
nkeynes@736
   664
        }
nkeynes@586
   665
    }
nkeynes@586
   666
nkeynes@586
   667
    switch( result ) {
nkeynes@586
   668
    case 0: mmu_lrui = (mmu_lrui & 0x07); break;
nkeynes@586
   669
    case 1: mmu_lrui = (mmu_lrui & 0x19) | 0x20; break;
nkeynes@586
   670
    case 2: mmu_lrui = (mmu_lrui & 0x3E) | 0x14; break;
nkeynes@586
   671
    case 3: mmu_lrui = (mmu_lrui | 0x0B); break;
nkeynes@586
   672
    }
nkeynes@736
   673
nkeynes@586
   674
    return result;
nkeynes@586
   675
}
nkeynes@586
   676
nkeynes@586
   677
/**
nkeynes@586
   678
 * Perform the actual itlb lookup on vpn only
nkeynes@586
   679
 * Possible utcomes are:
nkeynes@586
   680
 *   0..63 Single match - good, return entry found
nkeynes@586
   681
 *   -1 No match - raise a tlb data miss exception
nkeynes@586
   682
 *   -2 Multiple matches - raise a multi-hit exception (reset)
nkeynes@586
   683
 * @param vpn virtual address to resolve
nkeynes@586
   684
 * @return the resultant ITLB entry, or an error.
nkeynes@586
   685
 */
nkeynes@586
   686
static inline int mmu_itlb_lookup_vpn( uint32_t vpn )
nkeynes@586
   687
{
nkeynes@586
   688
    int result = -1;
nkeynes@586
   689
    unsigned int i;
nkeynes@586
   690
nkeynes@586
   691
    for( i = 0; i < ITLB_ENTRY_COUNT; i++ ) {
nkeynes@736
   692
        if( (mmu_itlb[i].flags & TLB_VALID) &&
nkeynes@736
   693
                ((mmu_itlb[i].vpn ^ vpn) & mmu_itlb[i].mask) == 0 ) {
nkeynes@736
   694
            if( result != -1 ) {
nkeynes@736
   695
                return -2;
nkeynes@736
   696
            }
nkeynes@736
   697
            result = i;
nkeynes@736
   698
        }
nkeynes@586
   699
    }
nkeynes@586
   700
nkeynes@586
   701
    if( result == -1 ) {
nkeynes@736
   702
        int utlbEntry = mmu_utlb_lookup_vpn( vpn );
nkeynes@736
   703
        if( utlbEntry < 0 ) {
nkeynes@736
   704
            return utlbEntry;
nkeynes@736
   705
        } else {
nkeynes@736
   706
            return mmu_itlb_update_from_utlb( utlbEntry );
nkeynes@736
   707
        }
nkeynes@586
   708
    }
nkeynes@586
   709
nkeynes@586
   710
    switch( result ) {
nkeynes@586
   711
    case 0: mmu_lrui = (mmu_lrui & 0x07); break;
nkeynes@586
   712
    case 1: mmu_lrui = (mmu_lrui & 0x19) | 0x20; break;
nkeynes@586
   713
    case 2: mmu_lrui = (mmu_lrui & 0x3E) | 0x14; break;
nkeynes@586
   714
    case 3: mmu_lrui = (mmu_lrui | 0x0B); break;
nkeynes@586
   715
    }
nkeynes@736
   716
nkeynes@586
   717
    return result;
nkeynes@586
   718
}
nkeynes@927
   719
nkeynes@927
   720
#ifdef HAVE_FRAME_ADDRESS
nkeynes@927
   721
sh4addr_t FASTCALL mmu_vma_to_phys_read( sh4vma_t addr, void *exc )
nkeynes@927
   722
#else
nkeynes@905
   723
sh4addr_t FASTCALL mmu_vma_to_phys_read( sh4vma_t addr )
nkeynes@927
   724
#endif
nkeynes@586
   725
{
nkeynes@586
   726
    uint32_t mmucr = MMIO_READ(MMU,MMUCR);
nkeynes@586
   727
    if( addr & 0x80000000 ) {
nkeynes@736
   728
        if( IS_SH4_PRIVMODE() ) {
nkeynes@736
   729
            if( addr >= 0xE0000000 ) {
nkeynes@736
   730
                return addr; /* P4 - passthrough */
nkeynes@736
   731
            } else if( addr < 0xC0000000 ) {
nkeynes@736
   732
                /* P1, P2 regions are pass-through (no translation) */
nkeynes@736
   733
                return VMA_TO_EXT_ADDR(addr);
nkeynes@736
   734
            }
nkeynes@736
   735
        } else {
nkeynes@736
   736
            if( addr >= 0xE0000000 && addr < 0xE4000000 &&
nkeynes@736
   737
                    ((mmucr&MMUCR_SQMD) == 0) ) {
nkeynes@736
   738
                /* Conditional user-mode access to the store-queue (no translation) */
nkeynes@736
   739
                return addr;
nkeynes@736
   740
            }
nkeynes@736
   741
            MMU_READ_ADDR_ERROR();
nkeynes@927
   742
            RETURN_VIA(exc);
nkeynes@736
   743
        }
nkeynes@586
   744
    }
nkeynes@736
   745
nkeynes@586
   746
    if( (mmucr & MMUCR_AT) == 0 ) {
nkeynes@736
   747
        return VMA_TO_EXT_ADDR(addr);
nkeynes@586
   748
    }
nkeynes@586
   749
nkeynes@586
   750
    /* If we get this far, translation is required */
nkeynes@586
   751
    int entryNo;
nkeynes@586
   752
    if( ((mmucr & MMUCR_SV) == 0) || !IS_SH4_PRIVMODE() ) {
nkeynes@915
   753
        entryNo = mmu_utlb_sorted_find( addr );
nkeynes@586
   754
    } else {
nkeynes@736
   755
        entryNo = mmu_utlb_lookup_vpn( addr );
nkeynes@586
   756
    }
nkeynes@586
   757
nkeynes@586
   758
    switch(entryNo) {
nkeynes@586
   759
    case -1:
nkeynes@736
   760
    MMU_TLB_READ_MISS_ERROR(addr);
nkeynes@927
   761
    RETURN_VIA(exc);
nkeynes@586
   762
    case -2:
nkeynes@736
   763
    MMU_TLB_MULTI_HIT_ERROR(addr);
nkeynes@927
   764
    RETURN_VIA(exc);
nkeynes@586
   765
    default:
nkeynes@736
   766
        if( (mmu_utlb[entryNo].flags & TLB_USERMODE) == 0 &&
nkeynes@736
   767
                !IS_SH4_PRIVMODE() ) {
nkeynes@736
   768
            /* protection violation */
nkeynes@736
   769
            MMU_TLB_READ_PROT_ERROR(addr);
nkeynes@927
   770
            RETURN_VIA(exc);
nkeynes@736
   771
        }
nkeynes@586
   772
nkeynes@736
   773
        /* finally generate the target address */
nkeynes@915
   774
        return (mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) |
nkeynes@810
   775
        	(addr & (~mmu_utlb[entryNo].mask));
nkeynes@586
   776
    }
nkeynes@586
   777
}
nkeynes@586
   778
nkeynes@927
   779
#ifdef HAVE_FRAME_ADDRESS
nkeynes@927
   780
sh4addr_t FASTCALL mmu_vma_to_phys_write( sh4vma_t addr, void *exc )
nkeynes@927
   781
#else
nkeynes@905
   782
sh4addr_t FASTCALL mmu_vma_to_phys_write( sh4vma_t addr )
nkeynes@927
   783
#endif
nkeynes@586
   784
{
nkeynes@586
   785
    uint32_t mmucr = MMIO_READ(MMU,MMUCR);
nkeynes@586
   786
    if( addr & 0x80000000 ) {
nkeynes@736
   787
        if( IS_SH4_PRIVMODE() ) {
nkeynes@736
   788
            if( addr >= 0xE0000000 ) {
nkeynes@736
   789
                return addr; /* P4 - passthrough */
nkeynes@736
   790
            } else if( addr < 0xC0000000 ) {
nkeynes@736
   791
                /* P1, P2 regions are pass-through (no translation) */
nkeynes@736
   792
                return VMA_TO_EXT_ADDR(addr);
nkeynes@736
   793
            }
nkeynes@736
   794
        } else {
nkeynes@736
   795
            if( addr >= 0xE0000000 && addr < 0xE4000000 &&
nkeynes@736
   796
                    ((mmucr&MMUCR_SQMD) == 0) ) {
nkeynes@736
   797
                /* Conditional user-mode access to the store-queue (no translation) */
nkeynes@736
   798
                return addr;
nkeynes@736
   799
            }
nkeynes@736
   800
            MMU_WRITE_ADDR_ERROR();
nkeynes@927
   801
            RETURN_VIA(exc);
nkeynes@736
   802
        }
nkeynes@586
   803
    }
nkeynes@736
   804
nkeynes@586
   805
    if( (mmucr & MMUCR_AT) == 0 ) {
nkeynes@736
   806
        return VMA_TO_EXT_ADDR(addr);
nkeynes@586
   807
    }
nkeynes@586
   808
nkeynes@586
   809
    /* If we get this far, translation is required */
nkeynes@586
   810
    int entryNo;
nkeynes@586
   811
    if( ((mmucr & MMUCR_SV) == 0) || !IS_SH4_PRIVMODE() ) {
nkeynes@915
   812
        entryNo = mmu_utlb_sorted_find( addr );
nkeynes@586
   813
    } else {
nkeynes@736
   814
        entryNo = mmu_utlb_lookup_vpn( addr );
nkeynes@586
   815
    }
nkeynes@586
   816
nkeynes@586
   817
    switch(entryNo) {
nkeynes@586
   818
    case -1:
nkeynes@736
   819
    MMU_TLB_WRITE_MISS_ERROR(addr);
nkeynes@927
   820
    RETURN_VIA(exc);
nkeynes@586
   821
    case -2:
nkeynes@736
   822
    MMU_TLB_MULTI_HIT_ERROR(addr);
nkeynes@927
   823
    RETURN_VIA(exc);
nkeynes@586
   824
    default:
nkeynes@736
   825
        if( IS_SH4_PRIVMODE() ? ((mmu_utlb[entryNo].flags & TLB_WRITABLE) == 0)
nkeynes@736
   826
                : ((mmu_utlb[entryNo].flags & TLB_USERWRITABLE) != TLB_USERWRITABLE) ) {
nkeynes@736
   827
            /* protection violation */
nkeynes@736
   828
            MMU_TLB_WRITE_PROT_ERROR(addr);
nkeynes@927
   829
            RETURN_VIA(exc);
nkeynes@736
   830
        }
nkeynes@586
   831
nkeynes@736
   832
        if( (mmu_utlb[entryNo].flags & TLB_DIRTY) == 0 ) {
nkeynes@736
   833
            MMU_TLB_INITIAL_WRITE_ERROR(addr);
nkeynes@927
   834
            RETURN_VIA(exc);
nkeynes@736
   835
        }
nkeynes@586
   836
nkeynes@736
   837
        /* finally generate the target address */
nkeynes@826
   838
        sh4addr_t pma = (mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) |
nkeynes@810
   839
        	(addr & (~mmu_utlb[entryNo].mask));
nkeynes@810
   840
        return pma;
nkeynes@586
   841
    }
nkeynes@586
   842
}
nkeynes@586
   843
nkeynes@586
   844
/**
nkeynes@586
   845
 * Update the icache for an untranslated address
nkeynes@586
   846
 */
nkeynes@905
   847
static inline void mmu_update_icache_phys( sh4addr_t addr )
nkeynes@586
   848
{
nkeynes@586
   849
    if( (addr & 0x1C000000) == 0x0C000000 ) {
nkeynes@736
   850
        /* Main ram */
nkeynes@736
   851
        sh4_icache.page_vma = addr & 0xFF000000;
nkeynes@736
   852
        sh4_icache.page_ppa = 0x0C000000;
nkeynes@736
   853
        sh4_icache.mask = 0xFF000000;
nkeynes@934
   854
        sh4_icache.page = dc_main_ram;
nkeynes@586
   855
    } else if( (addr & 0x1FE00000) == 0 ) {
nkeynes@736
   856
        /* BIOS ROM */
nkeynes@736
   857
        sh4_icache.page_vma = addr & 0xFFE00000;
nkeynes@736
   858
        sh4_icache.page_ppa = 0;
nkeynes@736
   859
        sh4_icache.mask = 0xFFE00000;
nkeynes@934
   860
        sh4_icache.page = dc_boot_rom;
nkeynes@586
   861
    } else {
nkeynes@736
   862
        /* not supported */
nkeynes@736
   863
        sh4_icache.page_vma = -1;
nkeynes@586
   864
    }
nkeynes@586
   865
}
nkeynes@586
   866
nkeynes@586
   867
/**
nkeynes@586
   868
 * Update the sh4_icache structure to describe the page(s) containing the
nkeynes@586
   869
 * given vma. If the address does not reference a RAM/ROM region, the icache
nkeynes@586
   870
 * will be invalidated instead.
nkeynes@586
   871
 * If AT is on, this method will raise TLB exceptions normally
nkeynes@586
   872
 * (hence this method should only be used immediately prior to execution of
nkeynes@586
   873
 * code), and otherwise will set the icache according to the matching TLB entry.
nkeynes@586
   874
 * If AT is off, this method will set the entire referenced RAM/ROM region in
nkeynes@586
   875
 * the icache.
nkeynes@586
   876
 * @return TRUE if the update completed (successfully or otherwise), FALSE
nkeynes@586
   877
 * if an exception was raised.
nkeynes@586
   878
 */
nkeynes@905
   879
gboolean FASTCALL mmu_update_icache( sh4vma_t addr )
nkeynes@586
   880
{
nkeynes@586
   881
    int entryNo;
nkeynes@586
   882
    if( IS_SH4_PRIVMODE()  ) {
nkeynes@736
   883
        if( addr & 0x80000000 ) {
nkeynes@736
   884
            if( addr < 0xC0000000 ) {
nkeynes@736
   885
                /* P1, P2 and P4 regions are pass-through (no translation) */
nkeynes@736
   886
                mmu_update_icache_phys(addr);
nkeynes@736
   887
                return TRUE;
nkeynes@736
   888
            } else if( addr >= 0xE0000000 && addr < 0xFFFFFF00 ) {
nkeynes@736
   889
                MMU_READ_ADDR_ERROR();
nkeynes@736
   890
                return FALSE;
nkeynes@736
   891
            }
nkeynes@736
   892
        }
nkeynes@586
   893
nkeynes@736
   894
        uint32_t mmucr = MMIO_READ(MMU,MMUCR);
nkeynes@736
   895
        if( (mmucr & MMUCR_AT) == 0 ) {
nkeynes@736
   896
            mmu_update_icache_phys(addr);
nkeynes@736
   897
            return TRUE;
nkeynes@736
   898
        }
nkeynes@736
   899
nkeynes@826
   900
        if( (mmucr & MMUCR_SV) == 0 )
nkeynes@807
   901
        	entryNo = mmu_itlb_lookup_vpn_asid( addr );
nkeynes@807
   902
        else
nkeynes@807
   903
        	entryNo = mmu_itlb_lookup_vpn( addr );
nkeynes@586
   904
    } else {
nkeynes@736
   905
        if( addr & 0x80000000 ) {
nkeynes@736
   906
            MMU_READ_ADDR_ERROR();
nkeynes@736
   907
            return FALSE;
nkeynes@736
   908
        }
nkeynes@586
   909
nkeynes@736
   910
        uint32_t mmucr = MMIO_READ(MMU,MMUCR);
nkeynes@736
   911
        if( (mmucr & MMUCR_AT) == 0 ) {
nkeynes@736
   912
            mmu_update_icache_phys(addr);
nkeynes@736
   913
            return TRUE;
nkeynes@736
   914
        }
nkeynes@736
   915
nkeynes@807
   916
        entryNo = mmu_itlb_lookup_vpn_asid( addr );
nkeynes@807
   917
nkeynes@736
   918
        if( entryNo != -1 && (mmu_itlb[entryNo].flags & TLB_USERMODE) == 0 ) {
nkeynes@736
   919
            MMU_TLB_READ_PROT_ERROR(addr);
nkeynes@736
   920
            return FALSE;
nkeynes@736
   921
        }
nkeynes@586
   922
    }
nkeynes@586
   923
nkeynes@586
   924
    switch(entryNo) {
nkeynes@586
   925
    case -1:
nkeynes@736
   926
    MMU_TLB_READ_MISS_ERROR(addr);
nkeynes@736
   927
    return FALSE;
nkeynes@586
   928
    case -2:
nkeynes@736
   929
    MMU_TLB_MULTI_HIT_ERROR(addr);
nkeynes@736
   930
    return FALSE;
nkeynes@586
   931
    default:
nkeynes@736
   932
        sh4_icache.page_ppa = mmu_itlb[entryNo].ppn & mmu_itlb[entryNo].mask;
nkeynes@736
   933
        sh4_icache.page = mem_get_region( sh4_icache.page_ppa );
nkeynes@736
   934
        if( sh4_icache.page == NULL ) {
nkeynes@736
   935
            sh4_icache.page_vma = -1;
nkeynes@736
   936
        } else {
nkeynes@736
   937
            sh4_icache.page_vma = mmu_itlb[entryNo].vpn & mmu_itlb[entryNo].mask;
nkeynes@736
   938
            sh4_icache.mask = mmu_itlb[entryNo].mask;
nkeynes@736
   939
        }
nkeynes@736
   940
        return TRUE;
nkeynes@586
   941
    }
nkeynes@586
   942
}
nkeynes@586
   943
nkeynes@597
   944
/**
nkeynes@826
   945
 * Translate address for disassembly purposes (ie performs an instruction
nkeynes@597
   946
 * lookup) - does not raise exceptions or modify any state, and ignores
nkeynes@597
   947
 * protection bits. Returns the translated address, or MMU_VMA_ERROR
nkeynes@826
   948
 * on translation failure.
nkeynes@597
   949
 */
nkeynes@905
   950
sh4addr_t FASTCALL mmu_vma_to_phys_disasm( sh4vma_t vma )
nkeynes@597
   951
{
nkeynes@597
   952
    if( vma & 0x80000000 ) {
nkeynes@736
   953
        if( vma < 0xC0000000 ) {
nkeynes@736
   954
            /* P1, P2 and P4 regions are pass-through (no translation) */
nkeynes@736
   955
            return VMA_TO_EXT_ADDR(vma);
nkeynes@736
   956
        } else if( vma >= 0xE0000000 && vma < 0xFFFFFF00 ) {
nkeynes@736
   957
            /* Not translatable */
nkeynes@736
   958
            return MMU_VMA_ERROR;
nkeynes@736
   959
        }
nkeynes@597
   960
    }
nkeynes@597
   961
nkeynes@597
   962
    uint32_t mmucr = MMIO_READ(MMU,MMUCR);
nkeynes@597
   963
    if( (mmucr & MMUCR_AT) == 0 ) {
nkeynes@736
   964
        return VMA_TO_EXT_ADDR(vma);
nkeynes@597
   965
    }
nkeynes@736
   966
nkeynes@597
   967
    int entryNo = mmu_itlb_lookup_vpn( vma );
nkeynes@597
   968
    if( entryNo == -2 ) {
nkeynes@736
   969
        entryNo = mmu_itlb_lookup_vpn_asid( vma );
nkeynes@597
   970
    }
nkeynes@597
   971
    if( entryNo < 0 ) {
nkeynes@736
   972
        return MMU_VMA_ERROR;
nkeynes@597
   973
    } else {
nkeynes@826
   974
        return (mmu_itlb[entryNo].ppn & mmu_itlb[entryNo].mask) |
nkeynes@826
   975
        (vma & (~mmu_itlb[entryNo].mask));
nkeynes@597
   976
    }
nkeynes@597
   977
}
nkeynes@597
   978
nkeynes@911
   979
void FASTCALL sh4_flush_store_queue( sh4addr_t addr )
nkeynes@911
   980
{
nkeynes@911
   981
    int queue = (addr&0x20)>>2;
nkeynes@911
   982
    uint32_t hi = MMIO_READ( MMU, QACR0 + (queue>>1)) << 24;
nkeynes@911
   983
    sh4ptr_t src = (sh4ptr_t)&sh4r.store_queue[queue];
nkeynes@911
   984
    sh4addr_t target = (addr&0x03FFFFE0) | hi;
nkeynes@931
   985
    ext_address_space[target>>12]->write_burst( target, src );
nkeynes@911
   986
} 
nkeynes@911
   987
nkeynes@911
   988
gboolean FASTCALL sh4_flush_store_queue_mmu( sh4addr_t addr )
nkeynes@586
   989
{
nkeynes@586
   990
    uint32_t mmucr = MMIO_READ(MMU,MMUCR);
nkeynes@586
   991
    int queue = (addr&0x20)>>2;
nkeynes@586
   992
    sh4ptr_t src = (sh4ptr_t)&sh4r.store_queue[queue];
nkeynes@586
   993
    sh4addr_t target;
nkeynes@586
   994
    /* Store queue operation */
nkeynes@736
   995
nkeynes@911
   996
    int entryNo;
nkeynes@911
   997
    if( ((mmucr & MMUCR_SV) == 0) || !IS_SH4_PRIVMODE() ) {
nkeynes@911
   998
    	entryNo = mmu_utlb_lookup_vpn_asid( addr );
nkeynes@911
   999
    } else {
nkeynes@911
  1000
    	entryNo = mmu_utlb_lookup_vpn( addr );
nkeynes@911
  1001
    }
nkeynes@911
  1002
    switch(entryNo) {
nkeynes@911
  1003
    case -1:
nkeynes@911
  1004
    MMU_TLB_WRITE_MISS_ERROR(addr);
nkeynes@911
  1005
    return FALSE;
nkeynes@911
  1006
    case -2:
nkeynes@911
  1007
    MMU_TLB_MULTI_HIT_ERROR(addr);
nkeynes@911
  1008
    return FALSE;
nkeynes@911
  1009
    default:
nkeynes@911
  1010
    	if( IS_SH4_PRIVMODE() ? ((mmu_utlb[entryNo].flags & TLB_WRITABLE) == 0)
nkeynes@911
  1011
    			: ((mmu_utlb[entryNo].flags & TLB_USERWRITABLE) != TLB_USERWRITABLE) ) {
nkeynes@911
  1012
    		/* protection violation */
nkeynes@911
  1013
    		MMU_TLB_WRITE_PROT_ERROR(addr);
nkeynes@911
  1014
    		return FALSE;
nkeynes@911
  1015
    	}
nkeynes@736
  1016
nkeynes@911
  1017
    	if( (mmu_utlb[entryNo].flags & TLB_DIRTY) == 0 ) {
nkeynes@911
  1018
    		MMU_TLB_INITIAL_WRITE_ERROR(addr);
nkeynes@911
  1019
    		return FALSE;
nkeynes@911
  1020
    	}
nkeynes@911
  1021
nkeynes@911
  1022
    	/* finally generate the target address */
nkeynes@911
  1023
    	target = ((mmu_utlb[entryNo].ppn & mmu_utlb[entryNo].mask) |
nkeynes@911
  1024
    			(addr & (~mmu_utlb[entryNo].mask))) & 0xFFFFFFE0;
nkeynes@586
  1025
    }
nkeynes@911
  1026
nkeynes@931
  1027
    ext_address_space[target>>12]->write_burst( target, src );
nkeynes@586
  1028
    return TRUE;
nkeynes@586
  1029
}
nkeynes@586
  1030
.