filename | test/testide.c |
changeset | 251:3c5953d944e0 |
prev | 248:f8022f2ef2a2 |
next | 252:cfd0ec3bfeec |
author | nkeynes |
date | Wed Dec 20 11:24:16 2006 +0000 (15 years ago) |
permissions | -rw-r--r-- |
last change | Tidy up the core IDE test case - now passes (usually) on the real thing. Main surprise was that it seems to always fail the first packet command after a reset with code 06,29 (drive reset), no matter how long its been since the reset. |
file | annotate | diff | log | raw |
nkeynes@248 | 1 | /** |
nkeynes@251 | 2 | * $Id: testide.c,v 1.3 2006-12-20 11:24:16 nkeynes Exp $ |
nkeynes@248 | 3 | * |
nkeynes@248 | 4 | * IDE interface test cases. Covers all (known) IDE registers in the |
nkeynes@248 | 5 | * 5F7000 - 5F74FF range including DMA, but does not cover any GD-Rom |
nkeynes@248 | 6 | * device behaviour (ie packet comands). |
nkeynes@248 | 7 | * |
nkeynes@248 | 8 | * These tests should be run with the drive empty. |
nkeynes@248 | 9 | * |
nkeynes@248 | 10 | * Copyright (c) 2006 Nathan Keynes. |
nkeynes@248 | 11 | * |
nkeynes@248 | 12 | * This program is free software; you can redistribute it and/or modify |
nkeynes@248 | 13 | * it under the terms of the GNU General Public License as published by |
nkeynes@248 | 14 | * the Free Software Foundation; either version 2 of the License, or |
nkeynes@248 | 15 | * (at your option) any later version. |
nkeynes@248 | 16 | * |
nkeynes@248 | 17 | * This program is distributed in the hope that it will be useful, |
nkeynes@248 | 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
nkeynes@248 | 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
nkeynes@248 | 20 | * GNU General Public License for more details. |
nkeynes@248 | 21 | */ |
nkeynes@248 | 22 | |
nkeynes@248 | 23 | #include <stdlib.h> |
nkeynes@248 | 24 | #include <stdio.h> |
nkeynes@248 | 25 | #include "lib.h" |
nkeynes@185 | 26 | #include "ide.h" |
nkeynes@248 | 27 | #include "asic.h" |
nkeynes@248 | 28 | |
nkeynes@248 | 29 | unsigned int test_count = 0, test_failures = 0; |
nkeynes@248 | 30 | |
nkeynes@248 | 31 | #define IDE_BASE 0xA05F7000 |
nkeynes@248 | 32 | |
nkeynes@248 | 33 | #define IDE_ALTSTATUS IDE_BASE+0x018 |
nkeynes@248 | 34 | #define IDE_UNKNOWN IDE_BASE+0x01C |
nkeynes@248 | 35 | #define IDE_DATA IDE_BASE+0x080 /* 16 bits */ |
nkeynes@248 | 36 | #define IDE_FEATURE IDE_BASE+0x084 |
nkeynes@248 | 37 | #define IDE_COUNT IDE_BASE+0x088 |
nkeynes@248 | 38 | #define IDE_LBA0 IDE_BASE+0x08C |
nkeynes@248 | 39 | #define IDE_LBA1 IDE_BASE+0x090 |
nkeynes@248 | 40 | #define IDE_LBA2 IDE_BASE+0x094 |
nkeynes@248 | 41 | #define IDE_DEVICE IDE_BASE+0x098 |
nkeynes@248 | 42 | #define IDE_COMMAND IDE_BASE+0x09C |
nkeynes@248 | 43 | #define IDE_ACTIVATE IDE_BASE+0x4E4 |
nkeynes@248 | 44 | |
nkeynes@248 | 45 | #define IDE_DEVCONTROL IDE_ALTSTATUS |
nkeynes@248 | 46 | #define IDE_ERROR IDE_FEATURE |
nkeynes@248 | 47 | #define IDE_STATUS IDE_COMMAND |
nkeynes@248 | 48 | |
nkeynes@248 | 49 | #define IDE_DMA_ADDR IDE_BASE+0x404 |
nkeynes@248 | 50 | #define IDE_DMA_SIZE IDE_BASE+0x408 |
nkeynes@248 | 51 | #define IDE_DMA_DIR IDE_BASE+0x40C |
nkeynes@248 | 52 | #define IDE_DMA_CTL1 IDE_BASE+0x414 |
nkeynes@248 | 53 | #define IDE_DMA_CTL2 IDE_BASE+0x418 |
nkeynes@248 | 54 | #define IDE_DMA_MAGIC IDE_BASE+0x4B8 |
nkeynes@248 | 55 | #define IDE_DMA_STATUS IDE_BASE+0x4F8 |
nkeynes@248 | 56 | |
nkeynes@248 | 57 | #define CHECK_REG_EQUALS( a, b, c ) if( b != c ) { fprintf(stderr, "Assertion failed at %s:%d %s(): expected %08X from register %08X, but was %08X\n", __FILE__, __LINE__, __func__, b, a, c ); return -1; } |
nkeynes@248 | 58 | |
nkeynes@248 | 59 | /* Wait for the standard timeout for an INTRQ. If none is received, print an |
nkeynes@248 | 60 | * error and return -1 |
nkeynes@248 | 61 | */ |
nkeynes@248 | 62 | #define EXPECT_INTRQ() if( ide_wait_irq() != 0 ) { fprintf(stderr, "Timeout at %s:%d %s(): waiting for INTRQ\n", __FILE__, __LINE__, __func__ ); return -1; } |
nkeynes@248 | 63 | |
nkeynes@248 | 64 | /* Check if the INTRQ line is currently cleared (ie inactive) */ |
nkeynes@248 | 65 | #define CHECK_INTRQ_CLEAR() if ( (long_read( ASIC_STATUS1 ) & 1) != 0 ) { fprintf(stderr, "Assertion failed at %s:%d %s(): expected INTRQ to be cleared, but was raised.\n", __FILE__, __LINE__, __func__ ); return -1; } |
nkeynes@248 | 66 | |
nkeynes@248 | 67 | #define EXPECT_READY() if( ide_wait_ready() != 0 ) { fprintf(stderr, "Timeout at %s:%d %s(): waiting for BSY flag to clear\n", __FILE__, __LINE__, __func__ ); return -1; } |
nkeynes@248 | 68 | |
nkeynes@248 | 69 | int check_regs( uint32_t *regs,const char *file, int line, const char *fn ) |
nkeynes@185 | 70 | { |
nkeynes@248 | 71 | int i; |
nkeynes@248 | 72 | int rv = 0; |
nkeynes@248 | 73 | for( i=0; regs[i] != 0; i+=2 ) { |
nkeynes@248 | 74 | uint32_t addr = regs[i]; |
nkeynes@248 | 75 | uint32_t val = regs[i+1]; |
nkeynes@248 | 76 | uint32_t actual; |
nkeynes@248 | 77 | if( addr == IDE_DATA ) { |
nkeynes@248 | 78 | actual = (uint32_t)word_read(addr); |
nkeynes@248 | 79 | if( val != actual ) { |
nkeynes@248 | 80 | fprintf(stderr, "Assertion failed at %s:%d %s(): expected %04X from register %08X, but was %04X\n", file, line, fn, val, addr, actual ); |
nkeynes@248 | 81 | rv = -1; |
nkeynes@248 | 82 | } |
nkeynes@248 | 83 | } else if( addr <= IDE_COMMAND ) { |
nkeynes@248 | 84 | actual = (uint32_t)byte_read(addr); |
nkeynes@248 | 85 | if( val != actual ) { |
nkeynes@248 | 86 | fprintf(stderr, "Assertion failed at %s:%d %s(): expected %02X from register %08X, but was %02X\n", file, line, fn, val, addr, actual ); |
nkeynes@248 | 87 | rv = -1; |
nkeynes@248 | 88 | } |
nkeynes@248 | 89 | } else { |
nkeynes@248 | 90 | actual = long_read(addr); |
nkeynes@248 | 91 | if( val != actual ) { |
nkeynes@248 | 92 | fprintf(stderr, "Assertion failed at %s:%d %s(): expected %08X from register %08X, but was %08X\n", file, line, fn, val, addr, actual ); |
nkeynes@248 | 93 | rv = -1; |
nkeynes@248 | 94 | } |
nkeynes@185 | 95 | } |
nkeynes@185 | 96 | } |
nkeynes@248 | 97 | return rv; |
nkeynes@185 | 98 | } |
nkeynes@185 | 99 | |
nkeynes@248 | 100 | #define CHECK_REGS( r ) if( check_regs(r, __FILE__, __LINE__, __func__) != 0 ) { return -1; } |
nkeynes@248 | 101 | |
nkeynes@251 | 102 | |
nkeynes@251 | 103 | uint32_t post_packet_ready_regs[] = |
nkeynes@251 | 104 | { IDE_ALTSTATUS, 0x58, |
nkeynes@251 | 105 | IDE_COUNT, 0x01, |
nkeynes@251 | 106 | IDE_LBA1, 8, |
nkeynes@251 | 107 | IDE_LBA2, 0, |
nkeynes@251 | 108 | IDE_DEVICE, 0, |
nkeynes@251 | 109 | IDE_STATUS, 0x58, 0, 0 }; |
nkeynes@251 | 110 | |
nkeynes@251 | 111 | uint32_t post_packet_cmd_regs[] = |
nkeynes@251 | 112 | { IDE_ALTSTATUS, 0xD0, |
nkeynes@251 | 113 | IDE_ERROR, 0x00, |
nkeynes@251 | 114 | IDE_COUNT, 0x01, |
nkeynes@251 | 115 | IDE_LBA1, 8, |
nkeynes@251 | 116 | IDE_LBA2, 0, |
nkeynes@251 | 117 | IDE_DEVICE, 0, |
nkeynes@251 | 118 | IDE_STATUS, 0xD0, 0, 0 }; |
nkeynes@251 | 119 | |
nkeynes@251 | 120 | uint32_t packet_cmd_error6_regs[] = |
nkeynes@251 | 121 | { IDE_ALTSTATUS, 0x51, |
nkeynes@251 | 122 | IDE_ERROR, 0x60, |
nkeynes@251 | 123 | IDE_COUNT, 0x03, |
nkeynes@251 | 124 | IDE_LBA1, 8, |
nkeynes@251 | 125 | IDE_LBA2, 0, |
nkeynes@251 | 126 | IDE_DEVICE, 0, |
nkeynes@251 | 127 | IDE_STATUS, 0x51, 0, 0 }; |
nkeynes@251 | 128 | |
nkeynes@251 | 129 | uint32_t packet_data_ready_regs[] = |
nkeynes@251 | 130 | { IDE_ALTSTATUS, 0x58, |
nkeynes@251 | 131 | IDE_ERROR, 0x00, |
nkeynes@251 | 132 | IDE_COUNT, 0x02, |
nkeynes@251 | 133 | IDE_LBA0, 0x00, |
nkeynes@251 | 134 | IDE_LBA1, 0x0C, |
nkeynes@251 | 135 | IDE_LBA2, 0, |
nkeynes@251 | 136 | IDE_DEVICE, 0, |
nkeynes@251 | 137 | IDE_STATUS, 0x58, 0, 0 }; |
nkeynes@251 | 138 | |
nkeynes@251 | 139 | |
nkeynes@251 | 140 | uint32_t post_packet_data_regs[] = |
nkeynes@251 | 141 | { IDE_ALTSTATUS, 0xD0, |
nkeynes@251 | 142 | IDE_ERROR, 0x00, |
nkeynes@251 | 143 | IDE_COUNT, 0x02, |
nkeynes@251 | 144 | IDE_LBA0, 0x00, |
nkeynes@251 | 145 | IDE_LBA1, 0x0C, |
nkeynes@251 | 146 | IDE_LBA2, 0, |
nkeynes@251 | 147 | IDE_DEVICE, 0, |
nkeynes@251 | 148 | IDE_STATUS, 0xD0, 0, 0 }; |
nkeynes@251 | 149 | |
nkeynes@251 | 150 | uint32_t packet_complete_regs[] = |
nkeynes@251 | 151 | { IDE_ALTSTATUS, 0x50, |
nkeynes@251 | 152 | IDE_ERROR, 0x00, |
nkeynes@251 | 153 | IDE_COUNT, 0x03, |
nkeynes@251 | 154 | IDE_LBA1, 0x0C, |
nkeynes@251 | 155 | IDE_LBA2, 0, |
nkeynes@251 | 156 | IDE_DEVICE, 0, |
nkeynes@251 | 157 | IDE_STATUS, 0x50, 0, 0 }; |
nkeynes@251 | 158 | |
nkeynes@251 | 159 | int send_packet_command( char *cmd ) |
nkeynes@251 | 160 | { |
nkeynes@251 | 161 | unsigned short *spkt = (unsigned short *)cmd; |
nkeynes@251 | 162 | int i; |
nkeynes@251 | 163 | |
nkeynes@251 | 164 | EXPECT_READY(); |
nkeynes@251 | 165 | byte_write( IDE_FEATURE, 0 ); |
nkeynes@251 | 166 | byte_write( IDE_COUNT, 0 ); |
nkeynes@251 | 167 | byte_write( IDE_LBA0, 0 ); |
nkeynes@251 | 168 | byte_write( IDE_LBA1, 8 ); |
nkeynes@251 | 169 | byte_write( IDE_LBA2, 0 ); |
nkeynes@251 | 170 | byte_write( IDE_DEVICE, 0 ); |
nkeynes@251 | 171 | byte_write( IDE_COMMAND, 0xA0 ); |
nkeynes@251 | 172 | byte_read(IDE_ALTSTATUS); /* delay 1 PIO cycle */ |
nkeynes@251 | 173 | EXPECT_READY(); /* Wait until device is ready to accept command (usually immediate) */ |
nkeynes@251 | 174 | CHECK_INTRQ_CLEAR(); |
nkeynes@251 | 175 | CHECK_REGS( post_packet_ready_regs ); |
nkeynes@251 | 176 | |
nkeynes@251 | 177 | /* Write the command */ |
nkeynes@251 | 178 | for( i=0; i<6; i++ ) { |
nkeynes@251 | 179 | word_write( IDE_DATA, spkt[i] ); |
nkeynes@251 | 180 | } |
nkeynes@251 | 181 | |
nkeynes@251 | 182 | byte_read(IDE_ALTSTATUS); |
nkeynes@251 | 183 | |
nkeynes@251 | 184 | // CHECK_REGS( post_packet_cmd_regs ); |
nkeynes@251 | 185 | EXPECT_INTRQ(); |
nkeynes@251 | 186 | EXPECT_READY(); |
nkeynes@251 | 187 | return 0; |
nkeynes@251 | 188 | } |
nkeynes@251 | 189 | |
nkeynes@251 | 190 | |
nkeynes@248 | 191 | uint32_t abort_regs[] = { |
nkeynes@248 | 192 | IDE_ALTSTATUS, 0x51, |
nkeynes@248 | 193 | IDE_ERROR, 0x04, |
nkeynes@248 | 194 | IDE_COUNT, 0x02, |
nkeynes@248 | 195 | IDE_LBA0, 0x06, |
nkeynes@248 | 196 | IDE_LBA1, 0x00, |
nkeynes@248 | 197 | IDE_LBA2, 0x50, |
nkeynes@248 | 198 | IDE_DEVICE, 0, |
nkeynes@248 | 199 | IDE_DATA, 0x0000, |
nkeynes@248 | 200 | IDE_STATUS, 0x51, |
nkeynes@248 | 201 | 0, 0 }; |
nkeynes@248 | 202 | |
nkeynes@248 | 203 | uint32_t post_reset_regs[] = { |
nkeynes@248 | 204 | IDE_ALTSTATUS, 0x00, |
nkeynes@248 | 205 | IDE_ERROR, 0x01, |
nkeynes@248 | 206 | IDE_COUNT, 0x01, |
nkeynes@248 | 207 | IDE_LBA0, 0x01, |
nkeynes@248 | 208 | IDE_LBA1, 0x14, |
nkeynes@248 | 209 | IDE_LBA2, 0xEB, |
nkeynes@248 | 210 | IDE_DEVICE, 0, |
nkeynes@248 | 211 | IDE_DATA, 0xFFFF, |
nkeynes@248 | 212 | IDE_STATUS, 0x00, |
nkeynes@248 | 213 | 0, 0 }; |
nkeynes@248 | 214 | |
nkeynes@248 | 215 | uint32_t post_set_feature_regs[] = { |
nkeynes@248 | 216 | IDE_ALTSTATUS, 0x50, |
nkeynes@248 | 217 | IDE_ERROR, 0x00, |
nkeynes@248 | 218 | IDE_COUNT, 0x0B, |
nkeynes@248 | 219 | IDE_LBA0, 0x01, |
nkeynes@248 | 220 | IDE_LBA1, 0x00, |
nkeynes@248 | 221 | IDE_LBA2, 0x00, |
nkeynes@248 | 222 | IDE_DEVICE, 0, |
nkeynes@248 | 223 | IDE_DATA, 0xFFFF, |
nkeynes@248 | 224 | IDE_STATUS, 0x50, |
nkeynes@248 | 225 | 0, 0 }; |
nkeynes@248 | 226 | |
nkeynes@248 | 227 | uint32_t post_set_feature2_regs[] = { |
nkeynes@248 | 228 | IDE_ALTSTATUS, 0x50, |
nkeynes@248 | 229 | IDE_ERROR, 0x00, |
nkeynes@248 | 230 | IDE_COUNT, 0x22, |
nkeynes@248 | 231 | IDE_LBA0, 0x01, |
nkeynes@248 | 232 | IDE_LBA1, 0x00, |
nkeynes@248 | 233 | IDE_LBA2, 0x00, |
nkeynes@248 | 234 | IDE_DEVICE, 0, |
nkeynes@248 | 235 | IDE_DATA, 0xFFFF, |
nkeynes@248 | 236 | IDE_STATUS, 0x50, |
nkeynes@248 | 237 | 0, 0 }; |
nkeynes@248 | 238 | |
nkeynes@248 | 239 | /** |
nkeynes@248 | 240 | * Test enable/disable of the IDE interface via port |
nkeynes@248 | 241 | * 0x4E4. |
nkeynes@248 | 242 | */ |
nkeynes@248 | 243 | int test_enable() |
nkeynes@185 | 244 | { |
nkeynes@248 | 245 | int i; |
nkeynes@248 | 246 | int failed = 0; |
nkeynes@248 | 247 | /* ensure deactivated */ |
nkeynes@248 | 248 | long_write( IDE_ACTIVATE, 0x00042FE ); |
nkeynes@185 | 249 | |
nkeynes@248 | 250 | /* test registers to ensure all return 0xFF (need to wait a few cycles?) */ |
nkeynes@248 | 251 | for( i= IDE_BASE; i< IDE_BASE+0x400; i+= 4 ) { |
nkeynes@248 | 252 | CHECK_REG_EQUALS( i, 0xFFFFFFFF, long_read( i ) ); |
nkeynes@185 | 253 | } |
nkeynes@185 | 254 | |
nkeynes@248 | 255 | /* enable interface */ |
nkeynes@248 | 256 | ide_activate(); |
nkeynes@248 | 257 | |
nkeynes@248 | 258 | /* test registers have default settings */ |
nkeynes@248 | 259 | // CHECK_REGS( post_reset_regs ); |
nkeynes@248 | 260 | |
nkeynes@248 | 261 | |
nkeynes@248 | 262 | /* disable interface and re-test */ |
nkeynes@248 | 263 | long_write( IDE_ACTIVATE, 0x00042FE ); |
nkeynes@248 | 264 | |
nkeynes@248 | 265 | /* Test registers all 0xFF */ |
nkeynes@248 | 266 | for( i= IDE_BASE; i< IDE_BASE+0x400; i+= 4 ) { |
nkeynes@248 | 267 | CHECK_REG_EQUALS( i, 0xFFFFFFFF, long_read( i ) ); |
nkeynes@185 | 268 | } |
nkeynes@185 | 269 | |
nkeynes@248 | 270 | /* Finally leave the interface in an enabled state */ |
nkeynes@248 | 271 | ide_activate(); |
nkeynes@185 | 272 | return 0; |
nkeynes@185 | 273 | } |
nkeynes@185 | 274 | |
nkeynes@251 | 275 | |
nkeynes@251 | 276 | uint32_t drive_ready_regs[] = { |
nkeynes@251 | 277 | IDE_ALTSTATUS, 0x50, |
nkeynes@251 | 278 | IDE_ERROR, 0x00, |
nkeynes@251 | 279 | IDE_COUNT, 0x03, |
nkeynes@251 | 280 | IDE_LBA1, 0x08, |
nkeynes@251 | 281 | IDE_LBA2, 0x00, |
nkeynes@251 | 282 | IDE_DEVICE, 0, |
nkeynes@251 | 283 | IDE_DATA, 0xFFFF, |
nkeynes@251 | 284 | IDE_STATUS, 0x50, |
nkeynes@251 | 285 | 0, 0 }; |
nkeynes@251 | 286 | |
nkeynes@248 | 287 | /** |
nkeynes@248 | 288 | * Test the reset command |
nkeynes@248 | 289 | */ |
nkeynes@248 | 290 | int test_reset() |
nkeynes@248 | 291 | { |
nkeynes@248 | 292 | byte_write( IDE_COMMAND, 0x08 ); |
nkeynes@248 | 293 | EXPECT_READY(); |
nkeynes@248 | 294 | CHECK_INTRQ_CLEAR(); |
nkeynes@248 | 295 | CHECK_REGS( post_reset_regs ); |
nkeynes@248 | 296 | |
nkeynes@248 | 297 | /** Set Default PIO mode */ |
nkeynes@248 | 298 | byte_write( IDE_FEATURE, 0x03 ); |
nkeynes@248 | 299 | byte_write( IDE_COUNT, 0x0B ); |
nkeynes@248 | 300 | byte_write( IDE_COMMAND, 0xEF ); |
nkeynes@248 | 301 | EXPECT_READY(); |
nkeynes@248 | 302 | CHECK_INTRQ_CLEAR(); |
nkeynes@248 | 303 | CHECK_REGS( post_set_feature_regs ); |
nkeynes@248 | 304 | |
nkeynes@248 | 305 | /** Set Multi-word DMA mode 2 */ |
nkeynes@248 | 306 | long_write( 0xA05F7490, 0x222 ); |
nkeynes@248 | 307 | long_write( 0xA05F7494, 0x222 ); |
nkeynes@248 | 308 | byte_write( IDE_FEATURE, 0x03 ); |
nkeynes@248 | 309 | byte_write( IDE_COUNT, 0x22 ); |
nkeynes@248 | 310 | byte_write( IDE_COMMAND, 0xEF ); |
nkeynes@248 | 311 | EXPECT_READY(); |
nkeynes@248 | 312 | CHECK_INTRQ_CLEAR(); |
nkeynes@248 | 313 | CHECK_REGS( post_set_feature2_regs ); |
nkeynes@185 | 314 | |
nkeynes@251 | 315 | char test_ready_cmd[12] = { 0,0,0,0, 0,0,0,0, 0,0,0,0 }; |
nkeynes@251 | 316 | if( send_packet_command(test_ready_cmd) != 0 ) { |
nkeynes@251 | 317 | return -1; |
nkeynes@251 | 318 | } |
nkeynes@251 | 319 | |
nkeynes@251 | 320 | CHECK_REGS( packet_cmd_error6_regs ); |
nkeynes@251 | 321 | int sense = ide_get_sense_code(); |
nkeynes@251 | 322 | CHECK_IEQUALS( 0x2906, sense ); |
nkeynes@251 | 323 | |
nkeynes@251 | 324 | if( send_packet_command(test_ready_cmd) != 0 ) { |
nkeynes@251 | 325 | return -1; |
nkeynes@251 | 326 | } |
nkeynes@251 | 327 | CHECK_REGS( drive_ready_regs ); |
nkeynes@248 | 328 | return 0; |
nkeynes@248 | 329 | } |
nkeynes@248 | 330 | |
nkeynes@248 | 331 | char expect_ident[] = { 0x00, 0xb4, 0x19, 0x00, |
nkeynes@248 | 332 | 0x00, 0x08, 0x53, 0x45, 0x20, 0x20, 0x20, 0x20 }; |
nkeynes@251 | 333 | |
nkeynes@248 | 334 | /** |
nkeynes@248 | 335 | * Test the PACKET command (using the Inquiry command) |
nkeynes@248 | 336 | */ |
nkeynes@248 | 337 | int test_packet() |
nkeynes@185 | 338 | { |
nkeynes@248 | 339 | int i; |
nkeynes@248 | 340 | char cmd[12] = { 0x11, 0, 4, 0, 12, 0, 0, 0, 0, 0, 0, 0 }; |
nkeynes@248 | 341 | // char cmd[12] = { 0x00,0,0,0, 0,0,0,0, 0,0,0,0 }; |
nkeynes@251 | 342 | unsigned short *spkt; |
nkeynes@248 | 343 | char result[12]; |
nkeynes@248 | 344 | |
nkeynes@251 | 345 | send_packet_command( cmd ); |
nkeynes@248 | 346 | CHECK_REGS( packet_data_ready_regs ); |
nkeynes@248 | 347 | spkt = (unsigned short *)result; |
nkeynes@248 | 348 | *spkt++ = word_read(IDE_DATA); |
nkeynes@248 | 349 | *spkt++ = word_read(IDE_DATA); |
nkeynes@248 | 350 | *spkt++ = word_read(IDE_DATA); |
nkeynes@248 | 351 | *spkt++ = word_read(IDE_DATA); |
nkeynes@248 | 352 | CHECK_REGS( packet_data_ready_regs ); |
nkeynes@248 | 353 | *spkt++ = word_read(IDE_DATA); |
nkeynes@248 | 354 | *spkt++ = word_read(IDE_DATA); |
nkeynes@248 | 355 | CHECK_REGS( post_packet_data_regs ); |
nkeynes@248 | 356 | EXPECT_READY(); |
nkeynes@251 | 357 | EXPECT_INTRQ(); |
nkeynes@248 | 358 | CHECK_REGS( packet_complete_regs ); |
nkeynes@251 | 359 | |
nkeynes@248 | 360 | if( memcmp( result, expect_ident, 12 ) != 0 ) { |
nkeynes@248 | 361 | fwrite_diff( stderr, expect_ident, 12, result, 12 ); |
nkeynes@248 | 362 | } |
nkeynes@248 | 363 | return 0; |
nkeynes@185 | 364 | } |
nkeynes@248 | 365 | |
nkeynes@248 | 366 | /** |
nkeynes@248 | 367 | * Test the SET FEATURE command |
nkeynes@248 | 368 | */ |
nkeynes@248 | 369 | int test_set_feature() |
nkeynes@248 | 370 | { |
nkeynes@248 | 371 | return 0; |
nkeynes@248 | 372 | } |
nkeynes@248 | 373 | |
nkeynes@248 | 374 | /** |
nkeynes@248 | 375 | * Test DMA transfer (using the Inquiry packet comand) |
nkeynes@248 | 376 | */ |
nkeynes@248 | 377 | int test_dma() |
nkeynes@248 | 378 | { |
nkeynes@248 | 379 | return 0; |
nkeynes@248 | 380 | } |
nkeynes@248 | 381 | |
nkeynes@248 | 382 | /** |
nkeynes@248 | 383 | * Test DMA abort |
nkeynes@248 | 384 | */ |
nkeynes@248 | 385 | int test_dma_abort() |
nkeynes@248 | 386 | { |
nkeynes@248 | 387 | return 0; |
nkeynes@248 | 388 | } |
nkeynes@248 | 389 | |
nkeynes@248 | 390 | typedef int (*test_func_t)(); |
nkeynes@248 | 391 | |
nkeynes@251 | 392 | test_func_t test_fns[] = { test_enable, test_reset, test_packet, |
nkeynes@248 | 393 | test_dma, test_dma_abort, NULL }; |
nkeynes@248 | 394 | |
nkeynes@248 | 395 | int main() |
nkeynes@248 | 396 | { |
nkeynes@248 | 397 | int i; |
nkeynes@248 | 398 | ide_init(); |
nkeynes@248 | 399 | |
nkeynes@248 | 400 | /* run tests */ |
nkeynes@248 | 401 | for( i=0; test_fns[i] != NULL; i++ ) { |
nkeynes@248 | 402 | test_count++; |
nkeynes@248 | 403 | if( test_fns[i]() != 0 ) { |
nkeynes@248 | 404 | test_failures++; |
nkeynes@248 | 405 | } |
nkeynes@248 | 406 | } |
nkeynes@248 | 407 | |
nkeynes@248 | 408 | /* report */ |
nkeynes@248 | 409 | fprintf( stderr, "%d/%d tests passed!\n", test_count - test_failures, test_count ); |
nkeynes@248 | 410 | return test_failures; |
nkeynes@248 | 411 | } |
.