Search
lxdream.org :: lxdream/src/pvr2/pvr2mmio.h
lxdream 0.9.1
released Jun 29
Download Now
filename src/pvr2/pvr2mmio.h
changeset 931:430048ea8b71
prev847:2089244671d2
author nkeynes
date Tue Dec 23 05:48:05 2008 +0000 (13 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change More refactoring and general cleanup. Most things should be working again now.
Split off cache and start real implementation, breaking save states in the process
file annotate diff log raw
nkeynes@103
     1
/**
nkeynes@561
     2
 * $Id$
nkeynes@103
     3
 *
nkeynes@103
     4
 * PVR2 (video chip) MMIO register definitions.
nkeynes@103
     5
 *
nkeynes@103
     6
 * Copyright (c) 2005 Nathan Keynes.
nkeynes@103
     7
 *
nkeynes@103
     8
 * This program is free software; you can redistribute it and/or modify
nkeynes@103
     9
 * it under the terms of the GNU General Public License as published by
nkeynes@103
    10
 * the Free Software Foundation; either version 2 of the License, or
nkeynes@103
    11
 * (at your option) any later version.
nkeynes@103
    12
 *
nkeynes@103
    13
 * This program is distributed in the hope that it will be useful,
nkeynes@103
    14
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@103
    15
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
nkeynes@103
    16
 * GNU General Public License for more details.
nkeynes@103
    17
 */
nkeynes@103
    18
nkeynes@103
    19
#include "mmio.h"
nkeynes@103
    20
nkeynes@103
    21
MMIO_REGION_BEGIN( 0x005F8000, PVR2, "Power VR/2" )
nkeynes@189
    22
    LONG_PORT( 0x000, PVRID, PORT_R, 0x17FD11DB, "PVR2 Core ID" )
nkeynes@189
    23
    LONG_PORT( 0x004, PVRVER, PORT_R, 0x00000011, "PVR2 Core Version" )
nkeynes@197
    24
    LONG_PORT( 0x008, PVRRESET, PORT_MRW, 0, "PVR2 Reset" )
nkeynes@191
    25
    LONG_PORT( 0x014, RENDER_START, PORT_W, 0, "Start render" )
nkeynes@191
    26
    LONG_PORT( 0x018, PVRUNK1, PORT_MRW, 0, "PVR2 unknown register 1" )
nkeynes@191
    27
    LONG_PORT( 0x020, RENDER_POLYBASE, PORT_MRW, 0, "Object buffer base offset" )
nkeynes@191
    28
    LONG_PORT( 0x02C, RENDER_TILEBASE, PORT_MRW, 0, "Tile buffer base offset" )
nkeynes@191
    29
    LONG_PORT( 0x030, RENDER_TSPCFG, PORT_MRW, 0, "TSP config?" )
nkeynes@197
    30
    LONG_PORT( 0x040, DISP_BORDER, PORT_MRW, 0, "Border Colour (RGB)" )
nkeynes@197
    31
    LONG_PORT( 0x044, DISP_MODE, PORT_MRW, 0, "Display Mode" )
nkeynes@191
    32
    LONG_PORT( 0x048, RENDER_MODE, PORT_MRW, 0, "Rendering Mode" )
nkeynes@191
    33
    LONG_PORT( 0x04C, RENDER_SIZE, PORT_MRW, 0, "Rendering width (bytes/2)" )
nkeynes@197
    34
    LONG_PORT( 0x050, DISP_ADDR1, PORT_MRW, 0, "Video memory base 1" )
nkeynes@197
    35
    LONG_PORT( 0x054, DISP_ADDR2, PORT_MRW, 0, "Video memory base 2" )
nkeynes@197
    36
    LONG_PORT( 0x05C, DISP_SIZE, PORT_MRW, 0, "Display size" )
nkeynes@191
    37
    LONG_PORT( 0x060, RENDER_ADDR1, PORT_MRW, 0, "Rendering memory base 1" )
nkeynes@191
    38
    LONG_PORT( 0x064, RENDER_ADDR2, PORT_MRW, 0, "Rendering memory base 2" )
nkeynes@191
    39
    LONG_PORT( 0x068, RENDER_HCLIP, PORT_MRW, 0, "Horizontal clipping area" )
nkeynes@191
    40
    LONG_PORT( 0x06C, RENDER_VCLIP, PORT_MRW, 0, "Vertical clipping area" )
nkeynes@191
    41
    LONG_PORT( 0x074, RENDER_SHADOW, PORT_MRW, 0, "Shadowing" )
nkeynes@191
    42
    LONG_PORT( 0x078, RENDER_NEARCLIP, PORT_MRW, 0, "Object clip distance (float32)" )
nkeynes@191
    43
    LONG_PORT( 0x07C, RENDER_OBJCFG, PORT_MRW, 0, "Object config" )
nkeynes@197
    44
    LONG_PORT( 0x080, PVRUNK2, PORT_MRW, 0, "PVR2 unknown register 2" )
nkeynes@191
    45
    LONG_PORT( 0x084, RENDER_TSPCLIP, PORT_MRW, 0, "Texture clip distance (float32)" )
nkeynes@191
    46
    LONG_PORT( 0x088, RENDER_FARCLIP, PORT_MRW, 0, "Background plane depth (float32)" )
nkeynes@191
    47
    LONG_PORT( 0x08C, RENDER_BGPLANE, PORT_MRW, 0, "Background plane config" )
nkeynes@191
    48
    LONG_PORT( 0x098, RENDER_ISPCFG, PORT_MRW, 0, "ISP config" )
nkeynes@197
    49
    LONG_PORT( 0x0A0, VRAM_CFG1, PORT_MRW, 0, "VRAM config 1" )
nkeynes@197
    50
    LONG_PORT( 0x0A4, VRAM_CFG2, PORT_MRW, 0, "VRAM config 2" )
nkeynes@197
    51
    LONG_PORT( 0x0A8, VRAM_CFG3, PORT_MRW, 0, "VRAM config 3" )
nkeynes@191
    52
    LONG_PORT( 0x0B0, RENDER_FOGTBLCOL, PORT_MRW, 0, "Fog table colour" )
nkeynes@191
    53
    LONG_PORT( 0x0B4, RENDER_FOGVRTCOL, PORT_MRW, 0, "Fog vertex colour" )
nkeynes@191
    54
    LONG_PORT( 0x0B8, RENDER_FOGCOEFF, PORT_MRW, 0, "Fog density coefficient (float16)" )
nkeynes@191
    55
    LONG_PORT( 0x0BC, RENDER_CLAMPHI, PORT_MRW, 0, "Clamp high colour" )
nkeynes@191
    56
    LONG_PORT( 0x0C0, RENDER_CLAMPLO, PORT_MRW, 0, "Clamp low colour" )
nkeynes@103
    57
    LONG_PORT( 0x0C4, GUNPOS, PORT_MRW, 0, "Lightgun position" )
nkeynes@197
    58
    LONG_PORT( 0x0C8, DISP_HPOSIRQ, PORT_MRW, 0, "Raster horizontal event position" )    
nkeynes@197
    59
    LONG_PORT( 0x0CC, DISP_VPOSIRQ, PORT_MRW, 0, "Raster event position" )
nkeynes@261
    60
    LONG_PORT( 0x0D0, DISP_SYNCCFG, PORT_MRW, 0, "Sync configuration & enable" )
nkeynes@197
    61
    LONG_PORT( 0x0D4, DISP_HBORDER, PORT_MRW, 0, "Horizontal border area" )
nkeynes@261
    62
    LONG_PORT( 0x0D8, DISP_TOTAL, PORT_MRW, 0, "Total display area" )
nkeynes@197
    63
    LONG_PORT( 0x0DC, DISP_VBORDER, PORT_MRW, 0, "Vertical border area" )
nkeynes@261
    64
    LONG_PORT( 0x0E0, DISP_SYNCTIME, PORT_MRW, 0, "Horizontal sync pulse timing" )
nkeynes@191
    65
    LONG_PORT( 0x0E4, RENDER_TEXSIZE, PORT_MRW, 0, "Texture modulo width" )
nkeynes@197
    66
    LONG_PORT( 0x0E8, DISP_CFG2, PORT_MRW, 0, "Video configuration 2" )
nkeynes@197
    67
    LONG_PORT( 0x0EC, DISP_HPOS, PORT_MRW, 0, "Horizontal display position" )
nkeynes@197
    68
    LONG_PORT( 0x0F0, DISP_VPOS, PORT_MRW, 0, "Vertical display position" )
nkeynes@333
    69
    LONG_PORT( 0x0F4, RENDER_SCALER, PORT_MRW, 0, "Scaler configuration (?)" )
nkeynes@191
    70
    LONG_PORT( 0x108, RENDER_PALETTE, PORT_MRW, 0, "Palette configuration" )
nkeynes@261
    71
    LONG_PORT( 0x10C, DISP_SYNCSTAT, PORT_R, 0, "Raster beam position" )
nkeynes@197
    72
    LONG_PORT( 0x110, PVRUNK3, PORT_MRW, 0, "PVR2 unknown register 3" )
nkeynes@197
    73
    LONG_PORT( 0x114, PVRUNK4, PORT_MRW, 0, "PVR2 unknown register 4" )
nkeynes@197
    74
    LONG_PORT( 0x118, PVRUNK5, PORT_MRW, 0, "PVR2 unkown register 5" )
nkeynes@649
    75
    LONG_PORT( 0x11C, RENDER_ALPHA_REF, PORT_MRW, 0, "PVR2 reference alpha" )
nkeynes@189
    76
    LONG_PORT( 0x124, TA_TILEBASE, PORT_MRW, 0, "TA Tile matrix start" )
nkeynes@189
    77
    LONG_PORT( 0x128, TA_POLYBASE, PORT_MRW, 0, "TA Polygon buffer start" )
nkeynes@193
    78
    LONG_PORT( 0x12C, TA_LISTEND, PORT_MRW, 0, "TA Tile matrix end" )
nkeynes@189
    79
    LONG_PORT( 0x130, TA_POLYEND, PORT_MRW, 0, "TA Polygon buffer end" )
nkeynes@189
    80
    LONG_PORT( 0x134, TA_LISTPOS, PORT_R, 0, "TA Tile list position" )
nkeynes@189
    81
    LONG_PORT( 0x138, TA_POLYPOS, PORT_R, 0, "TA Polygon buffer position" )
nkeynes@189
    82
    LONG_PORT( 0x13C, TA_TILESIZE, PORT_MRW, 0, "TA Tile matrix size" )
nkeynes@189
    83
    LONG_PORT( 0x140, TA_TILECFG, PORT_MRW, 0, "TA Tile matrix config" )
nkeynes@189
    84
    LONG_PORT( 0x144, TA_INIT, PORT_W, 0, "TA Initialize" )
nkeynes@197
    85
    LONG_PORT( 0x148, YUV_ADDR, PORT_MRW, 0, "YUV conversion address" )
nkeynes@197
    86
    LONG_PORT( 0x14C, YUV_CFG, PORT_MRW, 0, "YUV configuration" )
nkeynes@197
    87
    LONG_PORT( 0x150, YUV_COUNT, PORT_MR, 0, "YUV conversion count" )
nkeynes@197
    88
    LONG_PORT( 0x160, TA_REINIT, PORT_W, 0, "TA re-initialize" )
nkeynes@189
    89
    LONG_PORT( 0x164, TA_LISTBASE, PORT_MRW, 0, "TA Tile list start" )
nkeynes@197
    90
    LONG_PORT( 0x1A8, PVRUNK7, PORT_MRW, 0, "PVR2 unknown register 7" )
nkeynes@728
    91
    LONG_PORT( 0x1AC, PVRUNK8, PORT_MRW, 0, "PVR2 unknown register 8" )
nkeynes@847
    92
    LONG_PORT( 0x200, RENDER_FOGTABLE, PORT_MRW, 0, "Start of fog table" )
nkeynes@103
    93
MMIO_REGION_END
nkeynes@103
    94
nkeynes@103
    95
MMIO_REGION_BEGIN( 0x005F9000, PVR2PAL, "Power VR/2 CLUT Palettes" )
nkeynes@103
    96
    LONG_PORT( 0x000, PAL0_0, PORT_MRW, 0, "Pal0 colour 0" )
nkeynes@103
    97
MMIO_REGION_END
.