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lxdream.org :: lxdream/test/testregs.c
lxdream 0.9.1
released Jun 29
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filename test/testregs.c
changeset 561:533f6b478071
prev549:828d103ad115
next728:4dfc293b9d96
author nkeynes
date Tue Jan 01 05:08:38 2008 +0000 (12 years ago)
branchlxdream-mmu
permissions -rw-r--r--
last change Enable Id keyword on all source files
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/**
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 * $Id$
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 * 
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 * Register mask tests. These are simple "write value to register and check
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 * that we read back what we expect" tests.
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 *
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 * Copyright (c) 2006 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include "lib.h"
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#include <stdio.h>
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/**
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 * Constant to mean "same as previous value". Can't be used otherwise.
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 */
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#define UNCHANGED 0xDEADBEEF
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struct test {
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    unsigned int reg;
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    unsigned int write;
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    unsigned int expect;
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};
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struct test test_cases[] = {
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    { 0xA05F6800, 0xFFFFFFFF, 0x13FFFFE0 },
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    { 0xA05F6800, 0x00000000, 0x10000000 },
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    { 0xA05F6804, 0xFFFFFFFF, 0x00FFFFE0 },
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//    { 0xA05F6808, 0xFFFFFFFF, 0x00000001 },
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//    { 0xA05F6808, 0x00000000, 0x00000000 },  // DMA start
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//    { 0xA05F680C, 0xFFFFFFFF, 0x00000000 },  // Not a register afaik
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//    { 0xA05F7400, 0xFFFFFFFF, 0x00000000 },  // Not a register
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    { 0xA05F7404, 0xFFFFFFFF, 0x1FFFFFE0 },
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    { 0xA05F7404, 0x00000000, 0x00000000 },
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    { 0xA05F7408, 0xFFFFFFFF, 0x01FFFFFE },
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    { 0xA05F740C, 0xFFFFFFFF, 0x00000001 },
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//    { 0xA05F7410, 0xFFFFFFFF, 0x00000000 },  // Not a register
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    { 0xA05F7414, 0xFFFFFFFF, 0x00000001 },
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//    { 0xA05F7418, 0xFFFFFFFF, 0x00000001 },  // DMA start
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//    { 0xA05F741C, 0xFFFFFFFF, 0x00000000 },  // Not a register
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    { 0xA05F7800, 0xFFFFFFFF, 0x9FFFFFE0 },
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    { 0xA05F7800, 0x00000000, 0x00000000 },
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    { 0xA05F7804, 0xFFFFFFFF, 0x9FFFFFE0 },
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    { 0xA05F7808, 0xFFFFFFFF, 0x9FFFFFE0 },
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    { 0xA05F780C, 0xFFFFFFFF, 0x00000001 }, 
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    { 0xA05F7810, 0xFFFFFFFF, 0x00000007 },
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    { 0xA05F7814, 0xFFFFFFFF, 0x00000001 },
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//    { 0xA05F7818, 0xFFFFFFFF, 0x00000000 },  // DMA start
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    { 0xA05F781C, 0xFFFFFFFF, 0x00000037 },
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    { 0xA05F8000, 0xFFFFFFFF, 0x17FD11DB }, /* PVRID read-only */
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    { 0xA05F8004, 0xFFFFFFFF, 0x00000011 }, /* PVRVER read-only */
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    { 0xA05F8008, 0xFFFFFFFF, 0x00000007 }, /* Reset */
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    { 0xA05F8010, 0xFFFFFFFF, 0 },
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    //    { 0xA05F8014, 0xFFFFFFFF, 0x00000000 }, /* Render start */
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    { 0xA05F8018, 0xFFFFFFFF, 0x000007FF }, /* ??? */   
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    { 0xA05F801C, 0xFFFFFFFF, 0x00000000 }, /* ??? */   
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    { 0xA05F8020, 0xFFFFFFFF, 0x00F00000 }, /* Render poly buffer address ??? */
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    { 0xA05F8024, 0xFFFFFFFF, 0x00000000 }, /* ??? */
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    { 0xA05F8028, 0xFFFFFFFF, 0x00000000 }, /* ??? */   
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    { 0xA05F802C, 0xFFFFFFFF, 0x00FFFFFC }, /* Render Tile buffer address */
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    { 0xA05F8030, 0xFFFFFFFF, 0x00010101 }, /* Render TSP cache? */   
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    { 0xA05F8034, 0xFFFFFFFF, 0 },
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    { 0xA05F8038, 0xFFFFFFFF, 0 },
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    { 0xA05F803C, 0xFFFFFFFF, 0 },
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    { 0xA05F8040, 0xFFFFFFFF, 0x01FFFFFF }, /* Display border colour */   
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    { 0xA05F8044, 0xFFFFFFFF, 0x00FFFF7F }, /* Display config */   
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    { 0xA05F8048, 0xFFFFFFFF, 0x00FFFF0F }, /* Render config */
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    { 0xA05F804C, 0xFFFFFFFF, 0x000001FF }, /* Render size */
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    { 0xA05F8050, 0xFFFFFFFF, 0x00FFFFFC }, /* Display address 1 */ 
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    { 0xA05F8054, 0xFFFFFFFF, 0x00FFFFFC }, /* Display address 2 */
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    { 0xA05F8058, 0xFFFFFFFF, 0x00000000 }, /* ??? */
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    { 0xA05F805C, 0xFFFFFFFF, 0x3FFFFFFF }, /* Display size */
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    { 0xA05F8060, 0xFFFFFFFF, 0x01FFFFFC }, /* Render address 1 */
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    { 0xA05F8064, 0xFFFFFFFF, 0x01FFFFFC }, /* Render address 2 */
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    { 0xA05F8068, 0xFFFFFFFF, 0x07FF07FF }, /* Render horizontal clip */
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    { 0xA05F806C, 0xFFFFFFFF, 0x03FF03FF }, /* Render vertical clip */
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    { 0xA05F8070, 0xFFFFFFFF, 0 },
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    { 0xA05F8074, 0xFFFFFFFF, 0x000001FF }, /* Render shadow mode */
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    { 0xA05F8078, 0xFFFFFFFF, 0x7FFFFFFF }, /* Near z clip */
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    { 0xA05F807C, 0xFFFFFFFF, 0x003FFFFF }, /* Render object config */
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    { 0xA05F8080, 0xFFFFFFFF, 0x00000007 }, /* ??? */
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    { 0xA05F8084, 0xFFFFFFFF, 0x7FFFFFFF }, /* Render tsp clip */
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    { 0xA05F8088, 0xFFFFFFFF, 0xFFFFFFF0 }, /* Far z clip */
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    { 0xA05F808C, 0xFFFFFFFF, 0x1FFFFFFF }, /* Render background plane config */
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    { 0xA05F8090, 0xFFFFFFFF, 0 },
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    { 0xA05F8094, 0xFFFFFFFF, 0 },
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    { 0xA05F8098, 0xFFFFFFFF, 0x00FFFFF9 }, /* ISP config? */
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    { 0xA05F809C, 0xFFFFFFFF, 0 },
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    { 0xA05F80A0, 0xFFFFFFFF, 0x000000FF }, /* Vram cfg1? */
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    { 0xA05F80A4, 0xFFFFFFFF, 0x003FFFFF },
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    { 0xA05F80A8, 0xFFFFFFFF, 0x1FFFFFFF },
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    { 0xA05F80AC, 0xFFFFFFFF, 0 },
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    { 0xA05F80B0, 0xFFFFFFFF, 0x00FFFFFF },
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    { 0xA05F80B4, 0xFFFFFFFF, 0x00FFFFFF },
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    { 0xA05F80B8, 0xFFFFFFFF, 0x0000FFFF },
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    { 0xA05F80BC, 0xFFFFFFFF, 0xFFFFFFFF },
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    { 0xA05F80C0, 0xFFFFFFFF, 0xFFFFFFFF },
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    { 0xA05F80C4, 0xFFFFFFFF, UNCHANGED },  /* Gun pos */
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    { 0xA05F80C8, 0xFFFFFFFF, 0x03FF33FF }, /* Horizontal scanline irq */
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    { 0xA05F80CC, 0xFFFFFFFF, 0x03FF03FF }, /* Vertical scanline irq */
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    { 0xA05F80D0, 0xFFFFFFFF, 0x000003FF },
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    { 0xA05F80D4, 0xFFFFFFFF, 0x03FF03FF },
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    { 0xA05F80D8, 0xFFFFFFFF, 0x03FF03FF },
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    { 0xA05F80DC, 0xFFFFFFFF, 0x03FF03FF },
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    { 0xA05F80E0, 0xFFFFFFFF, 0xFFFFFF7F },
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    { 0xA05F80E4, 0xFFFFFFFF, 0x00031F1F },
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    { 0xA05F80E8, 0xFFFFFFFF, 0x003F01FF },
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    { 0xA05F80EC, 0xFFFFFFFF, 0x000003FF },
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    { 0xA05F80F0, 0xFFFFFFFF, 0x03FF03FF },
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    { 0xA05F80F4, 0xFFFFFFFF, 0x0007FFFF },
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    { 0xA05F80F8, 0xFFFFFFFF, 0 },
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    { 0xA05F80FC, 0xFFFFFFFF, 0 },
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    { 0xA05F8100, 0xFFFFFFFF, 0 },
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    { 0xA05F8104, 0xFFFFFFFF, 0 },
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    { 0xA05F8108, 0xFFFFFFFF, 0x00000003 },
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    { 0xA05F810C, 0xFFFFFFFF, UNCHANGED },
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    { 0xA05F8110, 0xFFFFFFFF, 0x000FFF3F },
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    { 0xA05F8114, 0xFFFFFFFF, UNCHANGED },
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    { 0xA05F8118, 0xFFFFFFFF, 0x0000FFFF },
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    { 0xA05F811C, 0xFFFFFFFF, 0x000000FF },
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    { 0xA05F8120, 0xFFFFFFFF, 0 },
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    { 0xA05F8124, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile matrix base */
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    { 0xA05F8128, 0xFFFFFFFF, 0x00FFFFFC }, /* TA Polygon base */
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    { 0xA05F812C, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile matrix end */
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    { 0xA05F8130, 0xFFFFFFFF, 0x00FFFFFC }, /* TA Polygon end */
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    { 0xA05F8134, 0xFFFFFFFF, UNCHANGED  }, /* TA Tilelist posn */
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    { 0xA05F8138, 0xFFFFFFFF, UNCHANGED  }, /* TA polygon posn */
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    { 0xA05F813C, 0xFFFFFFFF, 0x000F003F }, /* TA tile matrix size */
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    { 0xA05F8140, 0xFFFFFFFF, 0x00133333 }, /* TA object config */
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    { 0xA05F8144, 0xFFFFFFFF, 0x00000000 }, /* TA initialize */
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    { 0xA05F8148, 0xFFFFFFFF, 0x00FFFFF8 },
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    { 0xA05F814C, 0xFFFFFFFF, 0x01013F3F },
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    { 0xA05F8150, 0xFFFFFFFF, 0 },
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    { 0xA05F8154, 0xFFFFFFFF, 0 },
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    { 0xA05F8158, 0xFFFFFFFF, 0 },
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    { 0xA05F815C, 0xFFFFFFFF, 0 },
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    { 0xA05F8160, 0xFFFFFFFF, 0 },
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    { 0xA05F8164, 0xFFFFFFFF, 0x00FFFFE0 }, /* TA Tile list start */
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    { 0xA05F8168, 0xFFFFFFFF, 0 },
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    { 0xA05F816C, 0xFFFFFFFF, 0 },
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    { 0xA05F8170, 0xFFFFFFFF, 0 },
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    { 0xA05F8174, 0xFFFFFFFF, 0 },
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    { 0xA05F8178, 0xFFFFFFFF, 0 },
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    { 0xA05F817C, 0xFFFFFFFF, 0 },
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    { 0xA05F8180, 0xFFFFFFFF, 0 },
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    { 0xA05F8184, 0xFFFFFFFF, 0 },
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    { 0xA05F8188, 0xFFFFFFFF, 0 },
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    { 0xA05F818C, 0xFFFFFFFF, 0 },
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    { 0xA05F8190, 0xFFFFFFFF, 0 },
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    { 0xA05F8194, 0xFFFFFFFF, 0 },
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    { 0xA05F8198, 0xFFFFFFFF, 0 },
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    { 0xA05F819C, 0xFFFFFFFF, 0 },
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    { 0xA05F81A0, 0xFFFFFFFF, 0 },
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    { 0xA05F81A4, 0xFFFFFFFF, 0 },
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    { 0xA05F81A8, 0xFFFFFFFF, 0x00000001 },
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    { 0xA05F81A8, 0x00000000, 0x00000000 },    	
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    { 0xA05F81AC, 0xFFFFFFFF, 0 },
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    { 0xA05F81B0, 0xFFFFFFFF, 0 },
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    { 0xA05F81B4, 0xFFFFFFFF, 0 },
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    { 0xA05F81B8, 0xFFFFFFFF, 0 },
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    { 0xA05F81BC, 0xFFFFFFFF, 0 },
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    { 0xA05F81C0, 0xFFFFFFFF, 0 },
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    { 0xA05F81C4, 0xFFFFFFFF, 0 },
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    { 0xA05F81C8, 0xFFFFFFFF, 0 },
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    { 0xA05F81CC, 0xFFFFFFFF, 0 },
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    { 0xA05F81D0, 0xFFFFFFFF, 0 },
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    { 0xA05F81D4, 0xFFFFFFFF, 0 },
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    { 0xA05F81D8, 0xFFFFFFFF, 0 },
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    { 0xA05F81DC, 0xFFFFFFFF, 0 },
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    { 0xA05F81E0, 0xFFFFFFFF, 0 },
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    { 0xA05F81E4, 0xFFFFFFFF, 0 },
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    { 0xA05F81E8, 0xFFFFFFFF, 0 },
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    { 0xA05F81EC, 0xFFFFFFFF, 0 },
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    { 0xA05F81F0, 0xFFFFFFFF, 0 },
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    { 0xA05F81F4, 0xFFFFFFFF, 0 },
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    { 0xA05F81F8, 0xFFFFFFFF, 0 },
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    { 0xA05F81FC, 0xFFFFFFFF, 0 },
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    { 0, 0, 0 } };
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int main( int argc, char *argv[] )
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{
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    int i;
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    int failures = 0;
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    int tests = 0;
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    ide_init();
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    for( i=0; test_cases[i].reg != 0; i++ ) {
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    	unsigned int oldval = long_read( test_cases[i].reg );
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    	unsigned int newval;
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	long_write( test_cases[i].reg, test_cases[i].write );
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	newval = long_read( test_cases[i].reg );
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	if( test_cases[i].expect == UNCHANGED ) {
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	    if( newval != oldval ) {
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		fprintf( stderr, "Test %d (%08X) failed. Expected %08X but was %08X\n",
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		  	 i+1, test_cases[i].reg, oldval, newval );
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		failures++;
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	    }
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	} else {
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	    if( newval != test_cases[i].expect ) {
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		fprintf( stderr, "Test %d (%08X) failed. Expected %08X but was %08X\n",
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		  	 i+1, test_cases[i].reg, test_cases[i].expect, newval );
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		failures++;
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	    }
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	}
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	long_write( test_cases[i].reg, oldval );
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	tests++;
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    }
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    fprintf( stdout, "%d/%d test cases passed successfully\n", (tests-failures), tests );
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    return failures;
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}
.