Search
lxdream.org :: lxdream/src/sh4/sh4.h
lxdream 0.9.1
released Jun 29
Download Now
filename src/sh4/sh4.h
changeset 566:59be465e5f01
prev564:dc7b5ffb0535
next571:9bc09948d0f2
author nkeynes
date Tue Jan 01 08:57:33 2008 +0000 (14 years ago)
branchlxdream-mmu
permissions -rw-r--r--
last change Add breakpoint_type_t enum (general cleanup)
file annotate diff log raw
nkeynes@564
     1
/**
nkeynes@564
     2
 * $Id: sh4.h 577 2008-01-01 05:08:38Z nkeynes $
nkeynes@564
     3
 * 
nkeynes@564
     4
 * This file defines the public functions and definitions exported by the SH4
nkeynes@564
     5
 * modules.
nkeynes@564
     6
 *
nkeynes@564
     7
 * Copyright (c) 2005 Nathan Keynes.
nkeynes@564
     8
 *
nkeynes@564
     9
 * This program is free software; you can redistribute it and/or modify
nkeynes@564
    10
 * it under the terms of the GNU General Public License as published by
nkeynes@564
    11
 * the Free Software Foundation; either version 2 of the License, or
nkeynes@564
    12
 * (at your option) any later version.
nkeynes@564
    13
 *
nkeynes@564
    14
 * This program is distributed in the hope that it will be useful,
nkeynes@564
    15
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@564
    16
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
nkeynes@564
    17
 * GNU General Public License for more details.
nkeynes@564
    18
 */
nkeynes@564
    19
nkeynes@564
    20
#ifndef lxdream_sh4_H
nkeynes@564
    21
#define lxdream_sh4_H 1
nkeynes@564
    22
nkeynes@564
    23
#include "lxdream.h"
nkeynes@566
    24
#include "mem.h"
nkeynes@564
    25
nkeynes@564
    26
#ifdef __cplusplus
nkeynes@564
    27
extern "C" {
nkeynes@564
    28
#endif
nkeynes@564
    29
nkeynes@564
    30
nkeynes@564
    31
/**
nkeynes@564
    32
 * SH4 is running normally 
nkeynes@564
    33
 */
nkeynes@564
    34
#define SH4_STATE_RUNNING 1
nkeynes@564
    35
/**
nkeynes@564
    36
 * SH4 is not executing instructions but all peripheral modules are still
nkeynes@564
    37
 * running
nkeynes@564
    38
 */
nkeynes@564
    39
#define SH4_STATE_SLEEP 2
nkeynes@564
    40
/**
nkeynes@564
    41
 * SH4 is not executing instructions, DMAC is halted, but all other peripheral
nkeynes@564
    42
 * modules are still running
nkeynes@564
    43
 */
nkeynes@564
    44
#define SH4_STATE_DEEP_SLEEP 3
nkeynes@564
    45
/**
nkeynes@564
    46
 * SH4 is not executing instructions and all peripheral modules are also
nkeynes@564
    47
 * stopped. As close as you can get to powered-off without actually being
nkeynes@564
    48
 * off.
nkeynes@564
    49
 */
nkeynes@564
    50
#define SH4_STATE_STANDBY 4
nkeynes@564
    51
nkeynes@564
    52
/**
nkeynes@564
    53
 * sh4r.event_types flag indicating a pending IRQ
nkeynes@564
    54
 */
nkeynes@564
    55
#define PENDING_IRQ 1
nkeynes@564
    56
nkeynes@564
    57
/**
nkeynes@564
    58
 * sh4r.event_types flag indicating a pending event (from the event queue)
nkeynes@564
    59
 */
nkeynes@564
    60
#define PENDING_EVENT 2
nkeynes@564
    61
nkeynes@564
    62
/**
nkeynes@564
    63
 * SH4 register structure
nkeynes@564
    64
 */
nkeynes@564
    65
struct sh4_registers {
nkeynes@564
    66
    uint32_t r[16];
nkeynes@564
    67
    uint32_t sr, pr, pc, fpscr;
nkeynes@564
    68
    uint32_t t, m, q, s; /* really boolean - 0 or 1 */
nkeynes@564
    69
    int32_t fpul;
nkeynes@564
    70
    float *fr_bank;
nkeynes@564
    71
    float fr[2][16];
nkeynes@564
    72
    uint64_t mac;
nkeynes@564
    73
    uint32_t gbr, ssr, spc, sgr, dbr, vbr;
nkeynes@564
    74
nkeynes@564
    75
    uint32_t r_bank[8]; /* hidden banked registers */
nkeynes@564
    76
    int32_t store_queue[16]; /* technically 2 banks of 32 bytes */
nkeynes@564
    77
    
nkeynes@564
    78
    uint32_t new_pc; /* Not a real register, but used to handle delay slots */
nkeynes@564
    79
    uint32_t event_pending; /* slice cycle time of the next pending event, or FFFFFFFF
nkeynes@564
    80
                             when no events are pending */
nkeynes@564
    81
    uint32_t event_types; /* bit 0 = IRQ pending, bit 1 = general event pending */
nkeynes@564
    82
    int in_delay_slot; /* flag to indicate the current instruction is in
nkeynes@564
    83
                             * a delay slot (certain rules apply) */
nkeynes@564
    84
    uint32_t slice_cycle; /* Current nanosecond within the timeslice */
nkeynes@564
    85
    int sh4_state; /* Current power-on state (one of the SH4_STATE_* values ) */
nkeynes@564
    86
};
nkeynes@564
    87
nkeynes@564
    88
extern struct sh4_registers sh4r;
nkeynes@564
    89
nkeynes@564
    90
/**
nkeynes@564
    91
 * Switch between translation and emulation execution modes. Note that this
nkeynes@564
    92
 * should only be used while the system is stopped. If the system was built
nkeynes@564
    93
 * without translation support, this method has no effect.
nkeynes@564
    94
 *
nkeynes@564
    95
 * @param use TRUE for translation mode, FALSE for emulation mode.
nkeynes@564
    96
 */
nkeynes@564
    97
void sh4_set_use_xlat( gboolean use );
nkeynes@564
    98
nkeynes@564
    99
/**
nkeynes@564
   100
 * Explicitly set the SH4 PC to the supplied value - this will be the next
nkeynes@564
   101
 * instruction executed. This should only be called while the system is stopped.
nkeynes@564
   102
 */
nkeynes@564
   103
void sh4_set_pc( int pc );
nkeynes@564
   104
nkeynes@564
   105
/**
nkeynes@564
   106
 * Execute (using the emulator) a single instruction (in other words, perform a
nkeynes@564
   107
 * single-step operation). 
nkeynes@564
   108
 */
nkeynes@564
   109
gboolean sh4_execute_instruction( void );
nkeynes@564
   110
nkeynes@564
   111
/* SH4 breakpoints */
nkeynes@566
   112
void sh4_set_breakpoint( uint32_t pc, breakpoint_type_t type );
nkeynes@566
   113
gboolean sh4_clear_breakpoint( uint32_t pc, breakpoint_type_t type );
nkeynes@564
   114
int sh4_get_breakpoint( uint32_t pc );
nkeynes@564
   115
nkeynes@564
   116
#ifdef __cplusplus
nkeynes@564
   117
}
nkeynes@564
   118
#endif
nkeynes@564
   119
#endif /* !lxdream_sh4_H */
.