filename | src/sh4/sh4.h |
changeset | 1189:1540105786c8 |
prev | 1187:266e7a1bae90 |
next | 1218:be02e87f9f87 |
author | nkeynes |
date | Mon Feb 13 20:00:27 2012 +1000 (12 years ago) |
permissions | -rw-r--r-- |
last change | Fix MMU on non-translated platforms - reintroduce old VMA translation functions (slightly modified) - modify shadow processing to work on post-translated memory ops |
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nkeynes@586 | 1 | /** |
nkeynes@1021 | 2 | * $Id$ |
nkeynes@586 | 3 | * |
nkeynes@586 | 4 | * This file defines the public functions and definitions exported by the SH4 |
nkeynes@586 | 5 | * modules. |
nkeynes@586 | 6 | * |
nkeynes@586 | 7 | * Copyright (c) 2005 Nathan Keynes. |
nkeynes@586 | 8 | * |
nkeynes@586 | 9 | * This program is free software; you can redistribute it and/or modify |
nkeynes@586 | 10 | * it under the terms of the GNU General Public License as published by |
nkeynes@586 | 11 | * the Free Software Foundation; either version 2 of the License, or |
nkeynes@586 | 12 | * (at your option) any later version. |
nkeynes@586 | 13 | * |
nkeynes@586 | 14 | * This program is distributed in the hope that it will be useful, |
nkeynes@586 | 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
nkeynes@586 | 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
nkeynes@586 | 17 | * GNU General Public License for more details. |
nkeynes@586 | 18 | */ |
nkeynes@586 | 19 | |
nkeynes@586 | 20 | #ifndef lxdream_sh4_H |
nkeynes@586 | 21 | #define lxdream_sh4_H 1 |
nkeynes@586 | 22 | |
nkeynes@586 | 23 | #include "lxdream.h" |
nkeynes@586 | 24 | #include "mem.h" |
nkeynes@586 | 25 | |
nkeynes@586 | 26 | #ifdef __cplusplus |
nkeynes@586 | 27 | extern "C" { |
nkeynes@586 | 28 | #endif |
nkeynes@586 | 29 | |
nkeynes@586 | 30 | |
nkeynes@586 | 31 | /** |
nkeynes@586 | 32 | * SH4 is running normally |
nkeynes@586 | 33 | */ |
nkeynes@586 | 34 | #define SH4_STATE_RUNNING 1 |
nkeynes@586 | 35 | /** |
nkeynes@586 | 36 | * SH4 is not executing instructions but all peripheral modules are still |
nkeynes@586 | 37 | * running |
nkeynes@586 | 38 | */ |
nkeynes@586 | 39 | #define SH4_STATE_SLEEP 2 |
nkeynes@586 | 40 | /** |
nkeynes@586 | 41 | * SH4 is not executing instructions, DMAC is halted, but all other peripheral |
nkeynes@586 | 42 | * modules are still running |
nkeynes@586 | 43 | */ |
nkeynes@586 | 44 | #define SH4_STATE_DEEP_SLEEP 3 |
nkeynes@586 | 45 | /** |
nkeynes@586 | 46 | * SH4 is not executing instructions and all peripheral modules are also |
nkeynes@586 | 47 | * stopped. As close as you can get to powered-off without actually being |
nkeynes@586 | 48 | * off. |
nkeynes@586 | 49 | */ |
nkeynes@586 | 50 | #define SH4_STATE_STANDBY 4 |
nkeynes@586 | 51 | |
nkeynes@586 | 52 | /** |
nkeynes@586 | 53 | * sh4r.event_types flag indicating a pending IRQ |
nkeynes@586 | 54 | */ |
nkeynes@586 | 55 | #define PENDING_IRQ 1 |
nkeynes@586 | 56 | |
nkeynes@586 | 57 | /** |
nkeynes@586 | 58 | * sh4r.event_types flag indicating a pending event (from the event queue) |
nkeynes@586 | 59 | */ |
nkeynes@586 | 60 | #define PENDING_EVENT 2 |
nkeynes@586 | 61 | |
nkeynes@586 | 62 | /** |
nkeynes@586 | 63 | * SH4 register structure |
nkeynes@586 | 64 | */ |
nkeynes@586 | 65 | struct sh4_registers { |
nkeynes@586 | 66 | uint32_t r[16]; |
nkeynes@903 | 67 | uint32_t sr, pr, pc; |
nkeynes@669 | 68 | union { |
nkeynes@736 | 69 | int32_t i; |
nkeynes@736 | 70 | float f; |
nkeynes@669 | 71 | } fpul; |
nkeynes@903 | 72 | uint32_t t, m, q, s; /* really boolean - 0 or 1 */ |
nkeynes@904 | 73 | float fr[2][16]; /* Must be aligned on 16-byte boundary */ |
nkeynes@903 | 74 | uint32_t fpscr; |
nkeynes@883 | 75 | uint32_t pad; /* Pad up to 64-bit boundaries */ |
nkeynes@586 | 76 | uint64_t mac; |
nkeynes@586 | 77 | uint32_t gbr, ssr, spc, sgr, dbr, vbr; |
nkeynes@586 | 78 | |
nkeynes@586 | 79 | uint32_t r_bank[8]; /* hidden banked registers */ |
nkeynes@586 | 80 | int32_t store_queue[16]; /* technically 2 banks of 32 bytes */ |
nkeynes@736 | 81 | |
nkeynes@586 | 82 | uint32_t new_pc; /* Not a real register, but used to handle delay slots */ |
nkeynes@586 | 83 | uint32_t event_pending; /* slice cycle time of the next pending event, or FFFFFFFF |
nkeynes@586 | 84 | when no events are pending */ |
nkeynes@586 | 85 | uint32_t event_types; /* bit 0 = IRQ pending, bit 1 = general event pending */ |
nkeynes@586 | 86 | int in_delay_slot; /* flag to indicate the current instruction is in |
nkeynes@736 | 87 | * a delay slot (certain rules apply) */ |
nkeynes@586 | 88 | uint32_t slice_cycle; /* Current nanosecond within the timeslice */ |
nkeynes@958 | 89 | uint32_t bus_cycle; /* Nanosecond within the timeslice that the bus will be free */ |
nkeynes@586 | 90 | int sh4_state; /* Current power-on state (one of the SH4_STATE_* values ) */ |
nkeynes@936 | 91 | |
nkeynes@936 | 92 | /* Not saved */ |
nkeynes@936 | 93 | int xlat_sh4_mode; /* Collection of execution mode flags (derived) from fpscr, sr, etc */ |
nkeynes@586 | 94 | }; |
nkeynes@586 | 95 | |
nkeynes@586 | 96 | extern struct sh4_registers sh4r; |
nkeynes@586 | 97 | |
nkeynes@998 | 98 | extern const struct cpu_desc_struct sh4_cpu_desc; |
nkeynes@998 | 99 | |
nkeynes@1125 | 100 | typedef enum { |
nkeynes@1125 | 101 | SH4_INTERPRET, |
nkeynes@1125 | 102 | SH4_TRANSLATE, |
nkeynes@1125 | 103 | SH4_SHADOW |
nkeynes@1125 | 104 | } sh4core_t; |
nkeynes@1125 | 105 | |
nkeynes@586 | 106 | /** |
nkeynes@586 | 107 | * Switch between translation and emulation execution modes. Note that this |
nkeynes@586 | 108 | * should only be used while the system is stopped. If the system was built |
nkeynes@586 | 109 | * without translation support, this method has no effect. |
nkeynes@586 | 110 | * |
nkeynes@586 | 111 | * @param use TRUE for translation mode, FALSE for emulation mode. |
nkeynes@586 | 112 | */ |
nkeynes@1125 | 113 | void sh4_set_core( sh4core_t core ); |
nkeynes@586 | 114 | |
nkeynes@586 | 115 | /** |
nkeynes@586 | 116 | * Test if system is currently using the translation engine. |
nkeynes@586 | 117 | */ |
nkeynes@740 | 118 | gboolean sh4_translate_is_enabled(); |
nkeynes@586 | 119 | |
nkeynes@586 | 120 | /** |
nkeynes@586 | 121 | * Explicitly set the SH4 PC to the supplied value - this will be the next |
nkeynes@586 | 122 | * instruction executed. This should only be called while the system is stopped. |
nkeynes@586 | 123 | */ |
nkeynes@586 | 124 | void sh4_set_pc( int pc ); |
nkeynes@586 | 125 | |
nkeynes@586 | 126 | /** |
nkeynes@1187 | 127 | * Set the time of the next pending event within the current timeslice. |
nkeynes@1187 | 128 | */ |
nkeynes@1187 | 129 | void sh4_set_event_pending( uint32_t cycles ); |
nkeynes@1187 | 130 | |
nkeynes@1187 | 131 | /** |
nkeynes@1187 | 132 | * Handle an event that's due (note caller is responsible for ensuring that the |
nkeynes@1187 | 133 | * event is in fact due). |
nkeynes@1187 | 134 | */ |
nkeynes@1189 | 135 | void sh4_handle_pending_events(); |
nkeynes@1187 | 136 | |
nkeynes@1187 | 137 | /** |
nkeynes@586 | 138 | * Execute (using the emulator) a single instruction (in other words, perform a |
nkeynes@586 | 139 | * single-step operation). |
nkeynes@586 | 140 | */ |
nkeynes@586 | 141 | gboolean sh4_execute_instruction( void ); |
nkeynes@586 | 142 | |
nkeynes@586 | 143 | /* SH4 breakpoints */ |
nkeynes@586 | 144 | void sh4_set_breakpoint( uint32_t pc, breakpoint_type_t type ); |
nkeynes@586 | 145 | gboolean sh4_clear_breakpoint( uint32_t pc, breakpoint_type_t type ); |
nkeynes@586 | 146 | int sh4_get_breakpoint( uint32_t pc ); |
nkeynes@586 | 147 | |
nkeynes@1091 | 148 | /** Dump current SH4 core state (for crashdump purposes) */ |
nkeynes@1091 | 149 | void sh4_crashdump(); |
nkeynes@1091 | 150 | |
nkeynes@1094 | 151 | /** Dump a translated block with SH4 and target assembly side by side. */ |
nkeynes@1094 | 152 | void sh4_translate_dump_block( uint32_t pc ); |
nkeynes@1094 | 153 | |
nkeynes@586 | 154 | #ifdef __cplusplus |
nkeynes@586 | 155 | } |
nkeynes@586 | 156 | #endif |
nkeynes@586 | 157 | #endif /* !lxdream_sh4_H */ |
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