| nkeynes@1 | 1 | #include "dream.h"
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| nkeynes@1 | 2 | #include "video.h"
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| nkeynes@1 | 3 | #include "mem.h"
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| nkeynes@1 | 4 | #include "asic.h"
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| nkeynes@1 | 5 | #include "pvr2.h"
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| nkeynes@1 | 6 | #define MMIO_IMPL
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| nkeynes@1 | 7 | #include "pvr2.h"
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| nkeynes@1 | 8 |
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| nkeynes@1 | 9 | char *video_base;
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| nkeynes@1 | 10 |
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| nkeynes@1 | 11 | void pvr2_init( void )
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| nkeynes@1 | 12 | {
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| nkeynes@1 | 13 | register_io_region( &mmio_region_PVR2 );
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| nkeynes@1 | 14 | video_base = mem_get_region_by_name( MEM_REGION_VIDEO );
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| nkeynes@1 | 15 | }
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| nkeynes@1 | 16 |
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| nkeynes@1 | 17 | uint32_t vid_stride, vid_lpf, vid_ppl, vid_hres, vid_vres, vid_col;
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| nkeynes@1 | 18 | int interlaced, bChanged = 1, bEnabled = 0, vid_size = 0;
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| nkeynes@1 | 19 | char *frame_start; /* current video start address (in real memory) */
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| nkeynes@1 | 20 |
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| nkeynes@1 | 21 | /*
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| nkeynes@1 | 22 | * Display the next frame, copying the current contents of video ram to
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| nkeynes@1 | 23 | * the window. If the video configuration has changed, first recompute the
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| nkeynes@1 | 24 | * new frame size/depth.
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| nkeynes@1 | 25 | */
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| nkeynes@1 | 26 | void pvr2_next_frame( void )
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| nkeynes@1 | 27 | {
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| nkeynes@1 | 28 | if( bChanged ) {
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| nkeynes@1 | 29 | int dispsize = MMIO_READ( PVR2, DISPSIZE );
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| nkeynes@1 | 30 | int dispmode = MMIO_READ( PVR2, DISPMODE );
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| nkeynes@1 | 31 | int vidcfg = MMIO_READ( PVR2, VIDCFG );
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| nkeynes@1 | 32 | vid_stride = ((dispsize & DISPSIZE_MODULO) >> 20) - 1;
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| nkeynes@1 | 33 | vid_lpf = ((dispsize & DISPSIZE_LPF) >> 10) + 1;
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| nkeynes@1 | 34 | vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1;
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| nkeynes@1 | 35 | vid_col = (dispmode & DISPMODE_COL);
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| nkeynes@1 | 36 | frame_start = video_base + MMIO_READ( PVR2, DISPADDR1 );
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| nkeynes@1 | 37 | interlaced = (vidcfg & VIDCFG_I ? 1 : 0);
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| nkeynes@1 | 38 | bEnabled = (dispmode & DISPMODE_DE) && (vidcfg & VIDCFG_VO ) ? 1 : 0;
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| nkeynes@1 | 39 | vid_size = (vid_ppl * vid_lpf) << (interlaced ? 3 : 2);
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| nkeynes@1 | 40 | vid_hres = vid_ppl;
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| nkeynes@1 | 41 | vid_vres = vid_lpf;
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| nkeynes@1 | 42 | if( interlaced ) vid_vres <<= 1;
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| nkeynes@1 | 43 | switch( vid_col ) {
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| nkeynes@1 | 44 | case MODE_RGB15:
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| nkeynes@1 | 45 | case MODE_RGB16: vid_hres <<= 1; break;
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| nkeynes@1 | 46 | case MODE_RGB24: vid_hres *= 3; break;
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| nkeynes@1 | 47 | case MODE_RGB32: vid_hres <<= 2; break;
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| nkeynes@1 | 48 | }
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| nkeynes@1 | 49 | vid_hres >>= 2;
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| nkeynes@1 | 50 | video_update_size( vid_hres, vid_vres, vid_col );
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| nkeynes@1 | 51 | bChanged = 0;
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| nkeynes@1 | 52 | }
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| nkeynes@1 | 53 | if( bEnabled ) {
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| nkeynes@1 | 54 | /* Assume bit depths match for now... */
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| nkeynes@1 | 55 | memcpy( video_data, frame_start, vid_size );
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| nkeynes@1 | 56 | } else {
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| nkeynes@1 | 57 | memset( video_data, 0, vid_size );
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| nkeynes@1 | 58 | }
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| nkeynes@1 | 59 | video_update_frame();
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| nkeynes@1 | 60 | asic_event( EVENT_SCANLINE1 );
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| nkeynes@1 | 61 | asic_event( EVENT_SCANLINE2 );
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| nkeynes@1 | 62 | asic_event( EVENT_RETRACE );
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| nkeynes@1 | 63 | }
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| nkeynes@1 | 64 |
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| nkeynes@1 | 65 | void mmio_region_PVR2_write( uint32_t reg, uint32_t val )
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| nkeynes@1 | 66 | {
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| nkeynes@1 | 67 | if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */
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| nkeynes@1 | 68 | MMIO_WRITE( PVR2, reg, val );
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| nkeynes@1 | 69 | /* I don't want to hear about these */
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| nkeynes@1 | 70 | return;
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| nkeynes@1 | 71 | }
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| nkeynes@1 | 72 |
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| nkeynes@1 | 73 | INFO( "PVR2 write to %08X <= %08X [%s: %s]", reg, val,
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| nkeynes@1 | 74 | MMIO_REGID(PVR2,reg), MMIO_REGDESC(PVR2,reg) );
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| nkeynes@1 | 75 |
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| nkeynes@1 | 76 | switch(reg) {
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| nkeynes@1 | 77 | case DISPSIZE: bChanged = 1;
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| nkeynes@1 | 78 | case DISPMODE: bChanged = 1;
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| nkeynes@1 | 79 | case DISPADDR1: bChanged = 1;
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| nkeynes@1 | 80 | case DISPADDR2: bChanged = 1;
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| nkeynes@1 | 81 | case VIDCFG: bChanged = 1;
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| nkeynes@1 | 82 | break;
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| nkeynes@1 | 83 |
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| nkeynes@1 | 84 | }
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| nkeynes@1 | 85 | MMIO_WRITE( PVR2, reg, val );
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| nkeynes@1 | 86 | }
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| nkeynes@1 | 87 |
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| nkeynes@1 | 88 | MMIO_REGION_READ_FN( PVR2, reg )
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| nkeynes@1 | 89 | {
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| nkeynes@1 | 90 | switch( reg ) {
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| nkeynes@1 | 91 | case BEAMPOS:
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| nkeynes@2 | 92 | return sh4r.icount&0x20 ? 0x2000 : 1;
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| nkeynes@1 | 93 | default:
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| nkeynes@1 | 94 | return MMIO_READ( PVR2, reg );
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| nkeynes@1 | 95 | }
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| nkeynes@1 | 96 | }
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lxdream 0.9.1