Search
lxdream.org :: lxdream/src/sh4/sh4mmio.c
lxdream 0.9.1
released Jun 29
Download Now
filename src/sh4/sh4mmio.c
changeset 830:73637b9624e4
prev736:a02d1475ccfd
next929:fd8cb0c82f5f
author nkeynes
date Mon Aug 25 11:29:24 2008 +0000 (15 years ago)
permissions -rw-r--r--
last change Start unstubifying the UBC module
file annotate diff log raw
nkeynes@30
     1
/**
nkeynes@561
     2
 * $Id$
nkeynes@30
     3
 * 
nkeynes@30
     4
 * Miscellaneous and not-really-implemented SH4 peripheral modules. Also
nkeynes@30
     5
 * responsible for including the IMPL side of the SH4 MMIO pages.
nkeynes@30
     6
 * Most of these will eventually be split off into their own files.
nkeynes@30
     7
 *
nkeynes@30
     8
 * Copyright (c) 2005 Nathan Keynes.
nkeynes@30
     9
 *
nkeynes@30
    10
 * This program is free software; you can redistribute it and/or modify
nkeynes@30
    11
 * it under the terms of the GNU General Public License as published by
nkeynes@30
    12
 * the Free Software Foundation; either version 2 of the License, or
nkeynes@30
    13
 * (at your option) any later version.
nkeynes@30
    14
 *
nkeynes@30
    15
 * This program is distributed in the hope that it will be useful,
nkeynes@30
    16
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@30
    17
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
nkeynes@30
    18
 * GNU General Public License for more details.
nkeynes@30
    19
 */
nkeynes@35
    20
#define MODULE sh4_module
nkeynes@30
    21
nkeynes@1
    22
#include "dream.h"
nkeynes@428
    23
#include "dreamcast.h"
nkeynes@1
    24
#include "mem.h"
nkeynes@19
    25
#include "clock.h"
nkeynes@428
    26
#include "sh4/sh4core.h"
nkeynes@428
    27
#include "sh4/sh4mmio.h"
nkeynes@1
    28
#define MMIO_IMPL
nkeynes@428
    29
#include "sh4/sh4mmio.h"
nkeynes@1
    30
nkeynes@1
    31
/********************************* BSC *************************************/
nkeynes@1
    32
nkeynes@323
    33
uint32_t bsc_input = 0x0300;
nkeynes@1
    34
nkeynes@323
    35
uint16_t bsc_read_pdtra()
nkeynes@1
    36
{
nkeynes@323
    37
    int i;
nkeynes@323
    38
    uint32_t pctra = MMIO_READ( BSC, PCTRA );
nkeynes@323
    39
    uint16_t output = MMIO_READ( BSC, PDTRA );
nkeynes@323
    40
    uint16_t input_mask = 0, output_mask = 0;
nkeynes@323
    41
    for( i=0; i<16; i++ ) {
nkeynes@736
    42
        int bits = (pctra >> (i<<1)) & 0x03;
nkeynes@736
    43
        if( bits == 2 ) input_mask |= (1<<i);
nkeynes@736
    44
        else if( bits != 0 ) output_mask |= (1<<i);
nkeynes@323
    45
    }
nkeynes@323
    46
nkeynes@323
    47
    /* ??? */
nkeynes@323
    48
    if( ((output | (~output_mask)) & 0x03) == 3 ) {
nkeynes@323
    49
        output |= 0x03;
nkeynes@1
    50
    } else {
nkeynes@323
    51
        output &= ~0x03;
nkeynes@1
    52
    }
nkeynes@323
    53
nkeynes@323
    54
    return (bsc_input & input_mask) | output;
nkeynes@1
    55
}
nkeynes@1
    56
nkeynes@323
    57
uint32_t bsc_read_pdtrb()
nkeynes@1
    58
{
nkeynes@1
    59
    int i;
nkeynes@323
    60
    uint32_t pctrb = MMIO_READ( BSC, PCTRB );
nkeynes@323
    61
    uint16_t output = MMIO_READ( BSC, PDTRB );
nkeynes@323
    62
    uint16_t input_mask = 0, output_mask = 0;
nkeynes@323
    63
    for( i=0; i<4; i++ ) {
nkeynes@736
    64
        int bits = (pctrb >> (i<<1)) & 0x03;
nkeynes@736
    65
        if( bits == 2 ) input_mask |= (1<<i);
nkeynes@736
    66
        else if( bits != 0 ) output_mask |= (1<<i);
nkeynes@1
    67
    }
nkeynes@323
    68
nkeynes@323
    69
    return ((bsc_input>>16) & input_mask) | output;
nkeynes@323
    70
nkeynes@1
    71
}
nkeynes@1
    72
nkeynes@336
    73
MMIO_REGION_WRITE_DEFFN(BSC)
nkeynes@323
    74
nkeynes@1
    75
int32_t mmio_region_BSC_read( uint32_t reg )
nkeynes@1
    76
{
nkeynes@1
    77
    int32_t val;
nkeynes@1
    78
    switch( reg ) {
nkeynes@736
    79
    case PDTRA:
nkeynes@736
    80
        val = bsc_read_pdtra();
nkeynes@736
    81
        break;
nkeynes@736
    82
    case PDTRB:
nkeynes@736
    83
        val = bsc_read_pdtrb();
nkeynes@736
    84
        break;
nkeynes@736
    85
    default:
nkeynes@736
    86
        val = MMIO_READ( BSC, reg );
nkeynes@1
    87
    }
nkeynes@1
    88
    return val;
nkeynes@1
    89
}
nkeynes@1
    90
nkeynes@1
    91
/********************************* UBC *************************************/
nkeynes@1
    92
nkeynes@830
    93
int32_t mmio_region_UBC_read( uint32_t reg )
nkeynes@830
    94
{
nkeynes@830
    95
    return MMIO_READ( UBC, reg );
nkeynes@830
    96
}
nkeynes@830
    97
nkeynes@830
    98
void mmio_region_UBC_write( uint32_t reg, uint32_t val )
nkeynes@830
    99
{
nkeynes@830
   100
    switch( reg ) {
nkeynes@830
   101
    case BAMRA:
nkeynes@830
   102
    case BAMRB:
nkeynes@830
   103
        val &= 0x0F;
nkeynes@830
   104
        break;
nkeynes@830
   105
    case BBRA:
nkeynes@830
   106
    case BBRB:
nkeynes@830
   107
        val &= 0x07F;
nkeynes@830
   108
        if( val != 0 ) { 
nkeynes@830
   109
            WARN( "UBC not implemented" );
nkeynes@830
   110
        }
nkeynes@830
   111
        break;
nkeynes@830
   112
    case BRCR:
nkeynes@830
   113
        val &= 0xC4C9;
nkeynes@830
   114
        break;
nkeynes@830
   115
    }
nkeynes@830
   116
    MMIO_WRITE( UBC, reg, val );
nkeynes@830
   117
}
nkeynes@1
   118
nkeynes@1
   119
nkeynes@1
   120
/********************************** SCI *************************************/
nkeynes@1
   121
nkeynes@1
   122
MMIO_REGION_STUBFNS( SCI )
nkeynes@1
   123
.