nkeynes@1265 | 1 | /* Instruction printing code for the ARM
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nkeynes@1265 | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
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nkeynes@1265 | 3 | 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
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nkeynes@1265 | 4 | Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
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nkeynes@1265 | 5 | Modification by James G. Smith (jsmith@cygnus.co.uk)
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nkeynes@1265 | 6 |
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nkeynes@1265 | 7 | This file is part of libopcodes.
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nkeynes@1265 | 8 |
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nkeynes@1265 | 9 | This library is free software; you can redistribute it and/or modify
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nkeynes@1265 | 10 | it under the terms of the GNU General Public License as published by
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nkeynes@1265 | 11 | the Free Software Foundation; either version 3 of the License, or
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nkeynes@1265 | 12 | (at your option) any later version.
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nkeynes@1265 | 13 |
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nkeynes@1265 | 14 | It is distributed in the hope that it will be useful, but WITHOUT
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nkeynes@1265 | 15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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nkeynes@1265 | 16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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nkeynes@1265 | 17 | License for more details.
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nkeynes@1265 | 18 |
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nkeynes@1265 | 19 | You should have received a copy of the GNU General Public License
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nkeynes@1265 | 20 | along with this program; if not, write to the Free Software
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nkeynes@1265 | 21 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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nkeynes@1265 | 22 | MA 02110-1301, USA. */
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nkeynes@1265 | 23 |
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nkeynes@1265 | 24 | #include "sysdep.h"
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nkeynes@1265 | 25 |
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nkeynes@1265 | 26 | #include "dis-asm.h"
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nkeynes@1265 | 27 | #include "arm.h"
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nkeynes@1265 | 28 | #include "gettext.h"
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nkeynes@1265 | 29 | #include "safe-ctype.h"
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nkeynes@1265 | 30 | #include "floatformat.h"
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nkeynes@1265 | 31 |
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nkeynes@1265 | 32 | /* FIXME: Belongs in global header. */
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nkeynes@1265 | 33 | #ifndef strneq
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nkeynes@1265 | 34 | #define strneq(a,b,n) (strncmp ((a), (b), (n)) == 0)
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nkeynes@1265 | 35 | #endif
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nkeynes@1265 | 36 |
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nkeynes@1265 | 37 | #define CONST_STRNEQ(STR1,STR2) (strncmp ((STR1), (STR2), sizeof (STR2) - 1) == 0)
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nkeynes@1265 | 38 |
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nkeynes@1265 | 39 | #ifndef NUM_ELEM
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nkeynes@1265 | 40 | #define NUM_ELEM(a) (sizeof (a) / sizeof (a)[0])
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nkeynes@1265 | 41 | #endif
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nkeynes@1265 | 42 |
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nkeynes@1265 | 43 | /* Cached mapping symbol state. */
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nkeynes@1265 | 44 | enum map_type
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nkeynes@1265 | 45 | {
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nkeynes@1265 | 46 | MAP_ARM,
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nkeynes@1265 | 47 | MAP_THUMB,
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nkeynes@1265 | 48 | MAP_DATA
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nkeynes@1265 | 49 | };
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nkeynes@1265 | 50 |
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nkeynes@1265 | 51 | struct arm_private_data
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nkeynes@1265 | 52 | {
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nkeynes@1265 | 53 | /* The features to use when disassembling optional instructions. */
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nkeynes@1265 | 54 | arm_feature_set features;
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nkeynes@1265 | 55 |
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nkeynes@1265 | 56 | /* Whether any mapping symbols are present in the provided symbol
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nkeynes@1265 | 57 | table. -1 if we do not know yet, otherwise 0 or 1. */
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nkeynes@1265 | 58 | int has_mapping_symbols;
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nkeynes@1265 | 59 |
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nkeynes@1265 | 60 | /* Track the last type (although this doesn't seem to be useful) */
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nkeynes@1265 | 61 | enum map_type last_type;
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nkeynes@1265 | 62 |
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nkeynes@1265 | 63 | /* Tracking symbol table information */
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nkeynes@1265 | 64 | int last_mapping_sym;
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nkeynes@1265 | 65 | bfd_vma last_mapping_addr;
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nkeynes@1265 | 66 | };
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nkeynes@1265 | 67 |
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nkeynes@1265 | 68 | struct opcode32
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nkeynes@1265 | 69 | {
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nkeynes@1265 | 70 | unsigned long arch; /* Architecture defining this insn. */
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nkeynes@1265 | 71 | unsigned long value; /* If arch == 0 then value is a sentinel. */
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nkeynes@1265 | 72 | unsigned long mask; /* Recognise insn if (op & mask) == value. */
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nkeynes@1265 | 73 | const char * assembler; /* How to disassemble this insn. */
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nkeynes@1265 | 74 | };
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nkeynes@1265 | 75 |
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nkeynes@1265 | 76 | struct opcode16
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nkeynes@1265 | 77 | {
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nkeynes@1265 | 78 | unsigned long arch; /* Architecture defining this insn. */
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nkeynes@1265 | 79 | unsigned short value, mask; /* Recognise insn if (op & mask) == value. */
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nkeynes@1265 | 80 | const char *assembler; /* How to disassemble this insn. */
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nkeynes@1265 | 81 | };
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nkeynes@1265 | 82 |
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nkeynes@1265 | 83 | /* print_insn_coprocessor recognizes the following format control codes:
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nkeynes@1265 | 84 |
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nkeynes@1265 | 85 | %% %
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nkeynes@1265 | 86 |
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nkeynes@1265 | 87 | %c print condition code (always bits 28-31 in ARM mode)
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nkeynes@1265 | 88 | %q print shifter argument
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nkeynes@1265 | 89 | %u print condition code (unconditional in ARM mode)
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nkeynes@1265 | 90 | %A print address for ldc/stc/ldf/stf instruction
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nkeynes@1265 | 91 | %B print vstm/vldm register list
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nkeynes@1265 | 92 | %I print cirrus signed shift immediate: bits 0..3|4..6
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nkeynes@1265 | 93 | %F print the COUNT field of a LFM/SFM instruction.
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nkeynes@1265 | 94 | %P print floating point precision in arithmetic insn
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nkeynes@1265 | 95 | %Q print floating point precision in ldf/stf insn
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nkeynes@1265 | 96 | %R print floating point rounding mode
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nkeynes@1265 | 97 |
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nkeynes@1265 | 98 | %<bitfield>r print as an ARM register
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nkeynes@1265 | 99 | %<bitfield>R as %<>r but r15 is UNPREDICTABLE
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nkeynes@1265 | 100 | %<bitfield>ru as %<>r but each u register must be unique.
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nkeynes@1265 | 101 | %<bitfield>d print the bitfield in decimal
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nkeynes@1265 | 102 | %<bitfield>k print immediate for VFPv3 conversion instruction
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nkeynes@1265 | 103 | %<bitfield>x print the bitfield in hex
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nkeynes@1265 | 104 | %<bitfield>X print the bitfield as 1 hex digit without leading "0x"
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nkeynes@1265 | 105 | %<bitfield>f print a floating point constant if >7 else a
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nkeynes@1265 | 106 | floating point register
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nkeynes@1265 | 107 | %<bitfield>w print as an iWMMXt width field - [bhwd]ss/us
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nkeynes@1265 | 108 | %<bitfield>g print as an iWMMXt 64-bit register
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nkeynes@1265 | 109 | %<bitfield>G print as an iWMMXt general purpose or control register
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nkeynes@1265 | 110 | %<bitfield>D print as a NEON D register
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nkeynes@1265 | 111 | %<bitfield>Q print as a NEON Q register
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nkeynes@1265 | 112 |
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nkeynes@1265 | 113 | %y<code> print a single precision VFP reg.
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nkeynes@1265 | 114 | Codes: 0=>Sm, 1=>Sd, 2=>Sn, 3=>multi-list, 4=>Sm pair
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nkeynes@1265 | 115 | %z<code> print a double precision VFP reg
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nkeynes@1265 | 116 | Codes: 0=>Dm, 1=>Dd, 2=>Dn, 3=>multi-list
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nkeynes@1265 | 117 |
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nkeynes@1265 | 118 | %<bitfield>'c print specified char iff bitfield is all ones
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nkeynes@1265 | 119 | %<bitfield>`c print specified char iff bitfield is all zeroes
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nkeynes@1265 | 120 | %<bitfield>?ab... select from array of values in big endian order
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nkeynes@1265 | 121 |
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nkeynes@1265 | 122 | %L print as an iWMMXt N/M width field.
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nkeynes@1265 | 123 | %Z print the Immediate of a WSHUFH instruction.
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nkeynes@1265 | 124 | %l like 'A' except use byte offsets for 'B' & 'H'
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nkeynes@1265 | 125 | versions.
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nkeynes@1265 | 126 | %i print 5-bit immediate in bits 8,3..0
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nkeynes@1265 | 127 | (print "32" when 0)
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nkeynes@1265 | 128 | %r print register offset address for wldt/wstr instruction. */
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nkeynes@1265 | 129 |
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nkeynes@1265 | 130 | enum opcode_sentinel_enum
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nkeynes@1265 | 131 | {
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nkeynes@1265 | 132 | SENTINEL_IWMMXT_START = 1,
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nkeynes@1265 | 133 | SENTINEL_IWMMXT_END,
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nkeynes@1265 | 134 | SENTINEL_GENERIC_START
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nkeynes@1265 | 135 | } opcode_sentinels;
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nkeynes@1265 | 136 |
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nkeynes@1265 | 137 | #define UNDEFINED_INSTRUCTION "\t\t; <UNDEFINED> instruction: %0-31x"
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nkeynes@1265 | 138 | #define UNPREDICTABLE_INSTRUCTION "\t; <UNPREDICTABLE>"
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nkeynes@1265 | 139 |
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nkeynes@1265 | 140 | /* Common coprocessor opcodes shared between Arm and Thumb-2. */
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nkeynes@1265 | 141 |
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nkeynes@1265 | 142 | static const struct opcode32 coprocessor_opcodes[] =
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nkeynes@1265 | 143 | {
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nkeynes@1265 | 144 | /* XScale instructions. */
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nkeynes@1265 | 145 | {ARM_CEXT_XSCALE, 0x0e200010, 0x0fff0ff0, "mia%c\tacc0, %0-3r, %12-15r"},
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nkeynes@1265 | 146 | {ARM_CEXT_XSCALE, 0x0e280010, 0x0fff0ff0, "miaph%c\tacc0, %0-3r, %12-15r"},
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nkeynes@1265 | 147 | {ARM_CEXT_XSCALE, 0x0e2c0010, 0x0ffc0ff0, "mia%17'T%17`B%16'T%16`B%c\tacc0, %0-3r, %12-15r"},
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nkeynes@1265 | 148 | {ARM_CEXT_XSCALE, 0x0c400000, 0x0ff00fff, "mar%c\tacc0, %12-15r, %16-19r"},
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nkeynes@1265 | 149 | {ARM_CEXT_XSCALE, 0x0c500000, 0x0ff00fff, "mra%c\t%12-15r, %16-19r, acc0"},
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nkeynes@1265 | 150 |
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nkeynes@1265 | 151 | /* Intel Wireless MMX technology instructions. */
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nkeynes@1265 | 152 | { 0, SENTINEL_IWMMXT_START, 0, "" },
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nkeynes@1265 | 153 | {ARM_CEXT_IWMMXT, 0x0e130130, 0x0f3f0fff, "tandc%22-23w%c\t%12-15r"},
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nkeynes@1265 | 154 | {ARM_CEXT_XSCALE, 0x0e400010, 0x0ff00f3f, "tbcst%6-7w%c\t%16-19g, %12-15r"},
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nkeynes@1265 | 155 | {ARM_CEXT_XSCALE, 0x0e130170, 0x0f3f0ff8, "textrc%22-23w%c\t%12-15r, #%0-2d"},
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nkeynes@1265 | 156 | {ARM_CEXT_XSCALE, 0x0e100070, 0x0f300ff0, "textrm%3?su%22-23w%c\t%12-15r, %16-19g, #%0-2d"},
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nkeynes@1265 | 157 | {ARM_CEXT_XSCALE, 0x0e600010, 0x0ff00f38, "tinsr%6-7w%c\t%16-19g, %12-15r, #%0-2d"},
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nkeynes@1265 | 158 | {ARM_CEXT_XSCALE, 0x0e000110, 0x0ff00fff, "tmcr%c\t%16-19G, %12-15r"},
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nkeynes@1265 | 159 | {ARM_CEXT_XSCALE, 0x0c400000, 0x0ff00ff0, "tmcrr%c\t%0-3g, %12-15r, %16-19r"},
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nkeynes@1265 | 160 | {ARM_CEXT_XSCALE, 0x0e2c0010, 0x0ffc0e10, "tmia%17?tb%16?tb%c\t%5-8g, %0-3r, %12-15r"},
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nkeynes@1265 | 161 | {ARM_CEXT_XSCALE, 0x0e200010, 0x0fff0e10, "tmia%c\t%5-8g, %0-3r, %12-15r"},
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nkeynes@1265 | 162 | {ARM_CEXT_XSCALE, 0x0e280010, 0x0fff0e10, "tmiaph%c\t%5-8g, %0-3r, %12-15r"},
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nkeynes@1265 | 163 | {ARM_CEXT_XSCALE, 0x0e100030, 0x0f300fff, "tmovmsk%22-23w%c\t%12-15r, %16-19g"},
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nkeynes@1265 | 164 | {ARM_CEXT_XSCALE, 0x0e100110, 0x0ff00ff0, "tmrc%c\t%12-15r, %16-19G"},
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nkeynes@1265 | 165 | {ARM_CEXT_XSCALE, 0x0c500000, 0x0ff00ff0, "tmrrc%c\t%12-15r, %16-19r, %0-3g"},
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nkeynes@1265 | 166 | {ARM_CEXT_XSCALE, 0x0e130150, 0x0f3f0fff, "torc%22-23w%c\t%12-15r"},
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nkeynes@1265 | 167 | {ARM_CEXT_XSCALE, 0x0e120190, 0x0f3f0fff, "torvsc%22-23w%c\t%12-15r"},
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nkeynes@1265 | 168 | {ARM_CEXT_XSCALE, 0x0e2001c0, 0x0f300fff, "wabs%22-23w%c\t%12-15g, %16-19g"},
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nkeynes@1265 | 169 | {ARM_CEXT_XSCALE, 0x0e0001c0, 0x0f300fff, "wacc%22-23w%c\t%12-15g, %16-19g"},
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nkeynes@1265 | 170 | {ARM_CEXT_XSCALE, 0x0e000180, 0x0f000ff0, "wadd%20-23w%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 171 | {ARM_CEXT_XSCALE, 0x0e2001a0, 0x0fb00ff0, "waddbhus%22?ml%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 172 | {ARM_CEXT_XSCALE, 0x0ea001a0, 0x0ff00ff0, "waddsubhx%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 173 | {ARM_CEXT_XSCALE, 0x0e000020, 0x0f800ff0, "waligni%c\t%12-15g, %16-19g, %0-3g, #%20-22d"},
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nkeynes@1265 | 174 | {ARM_CEXT_XSCALE, 0x0e800020, 0x0fc00ff0, "walignr%20-21d%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 175 | {ARM_CEXT_XSCALE, 0x0e200000, 0x0fe00ff0, "wand%20'n%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 176 | {ARM_CEXT_XSCALE, 0x0e800000, 0x0fa00ff0, "wavg2%22?hb%20'r%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 177 | {ARM_CEXT_XSCALE, 0x0e400000, 0x0fe00ff0, "wavg4%20'r%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 178 | {ARM_CEXT_XSCALE, 0x0e000060, 0x0f300ff0, "wcmpeq%22-23w%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 179 | {ARM_CEXT_XSCALE, 0x0e100060, 0x0f100ff0, "wcmpgt%21?su%22-23w%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 180 | {ARM_CEXT_XSCALE, 0xfc500100, 0xfe500f00, "wldrd\t%12-15g, %r"},
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nkeynes@1265 | 181 | {ARM_CEXT_XSCALE, 0xfc100100, 0xfe500f00, "wldrw\t%12-15G, %A"},
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nkeynes@1265 | 182 | {ARM_CEXT_XSCALE, 0x0c100000, 0x0e100e00, "wldr%L%c\t%12-15g, %l"},
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nkeynes@1265 | 183 | {ARM_CEXT_XSCALE, 0x0e400100, 0x0fc00ff0, "wmac%21?su%20'z%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 184 | {ARM_CEXT_XSCALE, 0x0e800100, 0x0fc00ff0, "wmadd%21?su%20'x%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 185 | {ARM_CEXT_XSCALE, 0x0ec00100, 0x0fd00ff0, "wmadd%21?sun%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 186 | {ARM_CEXT_XSCALE, 0x0e000160, 0x0f100ff0, "wmax%21?su%22-23w%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 187 | {ARM_CEXT_XSCALE, 0x0e000080, 0x0f100fe0, "wmerge%c\t%12-15g, %16-19g, %0-3g, #%21-23d"},
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nkeynes@1265 | 188 | {ARM_CEXT_XSCALE, 0x0e0000a0, 0x0f800ff0, "wmia%21?tb%20?tb%22'n%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 189 | {ARM_CEXT_XSCALE, 0x0e800120, 0x0f800ff0, "wmiaw%21?tb%20?tb%22'n%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 190 | {ARM_CEXT_XSCALE, 0x0e100160, 0x0f100ff0, "wmin%21?su%22-23w%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 191 | {ARM_CEXT_XSCALE, 0x0e000100, 0x0fc00ff0, "wmul%21?su%20?ml%23'r%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 192 | {ARM_CEXT_XSCALE, 0x0ed00100, 0x0fd00ff0, "wmul%21?sumr%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 193 | {ARM_CEXT_XSCALE, 0x0ee000c0, 0x0fe00ff0, "wmulwsm%20`r%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 194 | {ARM_CEXT_XSCALE, 0x0ec000c0, 0x0fe00ff0, "wmulwum%20`r%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 195 | {ARM_CEXT_XSCALE, 0x0eb000c0, 0x0ff00ff0, "wmulwl%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 196 | {ARM_CEXT_XSCALE, 0x0e8000a0, 0x0f800ff0, "wqmia%21?tb%20?tb%22'n%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 197 | {ARM_CEXT_XSCALE, 0x0e100080, 0x0fd00ff0, "wqmulm%21'r%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 198 | {ARM_CEXT_XSCALE, 0x0ec000e0, 0x0fd00ff0, "wqmulwm%21'r%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 199 | {ARM_CEXT_XSCALE, 0x0e000000, 0x0ff00ff0, "wor%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 200 | {ARM_CEXT_XSCALE, 0x0e000080, 0x0f000ff0, "wpack%20-23w%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 201 | {ARM_CEXT_XSCALE, 0xfe300040, 0xff300ef0, "wror%22-23w\t%12-15g, %16-19g, #%i"},
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nkeynes@1265 | 202 | {ARM_CEXT_XSCALE, 0x0e300040, 0x0f300ff0, "wror%22-23w%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 203 | {ARM_CEXT_XSCALE, 0x0e300140, 0x0f300ff0, "wror%22-23wg%c\t%12-15g, %16-19g, %0-3G"},
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nkeynes@1265 | 204 | {ARM_CEXT_XSCALE, 0x0e000120, 0x0fa00ff0, "wsad%22?hb%20'z%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 205 | {ARM_CEXT_XSCALE, 0x0e0001e0, 0x0f000ff0, "wshufh%c\t%12-15g, %16-19g, #%Z"},
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nkeynes@1265 | 206 | {ARM_CEXT_XSCALE, 0xfe100040, 0xff300ef0, "wsll%22-23w\t%12-15g, %16-19g, #%i"},
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nkeynes@1265 | 207 | {ARM_CEXT_XSCALE, 0x0e100040, 0x0f300ff0, "wsll%22-23w%8'g%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 208 | {ARM_CEXT_XSCALE, 0x0e100148, 0x0f300ffc, "wsll%22-23w%8'g%c\t%12-15g, %16-19g, %0-3G"},
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nkeynes@1265 | 209 | {ARM_CEXT_XSCALE, 0xfe000040, 0xff300ef0, "wsra%22-23w\t%12-15g, %16-19g, #%i"},
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nkeynes@1265 | 210 | {ARM_CEXT_XSCALE, 0x0e000040, 0x0f300ff0, "wsra%22-23w%8'g%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 211 | {ARM_CEXT_XSCALE, 0x0e000148, 0x0f300ffc, "wsra%22-23w%8'g%c\t%12-15g, %16-19g, %0-3G"},
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nkeynes@1265 | 212 | {ARM_CEXT_XSCALE, 0xfe200040, 0xff300ef0, "wsrl%22-23w\t%12-15g, %16-19g, #%i"},
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nkeynes@1265 | 213 | {ARM_CEXT_XSCALE, 0x0e200040, 0x0f300ff0, "wsrl%22-23w%8'g%c\t%12-15g, %16-19g, %0-3g"},
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nkeynes@1265 | 214 | {ARM_CEXT_XSCALE, 0x0e200148, 0x0f300ffc, "wsrl%22-23w%8'g%c\t%12-15g, %16-19g, %0-3G"},
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nkeynes@1265 | 215 | {ARM_CEXT_XSCALE, 0xfc400100, 0xfe500f00, "wstrd\t%12-15g, %r"},
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nkeynes@1265 | 216 | {ARM_CEXT_XSCALE, 0xfc000100, 0xfe500f00, "wstrw\t%12-15G, %A"},
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nkeynes@1265 | 217 | {ARM_CEXT_XSCALE, 0x0c000000, 0x0e100e00, "wstr%L%c\t%12-15g, %l"},
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nkeynes@1265 | 218 | {ARM_CEXT_XSCALE, 0x0e0001a0, 0x0f000ff0, "wsub%20-23w%c\t%12-15g, %16-19g, %0-3g"},
|
nkeynes@1265 | 219 | {ARM_CEXT_XSCALE, 0x0ed001c0, 0x0ff00ff0, "wsubaddhx%c\t%12-15g, %16-19g, %0-3g"},
|
nkeynes@1265 | 220 | {ARM_CEXT_XSCALE, 0x0e1001c0, 0x0f300ff0, "wabsdiff%22-23w%c\t%12-15g, %16-19g, %0-3g"},
|
nkeynes@1265 | 221 | {ARM_CEXT_XSCALE, 0x0e0000c0, 0x0fd00fff, "wunpckeh%21?sub%c\t%12-15g, %16-19g"},
|
nkeynes@1265 | 222 | {ARM_CEXT_XSCALE, 0x0e4000c0, 0x0fd00fff, "wunpckeh%21?suh%c\t%12-15g, %16-19g"},
|
nkeynes@1265 | 223 | {ARM_CEXT_XSCALE, 0x0e8000c0, 0x0fd00fff, "wunpckeh%21?suw%c\t%12-15g, %16-19g"},
|
nkeynes@1265 | 224 | {ARM_CEXT_XSCALE, 0x0e0000e0, 0x0f100fff, "wunpckel%21?su%22-23w%c\t%12-15g, %16-19g"},
|
nkeynes@1265 | 225 | {ARM_CEXT_XSCALE, 0x0e1000c0, 0x0f300ff0, "wunpckih%22-23w%c\t%12-15g, %16-19g, %0-3g"},
|
nkeynes@1265 | 226 | {ARM_CEXT_XSCALE, 0x0e1000e0, 0x0f300ff0, "wunpckil%22-23w%c\t%12-15g, %16-19g, %0-3g"},
|
nkeynes@1265 | 227 | {ARM_CEXT_XSCALE, 0x0e100000, 0x0ff00ff0, "wxor%c\t%12-15g, %16-19g, %0-3g"},
|
nkeynes@1265 | 228 | { 0, SENTINEL_IWMMXT_END, 0, "" },
|
nkeynes@1265 | 229 |
|
nkeynes@1265 | 230 | /* Floating point coprocessor (FPA) instructions. */
|
nkeynes@1265 | 231 | {FPU_FPA_EXT_V1, 0x0e000100, 0x0ff08f10, "adf%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 232 | {FPU_FPA_EXT_V1, 0x0e100100, 0x0ff08f10, "muf%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 233 | {FPU_FPA_EXT_V1, 0x0e200100, 0x0ff08f10, "suf%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 234 | {FPU_FPA_EXT_V1, 0x0e300100, 0x0ff08f10, "rsf%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 235 | {FPU_FPA_EXT_V1, 0x0e400100, 0x0ff08f10, "dvf%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 236 | {FPU_FPA_EXT_V1, 0x0e500100, 0x0ff08f10, "rdf%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 237 | {FPU_FPA_EXT_V1, 0x0e600100, 0x0ff08f10, "pow%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 238 | {FPU_FPA_EXT_V1, 0x0e700100, 0x0ff08f10, "rpw%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 239 | {FPU_FPA_EXT_V1, 0x0e800100, 0x0ff08f10, "rmf%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 240 | {FPU_FPA_EXT_V1, 0x0e900100, 0x0ff08f10, "fml%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 241 | {FPU_FPA_EXT_V1, 0x0ea00100, 0x0ff08f10, "fdv%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 242 | {FPU_FPA_EXT_V1, 0x0eb00100, 0x0ff08f10, "frd%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 243 | {FPU_FPA_EXT_V1, 0x0ec00100, 0x0ff08f10, "pol%c%P%R\t%12-14f, %16-18f, %0-3f"},
|
nkeynes@1265 | 244 | {FPU_FPA_EXT_V1, 0x0e008100, 0x0ff08f10, "mvf%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 245 | {FPU_FPA_EXT_V1, 0x0e108100, 0x0ff08f10, "mnf%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 246 | {FPU_FPA_EXT_V1, 0x0e208100, 0x0ff08f10, "abs%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 247 | {FPU_FPA_EXT_V1, 0x0e308100, 0x0ff08f10, "rnd%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 248 | {FPU_FPA_EXT_V1, 0x0e408100, 0x0ff08f10, "sqt%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 249 | {FPU_FPA_EXT_V1, 0x0e508100, 0x0ff08f10, "log%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 250 | {FPU_FPA_EXT_V1, 0x0e608100, 0x0ff08f10, "lgn%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 251 | {FPU_FPA_EXT_V1, 0x0e708100, 0x0ff08f10, "exp%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 252 | {FPU_FPA_EXT_V1, 0x0e808100, 0x0ff08f10, "sin%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 253 | {FPU_FPA_EXT_V1, 0x0e908100, 0x0ff08f10, "cos%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 254 | {FPU_FPA_EXT_V1, 0x0ea08100, 0x0ff08f10, "tan%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 255 | {FPU_FPA_EXT_V1, 0x0eb08100, 0x0ff08f10, "asn%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 256 | {FPU_FPA_EXT_V1, 0x0ec08100, 0x0ff08f10, "acs%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 257 | {FPU_FPA_EXT_V1, 0x0ed08100, 0x0ff08f10, "atn%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 258 | {FPU_FPA_EXT_V1, 0x0ee08100, 0x0ff08f10, "urd%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 259 | {FPU_FPA_EXT_V1, 0x0ef08100, 0x0ff08f10, "nrm%c%P%R\t%12-14f, %0-3f"},
|
nkeynes@1265 | 260 | {FPU_FPA_EXT_V1, 0x0e000110, 0x0ff00f1f, "flt%c%P%R\t%16-18f, %12-15r"},
|
nkeynes@1265 | 261 | {FPU_FPA_EXT_V1, 0x0e100110, 0x0fff0f98, "fix%c%R\t%12-15r, %0-2f"},
|
nkeynes@1265 | 262 | {FPU_FPA_EXT_V1, 0x0e200110, 0x0fff0fff, "wfs%c\t%12-15r"},
|
nkeynes@1265 | 263 | {FPU_FPA_EXT_V1, 0x0e300110, 0x0fff0fff, "rfs%c\t%12-15r"},
|
nkeynes@1265 | 264 | {FPU_FPA_EXT_V1, 0x0e400110, 0x0fff0fff, "wfc%c\t%12-15r"},
|
nkeynes@1265 | 265 | {FPU_FPA_EXT_V1, 0x0e500110, 0x0fff0fff, "rfc%c\t%12-15r"},
|
nkeynes@1265 | 266 | {FPU_FPA_EXT_V1, 0x0e90f110, 0x0ff8fff0, "cmf%c\t%16-18f, %0-3f"},
|
nkeynes@1265 | 267 | {FPU_FPA_EXT_V1, 0x0eb0f110, 0x0ff8fff0, "cnf%c\t%16-18f, %0-3f"},
|
nkeynes@1265 | 268 | {FPU_FPA_EXT_V1, 0x0ed0f110, 0x0ff8fff0, "cmfe%c\t%16-18f, %0-3f"},
|
nkeynes@1265 | 269 | {FPU_FPA_EXT_V1, 0x0ef0f110, 0x0ff8fff0, "cnfe%c\t%16-18f, %0-3f"},
|
nkeynes@1265 | 270 | {FPU_FPA_EXT_V1, 0x0c000100, 0x0e100f00, "stf%c%Q\t%12-14f, %A"},
|
nkeynes@1265 | 271 | {FPU_FPA_EXT_V1, 0x0c100100, 0x0e100f00, "ldf%c%Q\t%12-14f, %A"},
|
nkeynes@1265 | 272 | {FPU_FPA_EXT_V2, 0x0c000200, 0x0e100f00, "sfm%c\t%12-14f, %F, %A"},
|
nkeynes@1265 | 273 | {FPU_FPA_EXT_V2, 0x0c100200, 0x0e100f00, "lfm%c\t%12-14f, %F, %A"},
|
nkeynes@1265 | 274 |
|
nkeynes@1265 | 275 | /* Register load/store. */
|
nkeynes@1265 | 276 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d2d0b00, 0x0fbf0f01, "vpush%c\t%B"},
|
nkeynes@1265 | 277 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d200b00, 0x0fb00f01, "vstmdb%c\t%16-19r!, %B"},
|
nkeynes@1265 | 278 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d300b00, 0x0fb00f01, "vldmdb%c\t%16-19r!, %B"},
|
nkeynes@1265 | 279 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0c800b00, 0x0f900f01, "vstmia%c\t%16-19r%21'!, %B"},
|
nkeynes@1265 | 280 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0cbd0b00, 0x0fbf0f01, "vpop%c\t%B"},
|
nkeynes@1265 | 281 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0c900b00, 0x0f900f01, "vldmia%c\t%16-19r%21'!, %B"},
|
nkeynes@1265 | 282 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d000b00, 0x0f300f00, "vstr%c\t%12-15,22D, %A"},
|
nkeynes@1265 | 283 | {FPU_VFP_EXT_V1xD | FPU_NEON_EXT_V1, 0x0d100b00, 0x0f300f00, "vldr%c\t%12-15,22D, %A"},
|
nkeynes@1265 | 284 | {FPU_VFP_EXT_V1xD, 0x0d2d0a00, 0x0fbf0f00, "vpush%c\t%y3"},
|
nkeynes@1265 | 285 | {FPU_VFP_EXT_V1xD, 0x0d200a00, 0x0fb00f00, "vstmdb%c\t%16-19r!, %y3"},
|
nkeynes@1265 | 286 | {FPU_VFP_EXT_V1xD, 0x0d300a00, 0x0fb00f00, "vldmdb%c\t%16-19r!, %y3"},
|
nkeynes@1265 | 287 | {FPU_VFP_EXT_V1xD, 0x0c800a00, 0x0f900f00, "vstmia%c\t%16-19r%21'!, %y3"},
|
nkeynes@1265 | 288 | {FPU_VFP_EXT_V1xD, 0x0cbd0a00, 0x0fbf0f00, "vpop%c\t%y3"},
|
nkeynes@1265 | 289 | {FPU_VFP_EXT_V1xD, 0x0c900a00, 0x0f900f00, "vldmia%c\t%16-19r%21'!, %y3"},
|
nkeynes@1265 | 290 | {FPU_VFP_EXT_V1xD, 0x0d000a00, 0x0f300f00, "vstr%c\t%y1, %A"},
|
nkeynes@1265 | 291 | {FPU_VFP_EXT_V1xD, 0x0d100a00, 0x0f300f00, "vldr%c\t%y1, %A"},
|
nkeynes@1265 | 292 |
|
nkeynes@1265 | 293 | {FPU_VFP_EXT_V1xD, 0x0d200b01, 0x0fb00f01, "fstmdbx%c\t%16-19r!, %z3\t;@ Deprecated"},
|
nkeynes@1265 | 294 | {FPU_VFP_EXT_V1xD, 0x0d300b01, 0x0fb00f01, "fldmdbx%c\t%16-19r!, %z3\t;@ Deprecated"},
|
nkeynes@1265 | 295 | {FPU_VFP_EXT_V1xD, 0x0c800b01, 0x0f900f01, "fstmiax%c\t%16-19r%21'!, %z3\t;@ Deprecated"},
|
nkeynes@1265 | 296 | {FPU_VFP_EXT_V1xD, 0x0c900b01, 0x0f900f01, "fldmiax%c\t%16-19r%21'!, %z3\t;@ Deprecated"},
|
nkeynes@1265 | 297 |
|
nkeynes@1265 | 298 | /* Data transfer between ARM and NEON registers. */
|
nkeynes@1265 | 299 | {FPU_NEON_EXT_V1, 0x0e800b10, 0x0ff00f70, "vdup%c.32\t%16-19,7D, %12-15r"},
|
nkeynes@1265 | 300 | {FPU_NEON_EXT_V1, 0x0e800b30, 0x0ff00f70, "vdup%c.16\t%16-19,7D, %12-15r"},
|
nkeynes@1265 | 301 | {FPU_NEON_EXT_V1, 0x0ea00b10, 0x0ff00f70, "vdup%c.32\t%16-19,7Q, %12-15r"},
|
nkeynes@1265 | 302 | {FPU_NEON_EXT_V1, 0x0ea00b30, 0x0ff00f70, "vdup%c.16\t%16-19,7Q, %12-15r"},
|
nkeynes@1265 | 303 | {FPU_NEON_EXT_V1, 0x0ec00b10, 0x0ff00f70, "vdup%c.8\t%16-19,7D, %12-15r"},
|
nkeynes@1265 | 304 | {FPU_NEON_EXT_V1, 0x0ee00b10, 0x0ff00f70, "vdup%c.8\t%16-19,7Q, %12-15r"},
|
nkeynes@1265 | 305 | {FPU_NEON_EXT_V1, 0x0c400b10, 0x0ff00fd0, "vmov%c\t%0-3,5D, %12-15r, %16-19r"},
|
nkeynes@1265 | 306 | {FPU_NEON_EXT_V1, 0x0c500b10, 0x0ff00fd0, "vmov%c\t%12-15r, %16-19r, %0-3,5D"},
|
nkeynes@1265 | 307 | {FPU_NEON_EXT_V1, 0x0e000b10, 0x0fd00f70, "vmov%c.32\t%16-19,7D[%21d], %12-15r"},
|
nkeynes@1265 | 308 | {FPU_NEON_EXT_V1, 0x0e100b10, 0x0f500f70, "vmov%c.32\t%12-15r, %16-19,7D[%21d]"},
|
nkeynes@1265 | 309 | {FPU_NEON_EXT_V1, 0x0e000b30, 0x0fd00f30, "vmov%c.16\t%16-19,7D[%6,21d], %12-15r"},
|
nkeynes@1265 | 310 | {FPU_NEON_EXT_V1, 0x0e100b30, 0x0f500f30, "vmov%c.%23?us16\t%12-15r, %16-19,7D[%6,21d]"},
|
nkeynes@1265 | 311 | {FPU_NEON_EXT_V1, 0x0e400b10, 0x0fd00f10, "vmov%c.8\t%16-19,7D[%5,6,21d], %12-15r"},
|
nkeynes@1265 | 312 | {FPU_NEON_EXT_V1, 0x0e500b10, 0x0f500f10, "vmov%c.%23?us8\t%12-15r, %16-19,7D[%5,6,21d]"},
|
nkeynes@1265 | 313 | /* Half-precision conversion instructions. */
|
nkeynes@1265 | 314 | {FPU_VFP_EXT_FP16, 0x0eb20a40, 0x0fbf0f50, "vcvt%7?tb%c.f32.f16\t%y1, %y0"},
|
nkeynes@1265 | 315 | {FPU_VFP_EXT_FP16, 0x0eb30a40, 0x0fbf0f50, "vcvt%7?tb%c.f16.f32\t%y1, %y0"},
|
nkeynes@1265 | 316 |
|
nkeynes@1265 | 317 | /* Floating point coprocessor (VFP) instructions. */
|
nkeynes@1265 | 318 | {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0fff0fff, "vmsr%c\tfpsid, %12-15r"},
|
nkeynes@1265 | 319 | {FPU_VFP_EXT_V1xD, 0x0ee10a10, 0x0fff0fff, "vmsr%c\tfpscr, %12-15r"},
|
nkeynes@1265 | 320 | {FPU_VFP_EXT_V1xD, 0x0ee60a10, 0x0fff0fff, "vmsr%c\tmvfr1, %12-15r"},
|
nkeynes@1265 | 321 | {FPU_VFP_EXT_V1xD, 0x0ee70a10, 0x0fff0fff, "vmsr%c\tmvfr0, %12-15r"},
|
nkeynes@1265 | 322 | {FPU_VFP_EXT_V1xD, 0x0ee80a10, 0x0fff0fff, "vmsr%c\tfpexc, %12-15r"},
|
nkeynes@1265 | 323 | {FPU_VFP_EXT_V1xD, 0x0ee90a10, 0x0fff0fff, "vmsr%c\tfpinst, %12-15r\t@ Impl def"},
|
nkeynes@1265 | 324 | {FPU_VFP_EXT_V1xD, 0x0eea0a10, 0x0fff0fff, "vmsr%c\tfpinst2, %12-15r\t@ Impl def"},
|
nkeynes@1265 | 325 | {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpsid"},
|
nkeynes@1265 | 326 | {FPU_VFP_EXT_V1xD, 0x0ef1fa10, 0x0fffffff, "vmrs%c\tAPSR_nzcv, fpscr"},
|
nkeynes@1265 | 327 | {FPU_VFP_EXT_V1xD, 0x0ef10a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpscr"},
|
nkeynes@1265 | 328 | {FPU_VFP_EXT_V1xD, 0x0ef60a10, 0x0fff0fff, "vmrs%c\t%12-15r, mvfr1"},
|
nkeynes@1265 | 329 | {FPU_VFP_EXT_V1xD, 0x0ef70a10, 0x0fff0fff, "vmrs%c\t%12-15r, mvfr0"},
|
nkeynes@1265 | 330 | {FPU_VFP_EXT_V1xD, 0x0ef80a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpexc"},
|
nkeynes@1265 | 331 | {FPU_VFP_EXT_V1xD, 0x0ef90a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpinst\t@ Impl def"},
|
nkeynes@1265 | 332 | {FPU_VFP_EXT_V1xD, 0x0efa0a10, 0x0fff0fff, "vmrs%c\t%12-15r, fpinst2\t@ Impl def"},
|
nkeynes@1265 | 333 | {FPU_VFP_EXT_V1, 0x0e000b10, 0x0fd00fff, "vmov%c.32\t%z2[%21d], %12-15r"},
|
nkeynes@1265 | 334 | {FPU_VFP_EXT_V1, 0x0e100b10, 0x0fd00fff, "vmov%c.32\t%12-15r, %z2[%21d]"},
|
nkeynes@1265 | 335 | {FPU_VFP_EXT_V1xD, 0x0ee00a10, 0x0ff00fff, "vmsr%c\t<impl def %16-19x>, %12-15r"},
|
nkeynes@1265 | 336 | {FPU_VFP_EXT_V1xD, 0x0ef00a10, 0x0ff00fff, "vmrs%c\t%12-15r, <impl def %16-19x>"},
|
nkeynes@1265 | 337 | {FPU_VFP_EXT_V1xD, 0x0e000a10, 0x0ff00f7f, "vmov%c\t%y2, %12-15r"},
|
nkeynes@1265 | 338 | {FPU_VFP_EXT_V1xD, 0x0e100a10, 0x0ff00f7f, "vmov%c\t%12-15r, %y2"},
|
nkeynes@1265 | 339 | {FPU_VFP_EXT_V1xD, 0x0eb50a40, 0x0fbf0f70, "vcmp%7'e%c.f32\t%y1, #0.0"},
|
nkeynes@1265 | 340 | {FPU_VFP_EXT_V1, 0x0eb50b40, 0x0fbf0f70, "vcmp%7'e%c.f64\t%z1, #0.0"},
|
nkeynes@1265 | 341 | {FPU_VFP_EXT_V1xD, 0x0eb00a40, 0x0fbf0fd0, "vmov%c.f32\t%y1, %y0"},
|
nkeynes@1265 | 342 | {FPU_VFP_EXT_V1xD, 0x0eb00ac0, 0x0fbf0fd0, "vabs%c.f32\t%y1, %y0"},
|
nkeynes@1265 | 343 | {FPU_VFP_EXT_V1, 0x0eb00b40, 0x0fbf0fd0, "vmov%c.f64\t%z1, %z0"},
|
nkeynes@1265 | 344 | {FPU_VFP_EXT_V1, 0x0eb00bc0, 0x0fbf0fd0, "vabs%c.f64\t%z1, %z0"},
|
nkeynes@1265 | 345 | {FPU_VFP_EXT_V1xD, 0x0eb10a40, 0x0fbf0fd0, "vneg%c.f32\t%y1, %y0"},
|
nkeynes@1265 | 346 | {FPU_VFP_EXT_V1xD, 0x0eb10ac0, 0x0fbf0fd0, "vsqrt%c.f32\t%y1, %y0"},
|
nkeynes@1265 | 347 | {FPU_VFP_EXT_V1, 0x0eb10b40, 0x0fbf0fd0, "vneg%c.f64\t%z1, %z0"},
|
nkeynes@1265 | 348 | {FPU_VFP_EXT_V1, 0x0eb10bc0, 0x0fbf0fd0, "vsqrt%c.f64\t%z1, %z0"},
|
nkeynes@1265 | 349 | {FPU_VFP_EXT_V1, 0x0eb70ac0, 0x0fbf0fd0, "vcvt%c.f64.f32\t%z1, %y0"},
|
nkeynes@1265 | 350 | {FPU_VFP_EXT_V1, 0x0eb70bc0, 0x0fbf0fd0, "vcvt%c.f32.f64\t%y1, %z0"},
|
nkeynes@1265 | 351 | {FPU_VFP_EXT_V1xD, 0x0eb80a40, 0x0fbf0f50, "vcvt%c.f32.%7?su32\t%y1, %y0"},
|
nkeynes@1265 | 352 | {FPU_VFP_EXT_V1, 0x0eb80b40, 0x0fbf0f50, "vcvt%c.f64.%7?su32\t%z1, %y0"},
|
nkeynes@1265 | 353 | {FPU_VFP_EXT_V1xD, 0x0eb40a40, 0x0fbf0f50, "vcmp%7'e%c.f32\t%y1, %y0"},
|
nkeynes@1265 | 354 | {FPU_VFP_EXT_V1, 0x0eb40b40, 0x0fbf0f50, "vcmp%7'e%c.f64\t%z1, %z0"},
|
nkeynes@1265 | 355 | {FPU_VFP_EXT_V3xD, 0x0eba0a40, 0x0fbe0f50, "vcvt%c.f32.%16?us%7?31%7?26\t%y1, %y1, #%5,0-3k"},
|
nkeynes@1265 | 356 | {FPU_VFP_EXT_V3, 0x0eba0b40, 0x0fbe0f50, "vcvt%c.f64.%16?us%7?31%7?26\t%z1, %z1, #%5,0-3k"},
|
nkeynes@1265 | 357 | {FPU_VFP_EXT_V1xD, 0x0ebc0a40, 0x0fbe0f50, "vcvt%7`r%c.%16?su32.f32\t%y1, %y0"},
|
nkeynes@1265 | 358 | {FPU_VFP_EXT_V1, 0x0ebc0b40, 0x0fbe0f50, "vcvt%7`r%c.%16?su32.f64\t%y1, %z0"},
|
nkeynes@1265 | 359 | {FPU_VFP_EXT_V3xD, 0x0ebe0a40, 0x0fbe0f50, "vcvt%c.%16?us%7?31%7?26.f32\t%y1, %y1, #%5,0-3k"},
|
nkeynes@1265 | 360 | {FPU_VFP_EXT_V3, 0x0ebe0b40, 0x0fbe0f50, "vcvt%c.%16?us%7?31%7?26.f64\t%z1, %z1, #%5,0-3k"},
|
nkeynes@1265 | 361 | {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "vmov%c\t%12-15r, %16-19r, %z0"},
|
nkeynes@1265 | 362 | {FPU_VFP_EXT_V3xD, 0x0eb00a00, 0x0fb00ff0, "vmov%c.f32\t%y1, #%0-3,16-19d"},
|
nkeynes@1265 | 363 | {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "vmov%c.f64\t%z1, #%0-3,16-19d"},
|
nkeynes@1265 | 364 | {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "vmov%c\t%y4, %12-15r, %16-19r"},
|
nkeynes@1265 | 365 | {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "vmov%c\t%z0, %12-15r, %16-19r"},
|
nkeynes@1265 | 366 | {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "vmov%c\t%12-15r, %16-19r, %y4"},
|
nkeynes@1265 | 367 | {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "vmla%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 368 | {FPU_VFP_EXT_V1xD, 0x0e000a40, 0x0fb00f50, "vmls%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 369 | {FPU_VFP_EXT_V1, 0x0e000b00, 0x0fb00f50, "vmla%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 370 | {FPU_VFP_EXT_V1, 0x0e000b40, 0x0fb00f50, "vmls%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 371 | {FPU_VFP_EXT_V1xD, 0x0e100a00, 0x0fb00f50, "vnmls%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 372 | {FPU_VFP_EXT_V1xD, 0x0e100a40, 0x0fb00f50, "vnmla%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 373 | {FPU_VFP_EXT_V1, 0x0e100b00, 0x0fb00f50, "vnmls%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 374 | {FPU_VFP_EXT_V1, 0x0e100b40, 0x0fb00f50, "vnmla%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 375 | {FPU_VFP_EXT_V1xD, 0x0e200a00, 0x0fb00f50, "vmul%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 376 | {FPU_VFP_EXT_V1xD, 0x0e200a40, 0x0fb00f50, "vnmul%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 377 | {FPU_VFP_EXT_V1, 0x0e200b00, 0x0fb00f50, "vmul%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 378 | {FPU_VFP_EXT_V1, 0x0e200b40, 0x0fb00f50, "vnmul%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 379 | {FPU_VFP_EXT_V1xD, 0x0e300a00, 0x0fb00f50, "vadd%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 380 | {FPU_VFP_EXT_V1xD, 0x0e300a40, 0x0fb00f50, "vsub%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 381 | {FPU_VFP_EXT_V1, 0x0e300b00, 0x0fb00f50, "vadd%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 382 | {FPU_VFP_EXT_V1, 0x0e300b40, 0x0fb00f50, "vsub%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 383 | {FPU_VFP_EXT_V1xD, 0x0e800a00, 0x0fb00f50, "vdiv%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 384 | {FPU_VFP_EXT_V1, 0x0e800b00, 0x0fb00f50, "vdiv%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 385 |
|
nkeynes@1265 | 386 | /* Cirrus coprocessor instructions. */
|
nkeynes@1265 | 387 | {ARM_CEXT_MAVERICK, 0x0d100400, 0x0f500f00, "cfldrs%c\tmvf%12-15d, %A"},
|
nkeynes@1265 | 388 | {ARM_CEXT_MAVERICK, 0x0c100400, 0x0f500f00, "cfldrs%c\tmvf%12-15d, %A"},
|
nkeynes@1265 | 389 | {ARM_CEXT_MAVERICK, 0x0d500400, 0x0f500f00, "cfldrd%c\tmvd%12-15d, %A"},
|
nkeynes@1265 | 390 | {ARM_CEXT_MAVERICK, 0x0c500400, 0x0f500f00, "cfldrd%c\tmvd%12-15d, %A"},
|
nkeynes@1265 | 391 | {ARM_CEXT_MAVERICK, 0x0d100500, 0x0f500f00, "cfldr32%c\tmvfx%12-15d, %A"},
|
nkeynes@1265 | 392 | {ARM_CEXT_MAVERICK, 0x0c100500, 0x0f500f00, "cfldr32%c\tmvfx%12-15d, %A"},
|
nkeynes@1265 | 393 | {ARM_CEXT_MAVERICK, 0x0d500500, 0x0f500f00, "cfldr64%c\tmvdx%12-15d, %A"},
|
nkeynes@1265 | 394 | {ARM_CEXT_MAVERICK, 0x0c500500, 0x0f500f00, "cfldr64%c\tmvdx%12-15d, %A"},
|
nkeynes@1265 | 395 | {ARM_CEXT_MAVERICK, 0x0d000400, 0x0f500f00, "cfstrs%c\tmvf%12-15d, %A"},
|
nkeynes@1265 | 396 | {ARM_CEXT_MAVERICK, 0x0c000400, 0x0f500f00, "cfstrs%c\tmvf%12-15d, %A"},
|
nkeynes@1265 | 397 | {ARM_CEXT_MAVERICK, 0x0d400400, 0x0f500f00, "cfstrd%c\tmvd%12-15d, %A"},
|
nkeynes@1265 | 398 | {ARM_CEXT_MAVERICK, 0x0c400400, 0x0f500f00, "cfstrd%c\tmvd%12-15d, %A"},
|
nkeynes@1265 | 399 | {ARM_CEXT_MAVERICK, 0x0d000500, 0x0f500f00, "cfstr32%c\tmvfx%12-15d, %A"},
|
nkeynes@1265 | 400 | {ARM_CEXT_MAVERICK, 0x0c000500, 0x0f500f00, "cfstr32%c\tmvfx%12-15d, %A"},
|
nkeynes@1265 | 401 | {ARM_CEXT_MAVERICK, 0x0d400500, 0x0f500f00, "cfstr64%c\tmvdx%12-15d, %A"},
|
nkeynes@1265 | 402 | {ARM_CEXT_MAVERICK, 0x0c400500, 0x0f500f00, "cfstr64%c\tmvdx%12-15d, %A"},
|
nkeynes@1265 | 403 | {ARM_CEXT_MAVERICK, 0x0e000450, 0x0ff00ff0, "cfmvsr%c\tmvf%16-19d, %12-15r"},
|
nkeynes@1265 | 404 | {ARM_CEXT_MAVERICK, 0x0e100450, 0x0ff00ff0, "cfmvrs%c\t%12-15r, mvf%16-19d"},
|
nkeynes@1265 | 405 | {ARM_CEXT_MAVERICK, 0x0e000410, 0x0ff00ff0, "cfmvdlr%c\tmvd%16-19d, %12-15r"},
|
nkeynes@1265 | 406 | {ARM_CEXT_MAVERICK, 0x0e100410, 0x0ff00ff0, "cfmvrdl%c\t%12-15r, mvd%16-19d"},
|
nkeynes@1265 | 407 | {ARM_CEXT_MAVERICK, 0x0e000430, 0x0ff00ff0, "cfmvdhr%c\tmvd%16-19d, %12-15r"},
|
nkeynes@1265 | 408 | {ARM_CEXT_MAVERICK, 0x0e100430, 0x0ff00fff, "cfmvrdh%c\t%12-15r, mvd%16-19d"},
|
nkeynes@1265 | 409 | {ARM_CEXT_MAVERICK, 0x0e000510, 0x0ff00fff, "cfmv64lr%c\tmvdx%16-19d, %12-15r"},
|
nkeynes@1265 | 410 | {ARM_CEXT_MAVERICK, 0x0e100510, 0x0ff00fff, "cfmvr64l%c\t%12-15r, mvdx%16-19d"},
|
nkeynes@1265 | 411 | {ARM_CEXT_MAVERICK, 0x0e000530, 0x0ff00fff, "cfmv64hr%c\tmvdx%16-19d, %12-15r"},
|
nkeynes@1265 | 412 | {ARM_CEXT_MAVERICK, 0x0e100530, 0x0ff00fff, "cfmvr64h%c\t%12-15r, mvdx%16-19d"},
|
nkeynes@1265 | 413 | {ARM_CEXT_MAVERICK, 0x0e200440, 0x0ff00fff, "cfmval32%c\tmvax%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 414 | {ARM_CEXT_MAVERICK, 0x0e100440, 0x0ff00fff, "cfmv32al%c\tmvfx%12-15d, mvax%16-19d"},
|
nkeynes@1265 | 415 | {ARM_CEXT_MAVERICK, 0x0e200460, 0x0ff00fff, "cfmvam32%c\tmvax%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 416 | {ARM_CEXT_MAVERICK, 0x0e100460, 0x0ff00fff, "cfmv32am%c\tmvfx%12-15d, mvax%16-19d"},
|
nkeynes@1265 | 417 | {ARM_CEXT_MAVERICK, 0x0e200480, 0x0ff00fff, "cfmvah32%c\tmvax%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 418 | {ARM_CEXT_MAVERICK, 0x0e100480, 0x0ff00fff, "cfmv32ah%c\tmvfx%12-15d, mvax%16-19d"},
|
nkeynes@1265 | 419 | {ARM_CEXT_MAVERICK, 0x0e2004a0, 0x0ff00fff, "cfmva32%c\tmvax%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 420 | {ARM_CEXT_MAVERICK, 0x0e1004a0, 0x0ff00fff, "cfmv32a%c\tmvfx%12-15d, mvax%16-19d"},
|
nkeynes@1265 | 421 | {ARM_CEXT_MAVERICK, 0x0e2004c0, 0x0ff00fff, "cfmva64%c\tmvax%12-15d, mvdx%16-19d"},
|
nkeynes@1265 | 422 | {ARM_CEXT_MAVERICK, 0x0e1004c0, 0x0ff00fff, "cfmv64a%c\tmvdx%12-15d, mvax%16-19d"},
|
nkeynes@1265 | 423 | {ARM_CEXT_MAVERICK, 0x0e2004e0, 0x0fff0fff, "cfmvsc32%c\tdspsc, mvdx%12-15d"},
|
nkeynes@1265 | 424 | {ARM_CEXT_MAVERICK, 0x0e1004e0, 0x0fff0fff, "cfmv32sc%c\tmvdx%12-15d, dspsc"},
|
nkeynes@1265 | 425 | {ARM_CEXT_MAVERICK, 0x0e000400, 0x0ff00fff, "cfcpys%c\tmvf%12-15d, mvf%16-19d"},
|
nkeynes@1265 | 426 | {ARM_CEXT_MAVERICK, 0x0e000420, 0x0ff00fff, "cfcpyd%c\tmvd%12-15d, mvd%16-19d"},
|
nkeynes@1265 | 427 | {ARM_CEXT_MAVERICK, 0x0e000460, 0x0ff00fff, "cfcvtsd%c\tmvd%12-15d, mvf%16-19d"},
|
nkeynes@1265 | 428 | {ARM_CEXT_MAVERICK, 0x0e000440, 0x0ff00fff, "cfcvtds%c\tmvf%12-15d, mvd%16-19d"},
|
nkeynes@1265 | 429 | {ARM_CEXT_MAVERICK, 0x0e000480, 0x0ff00fff, "cfcvt32s%c\tmvf%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 430 | {ARM_CEXT_MAVERICK, 0x0e0004a0, 0x0ff00fff, "cfcvt32d%c\tmvd%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 431 | {ARM_CEXT_MAVERICK, 0x0e0004c0, 0x0ff00fff, "cfcvt64s%c\tmvf%12-15d, mvdx%16-19d"},
|
nkeynes@1265 | 432 | {ARM_CEXT_MAVERICK, 0x0e0004e0, 0x0ff00fff, "cfcvt64d%c\tmvd%12-15d, mvdx%16-19d"},
|
nkeynes@1265 | 433 | {ARM_CEXT_MAVERICK, 0x0e100580, 0x0ff00fff, "cfcvts32%c\tmvfx%12-15d, mvf%16-19d"},
|
nkeynes@1265 | 434 | {ARM_CEXT_MAVERICK, 0x0e1005a0, 0x0ff00fff, "cfcvtd32%c\tmvfx%12-15d, mvd%16-19d"},
|
nkeynes@1265 | 435 | {ARM_CEXT_MAVERICK, 0x0e1005c0, 0x0ff00fff, "cftruncs32%c\tmvfx%12-15d, mvf%16-19d"},
|
nkeynes@1265 | 436 | {ARM_CEXT_MAVERICK, 0x0e1005e0, 0x0ff00fff, "cftruncd32%c\tmvfx%12-15d, mvd%16-19d"},
|
nkeynes@1265 | 437 | {ARM_CEXT_MAVERICK, 0x0e000550, 0x0ff00ff0, "cfrshl32%c\tmvfx%16-19d, mvfx%0-3d, %12-15r"},
|
nkeynes@1265 | 438 | {ARM_CEXT_MAVERICK, 0x0e000570, 0x0ff00ff0, "cfrshl64%c\tmvdx%16-19d, mvdx%0-3d, %12-15r"},
|
nkeynes@1265 | 439 | {ARM_CEXT_MAVERICK, 0x0e000500, 0x0ff00f10, "cfsh32%c\tmvfx%12-15d, mvfx%16-19d, #%I"},
|
nkeynes@1265 | 440 | {ARM_CEXT_MAVERICK, 0x0e200500, 0x0ff00f10, "cfsh64%c\tmvdx%12-15d, mvdx%16-19d, #%I"},
|
nkeynes@1265 | 441 | {ARM_CEXT_MAVERICK, 0x0e100490, 0x0ff00ff0, "cfcmps%c\t%12-15r, mvf%16-19d, mvf%0-3d"},
|
nkeynes@1265 | 442 | {ARM_CEXT_MAVERICK, 0x0e1004b0, 0x0ff00ff0, "cfcmpd%c\t%12-15r, mvd%16-19d, mvd%0-3d"},
|
nkeynes@1265 | 443 | {ARM_CEXT_MAVERICK, 0x0e100590, 0x0ff00ff0, "cfcmp32%c\t%12-15r, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 444 | {ARM_CEXT_MAVERICK, 0x0e1005b0, 0x0ff00ff0, "cfcmp64%c\t%12-15r, mvdx%16-19d, mvdx%0-3d"},
|
nkeynes@1265 | 445 | {ARM_CEXT_MAVERICK, 0x0e300400, 0x0ff00fff, "cfabss%c\tmvf%12-15d, mvf%16-19d"},
|
nkeynes@1265 | 446 | {ARM_CEXT_MAVERICK, 0x0e300420, 0x0ff00fff, "cfabsd%c\tmvd%12-15d, mvd%16-19d"},
|
nkeynes@1265 | 447 | {ARM_CEXT_MAVERICK, 0x0e300440, 0x0ff00fff, "cfnegs%c\tmvf%12-15d, mvf%16-19d"},
|
nkeynes@1265 | 448 | {ARM_CEXT_MAVERICK, 0x0e300460, 0x0ff00fff, "cfnegd%c\tmvd%12-15d, mvd%16-19d"},
|
nkeynes@1265 | 449 | {ARM_CEXT_MAVERICK, 0x0e300480, 0x0ff00ff0, "cfadds%c\tmvf%12-15d, mvf%16-19d, mvf%0-3d"},
|
nkeynes@1265 | 450 | {ARM_CEXT_MAVERICK, 0x0e3004a0, 0x0ff00ff0, "cfaddd%c\tmvd%12-15d, mvd%16-19d, mvd%0-3d"},
|
nkeynes@1265 | 451 | {ARM_CEXT_MAVERICK, 0x0e3004c0, 0x0ff00ff0, "cfsubs%c\tmvf%12-15d, mvf%16-19d, mvf%0-3d"},
|
nkeynes@1265 | 452 | {ARM_CEXT_MAVERICK, 0x0e3004e0, 0x0ff00ff0, "cfsubd%c\tmvd%12-15d, mvd%16-19d, mvd%0-3d"},
|
nkeynes@1265 | 453 | {ARM_CEXT_MAVERICK, 0x0e100400, 0x0ff00ff0, "cfmuls%c\tmvf%12-15d, mvf%16-19d, mvf%0-3d"},
|
nkeynes@1265 | 454 | {ARM_CEXT_MAVERICK, 0x0e100420, 0x0ff00ff0, "cfmuld%c\tmvd%12-15d, mvd%16-19d, mvd%0-3d"},
|
nkeynes@1265 | 455 | {ARM_CEXT_MAVERICK, 0x0e300500, 0x0ff00fff, "cfabs32%c\tmvfx%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 456 | {ARM_CEXT_MAVERICK, 0x0e300520, 0x0ff00fff, "cfabs64%c\tmvdx%12-15d, mvdx%16-19d"},
|
nkeynes@1265 | 457 | {ARM_CEXT_MAVERICK, 0x0e300540, 0x0ff00fff, "cfneg32%c\tmvfx%12-15d, mvfx%16-19d"},
|
nkeynes@1265 | 458 | {ARM_CEXT_MAVERICK, 0x0e300560, 0x0ff00fff, "cfneg64%c\tmvdx%12-15d, mvdx%16-19d"},
|
nkeynes@1265 | 459 | {ARM_CEXT_MAVERICK, 0x0e300580, 0x0ff00ff0, "cfadd32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 460 | {ARM_CEXT_MAVERICK, 0x0e3005a0, 0x0ff00ff0, "cfadd64%c\tmvdx%12-15d, mvdx%16-19d, mvdx%0-3d"},
|
nkeynes@1265 | 461 | {ARM_CEXT_MAVERICK, 0x0e3005c0, 0x0ff00ff0, "cfsub32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 462 | {ARM_CEXT_MAVERICK, 0x0e3005e0, 0x0ff00ff0, "cfsub64%c\tmvdx%12-15d, mvdx%16-19d, mvdx%0-3d"},
|
nkeynes@1265 | 463 | {ARM_CEXT_MAVERICK, 0x0e100500, 0x0ff00ff0, "cfmul32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 464 | {ARM_CEXT_MAVERICK, 0x0e100520, 0x0ff00ff0, "cfmul64%c\tmvdx%12-15d, mvdx%16-19d, mvdx%0-3d"},
|
nkeynes@1265 | 465 | {ARM_CEXT_MAVERICK, 0x0e100540, 0x0ff00ff0, "cfmac32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 466 | {ARM_CEXT_MAVERICK, 0x0e100560, 0x0ff00ff0, "cfmsc32%c\tmvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 467 | {ARM_CEXT_MAVERICK, 0x0e000600, 0x0ff00f10, "cfmadd32%c\tmvax%5-7d, mvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 468 | {ARM_CEXT_MAVERICK, 0x0e100600, 0x0ff00f10, "cfmsub32%c\tmvax%5-7d, mvfx%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 469 | {ARM_CEXT_MAVERICK, 0x0e200600, 0x0ff00f10, "cfmadda32%c\tmvax%5-7d, mvax%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 470 | {ARM_CEXT_MAVERICK, 0x0e300600, 0x0ff00f10, "cfmsuba32%c\tmvax%5-7d, mvax%12-15d, mvfx%16-19d, mvfx%0-3d"},
|
nkeynes@1265 | 471 |
|
nkeynes@1265 | 472 | /* VFP Fused multiply add instructions. */
|
nkeynes@1265 | 473 | {FPU_VFP_EXT_FMA, 0x0ea00a00, 0x0fb00f50, "vfma%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 474 | {FPU_VFP_EXT_FMA, 0x0ea00b00, 0x0fb00f50, "vfma%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 475 | {FPU_VFP_EXT_FMA, 0x0ea00a40, 0x0fb00f50, "vfms%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 476 | {FPU_VFP_EXT_FMA, 0x0ea00b40, 0x0fb00f50, "vfms%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 477 | {FPU_VFP_EXT_FMA, 0x0e900a40, 0x0fb00f50, "vfnma%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 478 | {FPU_VFP_EXT_FMA, 0x0e900b40, 0x0fb00f50, "vfnma%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 479 | {FPU_VFP_EXT_FMA, 0x0e900a00, 0x0fb00f50, "vfnms%c.f32\t%y1, %y2, %y0"},
|
nkeynes@1265 | 480 | {FPU_VFP_EXT_FMA, 0x0e900b00, 0x0fb00f50, "vfnms%c.f64\t%z1, %z2, %z0"},
|
nkeynes@1265 | 481 |
|
nkeynes@1265 | 482 | /* Generic coprocessor instructions. */
|
nkeynes@1265 | 483 | { 0, SENTINEL_GENERIC_START, 0, "" },
|
nkeynes@1265 | 484 | {ARM_EXT_V5E, 0x0c400000, 0x0ff00000, "mcrr%c\t%8-11d, %4-7d, %12-15R, %16-19r, cr%0-3d"},
|
nkeynes@1265 | 485 | {ARM_EXT_V5E, 0x0c500000, 0x0ff00000, "mrrc%c\t%8-11d, %4-7d, %12-15Ru, %16-19Ru, cr%0-3d"},
|
nkeynes@1265 | 486 | {ARM_EXT_V2, 0x0e000000, 0x0f000010, "cdp%c\t%8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}"},
|
nkeynes@1265 | 487 | {ARM_EXT_V2, 0x0e10f010, 0x0f10f010, "mrc%c\t%8-11d, %21-23d, APSR_nzcv, cr%16-19d, cr%0-3d, {%5-7d}"},
|
nkeynes@1265 | 488 | {ARM_EXT_V2, 0x0e100010, 0x0f100010, "mrc%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
|
nkeynes@1265 | 489 | {ARM_EXT_V2, 0x0e000010, 0x0f100010, "mcr%c\t%8-11d, %21-23d, %12-15R, cr%16-19d, cr%0-3d, {%5-7d}"},
|
nkeynes@1265 | 490 | {ARM_EXT_V2, 0x0c000000, 0x0e100000, "stc%22'l%c\t%8-11d, cr%12-15d, %A"},
|
nkeynes@1265 | 491 | {ARM_EXT_V2, 0x0c100000, 0x0e100000, "ldc%22'l%c\t%8-11d, cr%12-15d, %A"},
|
nkeynes@1265 | 492 |
|
nkeynes@1265 | 493 | /* V6 coprocessor instructions. */
|
nkeynes@1265 | 494 | {ARM_EXT_V6, 0xfc500000, 0xfff00000, "mrrc2%c\t%8-11d, %4-7d, %12-15Ru, %16-19Ru, cr%0-3d"},
|
nkeynes@1265 | 495 | {ARM_EXT_V6, 0xfc400000, 0xfff00000, "mcrr2%c\t%8-11d, %4-7d, %12-15R, %16-19R, cr%0-3d"},
|
nkeynes@1265 | 496 |
|
nkeynes@1265 | 497 | /* V5 coprocessor instructions. */
|
nkeynes@1265 | 498 | {ARM_EXT_V5, 0xfc100000, 0xfe100000, "ldc2%22'l%c\t%8-11d, cr%12-15d, %A"},
|
nkeynes@1265 | 499 | {ARM_EXT_V5, 0xfc000000, 0xfe100000, "stc2%22'l%c\t%8-11d, cr%12-15d, %A"},
|
nkeynes@1265 | 500 | {ARM_EXT_V5, 0xfe000000, 0xff000010, "cdp2%c\t%8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}"},
|
nkeynes@1265 | 501 | {ARM_EXT_V5, 0xfe000010, 0xff100010, "mcr2%c\t%8-11d, %21-23d, %12-15R, cr%16-19d, cr%0-3d, {%5-7d}"},
|
nkeynes@1265 | 502 | {ARM_EXT_V5, 0xfe100010, 0xff100010, "mrc2%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
|
nkeynes@1265 | 503 |
|
nkeynes@1265 | 504 | {0, 0, 0, 0}
|
nkeynes@1265 | 505 | };
|
nkeynes@1265 | 506 |
|
nkeynes@1265 | 507 | /* Neon opcode table: This does not encode the top byte -- that is
|
nkeynes@1265 | 508 | checked by the print_insn_neon routine, as it depends on whether we are
|
nkeynes@1265 | 509 | doing thumb32 or arm32 disassembly. */
|
nkeynes@1265 | 510 |
|
nkeynes@1265 | 511 | /* print_insn_neon recognizes the following format control codes:
|
nkeynes@1265 | 512 |
|
nkeynes@1265 | 513 | %% %
|
nkeynes@1265 | 514 |
|
nkeynes@1265 | 515 | %c print condition code
|
nkeynes@1265 | 516 | %A print v{st,ld}[1234] operands
|
nkeynes@1265 | 517 | %B print v{st,ld}[1234] any one operands
|
nkeynes@1265 | 518 | %C print v{st,ld}[1234] single->all operands
|
nkeynes@1265 | 519 | %D print scalar
|
nkeynes@1265 | 520 | %E print vmov, vmvn, vorr, vbic encoded constant
|
nkeynes@1265 | 521 | %F print vtbl,vtbx register list
|
nkeynes@1265 | 522 |
|
nkeynes@1265 | 523 | %<bitfield>r print as an ARM register
|
nkeynes@1265 | 524 | %<bitfield>d print the bitfield in decimal
|
nkeynes@1265 | 525 | %<bitfield>e print the 2^N - bitfield in decimal
|
nkeynes@1265 | 526 | %<bitfield>D print as a NEON D register
|
nkeynes@1265 | 527 | %<bitfield>Q print as a NEON Q register
|
nkeynes@1265 | 528 | %<bitfield>R print as a NEON D or Q register
|
nkeynes@1265 | 529 | %<bitfield>Sn print byte scaled width limited by n
|
nkeynes@1265 | 530 | %<bitfield>Tn print short scaled width limited by n
|
nkeynes@1265 | 531 | %<bitfield>Un print long scaled width limited by n
|
nkeynes@1265 | 532 |
|
nkeynes@1265 | 533 | %<bitfield>'c print specified char iff bitfield is all ones
|
nkeynes@1265 | 534 | %<bitfield>`c print specified char iff bitfield is all zeroes
|
nkeynes@1265 | 535 | %<bitfield>?ab... select from array of values in big endian order. */
|
nkeynes@1265 | 536 |
|
nkeynes@1265 | 537 | static const struct opcode32 neon_opcodes[] =
|
nkeynes@1265 | 538 | {
|
nkeynes@1265 | 539 | /* Extract. */
|
nkeynes@1265 | 540 | {FPU_NEON_EXT_V1, 0xf2b00840, 0xffb00850, "vext%c.8\t%12-15,22R, %16-19,7R, %0-3,5R, #%8-11d"},
|
nkeynes@1265 | 541 | {FPU_NEON_EXT_V1, 0xf2b00000, 0xffb00810, "vext%c.8\t%12-15,22R, %16-19,7R, %0-3,5R, #%8-11d"},
|
nkeynes@1265 | 542 |
|
nkeynes@1265 | 543 | /* Move data element to all lanes. */
|
nkeynes@1265 | 544 | {FPU_NEON_EXT_V1, 0xf3b40c00, 0xffb70f90, "vdup%c.32\t%12-15,22R, %0-3,5D[%19d]"},
|
nkeynes@1265 | 545 | {FPU_NEON_EXT_V1, 0xf3b20c00, 0xffb30f90, "vdup%c.16\t%12-15,22R, %0-3,5D[%18-19d]"},
|
nkeynes@1265 | 546 | {FPU_NEON_EXT_V1, 0xf3b10c00, 0xffb10f90, "vdup%c.8\t%12-15,22R, %0-3,5D[%17-19d]"},
|
nkeynes@1265 | 547 |
|
nkeynes@1265 | 548 | /* Table lookup. */
|
nkeynes@1265 | 549 | {FPU_NEON_EXT_V1, 0xf3b00800, 0xffb00c50, "vtbl%c.8\t%12-15,22D, %F, %0-3,5D"},
|
nkeynes@1265 | 550 | {FPU_NEON_EXT_V1, 0xf3b00840, 0xffb00c50, "vtbx%c.8\t%12-15,22D, %F, %0-3,5D"},
|
nkeynes@1265 | 551 |
|
nkeynes@1265 | 552 | /* Half-precision conversions. */
|
nkeynes@1265 | 553 | {FPU_VFP_EXT_FP16, 0xf3b60600, 0xffbf0fd0, "vcvt%c.f16.f32\t%12-15,22D, %0-3,5Q"},
|
nkeynes@1265 | 554 | {FPU_VFP_EXT_FP16, 0xf3b60700, 0xffbf0fd0, "vcvt%c.f32.f16\t%12-15,22Q, %0-3,5D"},
|
nkeynes@1265 | 555 |
|
nkeynes@1265 | 556 | /* NEON fused multiply add instructions. */
|
nkeynes@1265 | 557 | {FPU_NEON_EXT_FMA, 0xf2000c10, 0xffa00f10, "vfma%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 558 | {FPU_NEON_EXT_FMA, 0xf2200c10, 0xffa00f10, "vfms%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 559 |
|
nkeynes@1265 | 560 | /* Two registers, miscellaneous. */
|
nkeynes@1265 | 561 | {FPU_NEON_EXT_V1, 0xf2880a10, 0xfebf0fd0, "vmovl%c.%24?us8\t%12-15,22Q, %0-3,5D"},
|
nkeynes@1265 | 562 | {FPU_NEON_EXT_V1, 0xf2900a10, 0xfebf0fd0, "vmovl%c.%24?us16\t%12-15,22Q, %0-3,5D"},
|
nkeynes@1265 | 563 | {FPU_NEON_EXT_V1, 0xf2a00a10, 0xfebf0fd0, "vmovl%c.%24?us32\t%12-15,22Q, %0-3,5D"},
|
nkeynes@1265 | 564 | {FPU_NEON_EXT_V1, 0xf3b00500, 0xffbf0f90, "vcnt%c.8\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 565 | {FPU_NEON_EXT_V1, 0xf3b00580, 0xffbf0f90, "vmvn%c\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 566 | {FPU_NEON_EXT_V1, 0xf3b20000, 0xffbf0f90, "vswp%c\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 567 | {FPU_NEON_EXT_V1, 0xf3b20200, 0xffb30fd0, "vmovn%c.i%18-19T2\t%12-15,22D, %0-3,5Q"},
|
nkeynes@1265 | 568 | {FPU_NEON_EXT_V1, 0xf3b20240, 0xffb30fd0, "vqmovun%c.s%18-19T2\t%12-15,22D, %0-3,5Q"},
|
nkeynes@1265 | 569 | {FPU_NEON_EXT_V1, 0xf3b20280, 0xffb30fd0, "vqmovn%c.s%18-19T2\t%12-15,22D, %0-3,5Q"},
|
nkeynes@1265 | 570 | {FPU_NEON_EXT_V1, 0xf3b202c0, 0xffb30fd0, "vqmovn%c.u%18-19T2\t%12-15,22D, %0-3,5Q"},
|
nkeynes@1265 | 571 | {FPU_NEON_EXT_V1, 0xf3b20300, 0xffb30fd0, "vshll%c.i%18-19S2\t%12-15,22Q, %0-3,5D, #%18-19S2"},
|
nkeynes@1265 | 572 | {FPU_NEON_EXT_V1, 0xf3bb0400, 0xffbf0e90, "vrecpe%c.%8?fu%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 573 | {FPU_NEON_EXT_V1, 0xf3bb0480, 0xffbf0e90, "vrsqrte%c.%8?fu%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 574 | {FPU_NEON_EXT_V1, 0xf3b00000, 0xffb30f90, "vrev64%c.%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 575 | {FPU_NEON_EXT_V1, 0xf3b00080, 0xffb30f90, "vrev32%c.%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 576 | {FPU_NEON_EXT_V1, 0xf3b00100, 0xffb30f90, "vrev16%c.%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 577 | {FPU_NEON_EXT_V1, 0xf3b00400, 0xffb30f90, "vcls%c.s%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 578 | {FPU_NEON_EXT_V1, 0xf3b00480, 0xffb30f90, "vclz%c.i%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 579 | {FPU_NEON_EXT_V1, 0xf3b00700, 0xffb30f90, "vqabs%c.s%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 580 | {FPU_NEON_EXT_V1, 0xf3b00780, 0xffb30f90, "vqneg%c.s%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 581 | {FPU_NEON_EXT_V1, 0xf3b20080, 0xffb30f90, "vtrn%c.%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 582 | {FPU_NEON_EXT_V1, 0xf3b20100, 0xffb30f90, "vuzp%c.%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 583 | {FPU_NEON_EXT_V1, 0xf3b20180, 0xffb30f90, "vzip%c.%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 584 | {FPU_NEON_EXT_V1, 0xf3b10000, 0xffb30b90, "vcgt%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
|
nkeynes@1265 | 585 | {FPU_NEON_EXT_V1, 0xf3b10080, 0xffb30b90, "vcge%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
|
nkeynes@1265 | 586 | {FPU_NEON_EXT_V1, 0xf3b10100, 0xffb30b90, "vceq%c.%10?fi%18-19S2\t%12-15,22R, %0-3,5R, #0"},
|
nkeynes@1265 | 587 | {FPU_NEON_EXT_V1, 0xf3b10180, 0xffb30b90, "vcle%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
|
nkeynes@1265 | 588 | {FPU_NEON_EXT_V1, 0xf3b10200, 0xffb30b90, "vclt%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R, #0"},
|
nkeynes@1265 | 589 | {FPU_NEON_EXT_V1, 0xf3b10300, 0xffb30b90, "vabs%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 590 | {FPU_NEON_EXT_V1, 0xf3b10380, 0xffb30b90, "vneg%c.%10?fs%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 591 | {FPU_NEON_EXT_V1, 0xf3b00200, 0xffb30f10, "vpaddl%c.%7?us%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 592 | {FPU_NEON_EXT_V1, 0xf3b00600, 0xffb30f10, "vpadal%c.%7?us%18-19S2\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 593 | {FPU_NEON_EXT_V1, 0xf3b30600, 0xffb30e10, "vcvt%c.%7-8?usff%18-19Sa.%7-8?ffus%18-19Sa\t%12-15,22R, %0-3,5R"},
|
nkeynes@1265 | 594 |
|
nkeynes@1265 | 595 | /* Three registers of the same length. */
|
nkeynes@1265 | 596 | {FPU_NEON_EXT_V1, 0xf2000110, 0xffb00f10, "vand%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 597 | {FPU_NEON_EXT_V1, 0xf2100110, 0xffb00f10, "vbic%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 598 | {FPU_NEON_EXT_V1, 0xf2200110, 0xffb00f10, "vorr%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 599 | {FPU_NEON_EXT_V1, 0xf2300110, 0xffb00f10, "vorn%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 600 | {FPU_NEON_EXT_V1, 0xf3000110, 0xffb00f10, "veor%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 601 | {FPU_NEON_EXT_V1, 0xf3100110, 0xffb00f10, "vbsl%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 602 | {FPU_NEON_EXT_V1, 0xf3200110, 0xffb00f10, "vbit%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 603 | {FPU_NEON_EXT_V1, 0xf3300110, 0xffb00f10, "vbif%c\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 604 | {FPU_NEON_EXT_V1, 0xf2000d00, 0xffa00f10, "vadd%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 605 | {FPU_NEON_EXT_V1, 0xf2000d10, 0xffa00f10, "vmla%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 606 | {FPU_NEON_EXT_V1, 0xf2000e00, 0xffa00f10, "vceq%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 607 | {FPU_NEON_EXT_V1, 0xf2000f00, 0xffa00f10, "vmax%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 608 | {FPU_NEON_EXT_V1, 0xf2000f10, 0xffa00f10, "vrecps%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 609 | {FPU_NEON_EXT_V1, 0xf2200d00, 0xffa00f10, "vsub%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 610 | {FPU_NEON_EXT_V1, 0xf2200d10, 0xffa00f10, "vmls%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 611 | {FPU_NEON_EXT_V1, 0xf2200f00, 0xffa00f10, "vmin%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 612 | {FPU_NEON_EXT_V1, 0xf2200f10, 0xffa00f10, "vrsqrts%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 613 | {FPU_NEON_EXT_V1, 0xf3000d00, 0xffa00f10, "vpadd%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 614 | {FPU_NEON_EXT_V1, 0xf3000d10, 0xffa00f10, "vmul%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 615 | {FPU_NEON_EXT_V1, 0xf3000e00, 0xffa00f10, "vcge%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 616 | {FPU_NEON_EXT_V1, 0xf3000e10, 0xffa00f10, "vacge%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 617 | {FPU_NEON_EXT_V1, 0xf3000f00, 0xffa00f10, "vpmax%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 618 | {FPU_NEON_EXT_V1, 0xf3200d00, 0xffa00f10, "vabd%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 619 | {FPU_NEON_EXT_V1, 0xf3200e00, 0xffa00f10, "vcgt%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 620 | {FPU_NEON_EXT_V1, 0xf3200e10, 0xffa00f10, "vacgt%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 621 | {FPU_NEON_EXT_V1, 0xf3200f00, 0xffa00f10, "vpmin%c.f%20U0\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 622 | {FPU_NEON_EXT_V1, 0xf2000800, 0xff800f10, "vadd%c.i%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 623 | {FPU_NEON_EXT_V1, 0xf2000810, 0xff800f10, "vtst%c.%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 624 | {FPU_NEON_EXT_V1, 0xf2000900, 0xff800f10, "vmla%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 625 | {FPU_NEON_EXT_V1, 0xf2000b00, 0xff800f10, "vqdmulh%c.s%20-21S6\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 626 | {FPU_NEON_EXT_V1, 0xf2000b10, 0xff800f10, "vpadd%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 627 | {FPU_NEON_EXT_V1, 0xf3000800, 0xff800f10, "vsub%c.i%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 628 | {FPU_NEON_EXT_V1, 0xf3000810, 0xff800f10, "vceq%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 629 | {FPU_NEON_EXT_V1, 0xf3000900, 0xff800f10, "vmls%c.i%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 630 | {FPU_NEON_EXT_V1, 0xf3000b00, 0xff800f10, "vqrdmulh%c.s%20-21S6\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 631 | {FPU_NEON_EXT_V1, 0xf2000000, 0xfe800f10, "vhadd%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 632 | {FPU_NEON_EXT_V1, 0xf2000010, 0xfe800f10, "vqadd%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 633 | {FPU_NEON_EXT_V1, 0xf2000100, 0xfe800f10, "vrhadd%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 634 | {FPU_NEON_EXT_V1, 0xf2000200, 0xfe800f10, "vhsub%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 635 | {FPU_NEON_EXT_V1, 0xf2000210, 0xfe800f10, "vqsub%c.%24?us%20-21S3\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 636 | {FPU_NEON_EXT_V1, 0xf2000300, 0xfe800f10, "vcgt%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 637 | {FPU_NEON_EXT_V1, 0xf2000310, 0xfe800f10, "vcge%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 638 | {FPU_NEON_EXT_V1, 0xf2000400, 0xfe800f10, "vshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
|
nkeynes@1265 | 639 | {FPU_NEON_EXT_V1, 0xf2000410, 0xfe800f10, "vqshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
|
nkeynes@1265 | 640 | {FPU_NEON_EXT_V1, 0xf2000500, 0xfe800f10, "vrshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
|
nkeynes@1265 | 641 | {FPU_NEON_EXT_V1, 0xf2000510, 0xfe800f10, "vqrshl%c.%24?us%20-21S3\t%12-15,22R, %0-3,5R, %16-19,7R"},
|
nkeynes@1265 | 642 | {FPU_NEON_EXT_V1, 0xf2000600, 0xfe800f10, "vmax%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 643 | {FPU_NEON_EXT_V1, 0xf2000610, 0xfe800f10, "vmin%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 644 | {FPU_NEON_EXT_V1, 0xf2000700, 0xfe800f10, "vabd%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 645 | {FPU_NEON_EXT_V1, 0xf2000710, 0xfe800f10, "vaba%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 646 | {FPU_NEON_EXT_V1, 0xf2000910, 0xfe800f10, "vmul%c.%24?pi%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 647 | {FPU_NEON_EXT_V1, 0xf2000a00, 0xfe800f10, "vpmax%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 648 | {FPU_NEON_EXT_V1, 0xf2000a10, 0xfe800f10, "vpmin%c.%24?us%20-21S2\t%12-15,22R, %16-19,7R, %0-3,5R"},
|
nkeynes@1265 | 649 |
|
nkeynes@1265 | 650 | /* One register and an immediate value. */
|
nkeynes@1265 | 651 | {FPU_NEON_EXT_V1, 0xf2800e10, 0xfeb80fb0, "vmov%c.i8\t%12-15,22R, %E"},
|
nkeynes@1265 | 652 | {FPU_NEON_EXT_V1, 0xf2800e30, 0xfeb80fb0, "vmov%c.i64\t%12-15,22R, %E"},
|
nkeynes@1265 | 653 | {FPU_NEON_EXT_V1, 0xf2800f10, 0xfeb80fb0, "vmov%c.f32\t%12-15,22R, %E"},
|
nkeynes@1265 | 654 | {FPU_NEON_EXT_V1, 0xf2800810, 0xfeb80db0, "vmov%c.i16\t%12-15,22R, %E"},
|
nkeynes@1265 | 655 | {FPU_NEON_EXT_V1, 0xf2800830, 0xfeb80db0, "vmvn%c.i16\t%12-15,22R, %E"},
|
nkeynes@1265 | 656 | {FPU_NEON_EXT_V1, 0xf2800910, 0xfeb80db0, "vorr%c.i16\t%12-15,22R, %E"},
|
nkeynes@1265 | 657 | {FPU_NEON_EXT_V1, 0xf2800930, 0xfeb80db0, "vbic%c.i16\t%12-15,22R, %E"},
|
nkeynes@1265 | 658 | {FPU_NEON_EXT_V1, 0xf2800c10, 0xfeb80eb0, "vmov%c.i32\t%12-15,22R, %E"},
|
nkeynes@1265 | 659 | {FPU_NEON_EXT_V1, 0xf2800c30, 0xfeb80eb0, "vmvn%c.i32\t%12-15,22R, %E"},
|
nkeynes@1265 | 660 | {FPU_NEON_EXT_V1, 0xf2800110, 0xfeb809b0, "vorr%c.i32\t%12-15,22R, %E"},
|
nkeynes@1265 | 661 | {FPU_NEON_EXT_V1, 0xf2800130, 0xfeb809b0, "vbic%c.i32\t%12-15,22R, %E"},
|
nkeynes@1265 | 662 | {FPU_NEON_EXT_V1, 0xf2800010, 0xfeb808b0, "vmov%c.i32\t%12-15,22R, %E"},
|
nkeynes@1265 | 663 | {FPU_NEON_EXT_V1, 0xf2800030, 0xfeb808b0, "vmvn%c.i32\t%12-15,22R, %E"},
|
nkeynes@1265 | 664 |
|
nkeynes@1265 | 665 | /* Two registers and a shift amount. */
|
nkeynes@1265 | 666 | {FPU_NEON_EXT_V1, 0xf2880810, 0xffb80fd0, "vshrn%c.i16\t%12-15,22D, %0-3,5Q, #%16-18e"},
|
nkeynes@1265 | 667 | {FPU_NEON_EXT_V1, 0xf2880850, 0xffb80fd0, "vrshrn%c.i16\t%12-15,22D, %0-3,5Q, #%16-18e"},
|
nkeynes@1265 | 668 | {FPU_NEON_EXT_V1, 0xf2880810, 0xfeb80fd0, "vqshrun%c.s16\t%12-15,22D, %0-3,5Q, #%16-18e"},
|
nkeynes@1265 | 669 | {FPU_NEON_EXT_V1, 0xf2880850, 0xfeb80fd0, "vqrshrun%c.s16\t%12-15,22D, %0-3,5Q, #%16-18e"},
|
nkeynes@1265 | 670 | {FPU_NEON_EXT_V1, 0xf2880910, 0xfeb80fd0, "vqshrn%c.%24?us16\t%12-15,22D, %0-3,5Q, #%16-18e"},
|
nkeynes@1265 | 671 | {FPU_NEON_EXT_V1, 0xf2880950, 0xfeb80fd0, "vqrshrn%c.%24?us16\t%12-15,22D, %0-3,5Q, #%16-18e"},
|
nkeynes@1265 | 672 | {FPU_NEON_EXT_V1, 0xf2880a10, 0xfeb80fd0, "vshll%c.%24?us8\t%12-15,22D, %0-3,5Q, #%16-18d"},
|
nkeynes@1265 | 673 | {FPU_NEON_EXT_V1, 0xf2900810, 0xffb00fd0, "vshrn%c.i32\t%12-15,22D, %0-3,5Q, #%16-19e"},
|
nkeynes@1265 | 674 | {FPU_NEON_EXT_V1, 0xf2900850, 0xffb00fd0, "vrshrn%c.i32\t%12-15,22D, %0-3,5Q, #%16-19e"},
|
nkeynes@1265 | 675 | {FPU_NEON_EXT_V1, 0xf2880510, 0xffb80f90, "vshl%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18d"},
|
nkeynes@1265 | 676 | {FPU_NEON_EXT_V1, 0xf3880410, 0xffb80f90, "vsri%c.8\t%12-15,22R, %0-3,5R, #%16-18e"},
|
nkeynes@1265 | 677 | {FPU_NEON_EXT_V1, 0xf3880510, 0xffb80f90, "vsli%c.8\t%12-15,22R, %0-3,5R, #%16-18d"},
|
nkeynes@1265 | 678 | {FPU_NEON_EXT_V1, 0xf3880610, 0xffb80f90, "vqshlu%c.s8\t%12-15,22R, %0-3,5R, #%16-18d"},
|
nkeynes@1265 | 679 | {FPU_NEON_EXT_V1, 0xf2900810, 0xfeb00fd0, "vqshrun%c.s32\t%12-15,22D, %0-3,5Q, #%16-19e"},
|
nkeynes@1265 | 680 | {FPU_NEON_EXT_V1, 0xf2900850, 0xfeb00fd0, "vqrshrun%c.s32\t%12-15,22D, %0-3,5Q, #%16-19e"},
|
nkeynes@1265 | 681 | {FPU_NEON_EXT_V1, 0xf2900910, 0xfeb00fd0, "vqshrn%c.%24?us32\t%12-15,22D, %0-3,5Q, #%16-19e"},
|
nkeynes@1265 | 682 | {FPU_NEON_EXT_V1, 0xf2900950, 0xfeb00fd0, "vqrshrn%c.%24?us32\t%12-15,22D, %0-3,5Q, #%16-19e"},
|
nkeynes@1265 | 683 | {FPU_NEON_EXT_V1, 0xf2900a10, 0xfeb00fd0, "vshll%c.%24?us16\t%12-15,22D, %0-3,5Q, #%16-19d"},
|
nkeynes@1265 | 684 | {FPU_NEON_EXT_V1, 0xf2880010, 0xfeb80f90, "vshr%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
|
nkeynes@1265 | 685 | {FPU_NEON_EXT_V1, 0xf2880110, 0xfeb80f90, "vsra%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
|
nkeynes@1265 | 686 | {FPU_NEON_EXT_V1, 0xf2880210, 0xfeb80f90, "vrshr%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
|
nkeynes@1265 | 687 | {FPU_NEON_EXT_V1, 0xf2880310, 0xfeb80f90, "vrsra%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18e"},
|
nkeynes@1265 | 688 | {FPU_NEON_EXT_V1, 0xf2880710, 0xfeb80f90, "vqshl%c.%24?us8\t%12-15,22R, %0-3,5R, #%16-18d"},
|
nkeynes@1265 | 689 | {FPU_NEON_EXT_V1, 0xf2a00810, 0xffa00fd0, "vshrn%c.i64\t%12-15,22D, %0-3,5Q, #%16-20e"},
|
nkeynes@1265 | 690 | {FPU_NEON_EXT_V1, 0xf2a00850, 0xffa00fd0, "vrshrn%c.i64\t%12-15,22D, %0-3,5Q, #%16-20e"},
|
nkeynes@1265 | 691 | {FPU_NEON_EXT_V1, 0xf2900510, 0xffb00f90, "vshl%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19d"},
|
nkeynes@1265 | 692 | {FPU_NEON_EXT_V1, 0xf3900410, 0xffb00f90, "vsri%c.16\t%12-15,22R, %0-3,5R, #%16-19e"},
|
nkeynes@1265 | 693 | {FPU_NEON_EXT_V1, 0xf3900510, 0xffb00f90, "vsli%c.16\t%12-15,22R, %0-3,5R, #%16-19d"},
|
nkeynes@1265 | 694 | {FPU_NEON_EXT_V1, 0xf3900610, 0xffb00f90, "vqshlu%c.s16\t%12-15,22R, %0-3,5R, #%16-19d"},
|
nkeynes@1265 | 695 | {FPU_NEON_EXT_V1, 0xf2a00a10, 0xfea00fd0, "vshll%c.%24?us32\t%12-15,22D, %0-3,5Q, #%16-20d"},
|
nkeynes@1265 | 696 | {FPU_NEON_EXT_V1, 0xf2900010, 0xfeb00f90, "vshr%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
|
nkeynes@1265 | 697 | {FPU_NEON_EXT_V1, 0xf2900110, 0xfeb00f90, "vsra%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
|
nkeynes@1265 | 698 | {FPU_NEON_EXT_V1, 0xf2900210, 0xfeb00f90, "vrshr%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
|
nkeynes@1265 | 699 | {FPU_NEON_EXT_V1, 0xf2900310, 0xfeb00f90, "vrsra%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19e"},
|
nkeynes@1265 | 700 | {FPU_NEON_EXT_V1, 0xf2900710, 0xfeb00f90, "vqshl%c.%24?us16\t%12-15,22R, %0-3,5R, #%16-19d"},
|
nkeynes@1265 | 701 | {FPU_NEON_EXT_V1, 0xf2a00810, 0xfea00fd0, "vqshrun%c.s64\t%12-15,22D, %0-3,5Q, #%16-20e"},
|
nkeynes@1265 | 702 | {FPU_NEON_EXT_V1, 0xf2a00850, 0xfea00fd0, "vqrshrun%c.s64\t%12-15,22D, %0-3,5Q, #%16-20e"},
|
nkeynes@1265 | 703 | {FPU_NEON_EXT_V1, 0xf2a00910, 0xfea00fd0, "vqshrn%c.%24?us64\t%12-15,22D, %0-3,5Q, #%16-20e"},
|
nkeynes@1265 | 704 | {FPU_NEON_EXT_V1, 0xf2a00950, 0xfea00fd0, "vqrshrn%c.%24?us64\t%12-15,22D, %0-3,5Q, #%16-20e"},
|
nkeynes@1265 | 705 | {FPU_NEON_EXT_V1, 0xf2a00510, 0xffa00f90, "vshl%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20d"},
|
nkeynes@1265 | 706 | {FPU_NEON_EXT_V1, 0xf3a00410, 0xffa00f90, "vsri%c.32\t%12-15,22R, %0-3,5R, #%16-20e"},
|
nkeynes@1265 | 707 | {FPU_NEON_EXT_V1, 0xf3a00510, 0xffa00f90, "vsli%c.32\t%12-15,22R, %0-3,5R, #%16-20d"},
|
nkeynes@1265 | 708 | {FPU_NEON_EXT_V1, 0xf3a00610, 0xffa00f90, "vqshlu%c.s32\t%12-15,22R, %0-3,5R, #%16-20d"},
|
nkeynes@1265 | 709 | {FPU_NEON_EXT_V1, 0xf2a00010, 0xfea00f90, "vshr%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
|
nkeynes@1265 | 710 | {FPU_NEON_EXT_V1, 0xf2a00110, 0xfea00f90, "vsra%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
|
nkeynes@1265 | 711 | {FPU_NEON_EXT_V1, 0xf2a00210, 0xfea00f90, "vrshr%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
|
nkeynes@1265 | 712 | {FPU_NEON_EXT_V1, 0xf2a00310, 0xfea00f90, "vrsra%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20e"},
|
nkeynes@1265 | 713 | {FPU_NEON_EXT_V1, 0xf2a00710, 0xfea00f90, "vqshl%c.%24?us32\t%12-15,22R, %0-3,5R, #%16-20d"},
|
nkeynes@1265 | 714 | {FPU_NEON_EXT_V1, 0xf2800590, 0xff800f90, "vshl%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21d"},
|
nkeynes@1265 | 715 | {FPU_NEON_EXT_V1, 0xf3800490, 0xff800f90, "vsri%c.64\t%12-15,22R, %0-3,5R, #%16-21e"},
|
nkeynes@1265 | 716 | {FPU_NEON_EXT_V1, 0xf3800590, 0xff800f90, "vsli%c.64\t%12-15,22R, %0-3,5R, #%16-21d"},
|
nkeynes@1265 | 717 | {FPU_NEON_EXT_V1, 0xf3800690, 0xff800f90, "vqshlu%c.s64\t%12-15,22R, %0-3,5R, #%16-21d"},
|
nkeynes@1265 | 718 | {FPU_NEON_EXT_V1, 0xf2800090, 0xfe800f90, "vshr%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
|
nkeynes@1265 | 719 | {FPU_NEON_EXT_V1, 0xf2800190, 0xfe800f90, "vsra%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
|
nkeynes@1265 | 720 | {FPU_NEON_EXT_V1, 0xf2800290, 0xfe800f90, "vrshr%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
|
nkeynes@1265 | 721 | {FPU_NEON_EXT_V1, 0xf2800390, 0xfe800f90, "vrsra%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21e"},
|
nkeynes@1265 | 722 | {FPU_NEON_EXT_V1, 0xf2800790, 0xfe800f90, "vqshl%c.%24?us64\t%12-15,22R, %0-3,5R, #%16-21d"},
|
nkeynes@1265 | 723 | {FPU_NEON_EXT_V1, 0xf2a00e10, 0xfea00e90, "vcvt%c.%24,8?usff32.%24,8?ffus32\t%12-15,22R, %0-3,5R, #%16-20e"},
|
nkeynes@1265 | 724 |
|
nkeynes@1265 | 725 | /* Three registers of different lengths. */
|
nkeynes@1265 | 726 | {FPU_NEON_EXT_V1, 0xf2800e00, 0xfea00f50, "vmull%c.p%20S0\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 727 | {FPU_NEON_EXT_V1, 0xf2800400, 0xff800f50, "vaddhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
|
nkeynes@1265 | 728 | {FPU_NEON_EXT_V1, 0xf2800600, 0xff800f50, "vsubhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
|
nkeynes@1265 | 729 | {FPU_NEON_EXT_V1, 0xf2800900, 0xff800f50, "vqdmlal%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 730 | {FPU_NEON_EXT_V1, 0xf2800b00, 0xff800f50, "vqdmlsl%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 731 | {FPU_NEON_EXT_V1, 0xf2800d00, 0xff800f50, "vqdmull%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 732 | {FPU_NEON_EXT_V1, 0xf3800400, 0xff800f50, "vraddhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
|
nkeynes@1265 | 733 | {FPU_NEON_EXT_V1, 0xf3800600, 0xff800f50, "vrsubhn%c.i%20-21T2\t%12-15,22D, %16-19,7Q, %0-3,5Q"},
|
nkeynes@1265 | 734 | {FPU_NEON_EXT_V1, 0xf2800000, 0xfe800f50, "vaddl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 735 | {FPU_NEON_EXT_V1, 0xf2800100, 0xfe800f50, "vaddw%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7Q, %0-3,5D"},
|
nkeynes@1265 | 736 | {FPU_NEON_EXT_V1, 0xf2800200, 0xfe800f50, "vsubl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 737 | {FPU_NEON_EXT_V1, 0xf2800300, 0xfe800f50, "vsubw%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7Q, %0-3,5D"},
|
nkeynes@1265 | 738 | {FPU_NEON_EXT_V1, 0xf2800500, 0xfe800f50, "vabal%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 739 | {FPU_NEON_EXT_V1, 0xf2800700, 0xfe800f50, "vabdl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 740 | {FPU_NEON_EXT_V1, 0xf2800800, 0xfe800f50, "vmlal%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 741 | {FPU_NEON_EXT_V1, 0xf2800a00, 0xfe800f50, "vmlsl%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 742 | {FPU_NEON_EXT_V1, 0xf2800c00, 0xfe800f50, "vmull%c.%24?us%20-21S2\t%12-15,22Q, %16-19,7D, %0-3,5D"},
|
nkeynes@1265 | 743 |
|
nkeynes@1265 | 744 | /* Two registers and a scalar. */
|
nkeynes@1265 | 745 | {FPU_NEON_EXT_V1, 0xf2800040, 0xff800f50, "vmla%c.i%20-21S6\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 746 | {FPU_NEON_EXT_V1, 0xf2800140, 0xff800f50, "vmla%c.f%20-21Sa\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 747 | {FPU_NEON_EXT_V1, 0xf2800340, 0xff800f50, "vqdmlal%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
|
nkeynes@1265 | 748 | {FPU_NEON_EXT_V1, 0xf2800440, 0xff800f50, "vmls%c.i%20-21S6\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 749 | {FPU_NEON_EXT_V1, 0xf2800540, 0xff800f50, "vmls%c.f%20-21S6\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 750 | {FPU_NEON_EXT_V1, 0xf2800740, 0xff800f50, "vqdmlsl%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
|
nkeynes@1265 | 751 | {FPU_NEON_EXT_V1, 0xf2800840, 0xff800f50, "vmul%c.i%20-21S6\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 752 | {FPU_NEON_EXT_V1, 0xf2800940, 0xff800f50, "vmul%c.f%20-21Sa\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 753 | {FPU_NEON_EXT_V1, 0xf2800b40, 0xff800f50, "vqdmull%c.s%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
|
nkeynes@1265 | 754 | {FPU_NEON_EXT_V1, 0xf2800c40, 0xff800f50, "vqdmulh%c.s%20-21S6\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 755 | {FPU_NEON_EXT_V1, 0xf2800d40, 0xff800f50, "vqrdmulh%c.s%20-21S6\t%12-15,22D, %16-19,7D, %D"},
|
nkeynes@1265 | 756 | {FPU_NEON_EXT_V1, 0xf3800040, 0xff800f50, "vmla%c.i%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 757 | {FPU_NEON_EXT_V1, 0xf3800140, 0xff800f50, "vmla%c.f%20-21Sa\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 758 | {FPU_NEON_EXT_V1, 0xf3800440, 0xff800f50, "vmls%c.i%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 759 | {FPU_NEON_EXT_V1, 0xf3800540, 0xff800f50, "vmls%c.f%20-21Sa\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 760 | {FPU_NEON_EXT_V1, 0xf3800840, 0xff800f50, "vmul%c.i%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 761 | {FPU_NEON_EXT_V1, 0xf3800940, 0xff800f50, "vmul%c.f%20-21Sa\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 762 | {FPU_NEON_EXT_V1, 0xf3800c40, 0xff800f50, "vqdmulh%c.s%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 763 | {FPU_NEON_EXT_V1, 0xf3800d40, 0xff800f50, "vqrdmulh%c.s%20-21S6\t%12-15,22Q, %16-19,7Q, %D"},
|
nkeynes@1265 | 764 | {FPU_NEON_EXT_V1, 0xf2800240, 0xfe800f50, "vmlal%c.%24?us%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
|
nkeynes@1265 | 765 | {FPU_NEON_EXT_V1, 0xf2800640, 0xfe800f50, "vmlsl%c.%24?us%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
|
nkeynes@1265 | 766 | {FPU_NEON_EXT_V1, 0xf2800a40, 0xfe800f50, "vmull%c.%24?us%20-21S6\t%12-15,22Q, %16-19,7D, %D"},
|
nkeynes@1265 | 767 |
|
nkeynes@1265 | 768 | /* Element and structure load/store. */
|
nkeynes@1265 | 769 | {FPU_NEON_EXT_V1, 0xf4a00fc0, 0xffb00fc0, "vld4%c.32\t%C"},
|
nkeynes@1265 | 770 | {FPU_NEON_EXT_V1, 0xf4a00c00, 0xffb00f00, "vld1%c.%6-7S2\t%C"},
|
nkeynes@1265 | 771 | {FPU_NEON_EXT_V1, 0xf4a00d00, 0xffb00f00, "vld2%c.%6-7S2\t%C"},
|
nkeynes@1265 | 772 | {FPU_NEON_EXT_V1, 0xf4a00e00, 0xffb00f00, "vld3%c.%6-7S2\t%C"},
|
nkeynes@1265 | 773 | {FPU_NEON_EXT_V1, 0xf4a00f00, 0xffb00f00, "vld4%c.%6-7S2\t%C"},
|
nkeynes@1265 | 774 | {FPU_NEON_EXT_V1, 0xf4000200, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
|
nkeynes@1265 | 775 | {FPU_NEON_EXT_V1, 0xf4000300, 0xff900f00, "v%21?ls%21?dt2%c.%6-7S2\t%A"},
|
nkeynes@1265 | 776 | {FPU_NEON_EXT_V1, 0xf4000400, 0xff900f00, "v%21?ls%21?dt3%c.%6-7S2\t%A"},
|
nkeynes@1265 | 777 | {FPU_NEON_EXT_V1, 0xf4000500, 0xff900f00, "v%21?ls%21?dt3%c.%6-7S2\t%A"},
|
nkeynes@1265 | 778 | {FPU_NEON_EXT_V1, 0xf4000600, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
|
nkeynes@1265 | 779 | {FPU_NEON_EXT_V1, 0xf4000700, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
|
nkeynes@1265 | 780 | {FPU_NEON_EXT_V1, 0xf4000800, 0xff900f00, "v%21?ls%21?dt2%c.%6-7S2\t%A"},
|
nkeynes@1265 | 781 | {FPU_NEON_EXT_V1, 0xf4000900, 0xff900f00, "v%21?ls%21?dt2%c.%6-7S2\t%A"},
|
nkeynes@1265 | 782 | {FPU_NEON_EXT_V1, 0xf4000a00, 0xff900f00, "v%21?ls%21?dt1%c.%6-7S3\t%A"},
|
nkeynes@1265 | 783 | {FPU_NEON_EXT_V1, 0xf4000000, 0xff900e00, "v%21?ls%21?dt4%c.%6-7S2\t%A"},
|
nkeynes@1265 | 784 | {FPU_NEON_EXT_V1, 0xf4800000, 0xff900300, "v%21?ls%21?dt1%c.%10-11S2\t%B"},
|
nkeynes@1265 | 785 | {FPU_NEON_EXT_V1, 0xf4800100, 0xff900300, "v%21?ls%21?dt2%c.%10-11S2\t%B"},
|
nkeynes@1265 | 786 | {FPU_NEON_EXT_V1, 0xf4800200, 0xff900300, "v%21?ls%21?dt3%c.%10-11S2\t%B"},
|
nkeynes@1265 | 787 | {FPU_NEON_EXT_V1, 0xf4800300, 0xff900300, "v%21?ls%21?dt4%c.%10-11S2\t%B"},
|
nkeynes@1265 | 788 |
|
nkeynes@1265 | 789 | {0,0 ,0, 0}
|
nkeynes@1265 | 790 | };
|
nkeynes@1265 | 791 |
|
nkeynes@1265 | 792 | /* Opcode tables: ARM, 16-bit Thumb, 32-bit Thumb. All three are partially
|
nkeynes@1265 | 793 | ordered: they must be searched linearly from the top to obtain a correct
|
nkeynes@1265 | 794 | match. */
|
nkeynes@1265 | 795 |
|
nkeynes@1265 | 796 | /* print_insn_arm recognizes the following format control codes:
|
nkeynes@1265 | 797 |
|
nkeynes@1265 | 798 | %% %
|
nkeynes@1265 | 799 |
|
nkeynes@1265 | 800 | %a print address for ldr/str instruction
|
nkeynes@1265 | 801 | %s print address for ldr/str halfword/signextend instruction
|
nkeynes@1265 | 802 | %S like %s but allow UNPREDICTABLE addressing
|
nkeynes@1265 | 803 | %b print branch destination
|
nkeynes@1265 | 804 | %c print condition code (always bits 28-31)
|
nkeynes@1265 | 805 | %m print register mask for ldm/stm instruction
|
nkeynes@1265 | 806 | %o print operand2 (immediate or register + shift)
|
nkeynes@1265 | 807 | %p print 'p' iff bits 12-15 are 15
|
nkeynes@1265 | 808 | %t print 't' iff bit 21 set and bit 24 clear
|
nkeynes@1265 | 809 | %B print arm BLX(1) destination
|
nkeynes@1265 | 810 | %C print the PSR sub type.
|
nkeynes@1265 | 811 | %U print barrier type.
|
nkeynes@1265 | 812 | %P print address for pli instruction.
|
nkeynes@1265 | 813 |
|
nkeynes@1265 | 814 | %<bitfield>r print as an ARM register
|
nkeynes@1265 | 815 | %<bitfield>R as %r but r15 is UNPREDICTABLE
|
nkeynes@1265 | 816 | %<bitfield>{r|R}u as %{r|R} but if matches the other %u field then is UNPREDICTABLE
|
nkeynes@1265 | 817 | %<bitfield>{r|R}U as %{r|R} but if matches the other %U field then is UNPREDICTABLE
|
nkeynes@1265 | 818 | %<bitfield>d print the bitfield in decimal
|
nkeynes@1265 | 819 | %<bitfield>W print the bitfield plus one in decimal
|
nkeynes@1265 | 820 | %<bitfield>x print the bitfield in hex
|
nkeynes@1265 | 821 | %<bitfield>X print the bitfield as 1 hex digit without leading "0x"
|
nkeynes@1265 | 822 |
|
nkeynes@1265 | 823 | %<bitfield>'c print specified char iff bitfield is all ones
|
nkeynes@1265 | 824 | %<bitfield>`c print specified char iff bitfield is all zeroes
|
nkeynes@1265 | 825 | %<bitfield>?ab... select from array of values in big endian order
|
nkeynes@1265 | 826 |
|
nkeynes@1265 | 827 | %e print arm SMI operand (bits 0..7,8..19).
|
nkeynes@1265 | 828 | %E print the LSB and WIDTH fields of a BFI or BFC instruction.
|
nkeynes@1265 | 829 | %V print the 16-bit immediate field of a MOVT or MOVW instruction.
|
nkeynes@1265 | 830 | %R print the SPSR/CPSR or banked register of an MRS. */
|
nkeynes@1265 | 831 |
|
nkeynes@1265 | 832 | static const struct opcode32 arm_opcodes[] =
|
nkeynes@1265 | 833 | {
|
nkeynes@1265 | 834 | /* ARM instructions. */
|
nkeynes@1265 | 835 | {ARM_EXT_V1, 0xe1a00000, 0xffffffff, "nop\t\t\t; (mov r0, r0)"},
|
nkeynes@1265 | 836 | {ARM_EXT_V4T | ARM_EXT_V5, 0x012FFF10, 0x0ffffff0, "bx%c\t%0-3r"},
|
nkeynes@1265 | 837 | {ARM_EXT_V2, 0x00000090, 0x0fe000f0, "mul%20's%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 838 | {ARM_EXT_V2, 0x00200090, 0x0fe000f0, "mla%20's%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 839 | {ARM_EXT_V2S, 0x01000090, 0x0fb00ff0, "swp%22'b%c\t%12-15RU, %0-3Ru, [%16-19RuU]"},
|
nkeynes@1265 | 840 | {ARM_EXT_V3M, 0x00800090, 0x0fa000f0, "%22?sumull%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 841 | {ARM_EXT_V3M, 0x00a00090, 0x0fa000f0, "%22?sumlal%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 842 |
|
nkeynes@1265 | 843 | /* Virtualization Extension instructions. */
|
nkeynes@1265 | 844 | {ARM_EXT_VIRT, 0x0160006e, 0x0fffffff, "eret%c"},
|
nkeynes@1265 | 845 | {ARM_EXT_VIRT, 0x01400070, 0x0ff000f0, "hvc%c\t%e"},
|
nkeynes@1265 | 846 |
|
nkeynes@1265 | 847 | /* Integer Divide Extension instructions. */
|
nkeynes@1265 | 848 | {ARM_EXT_ADIV, 0x0710f010, 0x0ff0f0f0, "sdiv%c\t%16-19r, %0-3r, %8-11r"},
|
nkeynes@1265 | 849 | {ARM_EXT_ADIV, 0x0730f010, 0x0ff0f0f0, "udiv%c\t%16-19r, %0-3r, %8-11r"},
|
nkeynes@1265 | 850 |
|
nkeynes@1265 | 851 | /* MP Extension instructions. */
|
nkeynes@1265 | 852 | {ARM_EXT_MP, 0xf410f000, 0xfc70f000, "pldw\t%a"},
|
nkeynes@1265 | 853 |
|
nkeynes@1265 | 854 | /* V7 instructions. */
|
nkeynes@1265 | 855 | {ARM_EXT_V7, 0xf450f000, 0xfd70f000, "pli\t%P"},
|
nkeynes@1265 | 856 | {ARM_EXT_V7, 0x0320f0f0, 0x0ffffff0, "dbg%c\t#%0-3d"},
|
nkeynes@1265 | 857 | {ARM_EXT_V7, 0xf57ff050, 0xfffffff0, "dmb\t%U"},
|
nkeynes@1265 | 858 | {ARM_EXT_V7, 0xf57ff040, 0xfffffff0, "dsb\t%U"},
|
nkeynes@1265 | 859 | {ARM_EXT_V7, 0xf57ff060, 0xfffffff0, "isb\t%U"},
|
nkeynes@1265 | 860 |
|
nkeynes@1265 | 861 | /* ARM V6T2 instructions. */
|
nkeynes@1265 | 862 | {ARM_EXT_V6T2, 0x07c0001f, 0x0fe0007f, "bfc%c\t%12-15R, %E"},
|
nkeynes@1265 | 863 | {ARM_EXT_V6T2, 0x07c00010, 0x0fe00070, "bfi%c\t%12-15R, %0-3r, %E"},
|
nkeynes@1265 | 864 | {ARM_EXT_V6T2, 0x00600090, 0x0ff000f0, "mls%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 865 | {ARM_EXT_V6T2, 0x006000b0, 0x0f7000f0, "strht%c\t%12-15R, %S"},
|
nkeynes@1265 | 866 |
|
nkeynes@1265 | 867 | {ARM_EXT_V6T2, 0x00300090, 0x0f3000f0, UNDEFINED_INSTRUCTION },
|
nkeynes@1265 | 868 | {ARM_EXT_V6T2, 0x00300090, 0x0f300090, "ldr%6's%5?hbt%c\t%12-15R, %S"},
|
nkeynes@1265 | 869 |
|
nkeynes@1265 | 870 | {ARM_EXT_V6T2, 0x03000000, 0x0ff00000, "movw%c\t%12-15R, %V"},
|
nkeynes@1265 | 871 | {ARM_EXT_V6T2, 0x03400000, 0x0ff00000, "movt%c\t%12-15R, %V"},
|
nkeynes@1265 | 872 | {ARM_EXT_V6T2, 0x06ff0f30, 0x0fff0ff0, "rbit%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 873 | {ARM_EXT_V6T2, 0x07a00050, 0x0fa00070, "%22?usbfx%c\t%12-15r, %0-3r, #%7-11d, #%16-20W"},
|
nkeynes@1265 | 874 |
|
nkeynes@1265 | 875 | /* ARM Security extension instructions. */
|
nkeynes@1265 | 876 | {ARM_EXT_SEC, 0x01600070, 0x0ff000f0, "smc%c\t%e"},
|
nkeynes@1265 | 877 |
|
nkeynes@1265 | 878 | /* ARM V6K instructions. */
|
nkeynes@1265 | 879 | {ARM_EXT_V6K, 0xf57ff01f, 0xffffffff, "clrex"},
|
nkeynes@1265 | 880 | {ARM_EXT_V6K, 0x01d00f9f, 0x0ff00fff, "ldrexb%c\t%12-15R, [%16-19R]"},
|
nkeynes@1265 | 881 | {ARM_EXT_V6K, 0x01b00f9f, 0x0ff00fff, "ldrexd%c\t%12-15r, [%16-19R]"},
|
nkeynes@1265 | 882 | {ARM_EXT_V6K, 0x01f00f9f, 0x0ff00fff, "ldrexh%c\t%12-15R, [%16-19R]"},
|
nkeynes@1265 | 883 | {ARM_EXT_V6K, 0x01c00f90, 0x0ff00ff0, "strexb%c\t%12-15R, %0-3R, [%16-19R]"},
|
nkeynes@1265 | 884 | {ARM_EXT_V6K, 0x01a00f90, 0x0ff00ff0, "strexd%c\t%12-15R, %0-3r, [%16-19R]"},
|
nkeynes@1265 | 885 | {ARM_EXT_V6K, 0x01e00f90, 0x0ff00ff0, "strexh%c\t%12-15R, %0-3R, [%16-19R]"},
|
nkeynes@1265 | 886 |
|
nkeynes@1265 | 887 | /* ARM V6K NOP hints. */
|
nkeynes@1265 | 888 | {ARM_EXT_V6K, 0x0320f001, 0x0fffffff, "yield%c"},
|
nkeynes@1265 | 889 | {ARM_EXT_V6K, 0x0320f002, 0x0fffffff, "wfe%c"},
|
nkeynes@1265 | 890 | {ARM_EXT_V6K, 0x0320f003, 0x0fffffff, "wfi%c"},
|
nkeynes@1265 | 891 | {ARM_EXT_V6K, 0x0320f004, 0x0fffffff, "sev%c"},
|
nkeynes@1265 | 892 | {ARM_EXT_V6K, 0x0320f000, 0x0fffff00, "nop%c\t{%0-7d}"},
|
nkeynes@1265 | 893 |
|
nkeynes@1265 | 894 | /* ARM V6 instructions. */
|
nkeynes@1265 | 895 | {ARM_EXT_V6, 0xf1080000, 0xfffffe3f, "cpsie\t%8'a%7'i%6'f"},
|
nkeynes@1265 | 896 | {ARM_EXT_V6, 0xf10a0000, 0xfffffe20, "cpsie\t%8'a%7'i%6'f,#%0-4d"},
|
nkeynes@1265 | 897 | {ARM_EXT_V6, 0xf10C0000, 0xfffffe3f, "cpsid\t%8'a%7'i%6'f"},
|
nkeynes@1265 | 898 | {ARM_EXT_V6, 0xf10e0000, 0xfffffe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
|
nkeynes@1265 | 899 | {ARM_EXT_V6, 0xf1000000, 0xfff1fe20, "cps\t#%0-4d"},
|
nkeynes@1265 | 900 | {ARM_EXT_V6, 0x06800010, 0x0ff00ff0, "pkhbt%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 901 | {ARM_EXT_V6, 0x06800010, 0x0ff00070, "pkhbt%c\t%12-15R, %16-19R, %0-3R, lsl #%7-11d"},
|
nkeynes@1265 | 902 | {ARM_EXT_V6, 0x06800050, 0x0ff00ff0, "pkhtb%c\t%12-15R, %16-19R, %0-3R, asr #32"},
|
nkeynes@1265 | 903 | {ARM_EXT_V6, 0x06800050, 0x0ff00070, "pkhtb%c\t%12-15R, %16-19R, %0-3R, asr #%7-11d"},
|
nkeynes@1265 | 904 | {ARM_EXT_V6, 0x01900f9f, 0x0ff00fff, "ldrex%c\tr%12-15d, [%16-19R]"},
|
nkeynes@1265 | 905 | {ARM_EXT_V6, 0x06200f10, 0x0ff00ff0, "qadd16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 906 | {ARM_EXT_V6, 0x06200f90, 0x0ff00ff0, "qadd8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 907 | {ARM_EXT_V6, 0x06200f30, 0x0ff00ff0, "qasx%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 908 | {ARM_EXT_V6, 0x06200f70, 0x0ff00ff0, "qsub16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 909 | {ARM_EXT_V6, 0x06200ff0, 0x0ff00ff0, "qsub8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 910 | {ARM_EXT_V6, 0x06200f50, 0x0ff00ff0, "qsax%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 911 | {ARM_EXT_V6, 0x06100f10, 0x0ff00ff0, "sadd16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 912 | {ARM_EXT_V6, 0x06100f90, 0x0ff00ff0, "sadd8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 913 | {ARM_EXT_V6, 0x06100f30, 0x0ff00ff0, "sasx%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 914 | {ARM_EXT_V6, 0x06300f10, 0x0ff00ff0, "shadd16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 915 | {ARM_EXT_V6, 0x06300f90, 0x0ff00ff0, "shadd8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 916 | {ARM_EXT_V6, 0x06300f30, 0x0ff00ff0, "shasx%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 917 | {ARM_EXT_V6, 0x06300f70, 0x0ff00ff0, "shsub16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 918 | {ARM_EXT_V6, 0x06300ff0, 0x0ff00ff0, "shsub8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 919 | {ARM_EXT_V6, 0x06300f50, 0x0ff00ff0, "shsax%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 920 | {ARM_EXT_V6, 0x06100f70, 0x0ff00ff0, "ssub16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 921 | {ARM_EXT_V6, 0x06100ff0, 0x0ff00ff0, "ssub8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 922 | {ARM_EXT_V6, 0x06100f50, 0x0ff00ff0, "ssax%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 923 | {ARM_EXT_V6, 0x06500f10, 0x0ff00ff0, "uadd16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 924 | {ARM_EXT_V6, 0x06500f90, 0x0ff00ff0, "uadd8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 925 | {ARM_EXT_V6, 0x06500f30, 0x0ff00ff0, "uasx%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 926 | {ARM_EXT_V6, 0x06700f10, 0x0ff00ff0, "uhadd16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 927 | {ARM_EXT_V6, 0x06700f90, 0x0ff00ff0, "uhadd8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 928 | {ARM_EXT_V6, 0x06700f30, 0x0ff00ff0, "uhasx%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 929 | {ARM_EXT_V6, 0x06700f70, 0x0ff00ff0, "uhsub16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 930 | {ARM_EXT_V6, 0x06700ff0, 0x0ff00ff0, "uhsub8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 931 | {ARM_EXT_V6, 0x06700f50, 0x0ff00ff0, "uhsax%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 932 | {ARM_EXT_V6, 0x06600f10, 0x0ff00ff0, "uqadd16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 933 | {ARM_EXT_V6, 0x06600f90, 0x0ff00ff0, "uqadd8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 934 | {ARM_EXT_V6, 0x06600f30, 0x0ff00ff0, "uqasx%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 935 | {ARM_EXT_V6, 0x06600f70, 0x0ff00ff0, "uqsub16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 936 | {ARM_EXT_V6, 0x06600ff0, 0x0ff00ff0, "uqsub8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 937 | {ARM_EXT_V6, 0x06600f50, 0x0ff00ff0, "uqsax%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 938 | {ARM_EXT_V6, 0x06500f70, 0x0ff00ff0, "usub16%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 939 | {ARM_EXT_V6, 0x06500ff0, 0x0ff00ff0, "usub8%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 940 | {ARM_EXT_V6, 0x06500f50, 0x0ff00ff0, "usax%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 941 | {ARM_EXT_V6, 0x06bf0f30, 0x0fff0ff0, "rev%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 942 | {ARM_EXT_V6, 0x06bf0fb0, 0x0fff0ff0, "rev16%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 943 | {ARM_EXT_V6, 0x06ff0fb0, 0x0fff0ff0, "revsh%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 944 | {ARM_EXT_V6, 0xf8100a00, 0xfe50ffff, "rfe%23?id%24?ba\t%16-19r%21'!"},
|
nkeynes@1265 | 945 | {ARM_EXT_V6, 0x06bf0070, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 946 | {ARM_EXT_V6, 0x06bf0470, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R, ror #8"},
|
nkeynes@1265 | 947 | {ARM_EXT_V6, 0x06bf0870, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R, ror #16"},
|
nkeynes@1265 | 948 | {ARM_EXT_V6, 0x06bf0c70, 0x0fff0ff0, "sxth%c\t%12-15R, %0-3R, ror #24"},
|
nkeynes@1265 | 949 | {ARM_EXT_V6, 0x068f0070, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 950 | {ARM_EXT_V6, 0x068f0470, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R, ror #8"},
|
nkeynes@1265 | 951 | {ARM_EXT_V6, 0x068f0870, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R, ror #16"},
|
nkeynes@1265 | 952 | {ARM_EXT_V6, 0x068f0c70, 0x0fff0ff0, "sxtb16%c\t%12-15R, %0-3R, ror #24"},
|
nkeynes@1265 | 953 | {ARM_EXT_V6, 0x06af0070, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 954 | {ARM_EXT_V6, 0x06af0470, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R, ror #8"},
|
nkeynes@1265 | 955 | {ARM_EXT_V6, 0x06af0870, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R, ror #16"},
|
nkeynes@1265 | 956 | {ARM_EXT_V6, 0x06af0c70, 0x0fff0ff0, "sxtb%c\t%12-15R, %0-3R, ror #24"},
|
nkeynes@1265 | 957 | {ARM_EXT_V6, 0x06ff0070, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 958 | {ARM_EXT_V6, 0x06ff0470, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R, ror #8"},
|
nkeynes@1265 | 959 | {ARM_EXT_V6, 0x06ff0870, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R, ror #16"},
|
nkeynes@1265 | 960 | {ARM_EXT_V6, 0x06ff0c70, 0x0fff0ff0, "uxth%c\t%12-15R, %0-3R, ror #24"},
|
nkeynes@1265 | 961 | {ARM_EXT_V6, 0x06cf0070, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 962 | {ARM_EXT_V6, 0x06cf0470, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R, ror #8"},
|
nkeynes@1265 | 963 | {ARM_EXT_V6, 0x06cf0870, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R, ror #16"},
|
nkeynes@1265 | 964 | {ARM_EXT_V6, 0x06cf0c70, 0x0fff0ff0, "uxtb16%c\t%12-15R, %0-3R, ror #24"},
|
nkeynes@1265 | 965 | {ARM_EXT_V6, 0x06ef0070, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 966 | {ARM_EXT_V6, 0x06ef0470, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R, ror #8"},
|
nkeynes@1265 | 967 | {ARM_EXT_V6, 0x06ef0870, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R, ror #16"},
|
nkeynes@1265 | 968 | {ARM_EXT_V6, 0x06ef0c70, 0x0fff0ff0, "uxtb%c\t%12-15R, %0-3R, ror #24"},
|
nkeynes@1265 | 969 | {ARM_EXT_V6, 0x06b00070, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R"},
|
nkeynes@1265 | 970 | {ARM_EXT_V6, 0x06b00470, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R, ror #8"},
|
nkeynes@1265 | 971 | {ARM_EXT_V6, 0x06b00870, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R, ror #16"},
|
nkeynes@1265 | 972 | {ARM_EXT_V6, 0x06b00c70, 0x0ff00ff0, "sxtah%c\t%12-15R, %16-19r, %0-3R, ror #24"},
|
nkeynes@1265 | 973 | {ARM_EXT_V6, 0x06800070, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R"},
|
nkeynes@1265 | 974 | {ARM_EXT_V6, 0x06800470, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R, ror #8"},
|
nkeynes@1265 | 975 | {ARM_EXT_V6, 0x06800870, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R, ror #16"},
|
nkeynes@1265 | 976 | {ARM_EXT_V6, 0x06800c70, 0x0ff00ff0, "sxtab16%c\t%12-15R, %16-19r, %0-3R, ror #24"},
|
nkeynes@1265 | 977 | {ARM_EXT_V6, 0x06a00070, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R"},
|
nkeynes@1265 | 978 | {ARM_EXT_V6, 0x06a00470, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R, ror #8"},
|
nkeynes@1265 | 979 | {ARM_EXT_V6, 0x06a00870, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R, ror #16"},
|
nkeynes@1265 | 980 | {ARM_EXT_V6, 0x06a00c70, 0x0ff00ff0, "sxtab%c\t%12-15R, %16-19r, %0-3R, ror #24"},
|
nkeynes@1265 | 981 | {ARM_EXT_V6, 0x06f00070, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R"},
|
nkeynes@1265 | 982 | {ARM_EXT_V6, 0x06f00470, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R, ror #8"},
|
nkeynes@1265 | 983 | {ARM_EXT_V6, 0x06f00870, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R, ror #16"},
|
nkeynes@1265 | 984 | {ARM_EXT_V6, 0x06f00c70, 0x0ff00ff0, "uxtah%c\t%12-15R, %16-19r, %0-3R, ror #24"},
|
nkeynes@1265 | 985 | {ARM_EXT_V6, 0x06c00070, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R"},
|
nkeynes@1265 | 986 | {ARM_EXT_V6, 0x06c00470, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R, ror #8"},
|
nkeynes@1265 | 987 | {ARM_EXT_V6, 0x06c00870, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R, ror #16"},
|
nkeynes@1265 | 988 | {ARM_EXT_V6, 0x06c00c70, 0x0ff00ff0, "uxtab16%c\t%12-15R, %16-19r, %0-3R, ROR #24"},
|
nkeynes@1265 | 989 | {ARM_EXT_V6, 0x06e00070, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R"},
|
nkeynes@1265 | 990 | {ARM_EXT_V6, 0x06e00470, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R, ror #8"},
|
nkeynes@1265 | 991 | {ARM_EXT_V6, 0x06e00870, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R, ror #16"},
|
nkeynes@1265 | 992 | {ARM_EXT_V6, 0x06e00c70, 0x0ff00ff0, "uxtab%c\t%12-15R, %16-19r, %0-3R, ror #24"},
|
nkeynes@1265 | 993 | {ARM_EXT_V6, 0x06800fb0, 0x0ff00ff0, "sel%c\t%12-15R, %16-19R, %0-3R"},
|
nkeynes@1265 | 994 | {ARM_EXT_V6, 0xf1010000, 0xfffffc00, "setend\t%9?ble"},
|
nkeynes@1265 | 995 | {ARM_EXT_V6, 0x0700f010, 0x0ff0f0d0, "smuad%5'x%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 996 | {ARM_EXT_V6, 0x0700f050, 0x0ff0f0d0, "smusd%5'x%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 997 | {ARM_EXT_V6, 0x07000010, 0x0ff000d0, "smlad%5'x%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 998 | {ARM_EXT_V6, 0x07400010, 0x0ff000d0, "smlald%5'x%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 999 | {ARM_EXT_V6, 0x07000050, 0x0ff000d0, "smlsd%5'x%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1000 | {ARM_EXT_V6, 0x07400050, 0x0ff000d0, "smlsld%5'x%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 1001 | {ARM_EXT_V6, 0x0750f010, 0x0ff0f0d0, "smmul%5'r%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1002 | {ARM_EXT_V6, 0x07500010, 0x0ff000d0, "smmla%5'r%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1003 | {ARM_EXT_V6, 0x075000d0, 0x0ff000d0, "smmls%5'r%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1004 | {ARM_EXT_V6, 0xf84d0500, 0xfe5fffe0, "srs%23?id%24?ba\t%16-19r%21'!, #%0-4d"},
|
nkeynes@1265 | 1005 | {ARM_EXT_V6, 0x06a00010, 0x0fe00ff0, "ssat%c\t%12-15R, #%16-20W, %0-3R"},
|
nkeynes@1265 | 1006 | {ARM_EXT_V6, 0x06a00010, 0x0fe00070, "ssat%c\t%12-15R, #%16-20W, %0-3R, lsl #%7-11d"},
|
nkeynes@1265 | 1007 | {ARM_EXT_V6, 0x06a00050, 0x0fe00070, "ssat%c\t%12-15R, #%16-20W, %0-3R, asr #%7-11d"},
|
nkeynes@1265 | 1008 | {ARM_EXT_V6, 0x06a00f30, 0x0ff00ff0, "ssat16%c\t%12-15r, #%16-19W, %0-3r"},
|
nkeynes@1265 | 1009 | {ARM_EXT_V6, 0x01800f90, 0x0ff00ff0, "strex%c\t%12-15R, %0-3R, [%16-19R]"},
|
nkeynes@1265 | 1010 | {ARM_EXT_V6, 0x00400090, 0x0ff000f0, "umaal%c\t%12-15R, %16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1011 | {ARM_EXT_V6, 0x0780f010, 0x0ff0f0f0, "usad8%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1012 | {ARM_EXT_V6, 0x07800010, 0x0ff000f0, "usada8%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1013 | {ARM_EXT_V6, 0x06e00010, 0x0fe00ff0, "usat%c\t%12-15R, #%16-20d, %0-3R"},
|
nkeynes@1265 | 1014 | {ARM_EXT_V6, 0x06e00010, 0x0fe00070, "usat%c\t%12-15R, #%16-20d, %0-3R, lsl #%7-11d"},
|
nkeynes@1265 | 1015 | {ARM_EXT_V6, 0x06e00050, 0x0fe00070, "usat%c\t%12-15R, #%16-20d, %0-3R, asr #%7-11d"},
|
nkeynes@1265 | 1016 | {ARM_EXT_V6, 0x06e00f30, 0x0ff00ff0, "usat16%c\t%12-15R, #%16-19d, %0-3R"},
|
nkeynes@1265 | 1017 |
|
nkeynes@1265 | 1018 | /* V5J instruction. */
|
nkeynes@1265 | 1019 | {ARM_EXT_V5J, 0x012fff20, 0x0ffffff0, "bxj%c\t%0-3R"},
|
nkeynes@1265 | 1020 |
|
nkeynes@1265 | 1021 | /* V5 Instructions. */
|
nkeynes@1265 | 1022 | {ARM_EXT_V5, 0xe1200070, 0xfff000f0, "bkpt\t0x%16-19X%12-15X%8-11X%0-3X"},
|
nkeynes@1265 | 1023 | {ARM_EXT_V5, 0xfa000000, 0xfe000000, "blx\t%B"},
|
nkeynes@1265 | 1024 | {ARM_EXT_V5, 0x012fff30, 0x0ffffff0, "blx%c\t%0-3R"},
|
nkeynes@1265 | 1025 | {ARM_EXT_V5, 0x016f0f10, 0x0fff0ff0, "clz%c\t%12-15R, %0-3R"},
|
nkeynes@1265 | 1026 |
|
nkeynes@1265 | 1027 | /* V5E "El Segundo" Instructions. */
|
nkeynes@1265 | 1028 | {ARM_EXT_V5E, 0x000000d0, 0x0e1000f0, "ldrd%c\t%12-15r, %s"},
|
nkeynes@1265 | 1029 | {ARM_EXT_V5E, 0x000000f0, 0x0e1000f0, "strd%c\t%12-15r, %s"},
|
nkeynes@1265 | 1030 | {ARM_EXT_V5E, 0xf450f000, 0xfc70f000, "pld\t%a"},
|
nkeynes@1265 | 1031 | {ARM_EXT_V5ExP, 0x01000080, 0x0ff000f0, "smlabb%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1032 | {ARM_EXT_V5ExP, 0x010000a0, 0x0ff000f0, "smlatb%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1033 | {ARM_EXT_V5ExP, 0x010000c0, 0x0ff000f0, "smlabt%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1034 | {ARM_EXT_V5ExP, 0x010000e0, 0x0ff000f0, "smlatt%c\t%16-19r, %0-3r, %8-11R, %12-15R"},
|
nkeynes@1265 | 1035 |
|
nkeynes@1265 | 1036 | {ARM_EXT_V5ExP, 0x01200080, 0x0ff000f0, "smlawb%c\t%16-19R, %0-3R, %8-11R, %12-15R"},
|
nkeynes@1265 | 1037 | {ARM_EXT_V5ExP, 0x012000c0, 0x0ff000f0, "smlawt%c\t%16-19R, %0-3r, %8-11R, %12-15R"},
|
nkeynes@1265 | 1038 |
|
nkeynes@1265 | 1039 | {ARM_EXT_V5ExP, 0x01400080, 0x0ff000f0, "smlalbb%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 1040 | {ARM_EXT_V5ExP, 0x014000a0, 0x0ff000f0, "smlaltb%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 1041 | {ARM_EXT_V5ExP, 0x014000c0, 0x0ff000f0, "smlalbt%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 1042 | {ARM_EXT_V5ExP, 0x014000e0, 0x0ff000f0, "smlaltt%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"},
|
nkeynes@1265 | 1043 |
|
nkeynes@1265 | 1044 | {ARM_EXT_V5ExP, 0x01600080, 0x0ff0f0f0, "smulbb%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1045 | {ARM_EXT_V5ExP, 0x016000a0, 0x0ff0f0f0, "smultb%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1046 | {ARM_EXT_V5ExP, 0x016000c0, 0x0ff0f0f0, "smulbt%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1047 | {ARM_EXT_V5ExP, 0x016000e0, 0x0ff0f0f0, "smultt%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1048 |
|
nkeynes@1265 | 1049 | {ARM_EXT_V5ExP, 0x012000a0, 0x0ff0f0f0, "smulwb%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1050 | {ARM_EXT_V5ExP, 0x012000e0, 0x0ff0f0f0, "smulwt%c\t%16-19R, %0-3R, %8-11R"},
|
nkeynes@1265 | 1051 |
|
nkeynes@1265 | 1052 | {ARM_EXT_V5ExP, 0x01000050, 0x0ff00ff0, "qadd%c\t%12-15R, %0-3R, %16-19R"},
|
nkeynes@1265 | 1053 | {ARM_EXT_V5ExP, 0x01400050, 0x0ff00ff0, "qdadd%c\t%12-15R, %0-3R, %16-19R"},
|
nkeynes@1265 | 1054 | {ARM_EXT_V5ExP, 0x01200050, 0x0ff00ff0, "qsub%c\t%12-15R, %0-3R, %16-19R"},
|
nkeynes@1265 | 1055 | {ARM_EXT_V5ExP, 0x01600050, 0x0ff00ff0, "qdsub%c\t%12-15R, %0-3R, %16-19R"},
|
nkeynes@1265 | 1056 |
|
nkeynes@1265 | 1057 | /* ARM Instructions. */
|
nkeynes@1265 | 1058 | {ARM_EXT_V1, 0x052d0004, 0x0fff0fff, "push%c\t{%12-15r}\t\t; (str%c %12-15r, %a)"},
|
nkeynes@1265 | 1059 |
|
nkeynes@1265 | 1060 | {ARM_EXT_V1, 0x04400000, 0x0e500000, "strb%t%c\t%12-15R, %a"},
|
nkeynes@1265 | 1061 | {ARM_EXT_V1, 0x04000000, 0x0e500000, "str%t%c\t%12-15r, %a"},
|
nkeynes@1265 | 1062 | {ARM_EXT_V1, 0x06400000, 0x0e500ff0, "strb%t%c\t%12-15R, %a"},
|
nkeynes@1265 | 1063 | {ARM_EXT_V1, 0x06000000, 0x0e500ff0, "str%t%c\t%12-15r, %a"},
|
nkeynes@1265 | 1064 | {ARM_EXT_V1, 0x04400000, 0x0c500010, "strb%t%c\t%12-15R, %a"},
|
nkeynes@1265 | 1065 | {ARM_EXT_V1, 0x04000000, 0x0c500010, "str%t%c\t%12-15r, %a"},
|
nkeynes@1265 | 1066 |
|
nkeynes@1265 | 1067 | {ARM_EXT_V1, 0x04400000, 0x0e500000, "strb%c\t%12-15R, %a"},
|
nkeynes@1265 | 1068 | {ARM_EXT_V1, 0x06400000, 0x0e500010, "strb%c\t%12-15R, %a"},
|
nkeynes@1265 | 1069 | {ARM_EXT_V1, 0x004000b0, 0x0e5000f0, "strh%c\t%12-15R, %s"},
|
nkeynes@1265 | 1070 | {ARM_EXT_V1, 0x000000b0, 0x0e500ff0, "strh%c\t%12-15R, %s"},
|
nkeynes@1265 | 1071 |
|
nkeynes@1265 | 1072 | {ARM_EXT_V1, 0x00500090, 0x0e5000f0, UNDEFINED_INSTRUCTION},
|
nkeynes@1265 | 1073 | {ARM_EXT_V1, 0x00500090, 0x0e500090, "ldr%6's%5?hb%c\t%12-15R, %s"},
|
nkeynes@1265 | 1074 | {ARM_EXT_V1, 0x00100090, 0x0e500ff0, UNDEFINED_INSTRUCTION},
|
nkeynes@1265 | 1075 | {ARM_EXT_V1, 0x00100090, 0x0e500f90, "ldr%6's%5?hb%c\t%12-15R, %s"},
|
nkeynes@1265 | 1076 |
|
nkeynes@1265 | 1077 | {ARM_EXT_V1, 0x02000000, 0x0fe00000, "and%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1078 | {ARM_EXT_V1, 0x00000000, 0x0fe00010, "and%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1079 | {ARM_EXT_V1, 0x00000010, 0x0fe00090, "and%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1080 |
|
nkeynes@1265 | 1081 | {ARM_EXT_V1, 0x02200000, 0x0fe00000, "eor%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1082 | {ARM_EXT_V1, 0x00200000, 0x0fe00010, "eor%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1083 | {ARM_EXT_V1, 0x00200010, 0x0fe00090, "eor%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1084 |
|
nkeynes@1265 | 1085 | {ARM_EXT_V1, 0x02400000, 0x0fe00000, "sub%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1086 | {ARM_EXT_V1, 0x00400000, 0x0fe00010, "sub%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1087 | {ARM_EXT_V1, 0x00400010, 0x0fe00090, "sub%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1088 |
|
nkeynes@1265 | 1089 | {ARM_EXT_V1, 0x02600000, 0x0fe00000, "rsb%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1090 | {ARM_EXT_V1, 0x00600000, 0x0fe00010, "rsb%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1091 | {ARM_EXT_V1, 0x00600010, 0x0fe00090, "rsb%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1092 |
|
nkeynes@1265 | 1093 | {ARM_EXT_V1, 0x02800000, 0x0fe00000, "add%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1094 | {ARM_EXT_V1, 0x00800000, 0x0fe00010, "add%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1095 | {ARM_EXT_V1, 0x00800010, 0x0fe00090, "add%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1096 |
|
nkeynes@1265 | 1097 | {ARM_EXT_V1, 0x02a00000, 0x0fe00000, "adc%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1098 | {ARM_EXT_V1, 0x00a00000, 0x0fe00010, "adc%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1099 | {ARM_EXT_V1, 0x00a00010, 0x0fe00090, "adc%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1100 |
|
nkeynes@1265 | 1101 | {ARM_EXT_V1, 0x02c00000, 0x0fe00000, "sbc%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1102 | {ARM_EXT_V1, 0x00c00000, 0x0fe00010, "sbc%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1103 | {ARM_EXT_V1, 0x00c00010, 0x0fe00090, "sbc%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1104 |
|
nkeynes@1265 | 1105 | {ARM_EXT_V1, 0x02e00000, 0x0fe00000, "rsc%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1106 | {ARM_EXT_V1, 0x00e00000, 0x0fe00010, "rsc%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1107 | {ARM_EXT_V1, 0x00e00010, 0x0fe00090, "rsc%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1108 |
|
nkeynes@1265 | 1109 | {ARM_EXT_VIRT, 0x0120f200, 0x0fb0f200, "msr%c\t%C, %0-3r"},
|
nkeynes@1265 | 1110 | {ARM_EXT_V3, 0x0120f000, 0x0db0f000, "msr%c\t%C, %o"},
|
nkeynes@1265 | 1111 | {ARM_EXT_V3, 0x01000000, 0x0fb00cff, "mrs%c\t%12-15R, %R"},
|
nkeynes@1265 | 1112 |
|
nkeynes@1265 | 1113 | {ARM_EXT_V1, 0x03000000, 0x0fe00000, "tst%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1114 | {ARM_EXT_V1, 0x01000000, 0x0fe00010, "tst%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1115 | {ARM_EXT_V1, 0x01000010, 0x0fe00090, "tst%p%c\t%16-19R, %o"},
|
nkeynes@1265 | 1116 |
|
nkeynes@1265 | 1117 | {ARM_EXT_V1, 0x03200000, 0x0fe00000, "teq%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1118 | {ARM_EXT_V1, 0x01200000, 0x0fe00010, "teq%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1119 | {ARM_EXT_V1, 0x01200010, 0x0fe00090, "teq%p%c\t%16-19R, %o"},
|
nkeynes@1265 | 1120 |
|
nkeynes@1265 | 1121 | {ARM_EXT_V1, 0x03400000, 0x0fe00000, "cmp%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1122 | {ARM_EXT_V1, 0x01400000, 0x0fe00010, "cmp%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1123 | {ARM_EXT_V1, 0x01400010, 0x0fe00090, "cmp%p%c\t%16-19R, %o"},
|
nkeynes@1265 | 1124 |
|
nkeynes@1265 | 1125 | {ARM_EXT_V1, 0x03600000, 0x0fe00000, "cmn%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1126 | {ARM_EXT_V1, 0x01600000, 0x0fe00010, "cmn%p%c\t%16-19r, %o"},
|
nkeynes@1265 | 1127 | {ARM_EXT_V1, 0x01600010, 0x0fe00090, "cmn%p%c\t%16-19R, %o"},
|
nkeynes@1265 | 1128 |
|
nkeynes@1265 | 1129 | {ARM_EXT_V1, 0x03800000, 0x0fe00000, "orr%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1130 | {ARM_EXT_V1, 0x01800000, 0x0fe00010, "orr%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1131 | {ARM_EXT_V1, 0x01800010, 0x0fe00090, "orr%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1132 |
|
nkeynes@1265 | 1133 | {ARM_EXT_V1, 0x03a00000, 0x0fef0000, "mov%20's%c\t%12-15r, %o"},
|
nkeynes@1265 | 1134 | {ARM_EXT_V1, 0x01a00000, 0x0def0ff0, "mov%20's%c\t%12-15r, %0-3r"},
|
nkeynes@1265 | 1135 | {ARM_EXT_V1, 0x01a00000, 0x0def0060, "lsl%20's%c\t%12-15R, %q"},
|
nkeynes@1265 | 1136 | {ARM_EXT_V1, 0x01a00020, 0x0def0060, "lsr%20's%c\t%12-15R, %q"},
|
nkeynes@1265 | 1137 | {ARM_EXT_V1, 0x01a00040, 0x0def0060, "asr%20's%c\t%12-15R, %q"},
|
nkeynes@1265 | 1138 | {ARM_EXT_V1, 0x01a00060, 0x0def0ff0, "rrx%20's%c\t%12-15r, %0-3r"},
|
nkeynes@1265 | 1139 | {ARM_EXT_V1, 0x01a00060, 0x0def0060, "ror%20's%c\t%12-15R, %q"},
|
nkeynes@1265 | 1140 |
|
nkeynes@1265 | 1141 | {ARM_EXT_V1, 0x03c00000, 0x0fe00000, "bic%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1142 | {ARM_EXT_V1, 0x01c00000, 0x0fe00010, "bic%20's%c\t%12-15r, %16-19r, %o"},
|
nkeynes@1265 | 1143 | {ARM_EXT_V1, 0x01c00010, 0x0fe00090, "bic%20's%c\t%12-15R, %16-19R, %o"},
|
nkeynes@1265 | 1144 |
|
nkeynes@1265 | 1145 | {ARM_EXT_V1, 0x03e00000, 0x0fe00000, "mvn%20's%c\t%12-15r, %o"},
|
nkeynes@1265 | 1146 | {ARM_EXT_V1, 0x01e00000, 0x0fe00010, "mvn%20's%c\t%12-15r, %o"},
|
nkeynes@1265 | 1147 | {ARM_EXT_V1, 0x01e00010, 0x0fe00090, "mvn%20's%c\t%12-15R, %o"},
|
nkeynes@1265 | 1148 |
|
nkeynes@1265 | 1149 | {ARM_EXT_V1, 0x06000010, 0x0e000010, UNDEFINED_INSTRUCTION},
|
nkeynes@1265 | 1150 | {ARM_EXT_V1, 0x049d0004, 0x0fff0fff, "pop%c\t{%12-15r}\t\t; (ldr%c %12-15r, %a)"},
|
nkeynes@1265 | 1151 |
|
nkeynes@1265 | 1152 | {ARM_EXT_V1, 0x04500000, 0x0c500000, "ldrb%t%c\t%12-15R, %a"},
|
nkeynes@1265 | 1153 |
|
nkeynes@1265 | 1154 | {ARM_EXT_V1, 0x04300000, 0x0d700000, "ldrt%c\t%12-15R, %a"},
|
nkeynes@1265 | 1155 | {ARM_EXT_V1, 0x04100000, 0x0c500000, "ldr%c\t%12-15r, %a"},
|
nkeynes@1265 | 1156 |
|
nkeynes@1265 | 1157 | {ARM_EXT_V1, 0x092d0000, 0x0fff0000, "push%c\t%m"},
|
nkeynes@1265 | 1158 | {ARM_EXT_V1, 0x08800000, 0x0ff00000, "stm%c\t%16-19R%21'!, %m%22'^"},
|
nkeynes@1265 | 1159 | {ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
|
nkeynes@1265 | 1160 | {ARM_EXT_V1, 0x08bd0000, 0x0fff0000, "pop%c\t%m"},
|
nkeynes@1265 | 1161 | {ARM_EXT_V1, 0x08900000, 0x0f900000, "ldm%c\t%16-19R%21'!, %m%22'^"},
|
nkeynes@1265 | 1162 | {ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%23?id%24?ba%c\t%16-19R%21'!, %m%22'^"},
|
nkeynes@1265 | 1163 | {ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
|
nkeynes@1265 | 1164 | {ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
|
nkeynes@1265 | 1165 |
|
nkeynes@1265 | 1166 | /* The rest. */
|
nkeynes@1265 | 1167 | {ARM_EXT_V1, 0x00000000, 0x00000000, UNDEFINED_INSTRUCTION},
|
nkeynes@1265 | 1168 | {0, 0x00000000, 0x00000000, 0}
|
nkeynes@1265 | 1169 | };
|
nkeynes@1265 | 1170 |
|
nkeynes@1265 | 1171 | /* print_insn_thumb16 recognizes the following format control codes:
|
nkeynes@1265 | 1172 |
|
nkeynes@1265 | 1173 | %S print Thumb register (bits 3..5 as high number if bit 6 set)
|
nkeynes@1265 | 1174 | %D print Thumb register (bits 0..2 as high number if bit 7 set)
|
nkeynes@1265 | 1175 | %<bitfield>I print bitfield as a signed decimal
|
nkeynes@1265 | 1176 | (top bit of range being the sign bit)
|
nkeynes@1265 | 1177 | %N print Thumb register mask (with LR)
|
nkeynes@1265 | 1178 | %O print Thumb register mask (with PC)
|
nkeynes@1265 | 1179 | %M print Thumb register mask
|
nkeynes@1265 | 1180 | %b print CZB's 6-bit unsigned branch destination
|
nkeynes@1265 | 1181 | %s print Thumb right-shift immediate (6..10; 0 == 32).
|
nkeynes@1265 | 1182 | %c print the condition code
|
nkeynes@1265 | 1183 | %C print the condition code, or "s" if not conditional
|
nkeynes@1265 | 1184 | %x print warning if conditional an not at end of IT block"
|
nkeynes@1265 | 1185 | %X print "\t; unpredictable <IT:code>" if conditional
|
nkeynes@1265 | 1186 | %I print IT instruction suffix and operands
|
nkeynes@1265 | 1187 | %W print Thumb Writeback indicator for LDMIA
|
nkeynes@1265 | 1188 | %<bitfield>r print bitfield as an ARM register
|
nkeynes@1265 | 1189 | %<bitfield>d print bitfield as a decimal
|
nkeynes@1265 | 1190 | %<bitfield>H print (bitfield * 2) as a decimal
|
nkeynes@1265 | 1191 | %<bitfield>W print (bitfield * 4) as a decimal
|
nkeynes@1265 | 1192 | %<bitfield>a print (bitfield * 4) as a pc-rel offset + decoded symbol
|
nkeynes@1265 | 1193 | %<bitfield>B print Thumb branch destination (signed displacement)
|
nkeynes@1265 | 1194 | %<bitfield>c print bitfield as a condition code
|
nkeynes@1265 | 1195 | %<bitnum>'c print specified char iff bit is one
|
nkeynes@1265 | 1196 | %<bitnum>?ab print a if bit is one else print b. */
|
nkeynes@1265 | 1197 |
|
nkeynes@1265 | 1198 | static const struct opcode16 thumb_opcodes[] =
|
nkeynes@1265 | 1199 | {
|
nkeynes@1265 | 1200 | /* Thumb instructions. */
|
nkeynes@1265 | 1201 |
|
nkeynes@1265 | 1202 | /* ARM V6K no-argument instructions. */
|
nkeynes@1265 | 1203 | {ARM_EXT_V6K, 0xbf00, 0xffff, "nop%c"},
|
nkeynes@1265 | 1204 | {ARM_EXT_V6K, 0xbf10, 0xffff, "yield%c"},
|
nkeynes@1265 | 1205 | {ARM_EXT_V6K, 0xbf20, 0xffff, "wfe%c"},
|
nkeynes@1265 | 1206 | {ARM_EXT_V6K, 0xbf30, 0xffff, "wfi%c"},
|
nkeynes@1265 | 1207 | {ARM_EXT_V6K, 0xbf40, 0xffff, "sev%c"},
|
nkeynes@1265 | 1208 | {ARM_EXT_V6K, 0xbf00, 0xff0f, "nop%c\t{%4-7d}"},
|
nkeynes@1265 | 1209 |
|
nkeynes@1265 | 1210 | /* ARM V6T2 instructions. */
|
nkeynes@1265 | 1211 | {ARM_EXT_V6T2, 0xb900, 0xfd00, "cbnz\t%0-2r, %b%X"},
|
nkeynes@1265 | 1212 | {ARM_EXT_V6T2, 0xb100, 0xfd00, "cbz\t%0-2r, %b%X"},
|
nkeynes@1265 | 1213 | {ARM_EXT_V6T2, 0xbf00, 0xff00, "it%I%X"},
|
nkeynes@1265 | 1214 |
|
nkeynes@1265 | 1215 | /* ARM V6. */
|
nkeynes@1265 | 1216 | {ARM_EXT_V6, 0xb660, 0xfff8, "cpsie\t%2'a%1'i%0'f%X"},
|
nkeynes@1265 | 1217 | {ARM_EXT_V6, 0xb670, 0xfff8, "cpsid\t%2'a%1'i%0'f%X"},
|
nkeynes@1265 | 1218 | {ARM_EXT_V6, 0x4600, 0xffc0, "mov%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1219 | {ARM_EXT_V6, 0xba00, 0xffc0, "rev%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1220 | {ARM_EXT_V6, 0xba40, 0xffc0, "rev16%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1221 | {ARM_EXT_V6, 0xbac0, 0xffc0, "revsh%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1222 | {ARM_EXT_V6, 0xb650, 0xfff7, "setend\t%3?ble%X"},
|
nkeynes@1265 | 1223 | {ARM_EXT_V6, 0xb200, 0xffc0, "sxth%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1224 | {ARM_EXT_V6, 0xb240, 0xffc0, "sxtb%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1225 | {ARM_EXT_V6, 0xb280, 0xffc0, "uxth%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1226 | {ARM_EXT_V6, 0xb2c0, 0xffc0, "uxtb%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1227 |
|
nkeynes@1265 | 1228 | /* ARM V5 ISA extends Thumb. */
|
nkeynes@1265 | 1229 | {ARM_EXT_V5T, 0xbe00, 0xff00, "bkpt\t%0-7x"}, /* Is always unconditional. */
|
nkeynes@1265 | 1230 | /* This is BLX(2). BLX(1) is a 32-bit instruction. */
|
nkeynes@1265 | 1231 | {ARM_EXT_V5T, 0x4780, 0xff87, "blx%c\t%3-6r%x"}, /* note: 4 bit register number. */
|
nkeynes@1265 | 1232 | /* ARM V4T ISA (Thumb v1). */
|
nkeynes@1265 | 1233 | {ARM_EXT_V4T, 0x46C0, 0xFFFF, "nop%c\t\t\t; (mov r8, r8)"},
|
nkeynes@1265 | 1234 | /* Format 4. */
|
nkeynes@1265 | 1235 | {ARM_EXT_V4T, 0x4000, 0xFFC0, "and%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1236 | {ARM_EXT_V4T, 0x4040, 0xFFC0, "eor%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1237 | {ARM_EXT_V4T, 0x4080, 0xFFC0, "lsl%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1238 | {ARM_EXT_V4T, 0x40C0, 0xFFC0, "lsr%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1239 | {ARM_EXT_V4T, 0x4100, 0xFFC0, "asr%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1240 | {ARM_EXT_V4T, 0x4140, 0xFFC0, "adc%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1241 | {ARM_EXT_V4T, 0x4180, 0xFFC0, "sbc%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1242 | {ARM_EXT_V4T, 0x41C0, 0xFFC0, "ror%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1243 | {ARM_EXT_V4T, 0x4200, 0xFFC0, "tst%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1244 | {ARM_EXT_V4T, 0x4240, 0xFFC0, "neg%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1245 | {ARM_EXT_V4T, 0x4280, 0xFFC0, "cmp%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1246 | {ARM_EXT_V4T, 0x42C0, 0xFFC0, "cmn%c\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1247 | {ARM_EXT_V4T, 0x4300, 0xFFC0, "orr%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1248 | {ARM_EXT_V4T, 0x4340, 0xFFC0, "mul%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1249 | {ARM_EXT_V4T, 0x4380, 0xFFC0, "bic%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1250 | {ARM_EXT_V4T, 0x43C0, 0xFFC0, "mvn%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1251 | /* format 13 */
|
nkeynes@1265 | 1252 | {ARM_EXT_V4T, 0xB000, 0xFF80, "add%c\tsp, #%0-6W"},
|
nkeynes@1265 | 1253 | {ARM_EXT_V4T, 0xB080, 0xFF80, "sub%c\tsp, #%0-6W"},
|
nkeynes@1265 | 1254 | /* format 5 */
|
nkeynes@1265 | 1255 | {ARM_EXT_V4T, 0x4700, 0xFF80, "bx%c\t%S%x"},
|
nkeynes@1265 | 1256 | {ARM_EXT_V4T, 0x4400, 0xFF00, "add%c\t%D, %S"},
|
nkeynes@1265 | 1257 | {ARM_EXT_V4T, 0x4500, 0xFF00, "cmp%c\t%D, %S"},
|
nkeynes@1265 | 1258 | {ARM_EXT_V4T, 0x4600, 0xFF00, "mov%c\t%D, %S"},
|
nkeynes@1265 | 1259 | /* format 14 */
|
nkeynes@1265 | 1260 | {ARM_EXT_V4T, 0xB400, 0xFE00, "push%c\t%N"},
|
nkeynes@1265 | 1261 | {ARM_EXT_V4T, 0xBC00, 0xFE00, "pop%c\t%O"},
|
nkeynes@1265 | 1262 | /* format 2 */
|
nkeynes@1265 | 1263 | {ARM_EXT_V4T, 0x1800, 0xFE00, "add%C\t%0-2r, %3-5r, %6-8r"},
|
nkeynes@1265 | 1264 | {ARM_EXT_V4T, 0x1A00, 0xFE00, "sub%C\t%0-2r, %3-5r, %6-8r"},
|
nkeynes@1265 | 1265 | {ARM_EXT_V4T, 0x1C00, 0xFE00, "add%C\t%0-2r, %3-5r, #%6-8d"},
|
nkeynes@1265 | 1266 | {ARM_EXT_V4T, 0x1E00, 0xFE00, "sub%C\t%0-2r, %3-5r, #%6-8d"},
|
nkeynes@1265 | 1267 | /* format 8 */
|
nkeynes@1265 | 1268 | {ARM_EXT_V4T, 0x5200, 0xFE00, "strh%c\t%0-2r, [%3-5r, %6-8r]"},
|
nkeynes@1265 | 1269 | {ARM_EXT_V4T, 0x5A00, 0xFE00, "ldrh%c\t%0-2r, [%3-5r, %6-8r]"},
|
nkeynes@1265 | 1270 | {ARM_EXT_V4T, 0x5600, 0xF600, "ldrs%11?hb%c\t%0-2r, [%3-5r, %6-8r]"},
|
nkeynes@1265 | 1271 | /* format 7 */
|
nkeynes@1265 | 1272 | {ARM_EXT_V4T, 0x5000, 0xFA00, "str%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
|
nkeynes@1265 | 1273 | {ARM_EXT_V4T, 0x5800, 0xFA00, "ldr%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
|
nkeynes@1265 | 1274 | /* format 1 */
|
nkeynes@1265 | 1275 | {ARM_EXT_V4T, 0x0000, 0xFFC0, "mov%C\t%0-2r, %3-5r"},
|
nkeynes@1265 | 1276 | {ARM_EXT_V4T, 0x0000, 0xF800, "lsl%C\t%0-2r, %3-5r, #%6-10d"},
|
nkeynes@1265 | 1277 | {ARM_EXT_V4T, 0x0800, 0xF800, "lsr%C\t%0-2r, %3-5r, %s"},
|
nkeynes@1265 | 1278 | {ARM_EXT_V4T, 0x1000, 0xF800, "asr%C\t%0-2r, %3-5r, %s"},
|
nkeynes@1265 | 1279 | /* format 3 */
|
nkeynes@1265 | 1280 | {ARM_EXT_V4T, 0x2000, 0xF800, "mov%C\t%8-10r, #%0-7d"},
|
nkeynes@1265 | 1281 | {ARM_EXT_V4T, 0x2800, 0xF800, "cmp%c\t%8-10r, #%0-7d"},
|
nkeynes@1265 | 1282 | {ARM_EXT_V4T, 0x3000, 0xF800, "add%C\t%8-10r, #%0-7d"},
|
nkeynes@1265 | 1283 | {ARM_EXT_V4T, 0x3800, 0xF800, "sub%C\t%8-10r, #%0-7d"},
|
nkeynes@1265 | 1284 | /* format 6 */
|
nkeynes@1265 | 1285 | {ARM_EXT_V4T, 0x4800, 0xF800, "ldr%c\t%8-10r, [pc, #%0-7W]\t; (%0-7a)"}, /* TODO: Disassemble PC relative "LDR rD,=<symbolic>" */
|
nkeynes@1265 | 1286 | /* format 9 */
|
nkeynes@1265 | 1287 | {ARM_EXT_V4T, 0x6000, 0xF800, "str%c\t%0-2r, [%3-5r, #%6-10W]"},
|
nkeynes@1265 | 1288 | {ARM_EXT_V4T, 0x6800, 0xF800, "ldr%c\t%0-2r, [%3-5r, #%6-10W]"},
|
nkeynes@1265 | 1289 | {ARM_EXT_V4T, 0x7000, 0xF800, "strb%c\t%0-2r, [%3-5r, #%6-10d]"},
|
nkeynes@1265 | 1290 | {ARM_EXT_V4T, 0x7800, 0xF800, "ldrb%c\t%0-2r, [%3-5r, #%6-10d]"},
|
nkeynes@1265 | 1291 | /* format 10 */
|
nkeynes@1265 | 1292 | {ARM_EXT_V4T, 0x8000, 0xF800, "strh%c\t%0-2r, [%3-5r, #%6-10H]"},
|
nkeynes@1265 | 1293 | {ARM_EXT_V4T, 0x8800, 0xF800, "ldrh%c\t%0-2r, [%3-5r, #%6-10H]"},
|
nkeynes@1265 | 1294 | /* format 11 */
|
nkeynes@1265 | 1295 | {ARM_EXT_V4T, 0x9000, 0xF800, "str%c\t%8-10r, [sp, #%0-7W]"},
|
nkeynes@1265 | 1296 | {ARM_EXT_V4T, 0x9800, 0xF800, "ldr%c\t%8-10r, [sp, #%0-7W]"},
|
nkeynes@1265 | 1297 | /* format 12 */
|
nkeynes@1265 | 1298 | {ARM_EXT_V4T, 0xA000, 0xF800, "add%c\t%8-10r, pc, #%0-7W\t; (adr %8-10r, %0-7a)"},
|
nkeynes@1265 | 1299 | {ARM_EXT_V4T, 0xA800, 0xF800, "add%c\t%8-10r, sp, #%0-7W"},
|
nkeynes@1265 | 1300 | /* format 15 */
|
nkeynes@1265 | 1301 | {ARM_EXT_V4T, 0xC000, 0xF800, "stmia%c\t%8-10r!, %M"},
|
nkeynes@1265 | 1302 | {ARM_EXT_V4T, 0xC800, 0xF800, "ldmia%c\t%8-10r%W, %M"},
|
nkeynes@1265 | 1303 | /* format 17 */
|
nkeynes@1265 | 1304 | {ARM_EXT_V4T, 0xDF00, 0xFF00, "svc%c\t%0-7d"},
|
nkeynes@1265 | 1305 | /* format 16 */
|
nkeynes@1265 | 1306 | {ARM_EXT_V4T, 0xDE00, 0xFE00, UNDEFINED_INSTRUCTION},
|
nkeynes@1265 | 1307 | {ARM_EXT_V4T, 0xD000, 0xF000, "b%8-11c.n\t%0-7B%X"},
|
nkeynes@1265 | 1308 | /* format 18 */
|
nkeynes@1265 | 1309 | {ARM_EXT_V4T, 0xE000, 0xF800, "b%c.n\t%0-10B%x"},
|
nkeynes@1265 | 1310 |
|
nkeynes@1265 | 1311 | /* The E800 .. FFFF range is unconditionally redirected to the
|
nkeynes@1265 | 1312 | 32-bit table, because even in pre-V6T2 ISAs, BL and BLX(1) pairs
|
nkeynes@1265 | 1313 | are processed via that table. Thus, we can never encounter a
|
nkeynes@1265 | 1314 | bare "second half of BL/BLX(1)" instruction here. */
|
nkeynes@1265 | 1315 | {ARM_EXT_V1, 0x0000, 0x0000, UNDEFINED_INSTRUCTION},
|
nkeynes@1265 | 1316 | {0, 0, 0, 0}
|
nkeynes@1265 | 1317 | };
|
nkeynes@1265 | 1318 |
|
nkeynes@1265 | 1319 | /* Thumb32 opcodes use the same table structure as the ARM opcodes.
|
nkeynes@1265 | 1320 | We adopt the convention that hw1 is the high 16 bits of .value and
|
nkeynes@1265 | 1321 | .mask, hw2 the low 16 bits.
|
nkeynes@1265 | 1322 |
|
nkeynes@1265 | 1323 | print_insn_thumb32 recognizes the following format control codes:
|
nkeynes@1265 | 1324 |
|
nkeynes@1265 | 1325 | %% %
|
nkeynes@1265 | 1326 |
|
nkeynes@1265 | 1327 | %I print a 12-bit immediate from hw1[10],hw2[14:12,7:0]
|
nkeynes@1265 | 1328 | %M print a modified 12-bit immediate (same location)
|
nkeynes@1265 | 1329 | %J print a 16-bit immediate from hw1[3:0,10],hw2[14:12,7:0]
|
nkeynes@1265 | 1330 | %K print a 16-bit immediate from hw2[3:0],hw1[3:0],hw2[11:4]
|
nkeynes@1265 | 1331 | %H print a 16-bit immediate from hw2[3:0],hw1[11:0]
|
nkeynes@1265 | 1332 | %S print a possibly-shifted Rm
|
nkeynes@1265 | 1333 |
|
nkeynes@1265 | 1334 | %L print address for a ldrd/strd instruction
|
nkeynes@1265 | 1335 | %a print the address of a plain load/store
|
nkeynes@1265 | 1336 | %w print the width and signedness of a core load/store
|
nkeynes@1265 | 1337 | %m print register mask for ldm/stm
|
nkeynes@1265 | 1338 |
|
nkeynes@1265 | 1339 | %E print the lsb and width fields of a bfc/bfi instruction
|
nkeynes@1265 | 1340 | %F print the lsb and width fields of a sbfx/ubfx instruction
|
nkeynes@1265 | 1341 | %b print a conditional branch offset
|
nkeynes@1265 | 1342 | %B print an unconditional branch offset
|
nkeynes@1265 | 1343 | %s print the shift field of an SSAT instruction
|
nkeynes@1265 | 1344 | %R print the rotation field of an SXT instruction
|
nkeynes@1265 | 1345 | %U print barrier type.
|
nkeynes@1265 | 1346 | %P print address for pli instruction.
|
nkeynes@1265 | 1347 | %c print the condition code
|
nkeynes@1265 | 1348 | %x print warning if conditional an not at end of IT block"
|
nkeynes@1265 | 1349 | %X print "\t; unpredictable <IT:code>" if conditional
|
nkeynes@1265 | 1350 |
|
nkeynes@1265 | 1351 | %<bitfield>d print bitfield in decimal
|
nkeynes@1265 | 1352 | %<bitfield>W print bitfield*4 in decimal
|
nkeynes@1265 | 1353 | %<bitfield>r print bitfield as an ARM register
|
nkeynes@1265 | 1354 | %<bitfield>R as %<>r bit r15 is UNPREDICTABLE
|
nkeynes@1265 | 1355 | %<bitfield>c print bitfield as a condition code
|
nkeynes@1265 | 1356 |
|
nkeynes@1265 | 1357 | %<bitfield>'c print specified char iff bitfield is all ones
|
nkeynes@1265 | 1358 | %<bitfield>`c print specified char iff bitfield is all zeroes
|
nkeynes@1265 | 1359 | %<bitfield>?ab... select from array of values in big endian order
|
nkeynes@1265 | 1360 |
|
nkeynes@1265 | 1361 | With one exception at the bottom (done because BL and BLX(1) need
|
nkeynes@1265 | 1362 | to come dead last), this table was machine-sorted first in
|
nkeynes@1265 | 1363 | decreasing order of number of bits set in the mask, then in
|
nkeynes@1265 | 1364 | increasing numeric order of mask, then in increasing numeric order
|
nkeynes@1265 | 1365 | of opcode. This order is not the clearest for a human reader, but
|
nkeynes@1265 | 1366 | is guaranteed never to catch a special-case bit pattern with a more
|
nkeynes@1265 | 1367 | general mask, which is important, because this instruction encoding
|
nkeynes@1265 | 1368 | makes heavy use of special-case bit patterns. */
|
nkeynes@1265 | 1369 | static const struct opcode32 thumb32_opcodes[] =
|
nkeynes@1265 | 1370 | {
|
nkeynes@1265 | 1371 | /* V7 instructions. */
|
nkeynes@1265 | 1372 | {ARM_EXT_V7, 0xf910f000, 0xff70f000, "pli%c\t%a"},
|
nkeynes@1265 | 1373 | {ARM_EXT_V7, 0xf3af80f0, 0xfffffff0, "dbg%c\t#%0-3d"},
|
nkeynes@1265 | 1374 | {ARM_EXT_V7, 0xf3bf8f50, 0xfffffff0, "dmb%c\t%U"},
|
nkeynes@1265 | 1375 | {ARM_EXT_V7, 0xf3bf8f40, 0xfffffff0, "dsb%c\t%U"},
|
nkeynes@1265 | 1376 | {ARM_EXT_V7, 0xf3bf8f60, 0xfffffff0, "isb%c\t%U"},
|
nkeynes@1265 | 1377 | {ARM_EXT_DIV, 0xfb90f0f0, 0xfff0f0f0, "sdiv%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1378 | {ARM_EXT_DIV, 0xfbb0f0f0, 0xfff0f0f0, "udiv%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1379 |
|
nkeynes@1265 | 1380 | /* Virtualization Extension instructions. */
|
nkeynes@1265 | 1381 | {ARM_EXT_VIRT, 0xf7e08000, 0xfff0f000, "hvc%c\t%V"},
|
nkeynes@1265 | 1382 | /* We skip ERET as that is SUBS pc, lr, #0. */
|
nkeynes@1265 | 1383 |
|
nkeynes@1265 | 1384 | /* MP Extension instructions. */
|
nkeynes@1265 | 1385 | {ARM_EXT_MP, 0xf830f000, 0xff70f000, "pldw%c\t%a"},
|
nkeynes@1265 | 1386 |
|
nkeynes@1265 | 1387 | /* Security extension instructions. */
|
nkeynes@1265 | 1388 | {ARM_EXT_SEC, 0xf7f08000, 0xfff0f000, "smc%c\t%K"},
|
nkeynes@1265 | 1389 |
|
nkeynes@1265 | 1390 | /* Instructions defined in the basic V6T2 set. */
|
nkeynes@1265 | 1391 | {ARM_EXT_V6T2, 0xf3af8000, 0xffffffff, "nop%c.w"},
|
nkeynes@1265 | 1392 | {ARM_EXT_V6T2, 0xf3af8001, 0xffffffff, "yield%c.w"},
|
nkeynes@1265 | 1393 | {ARM_EXT_V6T2, 0xf3af8002, 0xffffffff, "wfe%c.w"},
|
nkeynes@1265 | 1394 | {ARM_EXT_V6T2, 0xf3af8003, 0xffffffff, "wfi%c.w"},
|
nkeynes@1265 | 1395 | {ARM_EXT_V6T2, 0xf3af8004, 0xffffffff, "sev%c.w"},
|
nkeynes@1265 | 1396 | {ARM_EXT_V6T2, 0xf3af8000, 0xffffff00, "nop%c.w\t{%0-7d}"},
|
nkeynes@1265 | 1397 |
|
nkeynes@1265 | 1398 | {ARM_EXT_V6T2, 0xf3bf8f2f, 0xffffffff, "clrex%c"},
|
nkeynes@1265 | 1399 | {ARM_EXT_V6T2, 0xf3af8400, 0xffffff1f, "cpsie.w\t%7'a%6'i%5'f%X"},
|
nkeynes@1265 | 1400 | {ARM_EXT_V6T2, 0xf3af8600, 0xffffff1f, "cpsid.w\t%7'a%6'i%5'f%X"},
|
nkeynes@1265 | 1401 | {ARM_EXT_V6T2, 0xf3c08f00, 0xfff0ffff, "bxj%c\t%16-19r%x"},
|
nkeynes@1265 | 1402 | {ARM_EXT_V6T2, 0xe810c000, 0xffd0ffff, "rfedb%c\t%16-19r%21'!"},
|
nkeynes@1265 | 1403 | {ARM_EXT_V6T2, 0xe990c000, 0xffd0ffff, "rfeia%c\t%16-19r%21'!"},
|
nkeynes@1265 | 1404 | {ARM_EXT_V6T2, 0xf3e08000, 0xffe0f000, "mrs%c\t%8-11r, %D"},
|
nkeynes@1265 | 1405 | {ARM_EXT_V6T2, 0xf3af8100, 0xffffffe0, "cps\t#%0-4d%X"},
|
nkeynes@1265 | 1406 | {ARM_EXT_V6T2, 0xe8d0f000, 0xfff0fff0, "tbb%c\t[%16-19r, %0-3r]%x"},
|
nkeynes@1265 | 1407 | {ARM_EXT_V6T2, 0xe8d0f010, 0xfff0fff0, "tbh%c\t[%16-19r, %0-3r, lsl #1]%x"},
|
nkeynes@1265 | 1408 | {ARM_EXT_V6T2, 0xf3af8500, 0xffffff00, "cpsie\t%7'a%6'i%5'f, #%0-4d%X"},
|
nkeynes@1265 | 1409 | {ARM_EXT_V6T2, 0xf3af8700, 0xffffff00, "cpsid\t%7'a%6'i%5'f, #%0-4d%X"},
|
nkeynes@1265 | 1410 | {ARM_EXT_V6T2, 0xf3de8f00, 0xffffff00, "subs%c\tpc, lr, #%0-7d"},
|
nkeynes@1265 | 1411 | {ARM_EXT_V6T2, 0xf3808000, 0xffe0f000, "msr%c\t%C, %16-19r"},
|
nkeynes@1265 | 1412 | {ARM_EXT_V6T2, 0xe8500f00, 0xfff00fff, "ldrex%c\t%12-15r, [%16-19r]"},
|
nkeynes@1265 | 1413 | {ARM_EXT_V6T2, 0xe8d00f4f, 0xfff00fef, "ldrex%4?hb%c\t%12-15r, [%16-19r]"},
|
nkeynes@1265 | 1414 | {ARM_EXT_V6T2, 0xe800c000, 0xffd0ffe0, "srsdb%c\t%16-19r%21'!, #%0-4d"},
|
nkeynes@1265 | 1415 | {ARM_EXT_V6T2, 0xe980c000, 0xffd0ffe0, "srsia%c\t%16-19r%21'!, #%0-4d"},
|
nkeynes@1265 | 1416 | {ARM_EXT_V6T2, 0xfa0ff080, 0xfffff0c0, "sxth%c.w\t%8-11r, %0-3r%R"},
|
nkeynes@1265 | 1417 | {ARM_EXT_V6T2, 0xfa1ff080, 0xfffff0c0, "uxth%c.w\t%8-11r, %0-3r%R"},
|
nkeynes@1265 | 1418 | {ARM_EXT_V6T2, 0xfa2ff080, 0xfffff0c0, "sxtb16%c\t%8-11r, %0-3r%R"},
|
nkeynes@1265 | 1419 | {ARM_EXT_V6T2, 0xfa3ff080, 0xfffff0c0, "uxtb16%c\t%8-11r, %0-3r%R"},
|
nkeynes@1265 | 1420 | {ARM_EXT_V6T2, 0xfa4ff080, 0xfffff0c0, "sxtb%c.w\t%8-11r, %0-3r%R"},
|
nkeynes@1265 | 1421 | {ARM_EXT_V6T2, 0xfa5ff080, 0xfffff0c0, "uxtb%c.w\t%8-11r, %0-3r%R"},
|
nkeynes@1265 | 1422 | {ARM_EXT_V6T2, 0xe8400000, 0xfff000ff, "strex%c\t%8-11r, %12-15r, [%16-19r]"},
|
nkeynes@1265 | 1423 | {ARM_EXT_V6T2, 0xe8d0007f, 0xfff000ff, "ldrexd%c\t%12-15r, %8-11r, [%16-19r]"},
|
nkeynes@1265 | 1424 | {ARM_EXT_V6T2, 0xfa80f000, 0xfff0f0f0, "sadd8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1425 | {ARM_EXT_V6T2, 0xfa80f010, 0xfff0f0f0, "qadd8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1426 | {ARM_EXT_V6T2, 0xfa80f020, 0xfff0f0f0, "shadd8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1427 | {ARM_EXT_V6T2, 0xfa80f040, 0xfff0f0f0, "uadd8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1428 | {ARM_EXT_V6T2, 0xfa80f050, 0xfff0f0f0, "uqadd8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1429 | {ARM_EXT_V6T2, 0xfa80f060, 0xfff0f0f0, "uhadd8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1430 | {ARM_EXT_V6T2, 0xfa80f080, 0xfff0f0f0, "qadd%c\t%8-11r, %0-3r, %16-19r"},
|
nkeynes@1265 | 1431 | {ARM_EXT_V6T2, 0xfa80f090, 0xfff0f0f0, "qdadd%c\t%8-11r, %0-3r, %16-19r"},
|
nkeynes@1265 | 1432 | {ARM_EXT_V6T2, 0xfa80f0a0, 0xfff0f0f0, "qsub%c\t%8-11r, %0-3r, %16-19r"},
|
nkeynes@1265 | 1433 | {ARM_EXT_V6T2, 0xfa80f0b0, 0xfff0f0f0, "qdsub%c\t%8-11r, %0-3r, %16-19r"},
|
nkeynes@1265 | 1434 | {ARM_EXT_V6T2, 0xfa90f000, 0xfff0f0f0, "sadd16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1435 | {ARM_EXT_V6T2, 0xfa90f010, 0xfff0f0f0, "qadd16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1436 | {ARM_EXT_V6T2, 0xfa90f020, 0xfff0f0f0, "shadd16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1437 | {ARM_EXT_V6T2, 0xfa90f040, 0xfff0f0f0, "uadd16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1438 | {ARM_EXT_V6T2, 0xfa90f050, 0xfff0f0f0, "uqadd16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1439 | {ARM_EXT_V6T2, 0xfa90f060, 0xfff0f0f0, "uhadd16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1440 | {ARM_EXT_V6T2, 0xfa90f080, 0xfff0f0f0, "rev%c.w\t%8-11r, %16-19r"},
|
nkeynes@1265 | 1441 | {ARM_EXT_V6T2, 0xfa90f090, 0xfff0f0f0, "rev16%c.w\t%8-11r, %16-19r"},
|
nkeynes@1265 | 1442 | {ARM_EXT_V6T2, 0xfa90f0a0, 0xfff0f0f0, "rbit%c\t%8-11r, %16-19r"},
|
nkeynes@1265 | 1443 | {ARM_EXT_V6T2, 0xfa90f0b0, 0xfff0f0f0, "revsh%c.w\t%8-11r, %16-19r"},
|
nkeynes@1265 | 1444 | {ARM_EXT_V6T2, 0xfaa0f000, 0xfff0f0f0, "sasx%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1445 | {ARM_EXT_V6T2, 0xfaa0f010, 0xfff0f0f0, "qasx%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1446 | {ARM_EXT_V6T2, 0xfaa0f020, 0xfff0f0f0, "shasx%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1447 | {ARM_EXT_V6T2, 0xfaa0f040, 0xfff0f0f0, "uasx%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1448 | {ARM_EXT_V6T2, 0xfaa0f050, 0xfff0f0f0, "uqasx%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1449 | {ARM_EXT_V6T2, 0xfaa0f060, 0xfff0f0f0, "uhasx%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1450 | {ARM_EXT_V6T2, 0xfaa0f080, 0xfff0f0f0, "sel%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1451 | {ARM_EXT_V6T2, 0xfab0f080, 0xfff0f0f0, "clz%c\t%8-11r, %16-19r"},
|
nkeynes@1265 | 1452 | {ARM_EXT_V6T2, 0xfac0f000, 0xfff0f0f0, "ssub8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1453 | {ARM_EXT_V6T2, 0xfac0f010, 0xfff0f0f0, "qsub8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1454 | {ARM_EXT_V6T2, 0xfac0f020, 0xfff0f0f0, "shsub8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1455 | {ARM_EXT_V6T2, 0xfac0f040, 0xfff0f0f0, "usub8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1456 | {ARM_EXT_V6T2, 0xfac0f050, 0xfff0f0f0, "uqsub8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1457 | {ARM_EXT_V6T2, 0xfac0f060, 0xfff0f0f0, "uhsub8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1458 | {ARM_EXT_V6T2, 0xfad0f000, 0xfff0f0f0, "ssub16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1459 | {ARM_EXT_V6T2, 0xfad0f010, 0xfff0f0f0, "qsub16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1460 | {ARM_EXT_V6T2, 0xfad0f020, 0xfff0f0f0, "shsub16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1461 | {ARM_EXT_V6T2, 0xfad0f040, 0xfff0f0f0, "usub16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1462 | {ARM_EXT_V6T2, 0xfad0f050, 0xfff0f0f0, "uqsub16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1463 | {ARM_EXT_V6T2, 0xfad0f060, 0xfff0f0f0, "uhsub16%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1464 | {ARM_EXT_V6T2, 0xfae0f000, 0xfff0f0f0, "ssax%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1465 | {ARM_EXT_V6T2, 0xfae0f010, 0xfff0f0f0, "qsax%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1466 | {ARM_EXT_V6T2, 0xfae0f020, 0xfff0f0f0, "shsax%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1467 | {ARM_EXT_V6T2, 0xfae0f040, 0xfff0f0f0, "usax%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1468 | {ARM_EXT_V6T2, 0xfae0f050, 0xfff0f0f0, "uqsax%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1469 | {ARM_EXT_V6T2, 0xfae0f060, 0xfff0f0f0, "uhsax%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1470 | {ARM_EXT_V6T2, 0xfb00f000, 0xfff0f0f0, "mul%c.w\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1471 | {ARM_EXT_V6T2, 0xfb70f000, 0xfff0f0f0, "usad8%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1472 | {ARM_EXT_V6T2, 0xfa00f000, 0xffe0f0f0, "lsl%20's%c.w\t%8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1473 | {ARM_EXT_V6T2, 0xfa20f000, 0xffe0f0f0, "lsr%20's%c.w\t%8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1474 | {ARM_EXT_V6T2, 0xfa40f000, 0xffe0f0f0, "asr%20's%c.w\t%8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1475 | {ARM_EXT_V6T2, 0xfa60f000, 0xffe0f0f0, "ror%20's%c.w\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1476 | {ARM_EXT_V6T2, 0xe8c00f40, 0xfff00fe0, "strex%4?hb%c\t%0-3r, %12-15r, [%16-19r]"},
|
nkeynes@1265 | 1477 | {ARM_EXT_V6T2, 0xf3200000, 0xfff0f0e0, "ssat16%c\t%8-11r, #%0-4d, %16-19r"},
|
nkeynes@1265 | 1478 | {ARM_EXT_V6T2, 0xf3a00000, 0xfff0f0e0, "usat16%c\t%8-11r, #%0-4d, %16-19r"},
|
nkeynes@1265 | 1479 | {ARM_EXT_V6T2, 0xfb20f000, 0xfff0f0e0, "smuad%4'x%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1480 | {ARM_EXT_V6T2, 0xfb30f000, 0xfff0f0e0, "smulw%4?tb%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1481 | {ARM_EXT_V6T2, 0xfb40f000, 0xfff0f0e0, "smusd%4'x%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1482 | {ARM_EXT_V6T2, 0xfb50f000, 0xfff0f0e0, "smmul%4'r%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1483 | {ARM_EXT_V6T2, 0xfa00f080, 0xfff0f0c0, "sxtah%c\t%8-11r, %16-19r, %0-3r%R"},
|
nkeynes@1265 | 1484 | {ARM_EXT_V6T2, 0xfa10f080, 0xfff0f0c0, "uxtah%c\t%8-11r, %16-19r, %0-3r%R"},
|
nkeynes@1265 | 1485 | {ARM_EXT_V6T2, 0xfa20f080, 0xfff0f0c0, "sxtab16%c\t%8-11r, %16-19r, %0-3r%R"},
|
nkeynes@1265 | 1486 | {ARM_EXT_V6T2, 0xfa30f080, 0xfff0f0c0, "uxtab16%c\t%8-11r, %16-19r, %0-3r%R"},
|
nkeynes@1265 | 1487 | {ARM_EXT_V6T2, 0xfa40f080, 0xfff0f0c0, "sxtab%c\t%8-11r, %16-19r, %0-3r%R"},
|
nkeynes@1265 | 1488 | {ARM_EXT_V6T2, 0xfa50f080, 0xfff0f0c0, "uxtab%c\t%8-11r, %16-19r, %0-3r%R"},
|
nkeynes@1265 | 1489 | {ARM_EXT_V6T2, 0xfb10f000, 0xfff0f0c0, "smul%5?tb%4?tb%c\t%8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1490 | {ARM_EXT_V6T2, 0xf36f0000, 0xffff8020, "bfc%c\t%8-11r, %E"},
|
nkeynes@1265 | 1491 | {ARM_EXT_V6T2, 0xea100f00, 0xfff08f00, "tst%c.w\t%16-19r, %S"},
|
nkeynes@1265 | 1492 | {ARM_EXT_V6T2, 0xea900f00, 0xfff08f00, "teq%c\t%16-19r, %S"},
|
nkeynes@1265 | 1493 | {ARM_EXT_V6T2, 0xeb100f00, 0xfff08f00, "cmn%c.w\t%16-19r, %S"},
|
nkeynes@1265 | 1494 | {ARM_EXT_V6T2, 0xebb00f00, 0xfff08f00, "cmp%c.w\t%16-19r, %S"},
|
nkeynes@1265 | 1495 | {ARM_EXT_V6T2, 0xf0100f00, 0xfbf08f00, "tst%c.w\t%16-19r, %M"},
|
nkeynes@1265 | 1496 | {ARM_EXT_V6T2, 0xf0900f00, 0xfbf08f00, "teq%c\t%16-19r, %M"},
|
nkeynes@1265 | 1497 | {ARM_EXT_V6T2, 0xf1100f00, 0xfbf08f00, "cmn%c.w\t%16-19r, %M"},
|
nkeynes@1265 | 1498 | {ARM_EXT_V6T2, 0xf1b00f00, 0xfbf08f00, "cmp%c.w\t%16-19r, %M"},
|
nkeynes@1265 | 1499 | {ARM_EXT_V6T2, 0xea4f0000, 0xffef8000, "mov%20's%c.w\t%8-11r, %S"},
|
nkeynes@1265 | 1500 | {ARM_EXT_V6T2, 0xea6f0000, 0xffef8000, "mvn%20's%c.w\t%8-11r, %S"},
|
nkeynes@1265 | 1501 | {ARM_EXT_V6T2, 0xe8c00070, 0xfff000f0, "strexd%c\t%0-3r, %12-15r, %8-11r, [%16-19r]"},
|
nkeynes@1265 | 1502 | {ARM_EXT_V6T2, 0xfb000000, 0xfff000f0, "mla%c\t%8-11r, %16-19r, %0-3r, %12-15r"},
|
nkeynes@1265 | 1503 | {ARM_EXT_V6T2, 0xfb000010, 0xfff000f0, "mls%c\t%8-11r, %16-19r, %0-3r, %12-15r"},
|
nkeynes@1265 | 1504 | {ARM_EXT_V6T2, 0xfb700000, 0xfff000f0, "usada8%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
|
nkeynes@1265 | 1505 | {ARM_EXT_V6T2, 0xfb800000, 0xfff000f0, "smull%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1506 | {ARM_EXT_V6T2, 0xfba00000, 0xfff000f0, "umull%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1507 | {ARM_EXT_V6T2, 0xfbc00000, 0xfff000f0, "smlal%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1508 | {ARM_EXT_V6T2, 0xfbe00000, 0xfff000f0, "umlal%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1509 | {ARM_EXT_V6T2, 0xfbe00060, 0xfff000f0, "umaal%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1510 | {ARM_EXT_V6T2, 0xe8500f00, 0xfff00f00, "ldrex%c\t%12-15r, [%16-19r, #%0-7W]"},
|
nkeynes@1265 | 1511 | {ARM_EXT_V6T2, 0xf04f0000, 0xfbef8000, "mov%20's%c.w\t%8-11r, %M"},
|
nkeynes@1265 | 1512 | {ARM_EXT_V6T2, 0xf06f0000, 0xfbef8000, "mvn%20's%c.w\t%8-11r, %M"},
|
nkeynes@1265 | 1513 | {ARM_EXT_V6T2, 0xf810f000, 0xff70f000, "pld%c\t%a"},
|
nkeynes@1265 | 1514 | {ARM_EXT_V6T2, 0xfb200000, 0xfff000e0, "smlad%4'x%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
|
nkeynes@1265 | 1515 | {ARM_EXT_V6T2, 0xfb300000, 0xfff000e0, "smlaw%4?tb%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
|
nkeynes@1265 | 1516 | {ARM_EXT_V6T2, 0xfb400000, 0xfff000e0, "smlsd%4'x%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
|
nkeynes@1265 | 1517 | {ARM_EXT_V6T2, 0xfb500000, 0xfff000e0, "smmla%4'r%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
|
nkeynes@1265 | 1518 | {ARM_EXT_V6T2, 0xfb600000, 0xfff000e0, "smmls%4'r%c\t%8-11R, %16-19R, %0-3R, %12-15R"},
|
nkeynes@1265 | 1519 | {ARM_EXT_V6T2, 0xfbc000c0, 0xfff000e0, "smlald%4'x%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1520 | {ARM_EXT_V6T2, 0xfbd000c0, 0xfff000e0, "smlsld%4'x%c\t%12-15R, %8-11R, %16-19R, %0-3R"},
|
nkeynes@1265 | 1521 | {ARM_EXT_V6T2, 0xeac00000, 0xfff08030, "pkhbt%c\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1522 | {ARM_EXT_V6T2, 0xeac00020, 0xfff08030, "pkhtb%c\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1523 | {ARM_EXT_V6T2, 0xf3400000, 0xfff08020, "sbfx%c\t%8-11r, %16-19r, %F"},
|
nkeynes@1265 | 1524 | {ARM_EXT_V6T2, 0xf3c00000, 0xfff08020, "ubfx%c\t%8-11r, %16-19r, %F"},
|
nkeynes@1265 | 1525 | {ARM_EXT_V6T2, 0xf8000e00, 0xff900f00, "str%wt%c\t%12-15r, %a"},
|
nkeynes@1265 | 1526 | {ARM_EXT_V6T2, 0xfb100000, 0xfff000c0, "smla%5?tb%4?tb%c\t%8-11r, %16-19r, %0-3r, %12-15r"},
|
nkeynes@1265 | 1527 | {ARM_EXT_V6T2, 0xfbc00080, 0xfff000c0, "smlal%5?tb%4?tb%c\t%12-15r, %8-11r, %16-19r, %0-3r"},
|
nkeynes@1265 | 1528 | {ARM_EXT_V6T2, 0xf3600000, 0xfff08020, "bfi%c\t%8-11r, %16-19r, %E"},
|
nkeynes@1265 | 1529 | {ARM_EXT_V6T2, 0xf8100e00, 0xfe900f00, "ldr%wt%c\t%12-15r, %a"},
|
nkeynes@1265 | 1530 | {ARM_EXT_V6T2, 0xf3000000, 0xffd08020, "ssat%c\t%8-11r, #%0-4d, %16-19r%s"},
|
nkeynes@1265 | 1531 | {ARM_EXT_V6T2, 0xf3800000, 0xffd08020, "usat%c\t%8-11r, #%0-4d, %16-19r%s"},
|
nkeynes@1265 | 1532 | {ARM_EXT_V6T2, 0xf2000000, 0xfbf08000, "addw%c\t%8-11r, %16-19r, %I"},
|
nkeynes@1265 | 1533 | {ARM_EXT_V6T2, 0xf2400000, 0xfbf08000, "movw%c\t%8-11r, %J"},
|
nkeynes@1265 | 1534 | {ARM_EXT_V6T2, 0xf2a00000, 0xfbf08000, "subw%c\t%8-11r, %16-19r, %I"},
|
nkeynes@1265 | 1535 | {ARM_EXT_V6T2, 0xf2c00000, 0xfbf08000, "movt%c\t%8-11r, %J"},
|
nkeynes@1265 | 1536 | {ARM_EXT_V6T2, 0xea000000, 0xffe08000, "and%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1537 | {ARM_EXT_V6T2, 0xea200000, 0xffe08000, "bic%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1538 | {ARM_EXT_V6T2, 0xea400000, 0xffe08000, "orr%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1539 | {ARM_EXT_V6T2, 0xea600000, 0xffe08000, "orn%20's%c\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1540 | {ARM_EXT_V6T2, 0xea800000, 0xffe08000, "eor%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1541 | {ARM_EXT_V6T2, 0xeb000000, 0xffe08000, "add%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1542 | {ARM_EXT_V6T2, 0xeb400000, 0xffe08000, "adc%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1543 | {ARM_EXT_V6T2, 0xeb600000, 0xffe08000, "sbc%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1544 | {ARM_EXT_V6T2, 0xeba00000, 0xffe08000, "sub%20's%c.w\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1545 | {ARM_EXT_V6T2, 0xebc00000, 0xffe08000, "rsb%20's%c\t%8-11r, %16-19r, %S"},
|
nkeynes@1265 | 1546 | {ARM_EXT_V6T2, 0xe8400000, 0xfff00000, "strex%c\t%8-11r, %12-15r, [%16-19r, #%0-7W]"},
|
nkeynes@1265 | 1547 | {ARM_EXT_V6T2, 0xf0000000, 0xfbe08000, "and%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1548 | {ARM_EXT_V6T2, 0xf0200000, 0xfbe08000, "bic%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1549 | {ARM_EXT_V6T2, 0xf0400000, 0xfbe08000, "orr%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1550 | {ARM_EXT_V6T2, 0xf0600000, 0xfbe08000, "orn%20's%c\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1551 | {ARM_EXT_V6T2, 0xf0800000, 0xfbe08000, "eor%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1552 | {ARM_EXT_V6T2, 0xf1000000, 0xfbe08000, "add%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1553 | {ARM_EXT_V6T2, 0xf1400000, 0xfbe08000, "adc%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1554 | {ARM_EXT_V6T2, 0xf1600000, 0xfbe08000, "sbc%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1555 | {ARM_EXT_V6T2, 0xf1a00000, 0xfbe08000, "sub%20's%c.w\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1556 | {ARM_EXT_V6T2, 0xf1c00000, 0xfbe08000, "rsb%20's%c\t%8-11r, %16-19r, %M"},
|
nkeynes@1265 | 1557 | {ARM_EXT_V6T2, 0xe8800000, 0xffd00000, "stmia%c.w\t%16-19r%21'!, %m"},
|
nkeynes@1265 | 1558 | {ARM_EXT_V6T2, 0xe8900000, 0xffd00000, "ldmia%c.w\t%16-19r%21'!, %m"},
|
nkeynes@1265 | 1559 | {ARM_EXT_V6T2, 0xe9000000, 0xffd00000, "stmdb%c\t%16-19r%21'!, %m"},
|
nkeynes@1265 | 1560 | {ARM_EXT_V6T2, 0xe9100000, 0xffd00000, "ldmdb%c\t%16-19r%21'!, %m"},
|
nkeynes@1265 | 1561 | {ARM_EXT_V6T2, 0xe9c00000, 0xffd000ff, "strd%c\t%12-15r, %8-11r, [%16-19r]"},
|
nkeynes@1265 | 1562 | {ARM_EXT_V6T2, 0xe9d00000, 0xffd000ff, "ldrd%c\t%12-15r, %8-11r, [%16-19r]"},
|
nkeynes@1265 | 1563 | {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
|
nkeynes@1265 | 1564 | {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"},
|
nkeynes@1265 | 1565 | {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
|
nkeynes@1265 | 1566 | {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"},
|
nkeynes@1265 | 1567 | {ARM_EXT_V6T2, 0xf8000000, 0xff100000, "str%w%c.w\t%12-15r, %a"},
|
nkeynes@1265 | 1568 | {ARM_EXT_V6T2, 0xf8100000, 0xfe100000, "ldr%w%c.w\t%12-15r, %a"},
|
nkeynes@1265 | 1569 |
|
nkeynes@1265 | 1570 | /* Filter out Bcc with cond=E or F, which are used for other instructions. */
|
nkeynes@1265 | 1571 | {ARM_EXT_V6T2, 0xf3c08000, 0xfbc0d000, "undefined (bcc, cond=0xF)"},
|
nkeynes@1265 | 1572 | {ARM_EXT_V6T2, 0xf3808000, 0xfbc0d000, "undefined (bcc, cond=0xE)"},
|
nkeynes@1265 | 1573 | {ARM_EXT_V6T2, 0xf0008000, 0xf800d000, "b%22-25c.w\t%b%X"},
|
nkeynes@1265 | 1574 | {ARM_EXT_V6T2, 0xf0009000, 0xf800d000, "b%c.w\t%B%x"},
|
nkeynes@1265 | 1575 |
|
nkeynes@1265 | 1576 | /* These have been 32-bit since the invention of Thumb. */
|
nkeynes@1265 | 1577 | {ARM_EXT_V4T, 0xf000c000, 0xf800d001, "blx%c\t%B%x"},
|
nkeynes@1265 | 1578 | {ARM_EXT_V4T, 0xf000d000, 0xf800d000, "bl%c\t%B%x"},
|
nkeynes@1265 | 1579 |
|
nkeynes@1265 | 1580 | /* Fallback. */
|
nkeynes@1265 | 1581 | {ARM_EXT_V1, 0x00000000, 0x00000000, UNDEFINED_INSTRUCTION},
|
nkeynes@1265 | 1582 | {0, 0, 0, 0}
|
nkeynes@1265 | 1583 | };
|
nkeynes@1265 | 1584 |
|
nkeynes@1265 | 1585 | static const char *const arm_conditional[] =
|
nkeynes@1265 | 1586 | {"eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc",
|
nkeynes@1265 | 1587 | "hi", "ls", "ge", "lt", "gt", "le", "al", "<und>", ""};
|
nkeynes@1265 | 1588 |
|
nkeynes@1265 | 1589 | static const char *const arm_fp_const[] =
|
nkeynes@1265 | 1590 | {"0.0", "1.0", "2.0", "3.0", "4.0", "5.0", "0.5", "10.0"};
|
nkeynes@1265 | 1591 |
|
nkeynes@1265 | 1592 | static const char *const arm_shift[] =
|
nkeynes@1265 | 1593 | {"lsl", "lsr", "asr", "ror"};
|
nkeynes@1265 | 1594 |
|
nkeynes@1265 | 1595 | typedef struct
|
nkeynes@1265 | 1596 | {
|
nkeynes@1265 | 1597 | const char *name;
|
nkeynes@1265 | 1598 | const char *description;
|
nkeynes@1265 | 1599 | const char *reg_names[16];
|
nkeynes@1265 | 1600 | }
|
nkeynes@1265 | 1601 | arm_regname;
|
nkeynes@1265 | 1602 |
|
nkeynes@1265 | 1603 | static const arm_regname regnames[] =
|
nkeynes@1265 | 1604 | {
|
nkeynes@1265 | 1605 | { "raw" , "Select raw register names",
|
nkeynes@1265 | 1606 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"}},
|
nkeynes@1265 | 1607 | { "gcc", "Select register names used by GCC",
|
nkeynes@1265 | 1608 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }},
|
nkeynes@1265 | 1609 | { "std", "Select register names used in ARM's ISA documentation",
|
nkeynes@1265 | 1610 | { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc" }},
|
nkeynes@1265 | 1611 | { "apcs", "Select register names used in the APCS",
|
nkeynes@1265 | 1612 | { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "sl", "fp", "ip", "sp", "lr", "pc" }},
|
nkeynes@1265 | 1613 | { "atpcs", "Select register names used in the ATPCS",
|
nkeynes@1265 | 1614 | { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "IP", "SP", "LR", "PC" }},
|
nkeynes@1265 | 1615 | { "special-atpcs", "Select special register names used in the ATPCS",
|
nkeynes@1265 | 1616 | { "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL", "FP", "IP", "SP", "LR", "PC" }},
|
nkeynes@1265 | 1617 | };
|
nkeynes@1265 | 1618 |
|
nkeynes@1265 | 1619 | static const char *const iwmmxt_wwnames[] =
|
nkeynes@1265 | 1620 | {"b", "h", "w", "d"};
|
nkeynes@1265 | 1621 |
|
nkeynes@1265 | 1622 | static const char *const iwmmxt_wwssnames[] =
|
nkeynes@1265 | 1623 | {"b", "bus", "bc", "bss",
|
nkeynes@1265 | 1624 | "h", "hus", "hc", "hss",
|
nkeynes@1265 | 1625 | "w", "wus", "wc", "wss",
|
nkeynes@1265 | 1626 | "d", "dus", "dc", "dss"
|
nkeynes@1265 | 1627 | };
|
nkeynes@1265 | 1628 |
|
nkeynes@1265 | 1629 | static const char *const iwmmxt_regnames[] =
|
nkeynes@1265 | 1630 | { "wr0", "wr1", "wr2", "wr3", "wr4", "wr5", "wr6", "wr7",
|
nkeynes@1265 | 1631 | "wr8", "wr9", "wr10", "wr11", "wr12", "wr13", "wr14", "wr15"
|
nkeynes@1265 | 1632 | };
|
nkeynes@1265 | 1633 |
|
nkeynes@1265 | 1634 | static const char *const iwmmxt_cregnames[] =
|
nkeynes@1265 | 1635 | { "wcid", "wcon", "wcssf", "wcasf", "reserved", "reserved", "reserved", "reserved",
|
nkeynes@1265 | 1636 | "wcgr0", "wcgr1", "wcgr2", "wcgr3", "reserved", "reserved", "reserved", "reserved"
|
nkeynes@1265 | 1637 | };
|
nkeynes@1265 | 1638 |
|
nkeynes@1265 | 1639 | /* Default to GCC register name set. */
|
nkeynes@1265 | 1640 | static unsigned int regname_selected = 1;
|
nkeynes@1265 | 1641 |
|
nkeynes@1265 | 1642 | #define NUM_ARM_REGNAMES NUM_ELEM (regnames)
|
nkeynes@1265 | 1643 | #define arm_regnames regnames[regname_selected].reg_names
|
nkeynes@1265 | 1644 |
|
nkeynes@1265 | 1645 | static bfd_boolean force_thumb = FALSE;
|
nkeynes@1265 | 1646 |
|
nkeynes@1265 | 1647 | /* Current IT instruction state. This contains the same state as the IT
|
nkeynes@1265 | 1648 | bits in the CPSR. */
|
nkeynes@1265 | 1649 | static unsigned int ifthen_state;
|
nkeynes@1265 | 1650 | /* IT state for the next instruction. */
|
nkeynes@1265 | 1651 | static unsigned int ifthen_next_state;
|
nkeynes@1265 | 1652 | /* The address of the insn for which the IT state is valid. */
|
nkeynes@1265 | 1653 | static bfd_vma ifthen_address;
|
nkeynes@1265 | 1654 | #define IFTHEN_COND ((ifthen_state >> 4) & 0xf)
|
nkeynes@1265 | 1655 |
|
nkeynes@1265 | 1656 |
|
nkeynes@1265 | 1657 | /* Functions. */
|
nkeynes@1265 | 1658 | int
|
nkeynes@1265 | 1659 | get_arm_regname_num_options (void)
|
nkeynes@1265 | 1660 | {
|
nkeynes@1265 | 1661 | return NUM_ARM_REGNAMES;
|
nkeynes@1265 | 1662 | }
|
nkeynes@1265 | 1663 |
|
nkeynes@1265 | 1664 | int
|
nkeynes@1265 | 1665 | set_arm_regname_option (int option)
|
nkeynes@1265 | 1666 | {
|
nkeynes@1265 | 1667 | int old = regname_selected;
|
nkeynes@1265 | 1668 | regname_selected = option;
|
nkeynes@1265 | 1669 | return old;
|
nkeynes@1265 | 1670 | }
|
nkeynes@1265 | 1671 |
|
nkeynes@1265 | 1672 | int
|
nkeynes@1265 | 1673 | get_arm_regnames (int option,
|
nkeynes@1265 | 1674 | const char **setname,
|
nkeynes@1265 | 1675 | const char **setdescription,
|
nkeynes@1265 | 1676 | const char *const **register_names)
|
nkeynes@1265 | 1677 | {
|
nkeynes@1265 | 1678 | *setname = regnames[option].name;
|
nkeynes@1265 | 1679 | *setdescription = regnames[option].description;
|
nkeynes@1265 | 1680 | *register_names = regnames[option].reg_names;
|
nkeynes@1265 | 1681 | return 16;
|
nkeynes@1265 | 1682 | }
|
nkeynes@1265 | 1683 |
|
nkeynes@1265 | 1684 | /* Decode a bitfield of the form matching regexp (N(-N)?,)*N(-N)?.
|
nkeynes@1265 | 1685 | Returns pointer to following character of the format string and
|
nkeynes@1265 | 1686 | fills in *VALUEP and *WIDTHP with the extracted value and number of
|
nkeynes@1265 | 1687 | bits extracted. WIDTHP can be NULL. */
|
nkeynes@1265 | 1688 |
|
nkeynes@1265 | 1689 | static const char *
|
nkeynes@1265 | 1690 | arm_decode_bitfield (const char *ptr,
|
nkeynes@1265 | 1691 | unsigned long insn,
|
nkeynes@1265 | 1692 | unsigned long *valuep,
|
nkeynes@1265 | 1693 | int *widthp)
|
nkeynes@1265 | 1694 | {
|
nkeynes@1265 | 1695 | unsigned long value = 0;
|
nkeynes@1265 | 1696 | int width = 0;
|
nkeynes@1265 | 1697 |
|
nkeynes@1265 | 1698 | do
|
nkeynes@1265 | 1699 | {
|
nkeynes@1265 | 1700 | int start, end;
|
nkeynes@1265 | 1701 | int bits;
|
nkeynes@1265 | 1702 |
|
nkeynes@1265 | 1703 | for (start = 0; *ptr >= '0' && *ptr <= '9'; ptr++)
|
nkeynes@1265 | 1704 | start = start * 10 + *ptr - '0';
|
nkeynes@1265 | 1705 | if (*ptr == '-')
|
nkeynes@1265 | 1706 | for (end = 0, ptr++; *ptr >= '0' && *ptr <= '9'; ptr++)
|
nkeynes@1265 | 1707 | end = end * 10 + *ptr - '0';
|
nkeynes@1265 | 1708 | else
|
nkeynes@1265 | 1709 | end = start;
|
nkeynes@1265 | 1710 | bits = end - start;
|
nkeynes@1265 | 1711 | if (bits < 0)
|
nkeynes@1265 | 1712 | abort ();
|
nkeynes@1265 | 1713 | value |= ((insn >> start) & ((2ul << bits) - 1)) << width;
|
nkeynes@1265 | 1714 | width += bits + 1;
|
nkeynes@1265 | 1715 | }
|
nkeynes@1265 | 1716 | while (*ptr++ == ',');
|
nkeynes@1265 | 1717 | *valuep = value;
|
nkeynes@1265 | 1718 | if (widthp)
|
nkeynes@1265 | 1719 | *widthp = width;
|
nkeynes@1265 | 1720 | return ptr - 1;
|
nkeynes@1265 | 1721 | }
|
nkeynes@1265 | 1722 |
|
nkeynes@1265 | 1723 | static void
|
nkeynes@1265 | 1724 | arm_decode_shift (long given, fprintf_ftype func, void *stream,
|
nkeynes@1265 | 1725 | bfd_boolean print_shift)
|
nkeynes@1265 | 1726 | {
|
nkeynes@1265 | 1727 | func (stream, "%s", arm_regnames[given & 0xf]);
|
nkeynes@1265 | 1728 |
|
nkeynes@1265 | 1729 | if ((given & 0xff0) != 0)
|
nkeynes@1265 | 1730 | {
|
nkeynes@1265 | 1731 | if ((given & 0x10) == 0)
|
nkeynes@1265 | 1732 | {
|
nkeynes@1265 | 1733 | int amount = (given & 0xf80) >> 7;
|
nkeynes@1265 | 1734 | int shift = (given & 0x60) >> 5;
|
nkeynes@1265 | 1735 |
|
nkeynes@1265 | 1736 | if (amount == 0)
|
nkeynes@1265 | 1737 | {
|
nkeynes@1265 | 1738 | if (shift == 3)
|
nkeynes@1265 | 1739 | {
|
nkeynes@1265 | 1740 | func (stream, ", rrx");
|
nkeynes@1265 | 1741 | return;
|
nkeynes@1265 | 1742 | }
|
nkeynes@1265 | 1743 |
|
nkeynes@1265 | 1744 | amount = 32;
|
nkeynes@1265 | 1745 | }
|
nkeynes@1265 | 1746 |
|
nkeynes@1265 | 1747 | if (print_shift)
|
nkeynes@1265 | 1748 | func (stream, ", %s #%d", arm_shift[shift], amount);
|
nkeynes@1265 | 1749 | else
|
nkeynes@1265 | 1750 | func (stream, ", #%d", amount);
|
nkeynes@1265 | 1751 | }
|
nkeynes@1265 | 1752 | else if ((given & 0x80) == 0x80)
|
nkeynes@1265 | 1753 | func (stream, "\t; <illegal shifter operand>");
|
nkeynes@1265 | 1754 | else if (print_shift)
|
nkeynes@1265 | 1755 | func (stream, ", %s %s", arm_shift[(given & 0x60) >> 5],
|
nkeynes@1265 | 1756 | arm_regnames[(given & 0xf00) >> 8]);
|
nkeynes@1265 | 1757 | else
|
nkeynes@1265 | 1758 | func (stream, ", %s", arm_regnames[(given & 0xf00) >> 8]);
|
nkeynes@1265 | 1759 | }
|
nkeynes@1265 | 1760 | }
|
nkeynes@1265 | 1761 |
|
nkeynes@1265 | 1762 | #define W_BIT 21
|
nkeynes@1265 | 1763 | #define I_BIT 22
|
nkeynes@1265 | 1764 | #define U_BIT 23
|
nkeynes@1265 | 1765 | #define P_BIT 24
|
nkeynes@1265 | 1766 |
|
nkeynes@1265 | 1767 | #define WRITEBACK_BIT_SET (given & (1 << W_BIT))
|
nkeynes@1265 | 1768 | #define IMMEDIATE_BIT_SET (given & (1 << I_BIT))
|
nkeynes@1265 | 1769 | #define NEGATIVE_BIT_SET ((given & (1 << U_BIT)) == 0)
|
nkeynes@1265 | 1770 | #define PRE_BIT_SET (given & (1 << P_BIT))
|
nkeynes@1265 | 1771 |
|
nkeynes@1265 | 1772 | /* Print one coprocessor instruction on INFO->STREAM.
|
nkeynes@1265 | 1773 | Return TRUE if the instuction matched, FALSE if this is not a
|
nkeynes@1265 | 1774 | recognised coprocessor instruction. */
|
nkeynes@1265 | 1775 |
|
nkeynes@1265 | 1776 | static bfd_boolean
|
nkeynes@1265 | 1777 | print_insn_coprocessor (bfd_vma pc,
|
nkeynes@1265 | 1778 | struct disassemble_info *info,
|
nkeynes@1265 | 1779 | long given,
|
nkeynes@1265 | 1780 | bfd_boolean thumb)
|
nkeynes@1265 | 1781 | {
|
nkeynes@1265 | 1782 | const struct opcode32 *insn;
|
nkeynes@1265 | 1783 | void *stream = info->stream;
|
nkeynes@1265 | 1784 | fprintf_ftype func = info->fprintf_func;
|
nkeynes@1265 | 1785 | unsigned long mask;
|
nkeynes@1265 | 1786 | unsigned long value = 0;
|
nkeynes@1265 | 1787 | struct arm_private_data *private_data = info->private_data;
|
nkeynes@1265 | 1788 | unsigned long allowed_arches = private_data->features.coproc;
|
nkeynes@1265 | 1789 | int cond;
|
nkeynes@1265 | 1790 |
|
nkeynes@1265 | 1791 | for (insn = coprocessor_opcodes; insn->assembler; insn++)
|
nkeynes@1265 | 1792 | {
|
nkeynes@1265 | 1793 | unsigned long u_reg = 16;
|
nkeynes@1265 | 1794 | bfd_boolean is_unpredictable = FALSE;
|
nkeynes@1265 | 1795 | signed long value_in_comment = 0;
|
nkeynes@1265 | 1796 | const char *c;
|
nkeynes@1265 | 1797 |
|
nkeynes@1265 | 1798 | if (insn->arch == 0)
|
nkeynes@1265 | 1799 | switch (insn->value)
|
nkeynes@1265 | 1800 | {
|
nkeynes@1265 | 1801 | case SENTINEL_IWMMXT_START:
|
nkeynes@1265 | 1802 | if (info->mach != bfd_mach_arm_XScale
|
nkeynes@1265 | 1803 | && info->mach != bfd_mach_arm_iWMMXt
|
nkeynes@1265 | 1804 | && info->mach != bfd_mach_arm_iWMMXt2)
|
nkeynes@1265 | 1805 | do
|
nkeynes@1265 | 1806 | insn++;
|
nkeynes@1265 | 1807 | while (insn->arch != 0 && insn->value != SENTINEL_IWMMXT_END);
|
nkeynes@1265 | 1808 | continue;
|
nkeynes@1265 | 1809 |
|
nkeynes@1265 | 1810 | case SENTINEL_IWMMXT_END:
|
nkeynes@1265 | 1811 | continue;
|
nkeynes@1265 | 1812 |
|
nkeynes@1265 | 1813 | case SENTINEL_GENERIC_START:
|
nkeynes@1265 | 1814 | allowed_arches = private_data->features.core;
|
nkeynes@1265 | 1815 | continue;
|
nkeynes@1265 | 1816 |
|
nkeynes@1265 | 1817 | default:
|
nkeynes@1265 | 1818 | abort ();
|
nkeynes@1265 | 1819 | }
|
nkeynes@1265 | 1820 |
|
nkeynes@1265 | 1821 | mask = insn->mask;
|
nkeynes@1265 | 1822 | value = insn->value;
|
nkeynes@1265 | 1823 | if (thumb)
|
nkeynes@1265 | 1824 | {
|
nkeynes@1265 | 1825 | /* The high 4 bits are 0xe for Arm conditional instructions, and
|
nkeynes@1265 | 1826 | 0xe for arm unconditional instructions. The rest of the
|
nkeynes@1265 | 1827 | encoding is the same. */
|
nkeynes@1265 | 1828 | mask |= 0xf0000000;
|
nkeynes@1265 | 1829 | value |= 0xe0000000;
|
nkeynes@1265 | 1830 | if (ifthen_state)
|
nkeynes@1265 | 1831 | cond = IFTHEN_COND;
|
nkeynes@1265 | 1832 | else
|
nkeynes@1265 | 1833 | cond = 16;
|
nkeynes@1265 | 1834 | }
|
nkeynes@1265 | 1835 | else
|
nkeynes@1265 | 1836 | {
|
nkeynes@1265 | 1837 | /* Only match unconditional instuctions against unconditional
|
nkeynes@1265 | 1838 | patterns. */
|
nkeynes@1265 | 1839 | if ((given & 0xf0000000) == 0xf0000000)
|
nkeynes@1265 | 1840 | {
|
nkeynes@1265 | 1841 | mask |= 0xf0000000;
|
nkeynes@1265 | 1842 | cond = 16;
|
nkeynes@1265 | 1843 | }
|
nkeynes@1265 | 1844 | else
|
nkeynes@1265 | 1845 | {
|
nkeynes@1265 | 1846 | cond = (given >> 28) & 0xf;
|
nkeynes@1265 | 1847 | if (cond == 0xe)
|
nkeynes@1265 | 1848 | cond = 16;
|
nkeynes@1265 | 1849 | }
|
nkeynes@1265 | 1850 | }
|
nkeynes@1265 | 1851 |
|
nkeynes@1265 | 1852 | if ((given & mask) != value)
|
nkeynes@1265 | 1853 | continue;
|
nkeynes@1265 | 1854 |
|
nkeynes@1265 | 1855 | if ((insn->arch & allowed_arches) == 0)
|
nkeynes@1265 | 1856 | continue;
|
nkeynes@1265 | 1857 |
|
nkeynes@1265 | 1858 | for (c = insn->assembler; *c; c++)
|
nkeynes@1265 | 1859 | {
|
nkeynes@1265 | 1860 | if (*c == '%')
|
nkeynes@1265 | 1861 | {
|
nkeynes@1265 | 1862 | switch (*++c)
|
nkeynes@1265 | 1863 | {
|
nkeynes@1265 | 1864 | case '%':
|
nkeynes@1265 | 1865 | func (stream, "%%");
|
nkeynes@1265 | 1866 | break;
|
nkeynes@1265 | 1867 |
|
nkeynes@1265 | 1868 | case 'A':
|
nkeynes@1265 | 1869 | {
|
nkeynes@1265 | 1870 | int rn = (given >> 16) & 0xf;
|
nkeynes@1265 | 1871 | bfd_vma offset = given & 0xff;
|
nkeynes@1265 | 1872 |
|
nkeynes@1265 | 1873 | func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
|
nkeynes@1265 | 1874 |
|
nkeynes@1265 | 1875 | if (PRE_BIT_SET || WRITEBACK_BIT_SET)
|
nkeynes@1265 | 1876 | {
|
nkeynes@1265 | 1877 | /* Not unindexed. The offset is scaled. */
|
nkeynes@1265 | 1878 | offset = offset * 4;
|
nkeynes@1265 | 1879 | if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 1880 | offset = - offset;
|
nkeynes@1265 | 1881 | if (rn != 15)
|
nkeynes@1265 | 1882 | value_in_comment = offset;
|
nkeynes@1265 | 1883 | }
|
nkeynes@1265 | 1884 |
|
nkeynes@1265 | 1885 | if (PRE_BIT_SET)
|
nkeynes@1265 | 1886 | {
|
nkeynes@1265 | 1887 | if (offset)
|
nkeynes@1265 | 1888 | func (stream, ", #%d]%s",
|
nkeynes@1265 | 1889 | offset,
|
nkeynes@1265 | 1890 | WRITEBACK_BIT_SET ? "!" : "");
|
nkeynes@1265 | 1891 | else if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 1892 | func (stream, ", #-0]");
|
nkeynes@1265 | 1893 | else
|
nkeynes@1265 | 1894 | func (stream, "]");
|
nkeynes@1265 | 1895 | }
|
nkeynes@1265 | 1896 | else
|
nkeynes@1265 | 1897 | {
|
nkeynes@1265 | 1898 | func (stream, "]");
|
nkeynes@1265 | 1899 |
|
nkeynes@1265 | 1900 | if (WRITEBACK_BIT_SET)
|
nkeynes@1265 | 1901 | {
|
nkeynes@1265 | 1902 | if (offset)
|
nkeynes@1265 | 1903 | func (stream, ", #%d", offset);
|
nkeynes@1265 | 1904 | else if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 1905 | func (stream, ", #-0");
|
nkeynes@1265 | 1906 | }
|
nkeynes@1265 | 1907 | else
|
nkeynes@1265 | 1908 | {
|
nkeynes@1265 | 1909 | func (stream, ", {%s%d}",
|
nkeynes@1265 | 1910 | (NEGATIVE_BIT_SET && !offset) ? "-" : "",
|
nkeynes@1265 | 1911 | offset);
|
nkeynes@1265 | 1912 | value_in_comment = offset;
|
nkeynes@1265 | 1913 | }
|
nkeynes@1265 | 1914 | }
|
nkeynes@1265 | 1915 | if (rn == 15 && (PRE_BIT_SET || WRITEBACK_BIT_SET))
|
nkeynes@1265 | 1916 | {
|
nkeynes@1265 | 1917 | func (stream, "\t; ");
|
nkeynes@1265 | 1918 | /* For unaligned PCs, apply off-by-alignment
|
nkeynes@1265 | 1919 | correction. */
|
nkeynes@1265 | 1920 | info->print_address_func (offset + pc
|
nkeynes@1265 | 1921 | + info->bytes_per_chunk * 2
|
nkeynes@1265 | 1922 | - (pc & 3),
|
nkeynes@1265 | 1923 | info);
|
nkeynes@1265 | 1924 | }
|
nkeynes@1265 | 1925 | }
|
nkeynes@1265 | 1926 | break;
|
nkeynes@1265 | 1927 |
|
nkeynes@1265 | 1928 | case 'B':
|
nkeynes@1265 | 1929 | {
|
nkeynes@1265 | 1930 | int regno = ((given >> 12) & 0xf) | ((given >> (22 - 4)) & 0x10);
|
nkeynes@1265 | 1931 | int offset = (given >> 1) & 0x3f;
|
nkeynes@1265 | 1932 |
|
nkeynes@1265 | 1933 | if (offset == 1)
|
nkeynes@1265 | 1934 | func (stream, "{d%d}", regno);
|
nkeynes@1265 | 1935 | else if (regno + offset > 32)
|
nkeynes@1265 | 1936 | func (stream, "{d%d-<overflow reg d%d>}", regno, regno + offset - 1);
|
nkeynes@1265 | 1937 | else
|
nkeynes@1265 | 1938 | func (stream, "{d%d-d%d}", regno, regno + offset - 1);
|
nkeynes@1265 | 1939 | }
|
nkeynes@1265 | 1940 | break;
|
nkeynes@1265 | 1941 |
|
nkeynes@1265 | 1942 | case 'c':
|
nkeynes@1265 | 1943 | func (stream, "%s", arm_conditional[cond]);
|
nkeynes@1265 | 1944 | break;
|
nkeynes@1265 | 1945 |
|
nkeynes@1265 | 1946 | case 'I':
|
nkeynes@1265 | 1947 | /* Print a Cirrus/DSP shift immediate. */
|
nkeynes@1265 | 1948 | /* Immediates are 7bit signed ints with bits 0..3 in
|
nkeynes@1265 | 1949 | bits 0..3 of opcode and bits 4..6 in bits 5..7
|
nkeynes@1265 | 1950 | of opcode. */
|
nkeynes@1265 | 1951 | {
|
nkeynes@1265 | 1952 | int imm;
|
nkeynes@1265 | 1953 |
|
nkeynes@1265 | 1954 | imm = (given & 0xf) | ((given & 0xe0) >> 1);
|
nkeynes@1265 | 1955 |
|
nkeynes@1265 | 1956 | /* Is ``imm'' a negative number? */
|
nkeynes@1265 | 1957 | if (imm & 0x40)
|
nkeynes@1265 | 1958 | imm |= (-1 << 7);
|
nkeynes@1265 | 1959 |
|
nkeynes@1265 | 1960 | func (stream, "%d", imm);
|
nkeynes@1265 | 1961 | }
|
nkeynes@1265 | 1962 |
|
nkeynes@1265 | 1963 | break;
|
nkeynes@1265 | 1964 |
|
nkeynes@1265 | 1965 | case 'F':
|
nkeynes@1265 | 1966 | switch (given & 0x00408000)
|
nkeynes@1265 | 1967 | {
|
nkeynes@1265 | 1968 | case 0:
|
nkeynes@1265 | 1969 | func (stream, "4");
|
nkeynes@1265 | 1970 | break;
|
nkeynes@1265 | 1971 | case 0x8000:
|
nkeynes@1265 | 1972 | func (stream, "1");
|
nkeynes@1265 | 1973 | break;
|
nkeynes@1265 | 1974 | case 0x00400000:
|
nkeynes@1265 | 1975 | func (stream, "2");
|
nkeynes@1265 | 1976 | break;
|
nkeynes@1265 | 1977 | default:
|
nkeynes@1265 | 1978 | func (stream, "3");
|
nkeynes@1265 | 1979 | }
|
nkeynes@1265 | 1980 | break;
|
nkeynes@1265 | 1981 |
|
nkeynes@1265 | 1982 | case 'P':
|
nkeynes@1265 | 1983 | switch (given & 0x00080080)
|
nkeynes@1265 | 1984 | {
|
nkeynes@1265 | 1985 | case 0:
|
nkeynes@1265 | 1986 | func (stream, "s");
|
nkeynes@1265 | 1987 | break;
|
nkeynes@1265 | 1988 | case 0x80:
|
nkeynes@1265 | 1989 | func (stream, "d");
|
nkeynes@1265 | 1990 | break;
|
nkeynes@1265 | 1991 | case 0x00080000:
|
nkeynes@1265 | 1992 | func (stream, "e");
|
nkeynes@1265 | 1993 | break;
|
nkeynes@1265 | 1994 | default:
|
nkeynes@1265 | 1995 | func (stream, _("<illegal precision>"));
|
nkeynes@1265 | 1996 | break;
|
nkeynes@1265 | 1997 | }
|
nkeynes@1265 | 1998 | break;
|
nkeynes@1265 | 1999 |
|
nkeynes@1265 | 2000 | case 'Q':
|
nkeynes@1265 | 2001 | switch (given & 0x00408000)
|
nkeynes@1265 | 2002 | {
|
nkeynes@1265 | 2003 | case 0:
|
nkeynes@1265 | 2004 | func (stream, "s");
|
nkeynes@1265 | 2005 | break;
|
nkeynes@1265 | 2006 | case 0x8000:
|
nkeynes@1265 | 2007 | func (stream, "d");
|
nkeynes@1265 | 2008 | break;
|
nkeynes@1265 | 2009 | case 0x00400000:
|
nkeynes@1265 | 2010 | func (stream, "e");
|
nkeynes@1265 | 2011 | break;
|
nkeynes@1265 | 2012 | default:
|
nkeynes@1265 | 2013 | func (stream, "p");
|
nkeynes@1265 | 2014 | break;
|
nkeynes@1265 | 2015 | }
|
nkeynes@1265 | 2016 | break;
|
nkeynes@1265 | 2017 |
|
nkeynes@1265 | 2018 | case 'R':
|
nkeynes@1265 | 2019 | switch (given & 0x60)
|
nkeynes@1265 | 2020 | {
|
nkeynes@1265 | 2021 | case 0:
|
nkeynes@1265 | 2022 | break;
|
nkeynes@1265 | 2023 | case 0x20:
|
nkeynes@1265 | 2024 | func (stream, "p");
|
nkeynes@1265 | 2025 | break;
|
nkeynes@1265 | 2026 | case 0x40:
|
nkeynes@1265 | 2027 | func (stream, "m");
|
nkeynes@1265 | 2028 | break;
|
nkeynes@1265 | 2029 | default:
|
nkeynes@1265 | 2030 | func (stream, "z");
|
nkeynes@1265 | 2031 | break;
|
nkeynes@1265 | 2032 | }
|
nkeynes@1265 | 2033 | break;
|
nkeynes@1265 | 2034 |
|
nkeynes@1265 | 2035 | case '0': case '1': case '2': case '3': case '4':
|
nkeynes@1265 | 2036 | case '5': case '6': case '7': case '8': case '9':
|
nkeynes@1265 | 2037 | {
|
nkeynes@1265 | 2038 | int width;
|
nkeynes@1265 | 2039 |
|
nkeynes@1265 | 2040 | c = arm_decode_bitfield (c, given, &value, &width);
|
nkeynes@1265 | 2041 |
|
nkeynes@1265 | 2042 | switch (*c)
|
nkeynes@1265 | 2043 | {
|
nkeynes@1265 | 2044 | case 'R':
|
nkeynes@1265 | 2045 | if (value == 15)
|
nkeynes@1265 | 2046 | is_unpredictable = TRUE;
|
nkeynes@1265 | 2047 | /* Fall through. */
|
nkeynes@1265 | 2048 | case 'r':
|
nkeynes@1265 | 2049 | if (c[1] == 'u')
|
nkeynes@1265 | 2050 | {
|
nkeynes@1265 | 2051 | /* Eat the 'u' character. */
|
nkeynes@1265 | 2052 | ++ c;
|
nkeynes@1265 | 2053 |
|
nkeynes@1265 | 2054 | if (u_reg == value)
|
nkeynes@1265 | 2055 | is_unpredictable = TRUE;
|
nkeynes@1265 | 2056 | u_reg = value;
|
nkeynes@1265 | 2057 | }
|
nkeynes@1265 | 2058 | func (stream, "%s", arm_regnames[value]);
|
nkeynes@1265 | 2059 | break;
|
nkeynes@1265 | 2060 | case 'D':
|
nkeynes@1265 | 2061 | func (stream, "d%ld", value);
|
nkeynes@1265 | 2062 | break;
|
nkeynes@1265 | 2063 | case 'Q':
|
nkeynes@1265 | 2064 | if (value & 1)
|
nkeynes@1265 | 2065 | func (stream, "<illegal reg q%ld.5>", value >> 1);
|
nkeynes@1265 | 2066 | else
|
nkeynes@1265 | 2067 | func (stream, "q%ld", value >> 1);
|
nkeynes@1265 | 2068 | break;
|
nkeynes@1265 | 2069 | case 'd':
|
nkeynes@1265 | 2070 | func (stream, "%ld", value);
|
nkeynes@1265 | 2071 | value_in_comment = value;
|
nkeynes@1265 | 2072 | break;
|
nkeynes@1265 | 2073 | case 'k':
|
nkeynes@1265 | 2074 | {
|
nkeynes@1265 | 2075 | int from = (given & (1 << 7)) ? 32 : 16;
|
nkeynes@1265 | 2076 | func (stream, "%ld", from - value);
|
nkeynes@1265 | 2077 | }
|
nkeynes@1265 | 2078 | break;
|
nkeynes@1265 | 2079 |
|
nkeynes@1265 | 2080 | case 'f':
|
nkeynes@1265 | 2081 | if (value > 7)
|
nkeynes@1265 | 2082 | func (stream, "#%s", arm_fp_const[value & 7]);
|
nkeynes@1265 | 2083 | else
|
nkeynes@1265 | 2084 | func (stream, "f%ld", value);
|
nkeynes@1265 | 2085 | break;
|
nkeynes@1265 | 2086 |
|
nkeynes@1265 | 2087 | case 'w':
|
nkeynes@1265 | 2088 | if (width == 2)
|
nkeynes@1265 | 2089 | func (stream, "%s", iwmmxt_wwnames[value]);
|
nkeynes@1265 | 2090 | else
|
nkeynes@1265 | 2091 | func (stream, "%s", iwmmxt_wwssnames[value]);
|
nkeynes@1265 | 2092 | break;
|
nkeynes@1265 | 2093 |
|
nkeynes@1265 | 2094 | case 'g':
|
nkeynes@1265 | 2095 | func (stream, "%s", iwmmxt_regnames[value]);
|
nkeynes@1265 | 2096 | break;
|
nkeynes@1265 | 2097 | case 'G':
|
nkeynes@1265 | 2098 | func (stream, "%s", iwmmxt_cregnames[value]);
|
nkeynes@1265 | 2099 | break;
|
nkeynes@1265 | 2100 |
|
nkeynes@1265 | 2101 | case 'x':
|
nkeynes@1265 | 2102 | func (stream, "0x%lx", (value & 0xffffffffUL));
|
nkeynes@1265 | 2103 | break;
|
nkeynes@1265 | 2104 |
|
nkeynes@1265 | 2105 | case '`':
|
nkeynes@1265 | 2106 | c++;
|
nkeynes@1265 | 2107 | if (value == 0)
|
nkeynes@1265 | 2108 | func (stream, "%c", *c);
|
nkeynes@1265 | 2109 | break;
|
nkeynes@1265 | 2110 | case '\'':
|
nkeynes@1265 | 2111 | c++;
|
nkeynes@1265 | 2112 | if (value == ((1ul << width) - 1))
|
nkeynes@1265 | 2113 | func (stream, "%c", *c);
|
nkeynes@1265 | 2114 | break;
|
nkeynes@1265 | 2115 | case '?':
|
nkeynes@1265 | 2116 | func (stream, "%c", c[(1 << width) - (int) value]);
|
nkeynes@1265 | 2117 | c += 1 << width;
|
nkeynes@1265 | 2118 | break;
|
nkeynes@1265 | 2119 | default:
|
nkeynes@1265 | 2120 | abort ();
|
nkeynes@1265 | 2121 | }
|
nkeynes@1265 | 2122 | break;
|
nkeynes@1265 | 2123 |
|
nkeynes@1265 | 2124 | case 'y':
|
nkeynes@1265 | 2125 | case 'z':
|
nkeynes@1265 | 2126 | {
|
nkeynes@1265 | 2127 | int single = *c++ == 'y';
|
nkeynes@1265 | 2128 | int regno;
|
nkeynes@1265 | 2129 |
|
nkeynes@1265 | 2130 | switch (*c)
|
nkeynes@1265 | 2131 | {
|
nkeynes@1265 | 2132 | case '4': /* Sm pair */
|
nkeynes@1265 | 2133 | case '0': /* Sm, Dm */
|
nkeynes@1265 | 2134 | regno = given & 0x0000000f;
|
nkeynes@1265 | 2135 | if (single)
|
nkeynes@1265 | 2136 | {
|
nkeynes@1265 | 2137 | regno <<= 1;
|
nkeynes@1265 | 2138 | regno += (given >> 5) & 1;
|
nkeynes@1265 | 2139 | }
|
nkeynes@1265 | 2140 | else
|
nkeynes@1265 | 2141 | regno += ((given >> 5) & 1) << 4;
|
nkeynes@1265 | 2142 | break;
|
nkeynes@1265 | 2143 |
|
nkeynes@1265 | 2144 | case '1': /* Sd, Dd */
|
nkeynes@1265 | 2145 | regno = (given >> 12) & 0x0000000f;
|
nkeynes@1265 | 2146 | if (single)
|
nkeynes@1265 | 2147 | {
|
nkeynes@1265 | 2148 | regno <<= 1;
|
nkeynes@1265 | 2149 | regno += (given >> 22) & 1;
|
nkeynes@1265 | 2150 | }
|
nkeynes@1265 | 2151 | else
|
nkeynes@1265 | 2152 | regno += ((given >> 22) & 1) << 4;
|
nkeynes@1265 | 2153 | break;
|
nkeynes@1265 | 2154 |
|
nkeynes@1265 | 2155 | case '2': /* Sn, Dn */
|
nkeynes@1265 | 2156 | regno = (given >> 16) & 0x0000000f;
|
nkeynes@1265 | 2157 | if (single)
|
nkeynes@1265 | 2158 | {
|
nkeynes@1265 | 2159 | regno <<= 1;
|
nkeynes@1265 | 2160 | regno += (given >> 7) & 1;
|
nkeynes@1265 | 2161 | }
|
nkeynes@1265 | 2162 | else
|
nkeynes@1265 | 2163 | regno += ((given >> 7) & 1) << 4;
|
nkeynes@1265 | 2164 | break;
|
nkeynes@1265 | 2165 |
|
nkeynes@1265 | 2166 | case '3': /* List */
|
nkeynes@1265 | 2167 | func (stream, "{");
|
nkeynes@1265 | 2168 | regno = (given >> 12) & 0x0000000f;
|
nkeynes@1265 | 2169 | if (single)
|
nkeynes@1265 | 2170 | {
|
nkeynes@1265 | 2171 | regno <<= 1;
|
nkeynes@1265 | 2172 | regno += (given >> 22) & 1;
|
nkeynes@1265 | 2173 | }
|
nkeynes@1265 | 2174 | else
|
nkeynes@1265 | 2175 | regno += ((given >> 22) & 1) << 4;
|
nkeynes@1265 | 2176 | break;
|
nkeynes@1265 | 2177 |
|
nkeynes@1265 | 2178 | default:
|
nkeynes@1265 | 2179 | abort ();
|
nkeynes@1265 | 2180 | }
|
nkeynes@1265 | 2181 |
|
nkeynes@1265 | 2182 | func (stream, "%c%d", single ? 's' : 'd', regno);
|
nkeynes@1265 | 2183 |
|
nkeynes@1265 | 2184 | if (*c == '3')
|
nkeynes@1265 | 2185 | {
|
nkeynes@1265 | 2186 | int count = given & 0xff;
|
nkeynes@1265 | 2187 |
|
nkeynes@1265 | 2188 | if (single == 0)
|
nkeynes@1265 | 2189 | count >>= 1;
|
nkeynes@1265 | 2190 |
|
nkeynes@1265 | 2191 | if (--count)
|
nkeynes@1265 | 2192 | {
|
nkeynes@1265 | 2193 | func (stream, "-%c%d",
|
nkeynes@1265 | 2194 | single ? 's' : 'd',
|
nkeynes@1265 | 2195 | regno + count);
|
nkeynes@1265 | 2196 | }
|
nkeynes@1265 | 2197 |
|
nkeynes@1265 | 2198 | func (stream, "}");
|
nkeynes@1265 | 2199 | }
|
nkeynes@1265 | 2200 | else if (*c == '4')
|
nkeynes@1265 | 2201 | func (stream, ", %c%d", single ? 's' : 'd',
|
nkeynes@1265 | 2202 | regno + 1);
|
nkeynes@1265 | 2203 | }
|
nkeynes@1265 | 2204 | break;
|
nkeynes@1265 | 2205 |
|
nkeynes@1265 | 2206 | case 'L':
|
nkeynes@1265 | 2207 | switch (given & 0x00400100)
|
nkeynes@1265 | 2208 | {
|
nkeynes@1265 | 2209 | case 0x00000000: func (stream, "b"); break;
|
nkeynes@1265 | 2210 | case 0x00400000: func (stream, "h"); break;
|
nkeynes@1265 | 2211 | case 0x00000100: func (stream, "w"); break;
|
nkeynes@1265 | 2212 | case 0x00400100: func (stream, "d"); break;
|
nkeynes@1265 | 2213 | default:
|
nkeynes@1265 | 2214 | break;
|
nkeynes@1265 | 2215 | }
|
nkeynes@1265 | 2216 | break;
|
nkeynes@1265 | 2217 |
|
nkeynes@1265 | 2218 | case 'Z':
|
nkeynes@1265 | 2219 | {
|
nkeynes@1265 | 2220 | /* given (20, 23) | given (0, 3) */
|
nkeynes@1265 | 2221 | value = ((given >> 16) & 0xf0) | (given & 0xf);
|
nkeynes@1265 | 2222 | func (stream, "%d", value);
|
nkeynes@1265 | 2223 | }
|
nkeynes@1265 | 2224 | break;
|
nkeynes@1265 | 2225 |
|
nkeynes@1265 | 2226 | case 'l':
|
nkeynes@1265 | 2227 | /* This is like the 'A' operator, except that if
|
nkeynes@1265 | 2228 | the width field "M" is zero, then the offset is
|
nkeynes@1265 | 2229 | *not* multiplied by four. */
|
nkeynes@1265 | 2230 | {
|
nkeynes@1265 | 2231 | int offset = given & 0xff;
|
nkeynes@1265 | 2232 | int multiplier = (given & 0x00000100) ? 4 : 1;
|
nkeynes@1265 | 2233 |
|
nkeynes@1265 | 2234 | func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
|
nkeynes@1265 | 2235 |
|
nkeynes@1265 | 2236 | if (multiplier > 1)
|
nkeynes@1265 | 2237 | {
|
nkeynes@1265 | 2238 | value_in_comment = offset * multiplier;
|
nkeynes@1265 | 2239 | if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 2240 | value_in_comment = - value_in_comment;
|
nkeynes@1265 | 2241 | }
|
nkeynes@1265 | 2242 |
|
nkeynes@1265 | 2243 | if (offset)
|
nkeynes@1265 | 2244 | {
|
nkeynes@1265 | 2245 | if (PRE_BIT_SET)
|
nkeynes@1265 | 2246 | func (stream, ", #%s%d]%s",
|
nkeynes@1265 | 2247 | NEGATIVE_BIT_SET ? "-" : "",
|
nkeynes@1265 | 2248 | offset * multiplier,
|
nkeynes@1265 | 2249 | WRITEBACK_BIT_SET ? "!" : "");
|
nkeynes@1265 | 2250 | else
|
nkeynes@1265 | 2251 | func (stream, "], #%s%d",
|
nkeynes@1265 | 2252 | NEGATIVE_BIT_SET ? "-" : "",
|
nkeynes@1265 | 2253 | offset * multiplier);
|
nkeynes@1265 | 2254 | }
|
nkeynes@1265 | 2255 | else
|
nkeynes@1265 | 2256 | func (stream, "]");
|
nkeynes@1265 | 2257 | }
|
nkeynes@1265 | 2258 | break;
|
nkeynes@1265 | 2259 |
|
nkeynes@1265 | 2260 | case 'r':
|
nkeynes@1265 | 2261 | {
|
nkeynes@1265 | 2262 | int imm4 = (given >> 4) & 0xf;
|
nkeynes@1265 | 2263 | int puw_bits = ((given >> 22) & 6) | ((given >> W_BIT) & 1);
|
nkeynes@1265 | 2264 | int ubit = ! NEGATIVE_BIT_SET;
|
nkeynes@1265 | 2265 | const char *rm = arm_regnames [given & 0xf];
|
nkeynes@1265 | 2266 | const char *rn = arm_regnames [(given >> 16) & 0xf];
|
nkeynes@1265 | 2267 |
|
nkeynes@1265 | 2268 | switch (puw_bits)
|
nkeynes@1265 | 2269 | {
|
nkeynes@1265 | 2270 | case 1:
|
nkeynes@1265 | 2271 | case 3:
|
nkeynes@1265 | 2272 | func (stream, "[%s], %c%s", rn, ubit ? '+' : '-', rm);
|
nkeynes@1265 | 2273 | if (imm4)
|
nkeynes@1265 | 2274 | func (stream, ", lsl #%d", imm4);
|
nkeynes@1265 | 2275 | break;
|
nkeynes@1265 | 2276 |
|
nkeynes@1265 | 2277 | case 4:
|
nkeynes@1265 | 2278 | case 5:
|
nkeynes@1265 | 2279 | case 6:
|
nkeynes@1265 | 2280 | case 7:
|
nkeynes@1265 | 2281 | func (stream, "[%s, %c%s", rn, ubit ? '+' : '-', rm);
|
nkeynes@1265 | 2282 | if (imm4 > 0)
|
nkeynes@1265 | 2283 | func (stream, ", lsl #%d", imm4);
|
nkeynes@1265 | 2284 | func (stream, "]");
|
nkeynes@1265 | 2285 | if (puw_bits == 5 || puw_bits == 7)
|
nkeynes@1265 | 2286 | func (stream, "!");
|
nkeynes@1265 | 2287 | break;
|
nkeynes@1265 | 2288 |
|
nkeynes@1265 | 2289 | default:
|
nkeynes@1265 | 2290 | func (stream, "INVALID");
|
nkeynes@1265 | 2291 | }
|
nkeynes@1265 | 2292 | }
|
nkeynes@1265 | 2293 | break;
|
nkeynes@1265 | 2294 |
|
nkeynes@1265 | 2295 | case 'i':
|
nkeynes@1265 | 2296 | {
|
nkeynes@1265 | 2297 | long imm5;
|
nkeynes@1265 | 2298 | imm5 = ((given & 0x100) >> 4) | (given & 0xf);
|
nkeynes@1265 | 2299 | func (stream, "%ld", (imm5 == 0) ? 32 : imm5);
|
nkeynes@1265 | 2300 | }
|
nkeynes@1265 | 2301 | break;
|
nkeynes@1265 | 2302 |
|
nkeynes@1265 | 2303 | default:
|
nkeynes@1265 | 2304 | abort ();
|
nkeynes@1265 | 2305 | }
|
nkeynes@1265 | 2306 | }
|
nkeynes@1265 | 2307 | }
|
nkeynes@1265 | 2308 | else
|
nkeynes@1265 | 2309 | func (stream, "%c", *c);
|
nkeynes@1265 | 2310 | }
|
nkeynes@1265 | 2311 |
|
nkeynes@1265 | 2312 | if (value_in_comment > 32 || value_in_comment < -16)
|
nkeynes@1265 | 2313 | func (stream, "\t; 0x%lx", (value_in_comment & 0xffffffffUL));
|
nkeynes@1265 | 2314 |
|
nkeynes@1265 | 2315 | if (is_unpredictable)
|
nkeynes@1265 | 2316 | func (stream, UNPREDICTABLE_INSTRUCTION);
|
nkeynes@1265 | 2317 |
|
nkeynes@1265 | 2318 | return TRUE;
|
nkeynes@1265 | 2319 | }
|
nkeynes@1265 | 2320 | return FALSE;
|
nkeynes@1265 | 2321 | }
|
nkeynes@1265 | 2322 |
|
nkeynes@1265 | 2323 | /* Decodes and prints ARM addressing modes. Returns the offset
|
nkeynes@1265 | 2324 | used in the address, if any, if it is worthwhile printing the
|
nkeynes@1265 | 2325 | offset as a hexadecimal value in a comment at the end of the
|
nkeynes@1265 | 2326 | line of disassembly. */
|
nkeynes@1265 | 2327 |
|
nkeynes@1265 | 2328 | static signed long
|
nkeynes@1265 | 2329 | print_arm_address (bfd_vma pc, struct disassemble_info *info, long given)
|
nkeynes@1265 | 2330 | {
|
nkeynes@1265 | 2331 | void *stream = info->stream;
|
nkeynes@1265 | 2332 | fprintf_ftype func = info->fprintf_func;
|
nkeynes@1265 | 2333 | bfd_vma offset = 0;
|
nkeynes@1265 | 2334 |
|
nkeynes@1265 | 2335 | if (((given & 0x000f0000) == 0x000f0000)
|
nkeynes@1265 | 2336 | && ((given & 0x02000000) == 0))
|
nkeynes@1265 | 2337 | {
|
nkeynes@1265 | 2338 | offset = given & 0xfff;
|
nkeynes@1265 | 2339 |
|
nkeynes@1265 | 2340 | func (stream, "[pc");
|
nkeynes@1265 | 2341 |
|
nkeynes@1265 | 2342 | if (PRE_BIT_SET)
|
nkeynes@1265 | 2343 | {
|
nkeynes@1265 | 2344 | /* Pre-indexed. Elide offset of positive zero when
|
nkeynes@1265 | 2345 | non-writeback. */
|
nkeynes@1265 | 2346 | if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
|
nkeynes@1265 | 2347 | func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 2348 |
|
nkeynes@1265 | 2349 | if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 2350 | offset = -offset;
|
nkeynes@1265 | 2351 |
|
nkeynes@1265 | 2352 | offset += pc + 8;
|
nkeynes@1265 | 2353 |
|
nkeynes@1265 | 2354 | /* Cope with the possibility of write-back
|
nkeynes@1265 | 2355 | being used. Probably a very dangerous thing
|
nkeynes@1265 | 2356 | for the programmer to do, but who are we to
|
nkeynes@1265 | 2357 | argue ? */
|
nkeynes@1265 | 2358 | func (stream, "]%s", WRITEBACK_BIT_SET ? "!" : "");
|
nkeynes@1265 | 2359 | }
|
nkeynes@1265 | 2360 | else /* Post indexed. */
|
nkeynes@1265 | 2361 | {
|
nkeynes@1265 | 2362 | func (stream, "], #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 2363 |
|
nkeynes@1265 | 2364 | /* Ie ignore the offset. */
|
nkeynes@1265 | 2365 | offset = pc + 8;
|
nkeynes@1265 | 2366 | }
|
nkeynes@1265 | 2367 |
|
nkeynes@1265 | 2368 | func (stream, "\t; ");
|
nkeynes@1265 | 2369 | info->print_address_func (offset, info);
|
nkeynes@1265 | 2370 | offset = 0;
|
nkeynes@1265 | 2371 | }
|
nkeynes@1265 | 2372 | else
|
nkeynes@1265 | 2373 | {
|
nkeynes@1265 | 2374 | func (stream, "[%s",
|
nkeynes@1265 | 2375 | arm_regnames[(given >> 16) & 0xf]);
|
nkeynes@1265 | 2376 |
|
nkeynes@1265 | 2377 | if (PRE_BIT_SET)
|
nkeynes@1265 | 2378 | {
|
nkeynes@1265 | 2379 | if ((given & 0x02000000) == 0)
|
nkeynes@1265 | 2380 | {
|
nkeynes@1265 | 2381 | /* Elide offset of positive zero when non-writeback. */
|
nkeynes@1265 | 2382 | offset = given & 0xfff;
|
nkeynes@1265 | 2383 | if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET || offset)
|
nkeynes@1265 | 2384 | func (stream, ", #%s%d", NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 2385 | }
|
nkeynes@1265 | 2386 | else
|
nkeynes@1265 | 2387 | {
|
nkeynes@1265 | 2388 | func (stream, ", %s", NEGATIVE_BIT_SET ? "-" : "");
|
nkeynes@1265 | 2389 | arm_decode_shift (given, func, stream, TRUE);
|
nkeynes@1265 | 2390 | }
|
nkeynes@1265 | 2391 |
|
nkeynes@1265 | 2392 | func (stream, "]%s",
|
nkeynes@1265 | 2393 | WRITEBACK_BIT_SET ? "!" : "");
|
nkeynes@1265 | 2394 | }
|
nkeynes@1265 | 2395 | else
|
nkeynes@1265 | 2396 | {
|
nkeynes@1265 | 2397 | if ((given & 0x02000000) == 0)
|
nkeynes@1265 | 2398 | {
|
nkeynes@1265 | 2399 | /* Always show offset. */
|
nkeynes@1265 | 2400 | offset = given & 0xfff;
|
nkeynes@1265 | 2401 | func (stream, "], #%s%d",
|
nkeynes@1265 | 2402 | NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 2403 | }
|
nkeynes@1265 | 2404 | else
|
nkeynes@1265 | 2405 | {
|
nkeynes@1265 | 2406 | func (stream, "], %s",
|
nkeynes@1265 | 2407 | NEGATIVE_BIT_SET ? "-" : "");
|
nkeynes@1265 | 2408 | arm_decode_shift (given, func, stream, TRUE);
|
nkeynes@1265 | 2409 | }
|
nkeynes@1265 | 2410 | }
|
nkeynes@1265 | 2411 | }
|
nkeynes@1265 | 2412 |
|
nkeynes@1265 | 2413 | return (signed long) offset;
|
nkeynes@1265 | 2414 | }
|
nkeynes@1265 | 2415 |
|
nkeynes@1265 | 2416 | /* Print one neon instruction on INFO->STREAM.
|
nkeynes@1265 | 2417 | Return TRUE if the instuction matched, FALSE if this is not a
|
nkeynes@1265 | 2418 | recognised neon instruction. */
|
nkeynes@1265 | 2419 |
|
nkeynes@1265 | 2420 | static bfd_boolean
|
nkeynes@1265 | 2421 | print_insn_neon (struct disassemble_info *info, long given, bfd_boolean thumb)
|
nkeynes@1265 | 2422 | {
|
nkeynes@1265 | 2423 | const struct opcode32 *insn;
|
nkeynes@1265 | 2424 | void *stream = info->stream;
|
nkeynes@1265 | 2425 | fprintf_ftype func = info->fprintf_func;
|
nkeynes@1265 | 2426 |
|
nkeynes@1265 | 2427 | if (thumb)
|
nkeynes@1265 | 2428 | {
|
nkeynes@1265 | 2429 | if ((given & 0xef000000) == 0xef000000)
|
nkeynes@1265 | 2430 | {
|
nkeynes@1265 | 2431 | /* Move bit 28 to bit 24 to translate Thumb2 to ARM encoding. */
|
nkeynes@1265 | 2432 | unsigned long bit28 = given & (1 << 28);
|
nkeynes@1265 | 2433 |
|
nkeynes@1265 | 2434 | given &= 0x00ffffff;
|
nkeynes@1265 | 2435 | if (bit28)
|
nkeynes@1265 | 2436 | given |= 0xf3000000;
|
nkeynes@1265 | 2437 | else
|
nkeynes@1265 | 2438 | given |= 0xf2000000;
|
nkeynes@1265 | 2439 | }
|
nkeynes@1265 | 2440 | else if ((given & 0xff000000) == 0xf9000000)
|
nkeynes@1265 | 2441 | given ^= 0xf9000000 ^ 0xf4000000;
|
nkeynes@1265 | 2442 | else
|
nkeynes@1265 | 2443 | return FALSE;
|
nkeynes@1265 | 2444 | }
|
nkeynes@1265 | 2445 |
|
nkeynes@1265 | 2446 | for (insn = neon_opcodes; insn->assembler; insn++)
|
nkeynes@1265 | 2447 | {
|
nkeynes@1265 | 2448 | if ((given & insn->mask) == insn->value)
|
nkeynes@1265 | 2449 | {
|
nkeynes@1265 | 2450 | signed long value_in_comment = 0;
|
nkeynes@1265 | 2451 | const char *c;
|
nkeynes@1265 | 2452 |
|
nkeynes@1265 | 2453 | for (c = insn->assembler; *c; c++)
|
nkeynes@1265 | 2454 | {
|
nkeynes@1265 | 2455 | if (*c == '%')
|
nkeynes@1265 | 2456 | {
|
nkeynes@1265 | 2457 | switch (*++c)
|
nkeynes@1265 | 2458 | {
|
nkeynes@1265 | 2459 | case '%':
|
nkeynes@1265 | 2460 | func (stream, "%%");
|
nkeynes@1265 | 2461 | break;
|
nkeynes@1265 | 2462 |
|
nkeynes@1265 | 2463 | case 'c':
|
nkeynes@1265 | 2464 | if (thumb && ifthen_state)
|
nkeynes@1265 | 2465 | func (stream, "%s", arm_conditional[IFTHEN_COND]);
|
nkeynes@1265 | 2466 | break;
|
nkeynes@1265 | 2467 |
|
nkeynes@1265 | 2468 | case 'A':
|
nkeynes@1265 | 2469 | {
|
nkeynes@1265 | 2470 | static const unsigned char enc[16] =
|
nkeynes@1265 | 2471 | {
|
nkeynes@1265 | 2472 | 0x4, 0x14, /* st4 0,1 */
|
nkeynes@1265 | 2473 | 0x4, /* st1 2 */
|
nkeynes@1265 | 2474 | 0x4, /* st2 3 */
|
nkeynes@1265 | 2475 | 0x3, /* st3 4 */
|
nkeynes@1265 | 2476 | 0x13, /* st3 5 */
|
nkeynes@1265 | 2477 | 0x3, /* st1 6 */
|
nkeynes@1265 | 2478 | 0x1, /* st1 7 */
|
nkeynes@1265 | 2479 | 0x2, /* st2 8 */
|
nkeynes@1265 | 2480 | 0x12, /* st2 9 */
|
nkeynes@1265 | 2481 | 0x2, /* st1 10 */
|
nkeynes@1265 | 2482 | 0, 0, 0, 0, 0
|
nkeynes@1265 | 2483 | };
|
nkeynes@1265 | 2484 | int rd = ((given >> 12) & 0xf) | (((given >> 22) & 1) << 4);
|
nkeynes@1265 | 2485 | int rn = ((given >> 16) & 0xf);
|
nkeynes@1265 | 2486 | int rm = ((given >> 0) & 0xf);
|
nkeynes@1265 | 2487 | int align = ((given >> 4) & 0x3);
|
nkeynes@1265 | 2488 | int type = ((given >> 8) & 0xf);
|
nkeynes@1265 | 2489 | int n = enc[type] & 0xf;
|
nkeynes@1265 | 2490 | int stride = (enc[type] >> 4) + 1;
|
nkeynes@1265 | 2491 | int ix;
|
nkeynes@1265 | 2492 |
|
nkeynes@1265 | 2493 | func (stream, "{");
|
nkeynes@1265 | 2494 | if (stride > 1)
|
nkeynes@1265 | 2495 | for (ix = 0; ix != n; ix++)
|
nkeynes@1265 | 2496 | func (stream, "%sd%d", ix ? "," : "", rd + ix * stride);
|
nkeynes@1265 | 2497 | else if (n == 1)
|
nkeynes@1265 | 2498 | func (stream, "d%d", rd);
|
nkeynes@1265 | 2499 | else
|
nkeynes@1265 | 2500 | func (stream, "d%d-d%d", rd, rd + n - 1);
|
nkeynes@1265 | 2501 | func (stream, "}, [%s", arm_regnames[rn]);
|
nkeynes@1265 | 2502 | if (align)
|
nkeynes@1265 | 2503 | func (stream, " :%d", 32 << align);
|
nkeynes@1265 | 2504 | func (stream, "]");
|
nkeynes@1265 | 2505 | if (rm == 0xd)
|
nkeynes@1265 | 2506 | func (stream, "!");
|
nkeynes@1265 | 2507 | else if (rm != 0xf)
|
nkeynes@1265 | 2508 | func (stream, ", %s", arm_regnames[rm]);
|
nkeynes@1265 | 2509 | }
|
nkeynes@1265 | 2510 | break;
|
nkeynes@1265 | 2511 |
|
nkeynes@1265 | 2512 | case 'B':
|
nkeynes@1265 | 2513 | {
|
nkeynes@1265 | 2514 | int rd = ((given >> 12) & 0xf) | (((given >> 22) & 1) << 4);
|
nkeynes@1265 | 2515 | int rn = ((given >> 16) & 0xf);
|
nkeynes@1265 | 2516 | int rm = ((given >> 0) & 0xf);
|
nkeynes@1265 | 2517 | int idx_align = ((given >> 4) & 0xf);
|
nkeynes@1265 | 2518 | int align = 0;
|
nkeynes@1265 | 2519 | int size = ((given >> 10) & 0x3);
|
nkeynes@1265 | 2520 | int idx = idx_align >> (size + 1);
|
nkeynes@1265 | 2521 | int length = ((given >> 8) & 3) + 1;
|
nkeynes@1265 | 2522 | int stride = 1;
|
nkeynes@1265 | 2523 | int i;
|
nkeynes@1265 | 2524 |
|
nkeynes@1265 | 2525 | if (length > 1 && size > 0)
|
nkeynes@1265 | 2526 | stride = (idx_align & (1 << size)) ? 2 : 1;
|
nkeynes@1265 | 2527 |
|
nkeynes@1265 | 2528 | switch (length)
|
nkeynes@1265 | 2529 | {
|
nkeynes@1265 | 2530 | case 1:
|
nkeynes@1265 | 2531 | {
|
nkeynes@1265 | 2532 | int amask = (1 << size) - 1;
|
nkeynes@1265 | 2533 | if ((idx_align & (1 << size)) != 0)
|
nkeynes@1265 | 2534 | return FALSE;
|
nkeynes@1265 | 2535 | if (size > 0)
|
nkeynes@1265 | 2536 | {
|
nkeynes@1265 | 2537 | if ((idx_align & amask) == amask)
|
nkeynes@1265 | 2538 | align = 8 << size;
|
nkeynes@1265 | 2539 | else if ((idx_align & amask) != 0)
|
nkeynes@1265 | 2540 | return FALSE;
|
nkeynes@1265 | 2541 | }
|
nkeynes@1265 | 2542 | }
|
nkeynes@1265 | 2543 | break;
|
nkeynes@1265 | 2544 |
|
nkeynes@1265 | 2545 | case 2:
|
nkeynes@1265 | 2546 | if (size == 2 && (idx_align & 2) != 0)
|
nkeynes@1265 | 2547 | return FALSE;
|
nkeynes@1265 | 2548 | align = (idx_align & 1) ? 16 << size : 0;
|
nkeynes@1265 | 2549 | break;
|
nkeynes@1265 | 2550 |
|
nkeynes@1265 | 2551 | case 3:
|
nkeynes@1265 | 2552 | if ((size == 2 && (idx_align & 3) != 0)
|
nkeynes@1265 | 2553 | || (idx_align & 1) != 0)
|
nkeynes@1265 | 2554 | return FALSE;
|
nkeynes@1265 | 2555 | break;
|
nkeynes@1265 | 2556 |
|
nkeynes@1265 | 2557 | case 4:
|
nkeynes@1265 | 2558 | if (size == 2)
|
nkeynes@1265 | 2559 | {
|
nkeynes@1265 | 2560 | if ((idx_align & 3) == 3)
|
nkeynes@1265 | 2561 | return FALSE;
|
nkeynes@1265 | 2562 | align = (idx_align & 3) * 64;
|
nkeynes@1265 | 2563 | }
|
nkeynes@1265 | 2564 | else
|
nkeynes@1265 | 2565 | align = (idx_align & 1) ? 32 << size : 0;
|
nkeynes@1265 | 2566 | break;
|
nkeynes@1265 | 2567 |
|
nkeynes@1265 | 2568 | default:
|
nkeynes@1265 | 2569 | abort ();
|
nkeynes@1265 | 2570 | }
|
nkeynes@1265 | 2571 |
|
nkeynes@1265 | 2572 | func (stream, "{");
|
nkeynes@1265 | 2573 | for (i = 0; i < length; i++)
|
nkeynes@1265 | 2574 | func (stream, "%sd%d[%d]", (i == 0) ? "" : ",",
|
nkeynes@1265 | 2575 | rd + i * stride, idx);
|
nkeynes@1265 | 2576 | func (stream, "}, [%s", arm_regnames[rn]);
|
nkeynes@1265 | 2577 | if (align)
|
nkeynes@1265 | 2578 | func (stream, " :%d", align);
|
nkeynes@1265 | 2579 | func (stream, "]");
|
nkeynes@1265 | 2580 | if (rm == 0xd)
|
nkeynes@1265 | 2581 | func (stream, "!");
|
nkeynes@1265 | 2582 | else if (rm != 0xf)
|
nkeynes@1265 | 2583 | func (stream, ", %s", arm_regnames[rm]);
|
nkeynes@1265 | 2584 | }
|
nkeynes@1265 | 2585 | break;
|
nkeynes@1265 | 2586 |
|
nkeynes@1265 | 2587 | case 'C':
|
nkeynes@1265 | 2588 | {
|
nkeynes@1265 | 2589 | int rd = ((given >> 12) & 0xf) | (((given >> 22) & 1) << 4);
|
nkeynes@1265 | 2590 | int rn = ((given >> 16) & 0xf);
|
nkeynes@1265 | 2591 | int rm = ((given >> 0) & 0xf);
|
nkeynes@1265 | 2592 | int align = ((given >> 4) & 0x1);
|
nkeynes@1265 | 2593 | int size = ((given >> 6) & 0x3);
|
nkeynes@1265 | 2594 | int type = ((given >> 8) & 0x3);
|
nkeynes@1265 | 2595 | int n = type + 1;
|
nkeynes@1265 | 2596 | int stride = ((given >> 5) & 0x1);
|
nkeynes@1265 | 2597 | int ix;
|
nkeynes@1265 | 2598 |
|
nkeynes@1265 | 2599 | if (stride && (n == 1))
|
nkeynes@1265 | 2600 | n++;
|
nkeynes@1265 | 2601 | else
|
nkeynes@1265 | 2602 | stride++;
|
nkeynes@1265 | 2603 |
|
nkeynes@1265 | 2604 | func (stream, "{");
|
nkeynes@1265 | 2605 | if (stride > 1)
|
nkeynes@1265 | 2606 | for (ix = 0; ix != n; ix++)
|
nkeynes@1265 | 2607 | func (stream, "%sd%d[]", ix ? "," : "", rd + ix * stride);
|
nkeynes@1265 | 2608 | else if (n == 1)
|
nkeynes@1265 | 2609 | func (stream, "d%d[]", rd);
|
nkeynes@1265 | 2610 | else
|
nkeynes@1265 | 2611 | func (stream, "d%d[]-d%d[]", rd, rd + n - 1);
|
nkeynes@1265 | 2612 | func (stream, "}, [%s", arm_regnames[rn]);
|
nkeynes@1265 | 2613 | if (align)
|
nkeynes@1265 | 2614 | {
|
nkeynes@1265 | 2615 | align = (8 * (type + 1)) << size;
|
nkeynes@1265 | 2616 | if (type == 3)
|
nkeynes@1265 | 2617 | align = (size > 1) ? align >> 1 : align;
|
nkeynes@1265 | 2618 | if (type == 2 || (type == 0 && !size))
|
nkeynes@1265 | 2619 | func (stream, " :<bad align %d>", align);
|
nkeynes@1265 | 2620 | else
|
nkeynes@1265 | 2621 | func (stream, " :%d", align);
|
nkeynes@1265 | 2622 | }
|
nkeynes@1265 | 2623 | func (stream, "]");
|
nkeynes@1265 | 2624 | if (rm == 0xd)
|
nkeynes@1265 | 2625 | func (stream, "!");
|
nkeynes@1265 | 2626 | else if (rm != 0xf)
|
nkeynes@1265 | 2627 | func (stream, ", %s", arm_regnames[rm]);
|
nkeynes@1265 | 2628 | }
|
nkeynes@1265 | 2629 | break;
|
nkeynes@1265 | 2630 |
|
nkeynes@1265 | 2631 | case 'D':
|
nkeynes@1265 | 2632 | {
|
nkeynes@1265 | 2633 | int raw_reg = (given & 0xf) | ((given >> 1) & 0x10);
|
nkeynes@1265 | 2634 | int size = (given >> 20) & 3;
|
nkeynes@1265 | 2635 | int reg = raw_reg & ((4 << size) - 1);
|
nkeynes@1265 | 2636 | int ix = raw_reg >> size >> 2;
|
nkeynes@1265 | 2637 |
|
nkeynes@1265 | 2638 | func (stream, "d%d[%d]", reg, ix);
|
nkeynes@1265 | 2639 | }
|
nkeynes@1265 | 2640 | break;
|
nkeynes@1265 | 2641 |
|
nkeynes@1265 | 2642 | case 'E':
|
nkeynes@1265 | 2643 | /* Neon encoded constant for mov, mvn, vorr, vbic. */
|
nkeynes@1265 | 2644 | {
|
nkeynes@1265 | 2645 | int bits = 0;
|
nkeynes@1265 | 2646 | int cmode = (given >> 8) & 0xf;
|
nkeynes@1265 | 2647 | int op = (given >> 5) & 0x1;
|
nkeynes@1265 | 2648 | unsigned long value = 0, hival = 0;
|
nkeynes@1265 | 2649 | unsigned shift;
|
nkeynes@1265 | 2650 | int size = 0;
|
nkeynes@1265 | 2651 | int isfloat = 0;
|
nkeynes@1265 | 2652 |
|
nkeynes@1265 | 2653 | bits |= ((given >> 24) & 1) << 7;
|
nkeynes@1265 | 2654 | bits |= ((given >> 16) & 7) << 4;
|
nkeynes@1265 | 2655 | bits |= ((given >> 0) & 15) << 0;
|
nkeynes@1265 | 2656 |
|
nkeynes@1265 | 2657 | if (cmode < 8)
|
nkeynes@1265 | 2658 | {
|
nkeynes@1265 | 2659 | shift = (cmode >> 1) & 3;
|
nkeynes@1265 | 2660 | value = (unsigned long) bits << (8 * shift);
|
nkeynes@1265 | 2661 | size = 32;
|
nkeynes@1265 | 2662 | }
|
nkeynes@1265 | 2663 | else if (cmode < 12)
|
nkeynes@1265 | 2664 | {
|
nkeynes@1265 | 2665 | shift = (cmode >> 1) & 1;
|
nkeynes@1265 | 2666 | value = (unsigned long) bits << (8 * shift);
|
nkeynes@1265 | 2667 | size = 16;
|
nkeynes@1265 | 2668 | }
|
nkeynes@1265 | 2669 | else if (cmode < 14)
|
nkeynes@1265 | 2670 | {
|
nkeynes@1265 | 2671 | shift = (cmode & 1) + 1;
|
nkeynes@1265 | 2672 | value = (unsigned long) bits << (8 * shift);
|
nkeynes@1265 | 2673 | value |= (1ul << (8 * shift)) - 1;
|
nkeynes@1265 | 2674 | size = 32;
|
nkeynes@1265 | 2675 | }
|
nkeynes@1265 | 2676 | else if (cmode == 14)
|
nkeynes@1265 | 2677 | {
|
nkeynes@1265 | 2678 | if (op)
|
nkeynes@1265 | 2679 | {
|
nkeynes@1265 | 2680 | /* Bit replication into bytes. */
|
nkeynes@1265 | 2681 | int ix;
|
nkeynes@1265 | 2682 | unsigned long mask;
|
nkeynes@1265 | 2683 |
|
nkeynes@1265 | 2684 | value = 0;
|
nkeynes@1265 | 2685 | hival = 0;
|
nkeynes@1265 | 2686 | for (ix = 7; ix >= 0; ix--)
|
nkeynes@1265 | 2687 | {
|
nkeynes@1265 | 2688 | mask = ((bits >> ix) & 1) ? 0xff : 0;
|
nkeynes@1265 | 2689 | if (ix <= 3)
|
nkeynes@1265 | 2690 | value = (value << 8) | mask;
|
nkeynes@1265 | 2691 | else
|
nkeynes@1265 | 2692 | hival = (hival << 8) | mask;
|
nkeynes@1265 | 2693 | }
|
nkeynes@1265 | 2694 | size = 64;
|
nkeynes@1265 | 2695 | }
|
nkeynes@1265 | 2696 | else
|
nkeynes@1265 | 2697 | {
|
nkeynes@1265 | 2698 | /* Byte replication. */
|
nkeynes@1265 | 2699 | value = (unsigned long) bits;
|
nkeynes@1265 | 2700 | size = 8;
|
nkeynes@1265 | 2701 | }
|
nkeynes@1265 | 2702 | }
|
nkeynes@1265 | 2703 | else if (!op)
|
nkeynes@1265 | 2704 | {
|
nkeynes@1265 | 2705 | /* Floating point encoding. */
|
nkeynes@1265 | 2706 | int tmp;
|
nkeynes@1265 | 2707 |
|
nkeynes@1265 | 2708 | value = (unsigned long) (bits & 0x7f) << 19;
|
nkeynes@1265 | 2709 | value |= (unsigned long) (bits & 0x80) << 24;
|
nkeynes@1265 | 2710 | tmp = bits & 0x40 ? 0x3c : 0x40;
|
nkeynes@1265 | 2711 | value |= (unsigned long) tmp << 24;
|
nkeynes@1265 | 2712 | size = 32;
|
nkeynes@1265 | 2713 | isfloat = 1;
|
nkeynes@1265 | 2714 | }
|
nkeynes@1265 | 2715 | else
|
nkeynes@1265 | 2716 | {
|
nkeynes@1265 | 2717 | func (stream, "<illegal constant %.8x:%x:%x>",
|
nkeynes@1265 | 2718 | bits, cmode, op);
|
nkeynes@1265 | 2719 | size = 32;
|
nkeynes@1265 | 2720 | break;
|
nkeynes@1265 | 2721 | }
|
nkeynes@1265 | 2722 | switch (size)
|
nkeynes@1265 | 2723 | {
|
nkeynes@1265 | 2724 | case 8:
|
nkeynes@1265 | 2725 | func (stream, "#%ld\t; 0x%.2lx", value, value);
|
nkeynes@1265 | 2726 | break;
|
nkeynes@1265 | 2727 |
|
nkeynes@1265 | 2728 | case 16:
|
nkeynes@1265 | 2729 | func (stream, "#%ld\t; 0x%.4lx", value, value);
|
nkeynes@1265 | 2730 | break;
|
nkeynes@1265 | 2731 |
|
nkeynes@1265 | 2732 | case 32:
|
nkeynes@1265 | 2733 | if (isfloat)
|
nkeynes@1265 | 2734 | {
|
nkeynes@1265 | 2735 | unsigned char valbytes[4];
|
nkeynes@1265 | 2736 | double fvalue;
|
nkeynes@1265 | 2737 |
|
nkeynes@1265 | 2738 | /* Do this a byte at a time so we don't have to
|
nkeynes@1265 | 2739 | worry about the host's endianness. */
|
nkeynes@1265 | 2740 | valbytes[0] = value & 0xff;
|
nkeynes@1265 | 2741 | valbytes[1] = (value >> 8) & 0xff;
|
nkeynes@1265 | 2742 | valbytes[2] = (value >> 16) & 0xff;
|
nkeynes@1265 | 2743 | valbytes[3] = (value >> 24) & 0xff;
|
nkeynes@1265 | 2744 |
|
nkeynes@1265 | 2745 | floatformat_to_double
|
nkeynes@1265 | 2746 | (& floatformat_ieee_single_little, valbytes,
|
nkeynes@1265 | 2747 | & fvalue);
|
nkeynes@1265 | 2748 |
|
nkeynes@1265 | 2749 | func (stream, "#%.7g\t; 0x%.8lx", fvalue,
|
nkeynes@1265 | 2750 | value);
|
nkeynes@1265 | 2751 | }
|
nkeynes@1265 | 2752 | else
|
nkeynes@1265 | 2753 | func (stream, "#%ld\t; 0x%.8lx",
|
nkeynes@1265 | 2754 | (long) (((value & 0x80000000L) != 0)
|
nkeynes@1265 | 2755 | ? value | ~0xffffffffL : value),
|
nkeynes@1265 | 2756 | value);
|
nkeynes@1265 | 2757 | break;
|
nkeynes@1265 | 2758 |
|
nkeynes@1265 | 2759 | case 64:
|
nkeynes@1265 | 2760 | func (stream, "#0x%.8lx%.8lx", hival, value);
|
nkeynes@1265 | 2761 | break;
|
nkeynes@1265 | 2762 |
|
nkeynes@1265 | 2763 | default:
|
nkeynes@1265 | 2764 | abort ();
|
nkeynes@1265 | 2765 | }
|
nkeynes@1265 | 2766 | }
|
nkeynes@1265 | 2767 | break;
|
nkeynes@1265 | 2768 |
|
nkeynes@1265 | 2769 | case 'F':
|
nkeynes@1265 | 2770 | {
|
nkeynes@1265 | 2771 | int regno = ((given >> 16) & 0xf) | ((given >> (7 - 4)) & 0x10);
|
nkeynes@1265 | 2772 | int num = (given >> 8) & 0x3;
|
nkeynes@1265 | 2773 |
|
nkeynes@1265 | 2774 | if (!num)
|
nkeynes@1265 | 2775 | func (stream, "{d%d}", regno);
|
nkeynes@1265 | 2776 | else if (num + regno >= 32)
|
nkeynes@1265 | 2777 | func (stream, "{d%d-<overflow reg d%d}", regno, regno + num);
|
nkeynes@1265 | 2778 | else
|
nkeynes@1265 | 2779 | func (stream, "{d%d-d%d}", regno, regno + num);
|
nkeynes@1265 | 2780 | }
|
nkeynes@1265 | 2781 | break;
|
nkeynes@1265 | 2782 |
|
nkeynes@1265 | 2783 |
|
nkeynes@1265 | 2784 | case '0': case '1': case '2': case '3': case '4':
|
nkeynes@1265 | 2785 | case '5': case '6': case '7': case '8': case '9':
|
nkeynes@1265 | 2786 | {
|
nkeynes@1265 | 2787 | int width;
|
nkeynes@1265 | 2788 | unsigned long value;
|
nkeynes@1265 | 2789 |
|
nkeynes@1265 | 2790 | c = arm_decode_bitfield (c, given, &value, &width);
|
nkeynes@1265 | 2791 |
|
nkeynes@1265 | 2792 | switch (*c)
|
nkeynes@1265 | 2793 | {
|
nkeynes@1265 | 2794 | case 'r':
|
nkeynes@1265 | 2795 | func (stream, "%s", arm_regnames[value]);
|
nkeynes@1265 | 2796 | break;
|
nkeynes@1265 | 2797 | case 'd':
|
nkeynes@1265 | 2798 | func (stream, "%ld", value);
|
nkeynes@1265 | 2799 | value_in_comment = value;
|
nkeynes@1265 | 2800 | break;
|
nkeynes@1265 | 2801 | case 'e':
|
nkeynes@1265 | 2802 | func (stream, "%ld", (1ul << width) - value);
|
nkeynes@1265 | 2803 | break;
|
nkeynes@1265 | 2804 |
|
nkeynes@1265 | 2805 | case 'S':
|
nkeynes@1265 | 2806 | case 'T':
|
nkeynes@1265 | 2807 | case 'U':
|
nkeynes@1265 | 2808 | /* Various width encodings. */
|
nkeynes@1265 | 2809 | {
|
nkeynes@1265 | 2810 | int base = 8 << (*c - 'S'); /* 8,16 or 32 */
|
nkeynes@1265 | 2811 | int limit;
|
nkeynes@1265 | 2812 | unsigned low, high;
|
nkeynes@1265 | 2813 |
|
nkeynes@1265 | 2814 | c++;
|
nkeynes@1265 | 2815 | if (*c >= '0' && *c <= '9')
|
nkeynes@1265 | 2816 | limit = *c - '0';
|
nkeynes@1265 | 2817 | else if (*c >= 'a' && *c <= 'f')
|
nkeynes@1265 | 2818 | limit = *c - 'a' + 10;
|
nkeynes@1265 | 2819 | else
|
nkeynes@1265 | 2820 | abort ();
|
nkeynes@1265 | 2821 | low = limit >> 2;
|
nkeynes@1265 | 2822 | high = limit & 3;
|
nkeynes@1265 | 2823 |
|
nkeynes@1265 | 2824 | if (value < low || value > high)
|
nkeynes@1265 | 2825 | func (stream, "<illegal width %d>", base << value);
|
nkeynes@1265 | 2826 | else
|
nkeynes@1265 | 2827 | func (stream, "%d", base << value);
|
nkeynes@1265 | 2828 | }
|
nkeynes@1265 | 2829 | break;
|
nkeynes@1265 | 2830 | case 'R':
|
nkeynes@1265 | 2831 | if (given & (1 << 6))
|
nkeynes@1265 | 2832 | goto Q;
|
nkeynes@1265 | 2833 | /* FALLTHROUGH */
|
nkeynes@1265 | 2834 | case 'D':
|
nkeynes@1265 | 2835 | func (stream, "d%ld", value);
|
nkeynes@1265 | 2836 | break;
|
nkeynes@1265 | 2837 | case 'Q':
|
nkeynes@1265 | 2838 | Q:
|
nkeynes@1265 | 2839 | if (value & 1)
|
nkeynes@1265 | 2840 | func (stream, "<illegal reg q%ld.5>", value >> 1);
|
nkeynes@1265 | 2841 | else
|
nkeynes@1265 | 2842 | func (stream, "q%ld", value >> 1);
|
nkeynes@1265 | 2843 | break;
|
nkeynes@1265 | 2844 |
|
nkeynes@1265 | 2845 | case '`':
|
nkeynes@1265 | 2846 | c++;
|
nkeynes@1265 | 2847 | if (value == 0)
|
nkeynes@1265 | 2848 | func (stream, "%c", *c);
|
nkeynes@1265 | 2849 | break;
|
nkeynes@1265 | 2850 | case '\'':
|
nkeynes@1265 | 2851 | c++;
|
nkeynes@1265 | 2852 | if (value == ((1ul << width) - 1))
|
nkeynes@1265 | 2853 | func (stream, "%c", *c);
|
nkeynes@1265 | 2854 | break;
|
nkeynes@1265 | 2855 | case '?':
|
nkeynes@1265 | 2856 | func (stream, "%c", c[(1 << width) - (int) value]);
|
nkeynes@1265 | 2857 | c += 1 << width;
|
nkeynes@1265 | 2858 | break;
|
nkeynes@1265 | 2859 | default:
|
nkeynes@1265 | 2860 | abort ();
|
nkeynes@1265 | 2861 | }
|
nkeynes@1265 | 2862 | break;
|
nkeynes@1265 | 2863 |
|
nkeynes@1265 | 2864 | default:
|
nkeynes@1265 | 2865 | abort ();
|
nkeynes@1265 | 2866 | }
|
nkeynes@1265 | 2867 | }
|
nkeynes@1265 | 2868 | }
|
nkeynes@1265 | 2869 | else
|
nkeynes@1265 | 2870 | func (stream, "%c", *c);
|
nkeynes@1265 | 2871 | }
|
nkeynes@1265 | 2872 |
|
nkeynes@1265 | 2873 | if (value_in_comment > 32 || value_in_comment < -16)
|
nkeynes@1265 | 2874 | func (stream, "\t; 0x%lx", value_in_comment);
|
nkeynes@1265 | 2875 |
|
nkeynes@1265 | 2876 | return TRUE;
|
nkeynes@1265 | 2877 | }
|
nkeynes@1265 | 2878 | }
|
nkeynes@1265 | 2879 | return FALSE;
|
nkeynes@1265 | 2880 | }
|
nkeynes@1265 | 2881 |
|
nkeynes@1265 | 2882 | /* Return the name of a v7A special register. */
|
nkeynes@1265 | 2883 |
|
nkeynes@1265 | 2884 | static const char *
|
nkeynes@1265 | 2885 | banked_regname (unsigned reg)
|
nkeynes@1265 | 2886 | {
|
nkeynes@1265 | 2887 | switch (reg)
|
nkeynes@1265 | 2888 | {
|
nkeynes@1265 | 2889 | case 15: return "CPSR";
|
nkeynes@1265 | 2890 | case 32: return "R8_usr";
|
nkeynes@1265 | 2891 | case 33: return "R9_usr";
|
nkeynes@1265 | 2892 | case 34: return "R10_usr";
|
nkeynes@1265 | 2893 | case 35: return "R11_usr";
|
nkeynes@1265 | 2894 | case 36: return "R12_usr";
|
nkeynes@1265 | 2895 | case 37: return "SP_usr";
|
nkeynes@1265 | 2896 | case 38: return "LR_usr";
|
nkeynes@1265 | 2897 | case 40: return "R8_fiq";
|
nkeynes@1265 | 2898 | case 41: return "R9_fiq";
|
nkeynes@1265 | 2899 | case 42: return "R10_fiq";
|
nkeynes@1265 | 2900 | case 43: return "R11_fiq";
|
nkeynes@1265 | 2901 | case 44: return "R12_fiq";
|
nkeynes@1265 | 2902 | case 45: return "SP_fiq";
|
nkeynes@1265 | 2903 | case 46: return "LR_fiq";
|
nkeynes@1265 | 2904 | case 48: return "LR_irq";
|
nkeynes@1265 | 2905 | case 49: return "SP_irq";
|
nkeynes@1265 | 2906 | case 50: return "LR_svc";
|
nkeynes@1265 | 2907 | case 51: return "SP_svc";
|
nkeynes@1265 | 2908 | case 52: return "LR_abt";
|
nkeynes@1265 | 2909 | case 53: return "SP_abt";
|
nkeynes@1265 | 2910 | case 54: return "LR_und";
|
nkeynes@1265 | 2911 | case 55: return "SP_und";
|
nkeynes@1265 | 2912 | case 60: return "LR_mon";
|
nkeynes@1265 | 2913 | case 61: return "SP_mon";
|
nkeynes@1265 | 2914 | case 62: return "ELR_hyp";
|
nkeynes@1265 | 2915 | case 63: return "SP_hyp";
|
nkeynes@1265 | 2916 | case 79: return "SPSR";
|
nkeynes@1265 | 2917 | case 110: return "SPSR_fiq";
|
nkeynes@1265 | 2918 | case 112: return "SPSR_irq";
|
nkeynes@1265 | 2919 | case 114: return "SPSR_svc";
|
nkeynes@1265 | 2920 | case 116: return "SPSR_abt";
|
nkeynes@1265 | 2921 | case 118: return "SPSR_und";
|
nkeynes@1265 | 2922 | case 124: return "SPSR_mon";
|
nkeynes@1265 | 2923 | case 126: return "SPSR_hyp";
|
nkeynes@1265 | 2924 | default: return NULL;
|
nkeynes@1265 | 2925 | }
|
nkeynes@1265 | 2926 | }
|
nkeynes@1265 | 2927 |
|
nkeynes@1265 | 2928 | /* Print one ARM instruction from PC on INFO->STREAM. */
|
nkeynes@1265 | 2929 |
|
nkeynes@1265 | 2930 | static void
|
nkeynes@1265 | 2931 | print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given)
|
nkeynes@1265 | 2932 | {
|
nkeynes@1265 | 2933 | const struct opcode32 *insn;
|
nkeynes@1265 | 2934 | void *stream = info->stream;
|
nkeynes@1265 | 2935 | fprintf_ftype func = info->fprintf_func;
|
nkeynes@1265 | 2936 | struct arm_private_data *private_data = info->private_data;
|
nkeynes@1265 | 2937 |
|
nkeynes@1265 | 2938 | if (print_insn_coprocessor (pc, info, given, FALSE))
|
nkeynes@1265 | 2939 | return;
|
nkeynes@1265 | 2940 |
|
nkeynes@1265 | 2941 | if (print_insn_neon (info, given, FALSE))
|
nkeynes@1265 | 2942 | return;
|
nkeynes@1265 | 2943 |
|
nkeynes@1265 | 2944 | for (insn = arm_opcodes; insn->assembler; insn++)
|
nkeynes@1265 | 2945 | {
|
nkeynes@1265 | 2946 | if ((given & insn->mask) != insn->value)
|
nkeynes@1265 | 2947 | continue;
|
nkeynes@1265 | 2948 |
|
nkeynes@1265 | 2949 | if ((insn->arch & private_data->features.core) == 0)
|
nkeynes@1265 | 2950 | continue;
|
nkeynes@1265 | 2951 |
|
nkeynes@1265 | 2952 | /* Special case: an instruction with all bits set in the condition field
|
nkeynes@1265 | 2953 | (0xFnnn_nnnn) is only matched if all those bits are set in insn->mask,
|
nkeynes@1265 | 2954 | or by the catchall at the end of the table. */
|
nkeynes@1265 | 2955 | if ((given & 0xF0000000) != 0xF0000000
|
nkeynes@1265 | 2956 | || (insn->mask & 0xF0000000) == 0xF0000000
|
nkeynes@1265 | 2957 | || (insn->mask == 0 && insn->value == 0))
|
nkeynes@1265 | 2958 | {
|
nkeynes@1265 | 2959 | unsigned long u_reg = 16;
|
nkeynes@1265 | 2960 | unsigned long U_reg = 16;
|
nkeynes@1265 | 2961 | bfd_boolean is_unpredictable = FALSE;
|
nkeynes@1265 | 2962 | signed long value_in_comment = 0;
|
nkeynes@1265 | 2963 | const char *c;
|
nkeynes@1265 | 2964 |
|
nkeynes@1265 | 2965 | for (c = insn->assembler; *c; c++)
|
nkeynes@1265 | 2966 | {
|
nkeynes@1265 | 2967 | if (*c == '%')
|
nkeynes@1265 | 2968 | {
|
nkeynes@1265 | 2969 | bfd_boolean allow_unpredictable = FALSE;
|
nkeynes@1265 | 2970 |
|
nkeynes@1265 | 2971 | switch (*++c)
|
nkeynes@1265 | 2972 | {
|
nkeynes@1265 | 2973 | case '%':
|
nkeynes@1265 | 2974 | func (stream, "%%");
|
nkeynes@1265 | 2975 | break;
|
nkeynes@1265 | 2976 |
|
nkeynes@1265 | 2977 | case 'a':
|
nkeynes@1265 | 2978 | value_in_comment = print_arm_address (pc, info, given);
|
nkeynes@1265 | 2979 | break;
|
nkeynes@1265 | 2980 |
|
nkeynes@1265 | 2981 | case 'P':
|
nkeynes@1265 | 2982 | /* Set P address bit and use normal address
|
nkeynes@1265 | 2983 | printing routine. */
|
nkeynes@1265 | 2984 | value_in_comment = print_arm_address (pc, info, given | (1 << P_BIT));
|
nkeynes@1265 | 2985 | break;
|
nkeynes@1265 | 2986 |
|
nkeynes@1265 | 2987 | case 'S':
|
nkeynes@1265 | 2988 | allow_unpredictable = TRUE;
|
nkeynes@1265 | 2989 | case 's':
|
nkeynes@1265 | 2990 | if ((given & 0x004f0000) == 0x004f0000)
|
nkeynes@1265 | 2991 | {
|
nkeynes@1265 | 2992 | /* PC relative with immediate offset. */
|
nkeynes@1265 | 2993 | bfd_vma offset = ((given & 0xf00) >> 4) | (given & 0xf);
|
nkeynes@1265 | 2994 |
|
nkeynes@1265 | 2995 | if (PRE_BIT_SET)
|
nkeynes@1265 | 2996 | {
|
nkeynes@1265 | 2997 | /* Elide positive zero offset. */
|
nkeynes@1265 | 2998 | if (offset || NEGATIVE_BIT_SET)
|
nkeynes@1265 | 2999 | func (stream, "[pc, #%s%d]\t; ",
|
nkeynes@1265 | 3000 | NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 3001 | else
|
nkeynes@1265 | 3002 | func (stream, "[pc]\t; ");
|
nkeynes@1265 | 3003 | if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 3004 | offset = -offset;
|
nkeynes@1265 | 3005 | info->print_address_func (offset + pc + 8, info);
|
nkeynes@1265 | 3006 | }
|
nkeynes@1265 | 3007 | else
|
nkeynes@1265 | 3008 | {
|
nkeynes@1265 | 3009 | /* Always show the offset. */
|
nkeynes@1265 | 3010 | func (stream, "[pc], #%s%d",
|
nkeynes@1265 | 3011 | NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 3012 | if (! allow_unpredictable)
|
nkeynes@1265 | 3013 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3014 | }
|
nkeynes@1265 | 3015 | }
|
nkeynes@1265 | 3016 | else
|
nkeynes@1265 | 3017 | {
|
nkeynes@1265 | 3018 | int offset = ((given & 0xf00) >> 4) | (given & 0xf);
|
nkeynes@1265 | 3019 |
|
nkeynes@1265 | 3020 | func (stream, "[%s",
|
nkeynes@1265 | 3021 | arm_regnames[(given >> 16) & 0xf]);
|
nkeynes@1265 | 3022 |
|
nkeynes@1265 | 3023 | if (PRE_BIT_SET)
|
nkeynes@1265 | 3024 | {
|
nkeynes@1265 | 3025 | if (IMMEDIATE_BIT_SET)
|
nkeynes@1265 | 3026 | {
|
nkeynes@1265 | 3027 | /* Elide offset for non-writeback
|
nkeynes@1265 | 3028 | positive zero. */
|
nkeynes@1265 | 3029 | if (WRITEBACK_BIT_SET || NEGATIVE_BIT_SET
|
nkeynes@1265 | 3030 | || offset)
|
nkeynes@1265 | 3031 | func (stream, ", #%s%d",
|
nkeynes@1265 | 3032 | NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 3033 |
|
nkeynes@1265 | 3034 | if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 3035 | offset = -offset;
|
nkeynes@1265 | 3036 |
|
nkeynes@1265 | 3037 | value_in_comment = offset;
|
nkeynes@1265 | 3038 | }
|
nkeynes@1265 | 3039 | else
|
nkeynes@1265 | 3040 | {
|
nkeynes@1265 | 3041 | /* Register Offset or Register Pre-Indexed. */
|
nkeynes@1265 | 3042 | func (stream, ", %s%s",
|
nkeynes@1265 | 3043 | NEGATIVE_BIT_SET ? "-" : "",
|
nkeynes@1265 | 3044 | arm_regnames[given & 0xf]);
|
nkeynes@1265 | 3045 |
|
nkeynes@1265 | 3046 | /* Writing back to the register that is the source/
|
nkeynes@1265 | 3047 | destination of the load/store is unpredictable. */
|
nkeynes@1265 | 3048 | if (! allow_unpredictable
|
nkeynes@1265 | 3049 | && WRITEBACK_BIT_SET
|
nkeynes@1265 | 3050 | && ((given & 0xf) == ((given >> 12) & 0xf)))
|
nkeynes@1265 | 3051 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3052 | }
|
nkeynes@1265 | 3053 |
|
nkeynes@1265 | 3054 | func (stream, "]%s",
|
nkeynes@1265 | 3055 | WRITEBACK_BIT_SET ? "!" : "");
|
nkeynes@1265 | 3056 | }
|
nkeynes@1265 | 3057 | else
|
nkeynes@1265 | 3058 | {
|
nkeynes@1265 | 3059 | if (IMMEDIATE_BIT_SET)
|
nkeynes@1265 | 3060 | {
|
nkeynes@1265 | 3061 | /* Immediate Post-indexed. */
|
nkeynes@1265 | 3062 | /* PR 10924: Offset must be printed, even if it is zero. */
|
nkeynes@1265 | 3063 | func (stream, "], #%s%d",
|
nkeynes@1265 | 3064 | NEGATIVE_BIT_SET ? "-" : "", offset);
|
nkeynes@1265 | 3065 | if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 3066 | offset = -offset;
|
nkeynes@1265 | 3067 | value_in_comment = offset;
|
nkeynes@1265 | 3068 | }
|
nkeynes@1265 | 3069 | else
|
nkeynes@1265 | 3070 | {
|
nkeynes@1265 | 3071 | /* Register Post-indexed. */
|
nkeynes@1265 | 3072 | func (stream, "], %s%s",
|
nkeynes@1265 | 3073 | NEGATIVE_BIT_SET ? "-" : "",
|
nkeynes@1265 | 3074 | arm_regnames[given & 0xf]);
|
nkeynes@1265 | 3075 |
|
nkeynes@1265 | 3076 | /* Writing back to the register that is the source/
|
nkeynes@1265 | 3077 | destination of the load/store is unpredictable. */
|
nkeynes@1265 | 3078 | if (! allow_unpredictable
|
nkeynes@1265 | 3079 | && (given & 0xf) == ((given >> 12) & 0xf))
|
nkeynes@1265 | 3080 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3081 | }
|
nkeynes@1265 | 3082 |
|
nkeynes@1265 | 3083 | if (! allow_unpredictable)
|
nkeynes@1265 | 3084 | {
|
nkeynes@1265 | 3085 | /* Writeback is automatically implied by post- addressing.
|
nkeynes@1265 | 3086 | Setting the W bit is unnecessary and ARM specify it as
|
nkeynes@1265 | 3087 | being unpredictable. */
|
nkeynes@1265 | 3088 | if (WRITEBACK_BIT_SET
|
nkeynes@1265 | 3089 | /* Specifying the PC register as the post-indexed
|
nkeynes@1265 | 3090 | registers is also unpredictable. */
|
nkeynes@1265 | 3091 | || (! IMMEDIATE_BIT_SET && ((given & 0xf) == 0xf)))
|
nkeynes@1265 | 3092 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3093 | }
|
nkeynes@1265 | 3094 | }
|
nkeynes@1265 | 3095 | }
|
nkeynes@1265 | 3096 | break;
|
nkeynes@1265 | 3097 |
|
nkeynes@1265 | 3098 | case 'b':
|
nkeynes@1265 | 3099 | {
|
nkeynes@1265 | 3100 | bfd_vma disp = (((given & 0xffffff) ^ 0x800000) - 0x800000);
|
nkeynes@1265 | 3101 | info->print_address_func (disp * 4 + pc + 8, info);
|
nkeynes@1265 | 3102 | }
|
nkeynes@1265 | 3103 | break;
|
nkeynes@1265 | 3104 |
|
nkeynes@1265 | 3105 | case 'c':
|
nkeynes@1265 | 3106 | if (((given >> 28) & 0xf) != 0xe)
|
nkeynes@1265 | 3107 | func (stream, "%s",
|
nkeynes@1265 | 3108 | arm_conditional [(given >> 28) & 0xf]);
|
nkeynes@1265 | 3109 | break;
|
nkeynes@1265 | 3110 |
|
nkeynes@1265 | 3111 | case 'm':
|
nkeynes@1265 | 3112 | {
|
nkeynes@1265 | 3113 | int started = 0;
|
nkeynes@1265 | 3114 | int reg;
|
nkeynes@1265 | 3115 |
|
nkeynes@1265 | 3116 | func (stream, "{");
|
nkeynes@1265 | 3117 | for (reg = 0; reg < 16; reg++)
|
nkeynes@1265 | 3118 | if ((given & (1 << reg)) != 0)
|
nkeynes@1265 | 3119 | {
|
nkeynes@1265 | 3120 | if (started)
|
nkeynes@1265 | 3121 | func (stream, ", ");
|
nkeynes@1265 | 3122 | started = 1;
|
nkeynes@1265 | 3123 | func (stream, "%s", arm_regnames[reg]);
|
nkeynes@1265 | 3124 | }
|
nkeynes@1265 | 3125 | func (stream, "}");
|
nkeynes@1265 | 3126 | if (! started)
|
nkeynes@1265 | 3127 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3128 | }
|
nkeynes@1265 | 3129 | break;
|
nkeynes@1265 | 3130 |
|
nkeynes@1265 | 3131 | case 'q':
|
nkeynes@1265 | 3132 | arm_decode_shift (given, func, stream, FALSE);
|
nkeynes@1265 | 3133 | break;
|
nkeynes@1265 | 3134 |
|
nkeynes@1265 | 3135 | case 'o':
|
nkeynes@1265 | 3136 | if ((given & 0x02000000) != 0)
|
nkeynes@1265 | 3137 | {
|
nkeynes@1265 | 3138 | int rotate = (given & 0xf00) >> 7;
|
nkeynes@1265 | 3139 | int immed = (given & 0xff);
|
nkeynes@1265 | 3140 |
|
nkeynes@1265 | 3141 | immed = (((immed << (32 - rotate))
|
nkeynes@1265 | 3142 | | (immed >> rotate)) & 0xffffffff);
|
nkeynes@1265 | 3143 | func (stream, "#%d", immed);
|
nkeynes@1265 | 3144 | value_in_comment = immed;
|
nkeynes@1265 | 3145 | }
|
nkeynes@1265 | 3146 | else
|
nkeynes@1265 | 3147 | arm_decode_shift (given, func, stream, TRUE);
|
nkeynes@1265 | 3148 | break;
|
nkeynes@1265 | 3149 |
|
nkeynes@1265 | 3150 | case 'p':
|
nkeynes@1265 | 3151 | if ((given & 0x0000f000) == 0x0000f000)
|
nkeynes@1265 | 3152 | {
|
nkeynes@1265 | 3153 | /* The p-variants of tst/cmp/cmn/teq are the pre-V6
|
nkeynes@1265 | 3154 | mechanism for setting PSR flag bits. They are
|
nkeynes@1265 | 3155 | obsolete in V6 onwards. */
|
nkeynes@1265 | 3156 | if ((private_data->features.core & ARM_EXT_V6) == 0)
|
nkeynes@1265 | 3157 | func (stream, "p");
|
nkeynes@1265 | 3158 | }
|
nkeynes@1265 | 3159 | break;
|
nkeynes@1265 | 3160 |
|
nkeynes@1265 | 3161 | case 't':
|
nkeynes@1265 | 3162 | if ((given & 0x01200000) == 0x00200000)
|
nkeynes@1265 | 3163 | func (stream, "t");
|
nkeynes@1265 | 3164 | break;
|
nkeynes@1265 | 3165 |
|
nkeynes@1265 | 3166 | case 'A':
|
nkeynes@1265 | 3167 | {
|
nkeynes@1265 | 3168 | int offset = given & 0xff;
|
nkeynes@1265 | 3169 |
|
nkeynes@1265 | 3170 | value_in_comment = offset * 4;
|
nkeynes@1265 | 3171 | if (NEGATIVE_BIT_SET)
|
nkeynes@1265 | 3172 | value_in_comment = - value_in_comment;
|
nkeynes@1265 | 3173 |
|
nkeynes@1265 | 3174 | func (stream, "[%s", arm_regnames [(given >> 16) & 0xf]);
|
nkeynes@1265 | 3175 |
|
nkeynes@1265 | 3176 | if (PRE_BIT_SET)
|
nkeynes@1265 | 3177 | {
|
nkeynes@1265 | 3178 | if (offset)
|
nkeynes@1265 | 3179 | func (stream, ", #%d]%s",
|
nkeynes@1265 | 3180 | value_in_comment,
|
nkeynes@1265 | 3181 | WRITEBACK_BIT_SET ? "!" : "");
|
nkeynes@1265 | 3182 | else
|
nkeynes@1265 | 3183 | func (stream, "]");
|
nkeynes@1265 | 3184 | }
|
nkeynes@1265 | 3185 | else
|
nkeynes@1265 | 3186 | {
|
nkeynes@1265 | 3187 | func (stream, "]");
|
nkeynes@1265 | 3188 |
|
nkeynes@1265 | 3189 | if (WRITEBACK_BIT_SET)
|
nkeynes@1265 | 3190 | {
|
nkeynes@1265 | 3191 | if (offset)
|
nkeynes@1265 | 3192 | func (stream, ", #%d", value_in_comment);
|
nkeynes@1265 | 3193 | }
|
nkeynes@1265 | 3194 | else
|
nkeynes@1265 | 3195 | {
|
nkeynes@1265 | 3196 | func (stream, ", {%d}", offset);
|
nkeynes@1265 | 3197 | value_in_comment = offset;
|
nkeynes@1265 | 3198 | }
|
nkeynes@1265 | 3199 | }
|
nkeynes@1265 | 3200 | }
|
nkeynes@1265 | 3201 | break;
|
nkeynes@1265 | 3202 |
|
nkeynes@1265 | 3203 | case 'B':
|
nkeynes@1265 | 3204 | /* Print ARM V5 BLX(1) address: pc+25 bits. */
|
nkeynes@1265 | 3205 | {
|
nkeynes@1265 | 3206 | bfd_vma address;
|
nkeynes@1265 | 3207 | bfd_vma offset = 0;
|
nkeynes@1265 | 3208 |
|
nkeynes@1265 | 3209 | if (! NEGATIVE_BIT_SET)
|
nkeynes@1265 | 3210 | /* Is signed, hi bits should be ones. */
|
nkeynes@1265 | 3211 | offset = (-1) ^ 0x00ffffff;
|
nkeynes@1265 | 3212 |
|
nkeynes@1265 | 3213 | /* Offset is (SignExtend(offset field)<<2). */
|
nkeynes@1265 | 3214 | offset += given & 0x00ffffff;
|
nkeynes@1265 | 3215 | offset <<= 2;
|
nkeynes@1265 | 3216 | address = offset + pc + 8;
|
nkeynes@1265 | 3217 |
|
nkeynes@1265 | 3218 | if (given & 0x01000000)
|
nkeynes@1265 | 3219 | /* H bit allows addressing to 2-byte boundaries. */
|
nkeynes@1265 | 3220 | address += 2;
|
nkeynes@1265 | 3221 |
|
nkeynes@1265 | 3222 | info->print_address_func (address, info);
|
nkeynes@1265 | 3223 | }
|
nkeynes@1265 | 3224 | break;
|
nkeynes@1265 | 3225 |
|
nkeynes@1265 | 3226 | case 'C':
|
nkeynes@1265 | 3227 | if ((given & 0x02000200) == 0x200)
|
nkeynes@1265 | 3228 | {
|
nkeynes@1265 | 3229 | const char * name;
|
nkeynes@1265 | 3230 | unsigned sysm = (given & 0x004f0000) >> 16;
|
nkeynes@1265 | 3231 |
|
nkeynes@1265 | 3232 | sysm |= (given & 0x300) >> 4;
|
nkeynes@1265 | 3233 | name = banked_regname (sysm);
|
nkeynes@1265 | 3234 |
|
nkeynes@1265 | 3235 | if (name != NULL)
|
nkeynes@1265 | 3236 | func (stream, "%s", name);
|
nkeynes@1265 | 3237 | else
|
nkeynes@1265 | 3238 | func (stream, "(UNDEF: %lu)", sysm);
|
nkeynes@1265 | 3239 | }
|
nkeynes@1265 | 3240 | else
|
nkeynes@1265 | 3241 | {
|
nkeynes@1265 | 3242 | func (stream, "%cPSR_",
|
nkeynes@1265 | 3243 | (given & 0x00400000) ? 'S' : 'C');
|
nkeynes@1265 | 3244 | if (given & 0x80000)
|
nkeynes@1265 | 3245 | func (stream, "f");
|
nkeynes@1265 | 3246 | if (given & 0x40000)
|
nkeynes@1265 | 3247 | func (stream, "s");
|
nkeynes@1265 | 3248 | if (given & 0x20000)
|
nkeynes@1265 | 3249 | func (stream, "x");
|
nkeynes@1265 | 3250 | if (given & 0x10000)
|
nkeynes@1265 | 3251 | func (stream, "c");
|
nkeynes@1265 | 3252 | }
|
nkeynes@1265 | 3253 | break;
|
nkeynes@1265 | 3254 |
|
nkeynes@1265 | 3255 | case 'U':
|
nkeynes@1265 | 3256 | if ((given & 0xf0) == 0x60)
|
nkeynes@1265 | 3257 | {
|
nkeynes@1265 | 3258 | switch (given & 0xf)
|
nkeynes@1265 | 3259 | {
|
nkeynes@1265 | 3260 | case 0xf: func (stream, "sy"); break;
|
nkeynes@1265 | 3261 | default:
|
nkeynes@1265 | 3262 | func (stream, "#%d", (int) given & 0xf);
|
nkeynes@1265 | 3263 | break;
|
nkeynes@1265 | 3264 | }
|
nkeynes@1265 | 3265 | }
|
nkeynes@1265 | 3266 | else
|
nkeynes@1265 | 3267 | {
|
nkeynes@1265 | 3268 | switch (given & 0xf)
|
nkeynes@1265 | 3269 | {
|
nkeynes@1265 | 3270 | case 0xf: func (stream, "sy"); break;
|
nkeynes@1265 | 3271 | case 0x7: func (stream, "un"); break;
|
nkeynes@1265 | 3272 | case 0xe: func (stream, "st"); break;
|
nkeynes@1265 | 3273 | case 0x6: func (stream, "unst"); break;
|
nkeynes@1265 | 3274 | case 0xb: func (stream, "ish"); break;
|
nkeynes@1265 | 3275 | case 0xa: func (stream, "ishst"); break;
|
nkeynes@1265 | 3276 | case 0x3: func (stream, "osh"); break;
|
nkeynes@1265 | 3277 | case 0x2: func (stream, "oshst"); break;
|
nkeynes@1265 | 3278 | default:
|
nkeynes@1265 | 3279 | func (stream, "#%d", (int) given & 0xf);
|
nkeynes@1265 | 3280 | break;
|
nkeynes@1265 | 3281 | }
|
nkeynes@1265 | 3282 | }
|
nkeynes@1265 | 3283 | break;
|
nkeynes@1265 | 3284 |
|
nkeynes@1265 | 3285 | case '0': case '1': case '2': case '3': case '4':
|
nkeynes@1265 | 3286 | case '5': case '6': case '7': case '8': case '9':
|
nkeynes@1265 | 3287 | {
|
nkeynes@1265 | 3288 | int width;
|
nkeynes@1265 | 3289 | unsigned long value;
|
nkeynes@1265 | 3290 |
|
nkeynes@1265 | 3291 | c = arm_decode_bitfield (c, given, &value, &width);
|
nkeynes@1265 | 3292 |
|
nkeynes@1265 | 3293 | switch (*c)
|
nkeynes@1265 | 3294 | {
|
nkeynes@1265 | 3295 | case 'R':
|
nkeynes@1265 | 3296 | if (value == 15)
|
nkeynes@1265 | 3297 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3298 | /* Fall through. */
|
nkeynes@1265 | 3299 | case 'r':
|
nkeynes@1265 | 3300 | if (c[1] == 'u')
|
nkeynes@1265 | 3301 | {
|
nkeynes@1265 | 3302 | /* Eat the 'u' character. */
|
nkeynes@1265 | 3303 | ++ c;
|
nkeynes@1265 | 3304 |
|
nkeynes@1265 | 3305 | if (u_reg == value)
|
nkeynes@1265 | 3306 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3307 | u_reg = value;
|
nkeynes@1265 | 3308 | }
|
nkeynes@1265 | 3309 | if (c[1] == 'U')
|
nkeynes@1265 | 3310 | {
|
nkeynes@1265 | 3311 | /* Eat the 'U' character. */
|
nkeynes@1265 | 3312 | ++ c;
|
nkeynes@1265 | 3313 |
|
nkeynes@1265 | 3314 | if (U_reg == value)
|
nkeynes@1265 | 3315 | is_unpredictable = TRUE;
|
nkeynes@1265 | 3316 | U_reg = value;
|
nkeynes@1265 | 3317 | }
|
nkeynes@1265 | 3318 | func (stream, "%s", arm_regnames[value]);
|
nkeynes@1265 | 3319 | break;
|
nkeynes@1265 | 3320 | case 'd':
|
nkeynes@1265 | 3321 | func (stream, "%ld", value);
|
nkeynes@1265 | 3322 | value_in_comment = value;
|
nkeynes@1265 | 3323 | break;
|
nkeynes@1265 | 3324 | case 'b':
|
nkeynes@1265 | 3325 | func (stream, "%ld", value * 8);
|
nkeynes@1265 | 3326 | value_in_comment = value * 8;
|
nkeynes@1265 | 3327 | break;
|
nkeynes@1265 | 3328 | case 'W':
|
nkeynes@1265 | 3329 | func (stream, "%ld", value + 1);
|
nkeynes@1265 | 3330 | value_in_comment = value + 1;
|
nkeynes@1265 | 3331 | break;
|
nkeynes@1265 | 3332 | case 'x':
|
nkeynes@1265 | 3333 | func (stream, "0x%08lx", value);
|
nkeynes@1265 | 3334 |
|
nkeynes@1265 | 3335 | /* Some SWI instructions have special
|
nkeynes@1265 | 3336 | meanings. */
|
nkeynes@1265 | 3337 | if ((given & 0x0fffffff) == 0x0FF00000)
|
nkeynes@1265 | 3338 | func (stream, "\t; IMB");
|
nkeynes@1265 | 3339 | else if ((given & 0x0fffffff) == 0x0FF00001)
|
nkeynes@1265 | 3340 | func (stream, "\t; IMBRange");
|
nkeynes@1265 | 3341 | break;
|
nkeynes@1265 | 3342 | case 'X':
|
nkeynes@1265 | 3343 | func (stream, "%01lx", value & 0xf);
|
nkeynes@1265 | 3344 | value_in_comment = value;
|
nkeynes@1265 | 3345 | break;
|
nkeynes@1265 | 3346 | case '`':
|
nkeynes@1265 | 3347 | c++;
|
nkeynes@1265 | 3348 | if (value == 0)
|
nkeynes@1265 | 3349 | func (stream, "%c", *c);
|
nkeynes@1265 | 3350 | break;
|
nkeynes@1265 | 3351 | case '\'':
|
nkeynes@1265 | 3352 | c++;
|
nkeynes@1265 | 3353 | if (value == ((1ul << width) - 1))
|
nkeynes@1265 | 3354 | func (stream, "%c", *c);
|
nkeynes@1265 | 3355 | break;
|
nkeynes@1265 | 3356 | case '?':
|
nkeynes@1265 | 3357 | func (stream, "%c", c[(1 << width) - (int) value]);
|
nkeynes@1265 | 3358 | c += 1 << width;
|
nkeynes@1265 | 3359 | break;
|
nkeynes@1265 | 3360 | default:
|
nkeynes@1265 | 3361 | abort ();
|
nkeynes@1265 | 3362 | }
|
nkeynes@1265 | 3363 | break;
|
nkeynes@1265 | 3364 |
|
nkeynes@1265 | 3365 | case 'e':
|
nkeynes@1265 | 3366 | {
|
nkeynes@1265 | 3367 | int imm;
|
nkeynes@1265 | 3368 |
|
nkeynes@1265 | 3369 | imm = (given & 0xf) | ((given & 0xfff00) >> 4);
|
nkeynes@1265 | 3370 | func (stream, "%d", imm);
|
nkeynes@1265 | 3371 | value_in_comment = imm;
|
nkeynes@1265 | 3372 | }
|
nkeynes@1265 | 3373 | break;
|
nkeynes@1265 | 3374 |
|
nkeynes@1265 | 3375 | case 'E':
|
nkeynes@1265 | 3376 | /* LSB and WIDTH fields of BFI or BFC. The machine-
|
nkeynes@1265 | 3377 | language instruction encodes LSB and MSB. */
|
nkeynes@1265 | 3378 | {
|
nkeynes@1265 | 3379 | long msb = (given & 0x001f0000) >> 16;
|
nkeynes@1265 | 3380 | long lsb = (given & 0x00000f80) >> 7;
|
nkeynes@1265 | 3381 | long w = msb - lsb + 1;
|
nkeynes@1265 | 3382 |
|
nkeynes@1265 | 3383 | if (w > 0)
|
nkeynes@1265 | 3384 | func (stream, "#%lu, #%lu", lsb, w);
|
nkeynes@1265 | 3385 | else
|
nkeynes@1265 | 3386 | func (stream, "(invalid: %lu:%lu)", lsb, msb);
|
nkeynes@1265 | 3387 | }
|
nkeynes@1265 | 3388 | break;
|
nkeynes@1265 | 3389 |
|
nkeynes@1265 | 3390 | case 'R':
|
nkeynes@1265 | 3391 | /* Get the PSR/banked register name. */
|
nkeynes@1265 | 3392 | {
|
nkeynes@1265 | 3393 | const char * name;
|
nkeynes@1265 | 3394 | unsigned sysm = (given & 0x004f0000) >> 16;
|
nkeynes@1265 | 3395 |
|
nkeynes@1265 | 3396 | sysm |= (given & 0x300) >> 4;
|
nkeynes@1265 | 3397 | name = banked_regname (sysm);
|
nkeynes@1265 | 3398 |
|
nkeynes@1265 | 3399 | if (name != NULL)
|
nkeynes@1265 | 3400 | func (stream, "%s", name);
|
nkeynes@1265 | 3401 | else
|
nkeynes@1265 | 3402 | func (stream, "(UNDEF: %lu)", sysm);
|
nkeynes@1265 | 3403 | }
|
nkeynes@1265 | 3404 | break;
|
nkeynes@1265 | 3405 |
|
nkeynes@1265 | 3406 | case 'V':
|
nkeynes@1265 | 3407 | /* 16-bit unsigned immediate from a MOVT or MOVW
|
nkeynes@1265 | 3408 | instruction, encoded in bits 0:11 and 15:19. */
|
nkeynes@1265 | 3409 | {
|
nkeynes@1265 | 3410 | long hi = (given & 0x000f0000) >> 4;
|
nkeynes@1265 | 3411 | long lo = (given & 0x00000fff);
|
nkeynes@1265 | 3412 | long imm16 = hi | lo;
|
nkeynes@1265 | 3413 |
|
nkeynes@1265 | 3414 | func (stream, "#%lu", imm16);
|
nkeynes@1265 | 3415 | value_in_comment = imm16;
|
nkeynes@1265 | 3416 | }
|
nkeynes@1265 | 3417 | break;
|
nkeynes@1265 | 3418 |
|
nkeynes@1265 | 3419 | default:
|
nkeynes@1265 | 3420 | abort ();
|
nkeynes@1265 | 3421 | }
|
nkeynes@1265 | 3422 | }
|
nkeynes@1265 | 3423 | }
|
nkeynes@1265 | 3424 | else
|
nkeynes@1265 | 3425 | func (stream, "%c", *c);
|
nkeynes@1265 | 3426 | }
|
nkeynes@1265 | 3427 |
|
nkeynes@1265 | 3428 | if (value_in_comment > 32 || value_in_comment < -16)
|
nkeynes@1265 | 3429 | func (stream, "\t; 0x%lx", (value_in_comment & 0xffffffffUL));
|
nkeynes@1265 | 3430 |
|
nkeynes@1265 | 3431 | if (is_unpredictable)
|
nkeynes@1265 | 3432 | func (stream, UNPREDICTABLE_INSTRUCTION);
|
nkeynes@1265 | 3433 |
|
nkeynes@1265 | 3434 | return;
|
nkeynes@1265 | 3435 | }
|
nkeynes@1265 | 3436 | }
|
nkeynes@1265 | 3437 | abort ();
|
nkeynes@1265 | 3438 | }
|
nkeynes@1265 | 3439 |
|
nkeynes@1265 | 3440 | /* Print one 16-bit Thumb instruction from PC on INFO->STREAM. */
|
nkeynes@1265 | 3441 |
|
nkeynes@1265 | 3442 | static void
|
nkeynes@1265 | 3443 | print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given)
|
nkeynes@1265 | 3444 | {
|
nkeynes@1265 | 3445 | const struct opcode16 *insn;
|
nkeynes@1265 | 3446 | void *stream = info->stream;
|
nkeynes@1265 | 3447 | fprintf_ftype func = info->fprintf_func;
|
nkeynes@1265 | 3448 |
|
nkeynes@1265 | 3449 | for (insn = thumb_opcodes; insn->assembler; insn++)
|
nkeynes@1265 | 3450 | if ((given & insn->mask) == insn->value)
|
nkeynes@1265 | 3451 | {
|
nkeynes@1265 | 3452 | signed long value_in_comment = 0;
|
nkeynes@1265 | 3453 | const char *c = insn->assembler;
|
nkeynes@1265 | 3454 |
|
nkeynes@1265 | 3455 | for (; *c; c++)
|
nkeynes@1265 | 3456 | {
|
nkeynes@1265 | 3457 | int domaskpc = 0;
|
nkeynes@1265 | 3458 | int domasklr = 0;
|
nkeynes@1265 | 3459 |
|
nkeynes@1265 | 3460 | if (*c != '%')
|
nkeynes@1265 | 3461 | {
|
nkeynes@1265 | 3462 | func (stream, "%c", *c);
|
nkeynes@1265 | 3463 | continue;
|
nkeynes@1265 | 3464 | }
|
nkeynes@1265 | 3465 |
|
nkeynes@1265 | 3466 | switch (*++c)
|
nkeynes@1265 | 3467 | {
|
nkeynes@1265 | 3468 | case '%':
|
nkeynes@1265 | 3469 | func (stream, "%%");
|
nkeynes@1265 | 3470 | break;
|
nkeynes@1265 | 3471 |
|
nkeynes@1265 | 3472 | case 'c':
|
nkeynes@1265 | 3473 | if (ifthen_state)
|
nkeynes@1265 | 3474 | func (stream, "%s", arm_conditional[IFTHEN_COND]);
|
nkeynes@1265 | 3475 | break;
|
nkeynes@1265 | 3476 |
|
nkeynes@1265 | 3477 | case 'C':
|
nkeynes@1265 | 3478 | if (ifthen_state)
|
nkeynes@1265 | 3479 | func (stream, "%s", arm_conditional[IFTHEN_COND]);
|
nkeynes@1265 | 3480 | else
|
nkeynes@1265 | 3481 | func (stream, "s");
|
nkeynes@1265 | 3482 | break;
|
nkeynes@1265 | 3483 |
|
nkeynes@1265 | 3484 | case 'I':
|
nkeynes@1265 | 3485 | {
|
nkeynes@1265 | 3486 | unsigned int tmp;
|
nkeynes@1265 | 3487 |
|
nkeynes@1265 | 3488 | ifthen_next_state = given & 0xff;
|
nkeynes@1265 | 3489 | for (tmp = given << 1; tmp & 0xf; tmp <<= 1)
|
nkeynes@1265 | 3490 | func (stream, ((given ^ tmp) & 0x10) ? "e" : "t");
|
nkeynes@1265 | 3491 | func (stream, "\t%s", arm_conditional[(given >> 4) & 0xf]);
|
nkeynes@1265 | 3492 | }
|
nkeynes@1265 | 3493 | break;
|
nkeynes@1265 | 3494 |
|
nkeynes@1265 | 3495 | case 'x':
|
nkeynes@1265 | 3496 | if (ifthen_next_state)
|
nkeynes@1265 | 3497 | func (stream, "\t; unpredictable branch in IT block\n");
|
nkeynes@1265 | 3498 | break;
|
nkeynes@1265 | 3499 |
|
nkeynes@1265 | 3500 | case 'X':
|
nkeynes@1265 | 3501 | if (ifthen_state)
|
nkeynes@1265 | 3502 | func (stream, "\t; unpredictable <IT:%s>",
|
nkeynes@1265 | 3503 | arm_conditional[IFTHEN_COND]);
|
nkeynes@1265 | 3504 | break;
|
nkeynes@1265 | 3505 |
|
nkeynes@1265 | 3506 | case 'S':
|
nkeynes@1265 | 3507 | {
|
nkeynes@1265 | 3508 | long reg;
|
nkeynes@1265 | 3509 |
|
nkeynes@1265 | 3510 | reg = (given >> 3) & 0x7;
|
nkeynes@1265 | 3511 | if (given & (1 << 6))
|
nkeynes@1265 | 3512 | reg += 8;
|
nkeynes@1265 | 3513 |
|
nkeynes@1265 | 3514 | func (stream, "%s", arm_regnames[reg]);
|
nkeynes@1265 | 3515 | }
|
nkeynes@1265 | 3516 | break;
|
nkeynes@1265 | 3517 |
|
nkeynes@1265 | 3518 | case 'D':
|
nkeynes@1265 | 3519 | {
|
nkeynes@1265 | 3520 | long reg;
|
nkeynes@1265 | 3521 |
|
nkeynes@1265 | 3522 | reg = given & 0x7;
|
nkeynes@1265 | 3523 | if (given & (1 << 7))
|
nkeynes@1265 | 3524 | reg += 8;
|
nkeynes@1265 | 3525 |
|
nkeynes@1265 | 3526 | func (stream, "%s", arm_regnames[reg]);
|
nkeynes@1265 | 3527 | }
|
nkeynes@1265 | 3528 | break;
|
nkeynes@1265 | 3529 |
|
nkeynes@1265 | 3530 | case 'N':
|
nkeynes@1265 | 3531 | if (given & (1 << 8))
|
nkeynes@1265 | 3532 | domasklr = 1;
|
nkeynes@1265 | 3533 | /* Fall through. */
|
nkeynes@1265 | 3534 | case 'O':
|
nkeynes@1265 | 3535 | if (*c == 'O' && (given & (1 << 8)))
|
nkeynes@1265 | 3536 | domaskpc = 1;
|
nkeynes@1265 | 3537 | /* Fall through. */
|
nkeynes@1265 | 3538 | case 'M':
|
nkeynes@1265 | 3539 | {
|
nkeynes@1265 | 3540 | int started = 0;
|
nkeynes@1265 | 3541 | int reg;
|
nkeynes@1265 | 3542 |
|
nkeynes@1265 | 3543 | func (stream, "{");
|
nkeynes@1265 | 3544 |
|
nkeynes@1265 | 3545 | /* It would be nice if we could spot
|
nkeynes@1265 | 3546 | ranges, and generate the rS-rE format: */
|
nkeynes@1265 | 3547 | for (reg = 0; (reg < 8); reg++)
|
nkeynes@1265 | 3548 | if ((given & (1 << reg)) != 0)
|
nkeynes@1265 | 3549 | {
|
nkeynes@1265 | 3550 | if (started)
|
nkeynes@1265 | 3551 | func (stream, ", ");
|
nkeynes@1265 | 3552 | started = 1;
|
nkeynes@1265 | 3553 | func (stream, "%s", arm_regnames[reg]);
|
nkeynes@1265 | 3554 | }
|
nkeynes@1265 | 3555 |
|
nkeynes@1265 | 3556 | if (domasklr)
|
nkeynes@1265 | 3557 | {
|
nkeynes@1265 | 3558 | if (started)
|
nkeynes@1265 | 3559 | func (stream, ", ");
|
nkeynes@1265 | 3560 | started = 1;
|
nkeynes@1265 | 3561 | func (stream, arm_regnames[14] /* "lr" */);
|
nkeynes@1265 | 3562 | }
|
nkeynes@1265 | 3563 |
|
nkeynes@1265 | 3564 | if (domaskpc)
|
nkeynes@1265 | 3565 | {
|
nkeynes@1265 | 3566 | if (started)
|
nkeynes@1265 | 3567 | func (stream, ", ");
|
nkeynes@1265 | 3568 | func (stream, arm_regnames[15] /* "pc" */);
|
nkeynes@1265 | 3569 | }
|
nkeynes@1265 | 3570 |
|
nkeynes@1265 | 3571 | func (stream, "}");
|
nkeynes@1265 | 3572 | }
|
nkeynes@1265 | 3573 | break;
|
nkeynes@1265 | 3574 |
|
nkeynes@1265 | 3575 | case 'W':
|
nkeynes@1265 | 3576 | /* Print writeback indicator for a LDMIA. We are doing a
|
nkeynes@1265 | 3577 | writeback if the base register is not in the register
|
nkeynes@1265 | 3578 | mask. */
|
nkeynes@1265 | 3579 | if ((given & (1 << ((given & 0x0700) >> 8))) == 0)
|
nkeynes@1265 | 3580 | func (stream, "!");
|
nkeynes@1265 | 3581 | break;
|
nkeynes@1265 | 3582 |
|
nkeynes@1265 | 3583 | case 'b':
|
nkeynes@1265 | 3584 | /* Print ARM V6T2 CZB address: pc+4+6 bits. */
|
nkeynes@1265 | 3585 | {
|
nkeynes@1265 | 3586 | bfd_vma address = (pc + 4
|
nkeynes@1265 | 3587 | + ((given & 0x00f8) >> 2)
|
nkeynes@1265 | 3588 | + ((given & 0x0200) >> 3));
|
nkeynes@1265 | 3589 | info->print_address_func (address, info);
|
nkeynes@1265 | 3590 | }
|
nkeynes@1265 | 3591 | break;
|
nkeynes@1265 | 3592 |
|
nkeynes@1265 | 3593 | case 's':
|
nkeynes@1265 | 3594 | /* Right shift immediate -- bits 6..10; 1-31 print
|
nkeynes@1265 | 3595 | as themselves, 0 prints as 32. */
|
nkeynes@1265 | 3596 | {
|
nkeynes@1265 | 3597 | long imm = (given & 0x07c0) >> 6;
|
nkeynes@1265 | 3598 | if (imm == 0)
|
nkeynes@1265 | 3599 | imm = 32;
|
nkeynes@1265 | 3600 | func (stream, "#%ld", imm);
|
nkeynes@1265 | 3601 | }
|
nkeynes@1265 | 3602 | break;
|
nkeynes@1265 | 3603 |
|
nkeynes@1265 | 3604 | case '0': case '1': case '2': case '3': case '4':
|
nkeynes@1265 | 3605 | case '5': case '6': case '7': case '8': case '9':
|
nkeynes@1265 | 3606 | {
|
nkeynes@1265 | 3607 | int bitstart = *c++ - '0';
|
nkeynes@1265 | 3608 | int bitend = 0;
|
nkeynes@1265 | 3609 |
|
nkeynes@1265 | 3610 | while (*c >= '0' && *c <= '9')
|
nkeynes@1265 | 3611 | bitstart = (bitstart * 10) + *c++ - '0';
|
nkeynes@1265 | 3612 |
|
nkeynes@1265 | 3613 | switch (*c)
|
nkeynes@1265 | 3614 | {
|
nkeynes@1265 | 3615 | case '-':
|
nkeynes@1265 | 3616 | {
|
nkeynes@1265 | 3617 | bfd_vma reg;
|
nkeynes@1265 | 3618 |
|
nkeynes@1265 | 3619 | c++;
|
nkeynes@1265 | 3620 | while (*c >= '0' && *c <= '9')
|
nkeynes@1265 | 3621 | bitend = (bitend * 10) + *c++ - '0';
|
nkeynes@1265 | 3622 | if (!bitend)
|
nkeynes@1265 | 3623 | abort ();
|
nkeynes@1265 | 3624 | reg = given >> bitstart;
|
nkeynes@1265 | 3625 | reg &= (2 << (bitend - bitstart)) - 1;
|
nkeynes@1265 | 3626 |
|
nkeynes@1265 | 3627 | switch (*c)
|
nkeynes@1265 | 3628 | {
|
nkeynes@1265 | 3629 | case 'r':
|
nkeynes@1265 | 3630 | func (stream, "%s", arm_regnames[reg]);
|
nkeynes@1265 | 3631 | break;
|
nkeynes@1265 | 3632 |
|
nkeynes@1265 | 3633 | case 'd':
|
nkeynes@1265 | 3634 | func (stream, "%ld", reg);
|
nkeynes@1265 | 3635 | value_in_comment = reg;
|
nkeynes@1265 | 3636 | break;
|
nkeynes@1265 | 3637 |
|
nkeynes@1265 | 3638 | case 'H':
|
nkeynes@1265 | 3639 | func (stream, "%ld", reg << 1);
|
nkeynes@1265 | 3640 | value_in_comment = reg << 1;
|
nkeynes@1265 | 3641 | break;
|
nkeynes@1265 | 3642 |
|
nkeynes@1265 | 3643 | case 'W':
|
nkeynes@1265 | 3644 | func (stream, "%ld", reg << 2);
|
nkeynes@1265 | 3645 | value_in_comment = reg << 2;
|
nkeynes@1265 | 3646 | break;
|
nkeynes@1265 | 3647 |
|
nkeynes@1265 | 3648 | case 'a':
|
nkeynes@1265 | 3649 | /* PC-relative address -- the bottom two
|
nkeynes@1265 | 3650 | bits of the address are dropped
|
nkeynes@1265 | 3651 | before the calculation. */
|
nkeynes@1265 | 3652 | info->print_address_func
|
nkeynes@1265 | 3653 | (((pc + 4) & ~3) + (reg << 2), info);
|
nkeynes@1265 | 3654 | value_in_comment = 0;
|
nkeynes@1265 | 3655 | break;
|
nkeynes@1265 | 3656 |
|
nkeynes@1265 | 3657 | case 'x':
|
nkeynes@1265 | 3658 | func (stream, "0x%04lx", reg);
|
nkeynes@1265 | 3659 | break;
|
nkeynes@1265 | 3660 |
|
nkeynes@1265 | 3661 | case 'B':
|
nkeynes@1265 | 3662 | reg = ((reg ^ (1 << bitend)) - (1 << bitend));
|
nkeynes@1265 | 3663 | info->print_address_func (reg * 2 + pc + 4, info);
|
nkeynes@1265 | 3664 | value_in_comment = 0;
|
nkeynes@1265 | 3665 | break;
|
nkeynes@1265 | 3666 |
|
nkeynes@1265 | 3667 | case 'c':
|
nkeynes@1265 | 3668 | func (stream, "%s", arm_conditional [reg]);
|
nkeynes@1265 | 3669 | break;
|
nkeynes@1265 | 3670 |
|
nkeynes@1265 | 3671 | default:
|
nkeynes@1265 | 3672 | abort ();
|
nkeynes@1265 | 3673 | }
|
nkeynes@1265 | 3674 | }
|
nkeynes@1265 | 3675 | break;
|
nkeynes@1265 | 3676 |
|
nkeynes@1265 | 3677 | case '\'':
|
nkeynes@1265 | 3678 | c++;
|
nkeynes@1265 | 3679 | if ((given & (1 << bitstart)) != 0)
|
nkeynes@1265 | 3680 | func (stream, "%c", *c);
|
nkeynes@1265 | 3681 | break;
|
nkeynes@1265 | 3682 |
|
nkeynes@1265 | 3683 | case '?':
|
nkeynes@1265 | 3684 | ++c;
|
nkeynes@1265 | 3685 | if ((given & (1 << bitstart)) != 0)
|
nkeynes@1265 | 3686 | func (stream, "%c", *c++);
|
nkeynes@1265 | 3687 | else
|
nkeynes@1265 | 3688 | func (stream, "%c", *++c);
|
nkeynes@1265 | 3689 | break;
|
nkeynes@1265 | 3690 |
|
nkeynes@1265 | 3691 | default:
|
nkeynes@1265 | 3692 | abort ();
|
nkeynes@1265 | 3693 | }
|
nkeynes@1265 | 3694 | }
|
nkeynes@1265 | 3695 | break;
|
nkeynes@1265 | 3696 |
|
nkeynes@1265 | 3697 | default:
|
nkeynes@1265 | 3698 | abort ();
|
nkeynes@1265 | 3699 | }
|
nkeynes@1265 | 3700 | }
|
nkeynes@1265 | 3701 |
|
nkeynes@1265 | 3702 | if (value_in_comment > 32 || value_in_comment < -16)
|
nkeynes@1265 | 3703 | func (stream, "\t; 0x%lx", value_in_comment);
|
nkeynes@1265 | 3704 | return;
|
nkeynes@1265 | 3705 | }
|
nkeynes@1265 | 3706 |
|
nkeynes@1265 | 3707 | /* No match. */
|
nkeynes@1265 | 3708 | abort ();
|
nkeynes@1265 | 3709 | }
|
nkeynes@1265 | 3710 |
|
nkeynes@1265 | 3711 | /* Return the name of an V7M special register. */
|
nkeynes@1265 | 3712 |
|
nkeynes@1265 | 3713 | static const char *
|
nkeynes@1265 | 3714 | psr_name (int regno)
|
nkeynes@1265 | 3715 | {
|
nkeynes@1265 | 3716 | switch (regno)
|
nkeynes@1265 | 3717 | {
|
nkeynes@1265 | 3718 | case 0: return "APSR";
|
nkeynes@1265 | 3719 | case 1: return "IAPSR";
|
nkeynes@1265 | 3720 | case 2: return "EAPSR";
|
nkeynes@1265 | 3721 | case 3: return "PSR";
|
nkeynes@1265 | 3722 | case 5: return "IPSR";
|
nkeynes@1265 | 3723 | case 6: return "EPSR";
|
nkeynes@1265 | 3724 | case 7: return "IEPSR";
|
nkeynes@1265 | 3725 | case 8: return "MSP";
|
nkeynes@1265 | 3726 | case 9: return "PSP";
|
nkeynes@1265 | 3727 | case 16: return "PRIMASK";
|
nkeynes@1265 | 3728 | case 17: return "BASEPRI";
|
nkeynes@1265 | 3729 | case 18: return "BASEPRI_MAX";
|
nkeynes@1265 | 3730 | case 19: return "FAULTMASK";
|
nkeynes@1265 | 3731 | case 20: return "CONTROL";
|
nkeynes@1265 | 3732 | default: return "<unknown>";
|
nkeynes@1265 | 3733 | }
|
nkeynes@1265 | 3734 | }
|
nkeynes@1265 | 3735 |
|
nkeynes@1265 | 3736 | /* Print one 32-bit Thumb instruction from PC on INFO->STREAM. */
|
nkeynes@1265 | 3737 |
|
nkeynes@1265 | 3738 | static void
|
nkeynes@1265 | 3739 | print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given)
|
nkeynes@1265 | 3740 | {
|
nkeynes@1265 | 3741 | const struct opcode32 *insn;
|
nkeynes@1265 | 3742 | void *stream = info->stream;
|
nkeynes@1265 | 3743 | fprintf_ftype func = info->fprintf_func;
|
nkeynes@1265 | 3744 |
|
nkeynes@1265 | 3745 | if (print_insn_coprocessor (pc, info, given, TRUE))
|
nkeynes@1265 | 3746 | return;
|
nkeynes@1265 | 3747 |
|
nkeynes@1265 | 3748 | if (print_insn_neon (info, given, TRUE))
|
nkeynes@1265 | 3749 | return;
|
nkeynes@1265 | 3750 |
|
nkeynes@1265 | 3751 | for (insn = thumb32_opcodes; insn->assembler; insn++)
|
nkeynes@1265 | 3752 | if ((given & insn->mask) == insn->value)
|
nkeynes@1265 | 3753 | {
|
nkeynes@1265 | 3754 | bfd_boolean is_unpredictable = FALSE;
|
nkeynes@1265 | 3755 | signed long value_in_comment = 0;
|
nkeynes@1265 | 3756 | const char *c = insn->assembler;
|
nkeynes@1265 | 3757 |
|
nkeynes@1265 | 3758 | for (; *c; c++)
|
nkeynes@1265 | 3759 | {
|
nkeynes@1265 | 3760 | if (*c != '%')
|
nkeynes@1265 | 3761 | {
|
nkeynes@1265 | 3762 | func (stream, "%c", *c);
|
nkeynes@1265 | 3763 | continue;
|
nkeynes@1265 | 3764 | }
|
nkeynes@1265 | 3765 |
|
nkeynes@1265 | 3766 | switch (*++c)
|
nkeynes@1265 | 3767 | {
|
nkeynes@1265 | 3768 | case '%':
|
nkeynes@1265 | 3769 | func (stream, "%%");
|
nkeynes@1265 | 3770 | break;
|
nkeynes@1265 | 3771 |
|
nkeynes@1265 | 3772 | case 'c':
|
nkeynes@1265 | 3773 | if (ifthen_state)
|
nkeynes@1265 | 3774 | func (stream, "%s", arm_conditional[IFTHEN_COND]);
|
nkeynes@1265 | 3775 | break;
|
nkeynes@1265 | 3776 |
|
nkeynes@1265 | 3777 | case 'x':
|
nkeynes@1265 | 3778 | if (ifthen_next_state)
|
nkeynes@1265 | 3779 | func (stream, "\t; unpredictable branch in IT block\n");
|
nkeynes@1265 | 3780 | break;
|
nkeynes@1265 | 3781 |
|
nkeynes@1265 | 3782 | case 'X':
|
nkeynes@1265 | 3783 | if (ifthen_state)
|
nkeynes@1265 | 3784 | func (stream, "\t; unpredictable <IT:%s>",
|
nkeynes@1265 | 3785 | arm_conditional[IFTHEN_COND]);
|
nkeynes@1265 | 3786 | break;
|
nkeynes@1265 | 3787 |
|
nkeynes@1265 | 3788 | case 'I':
|
nkeynes@1265 | 3789 | {
|
nkeynes@1265 | 3790 | unsigned int imm12 = 0;
|
nkeynes@1265 | 3791 |
|
nkeynes@1265 | 3792 | imm12 |= (given & 0x000000ffu);
|
nkeynes@1265 | 3793 | imm12 |= (given & 0x00007000u) >> 4;
|
nkeynes@1265 | 3794 | imm12 |= (given & 0x04000000u) >> 15;
|
nkeynes@1265 | 3795 | func (stream, "#%u", imm12);
|
nkeynes@1265 | 3796 | value_in_comment = imm12;
|
nkeynes@1265 | 3797 | }
|
nkeynes@1265 | 3798 | break;
|
nkeynes@1265 | 3799 |
|
nkeynes@1265 | 3800 | case 'M':
|
nkeynes@1265 | 3801 | {
|
nkeynes@1265 | 3802 | unsigned int bits = 0, imm, imm8, mod;
|
nkeynes@1265 | 3803 |
|
nkeynes@1265 | 3804 | bits |= (given & 0x000000ffu);
|
nkeynes@1265 | 3805 | bits |= (given & 0x00007000u) >> 4;
|
nkeynes@1265 | 3806 | bits |= (given & 0x04000000u) >> 15;
|
nkeynes@1265 | 3807 | imm8 = (bits & 0x0ff);
|
nkeynes@1265 | 3808 | mod = (bits & 0xf00) >> 8;
|
nkeynes@1265 | 3809 | switch (mod)
|
nkeynes@1265 | 3810 | {
|
nkeynes@1265 | 3811 | case 0: imm = imm8; break;
|
nkeynes@1265 | 3812 | case 1: imm = ((imm8 << 16) | imm8); break;
|
nkeynes@1265 | 3813 | case 2: imm = ((imm8 << 24) | (imm8 << 8)); break;
|
nkeynes@1265 | 3814 | case 3: imm = ((imm8 << 24) | (imm8 << 16) | (imm8 << 8) | imm8); break;
|
nkeynes@1265 | 3815 | default:
|
nkeynes@1265 | 3816 | mod = (bits & 0xf80) >> 7;
|
nkeynes@1265 | 3817 | imm8 = (bits & 0x07f) | 0x80;
|
nkeynes@1265 | 3818 | imm = (((imm8 << (32 - mod)) | (imm8 >> mod)) & 0xffffffff);
|
nkeynes@1265 | 3819 | }
|
nkeynes@1265 | 3820 | func (stream, "#%u", imm);
|
nkeynes@1265 | 3821 | value_in_comment = imm;
|
nkeynes@1265 | 3822 | }
|
nkeynes@1265 | 3823 | break;
|
nkeynes@1265 | 3824 |
|
nkeynes@1265 | 3825 | case 'J':
|
nkeynes@1265 | 3826 | {
|
nkeynes@1265 | 3827 | unsigned int imm = 0;
|
nkeynes@1265 | 3828 |
|
nkeynes@1265 | 3829 | imm |= (given & 0x000000ffu);
|
nkeynes@1265 | 3830 | imm |= (given & 0x00007000u) >> 4;
|
nkeynes@1265 | 3831 | imm |= (given & 0x04000000u) >> 15;
|
nkeynes@1265 | 3832 | imm |= (given & 0x000f0000u) >> 4;
|
nkeynes@1265 | 3833 | func (stream, "#%u", imm);
|
nkeynes@1265 | 3834 | value_in_comment = imm;
|
nkeynes@1265 | 3835 | }
|
nkeynes@1265 | 3836 | break;
|
nkeynes@1265 | 3837 |
|
nkeynes@1265 | 3838 | case 'K':
|
nkeynes@1265 | 3839 | {
|
nkeynes@1265 | 3840 | unsigned int imm = 0;
|
nkeynes@1265 | 3841 |
|
nkeynes@1265 | 3842 | imm |= (given & 0x000f0000u) >> 16;
|
nkeynes@1265 | 3843 | imm |= (given & 0x00000ff0u) >> 0;
|
nkeynes@1265 | 3844 | imm |= (given & 0x0000000fu) << 12;
|
nkeynes@1265 | 3845 | func (stream, "#%u", imm);
|
nkeynes@1265 | 3846 | value_in_comment = imm;
|
nkeynes@1265 | 3847 | }
|
nkeynes@1265 | 3848 | break;
|
nkeynes@1265 | 3849 |
|
nkeynes@1265 | 3850 | case 'V':
|
nkeynes@1265 | 3851 | {
|
nkeynes@1265 | 3852 | unsigned int imm = 0;
|
nkeynes@1265 | 3853 |
|
nkeynes@1265 | 3854 | imm |= (given & 0x00000fffu);
|
nkeynes@1265 | 3855 | imm |= (given & 0x000f0000u) >> 4;
|
nkeynes@1265 | 3856 | func (stream, "#%u", imm);
|
nkeynes@1265 | 3857 | value_in_comment = imm;
|
nkeynes@1265 | 3858 | }
|
nkeynes@1265 | 3859 | break;
|
nkeynes@1265 | 3860 |
|
nkeynes@1265 | 3861 | case 'S':
|
nkeynes@1265 | 3862 | {
|
nkeynes@1265 | 3863 | unsigned int reg = (given & 0x0000000fu);
|
nkeynes@1265 | 3864 | unsigned int stp = (given & 0x00000030u) >> 4;
|
nkeynes@1265 | 3865 | unsigned int imm = 0;
|
nkeynes@1265 | 3866 | imm |= (given & 0x000000c0u) >> 6;
|
nkeynes@1265 | 3867 | imm |= (given & 0x00007000u) >> 10;
|
nkeynes@1265 | 3868 |
|
nkeynes@1265 | 3869 | func (stream, "%s", arm_regnames[reg]);
|
nkeynes@1265 | 3870 | switch (stp)
|
nkeynes@1265 | 3871 | {
|
nkeynes@1265 | 3872 | case 0:
|
nkeynes@1265 | 3873 | if (imm > 0)
|
nkeynes@1265 | 3874 | func (stream, ", lsl #%u", imm);
|
nkeynes@1265 | 3875 | break;
|
nkeynes@1265 | 3876 |
|
nkeynes@1265 | 3877 | case 1:
|
nkeynes@1265 | 3878 | if (imm == 0)
|
nkeynes@1265 | 3879 | imm = 32;
|
nkeynes@1265 | 3880 | func (stream, ", lsr #%u", imm);
|
nkeynes@1265 | 3881 | break;
|
nkeynes@1265 | 3882 |
|
nkeynes@1265 | 3883 | case 2:
|
nkeynes@1265 | 3884 | if (imm == 0)
|
nkeynes@1265 | 3885 | imm = 32;
|
nkeynes@1265 | 3886 | func (stream, ", asr #%u", imm);
|
nkeynes@1265 | 3887 | break;
|
nkeynes@1265 | 3888 |
|
nkeynes@1265 | 3889 | case 3:
|
nkeynes@1265 | 3890 | if (imm == 0)
|
nkeynes@1265 | 3891 | func (stream, ", rrx");
|
nkeynes@1265 | 3892 | else
|
nkeynes@1265 | 3893 | func (stream, ", ror #%u", imm);
|
nkeynes@1265 | 3894 | }
|
nkeynes@1265 | 3895 | }
|
nkeynes@1265 | 3896 | break;
|
nkeynes@1265 | 3897 |
|
nkeynes@1265 | 3898 | case 'a':
|
nkeynes@1265 | 3899 | {
|
nkeynes@1265 | 3900 | unsigned int Rn = (given & 0x000f0000) >> 16;
|
nkeynes@1265 | 3901 | unsigned int U = ! NEGATIVE_BIT_SET;
|
nkeynes@1265 | 3902 | unsigned int op = (given & 0x00000f00) >> 8;
|
nkeynes@1265 | 3903 | unsigned int i12 = (given & 0x00000fff);
|
nkeynes@1265 | 3904 | unsigned int i8 = (given & 0x000000ff);
|
nkeynes@1265 | 3905 | bfd_boolean writeback = FALSE, postind = FALSE;
|
nkeynes@1265 | 3906 | bfd_vma offset = 0;
|
nkeynes@1265 | 3907 |
|
nkeynes@1265 | 3908 | func (stream, "[%s", arm_regnames[Rn]);
|
nkeynes@1265 | 3909 | if (U) /* 12-bit positive immediate offset. */
|
nkeynes@1265 | 3910 | {
|
nkeynes@1265 | 3911 | offset = i12;
|
nkeynes@1265 | 3912 | if (Rn != 15)
|
nkeynes@1265 | 3913 | value_in_comment = offset;
|
nkeynes@1265 | 3914 | }
|
nkeynes@1265 | 3915 | else if (Rn == 15) /* 12-bit negative immediate offset. */
|
nkeynes@1265 | 3916 | offset = - (int) i12;
|
nkeynes@1265 | 3917 | else if (op == 0x0) /* Shifted register offset. */
|
nkeynes@1265 | 3918 | {
|
nkeynes@1265 | 3919 | unsigned int Rm = (i8 & 0x0f);
|
nkeynes@1265 | 3920 | unsigned int sh = (i8 & 0x30) >> 4;
|
nkeynes@1265 | 3921 |
|
nkeynes@1265 | 3922 | func (stream, ", %s", arm_regnames[Rm]);
|
nkeynes@1265 | 3923 | if (sh)
|
nkeynes@1265 | 3924 | func (stream, ", lsl #%u", sh);
|
nkeynes@1265 | 3925 | func (stream, "]");
|
nkeynes@1265 | 3926 | break;
|
nkeynes@1265 | 3927 | }
|
nkeynes@1265 | 3928 | else switch (op)
|
nkeynes@1265 | 3929 | {
|
nkeynes@1265 | 3930 | case 0xE: /* 8-bit positive immediate offset. */
|
nkeynes@1265 | 3931 | offset = i8;
|
nkeynes@1265 | 3932 | break;
|
nkeynes@1265 | 3933 |
|
nkeynes@1265 | 3934 | case 0xC: /* 8-bit negative immediate offset. */
|
nkeynes@1265 | 3935 | offset = -i8;
|
nkeynes@1265 | 3936 | break;
|
nkeynes@1265 | 3937 |
|
nkeynes@1265 | 3938 | case 0xF: /* 8-bit + preindex with wb. */
|
nkeynes@1265 | 3939 | offset = i8;
|
nkeynes@1265 | 3940 | writeback = TRUE;
|
nkeynes@1265 | 3941 | break;
|
nkeynes@1265 | 3942 |
|
nkeynes@1265 | 3943 | case 0xD: /* 8-bit - preindex with wb. */
|
nkeynes@1265 | 3944 | offset = -i8;
|
nkeynes@1265 | 3945 | writeback = TRUE;
|
nkeynes@1265 | 3946 | break;
|
nkeynes@1265 | 3947 |
|
nkeynes@1265 | 3948 | case 0xB: /* 8-bit + postindex. */
|
nkeynes@1265 | 3949 | offset = i8;
|
nkeynes@1265 | 3950 | postind = TRUE;
|
nkeynes@1265 | 3951 | break;
|
nkeynes@1265 | 3952 |
|
nkeynes@1265 | 3953 | case 0x9: /* 8-bit - postindex. */
|
nkeynes@1265 | 3954 | offset = -i8;
|
nkeynes@1265 | 3955 | postind = TRUE;
|
nkeynes@1265 | 3956 | break;
|
nkeynes@1265 | 3957 |
|
nkeynes@1265 | 3958 | default:
|
nkeynes@1265 | 3959 | func (stream, ", <undefined>]");
|
nkeynes@1265 | 3960 | goto skip;
|
nkeynes@1265 | 3961 | }
|
nkeynes@1265 | 3962 |
|
nkeynes@1265 | 3963 | if (postind)
|
nkeynes@1265 | 3964 | func (stream, "], #%d", offset);
|
nkeynes@1265 | 3965 | else
|
nkeynes@1265 | 3966 | {
|
nkeynes@1265 | 3967 | if (offset)
|
nkeynes@1265 | 3968 | func (stream, ", #%d", offset);
|
nkeynes@1265 | 3969 | func (stream, writeback ? "]!" : "]");
|
nkeynes@1265 | 3970 | }
|
nkeynes@1265 | 3971 |
|
nkeynes@1265 | 3972 | if (Rn == 15)
|
nkeynes@1265 | 3973 | {
|
nkeynes@1265 | 3974 | func (stream, "\t; ");
|
nkeynes@1265 | 3975 | info->print_address_func (((pc + 4) & ~3) + offset, info);
|
nkeynes@1265 | 3976 | }
|
nkeynes@1265 | 3977 | }
|
nkeynes@1265 | 3978 | skip:
|
nkeynes@1265 | 3979 | break;
|
nkeynes@1265 | 3980 |
|
nkeynes@1265 | 3981 | case 'A':
|
nkeynes@1265 | 3982 | {
|
nkeynes@1265 | 3983 | unsigned int U = ! NEGATIVE_BIT_SET;
|
nkeynes@1265 | 3984 | unsigned int W = WRITEBACK_BIT_SET;
|
nkeynes@1265 | 3985 | unsigned int Rn = (given & 0x000f0000) >> 16;
|
nkeynes@1265 | 3986 | unsigned int off = (given & 0x000000ff);
|
nkeynes@1265 | 3987 |
|
nkeynes@1265 | 3988 | func (stream, "[%s", arm_regnames[Rn]);
|
nkeynes@1265 | 3989 |
|
nkeynes@1265 | 3990 | if (PRE_BIT_SET)
|
nkeynes@1265 | 3991 | {
|
nkeynes@1265 | 3992 | if (off || !U)
|
nkeynes@1265 | 3993 | {
|
nkeynes@1265 | 3994 | func (stream, ", #%c%u", U ? '+' : '-', off * 4);
|
nkeynes@1265 | 3995 | value_in_comment = off * 4 * U ? 1 : -1;
|
nkeynes@1265 | 3996 | }
|
nkeynes@1265 | 3997 | func (stream, "]");
|
nkeynes@1265 | 3998 | if (W)
|
nkeynes@1265 | 3999 | func (stream, "!");
|
nkeynes@1265 | 4000 | }
|
nkeynes@1265 | 4001 | else
|
nkeynes@1265 | 4002 | {
|
nkeynes@1265 | 4003 | func (stream, "], ");
|
nkeynes@1265 | 4004 | if (W)
|
nkeynes@1265 | 4005 | {
|
nkeynes@1265 | 4006 | func (stream, "#%c%u", U ? '+' : '-', off * 4);
|
nkeynes@1265 | 4007 | value_in_comment = off * 4 * U ? 1 : -1;
|
nkeynes@1265 | 4008 | }
|
nkeynes@1265 | 4009 | else
|
nkeynes@1265 | 4010 | {
|
nkeynes@1265 | 4011 | func (stream, "{%u}", off);
|
nkeynes@1265 | 4012 | value_in_comment = off;
|
nkeynes@1265 | 4013 | }
|
nkeynes@1265 | 4014 | }
|
nkeynes@1265 | 4015 | }
|
nkeynes@1265 | 4016 | break;
|
nkeynes@1265 | 4017 |
|
nkeynes@1265 | 4018 | case 'w':
|
nkeynes@1265 | 4019 | {
|
nkeynes@1265 | 4020 | unsigned int Sbit = (given & 0x01000000) >> 24;
|
nkeynes@1265 | 4021 | unsigned int type = (given & 0x00600000) >> 21;
|
nkeynes@1265 | 4022 |
|
nkeynes@1265 | 4023 | switch (type)
|
nkeynes@1265 | 4024 | {
|
nkeynes@1265 | 4025 | case 0: func (stream, Sbit ? "sb" : "b"); break;
|
nkeynes@1265 | 4026 | case 1: func (stream, Sbit ? "sh" : "h"); break;
|
nkeynes@1265 | 4027 | case 2:
|
nkeynes@1265 | 4028 | if (Sbit)
|
nkeynes@1265 | 4029 | func (stream, "??");
|
nkeynes@1265 | 4030 | break;
|
nkeynes@1265 | 4031 | case 3:
|
nkeynes@1265 | 4032 | func (stream, "??");
|
nkeynes@1265 | 4033 | break;
|
nkeynes@1265 | 4034 | }
|
nkeynes@1265 | 4035 | }
|
nkeynes@1265 | 4036 | break;
|
nkeynes@1265 | 4037 |
|
nkeynes@1265 | 4038 | case 'm':
|
nkeynes@1265 | 4039 | {
|
nkeynes@1265 | 4040 | int started = 0;
|
nkeynes@1265 | 4041 | int reg;
|
nkeynes@1265 | 4042 |
|
nkeynes@1265 | 4043 | func (stream, "{");
|
nkeynes@1265 | 4044 | for (reg = 0; reg < 16; reg++)
|
nkeynes@1265 | 4045 | if ((given & (1 << reg)) != 0)
|
nkeynes@1265 | 4046 | {
|
nkeynes@1265 | 4047 | if (started)
|
nkeynes@1265 | 4048 | func (stream, ", ");
|
nkeynes@1265 | 4049 | started = 1;
|
nkeynes@1265 | 4050 | func (stream, "%s", arm_regnames[reg]);
|
nkeynes@1265 | 4051 | }
|
nkeynes@1265 | 4052 | func (stream, "}");
|
nkeynes@1265 | 4053 | }
|
nkeynes@1265 | 4054 | break;
|
nkeynes@1265 | 4055 |
|
nkeynes@1265 | 4056 | case 'E':
|
nkeynes@1265 | 4057 | {
|
nkeynes@1265 | 4058 | unsigned int msb = (given & 0x0000001f);
|
nkeynes@1265 | 4059 | unsigned int lsb = 0;
|
nkeynes@1265 | 4060 |
|
nkeynes@1265 | 4061 | lsb |= (given & 0x000000c0u) >> 6;
|
nkeynes@1265 | 4062 | lsb |= (given & 0x00007000u) >> 10;
|
nkeynes@1265 | 4063 | func (stream, "#%u, #%u", lsb, msb - lsb + 1);
|
nkeynes@1265 | 4064 | }
|
nkeynes@1265 | 4065 | break;
|
nkeynes@1265 | 4066 |
|
nkeynes@1265 | 4067 | case 'F':
|
nkeynes@1265 | 4068 | {
|
nkeynes@1265 | 4069 | unsigned int width = (given & 0x0000001f) + 1;
|
nkeynes@1265 | 4070 | unsigned int lsb = 0;
|
nkeynes@1265 | 4071 |
|
nkeynes@1265 | 4072 | lsb |= (given & 0x000000c0u) >> 6;
|
nkeynes@1265 | 4073 | lsb |= (given & 0x00007000u) >> 10;
|
nkeynes@1265 | 4074 | func (stream, "#%u, #%u", lsb, width);
|
nkeynes@1265 | 4075 | }
|
nkeynes@1265 | 4076 | break;
|
nkeynes@1265 | 4077 |
|
nkeynes@1265 | 4078 | case 'b':
|
nkeynes@1265 | 4079 | {
|
nkeynes@1265 | 4080 | unsigned int S = (given & 0x04000000u) >> 26;
|
nkeynes@1265 | 4081 | unsigned int J1 = (given & 0x00002000u) >> 13;
|
nkeynes@1265 | 4082 | unsigned int J2 = (given & 0x00000800u) >> 11;
|
nkeynes@1265 | 4083 | bfd_vma offset = 0;
|
nkeynes@1265 | 4084 |
|
nkeynes@1265 | 4085 | offset |= !S << 20;
|
nkeynes@1265 | 4086 | offset |= J2 << 19;
|
nkeynes@1265 | 4087 | offset |= J1 << 18;
|
nkeynes@1265 | 4088 | offset |= (given & 0x003f0000) >> 4;
|
nkeynes@1265 | 4089 | offset |= (given & 0x000007ff) << 1;
|
nkeynes@1265 | 4090 | offset -= (1 << 20);
|
nkeynes@1265 | 4091 |
|
nkeynes@1265 | 4092 | info->print_address_func (pc + 4 + offset, info);
|
nkeynes@1265 | 4093 | }
|
nkeynes@1265 | 4094 | break;
|
nkeynes@1265 | 4095 |
|
nkeynes@1265 | 4096 | case 'B':
|
nkeynes@1265 | 4097 | {
|
nkeynes@1265 | 4098 | unsigned int S = (given & 0x04000000u) >> 26;
|
nkeynes@1265 | 4099 | unsigned int I1 = (given & 0x00002000u) >> 13;
|
nkeynes@1265 | 4100 | unsigned int I2 = (given & 0x00000800u) >> 11;
|
nkeynes@1265 | 4101 | bfd_vma offset = 0;
|
nkeynes@1265 | 4102 |
|
nkeynes@1265 | 4103 | offset |= !S << 24;
|
nkeynes@1265 | 4104 | offset |= !(I1 ^ S) << 23;
|
nkeynes@1265 | 4105 | offset |= !(I2 ^ S) << 22;
|
nkeynes@1265 | 4106 | offset |= (given & 0x03ff0000u) >> 4;
|
nkeynes@1265 | 4107 | offset |= (given & 0x000007ffu) << 1;
|
nkeynes@1265 | 4108 | offset -= (1 << 24);
|
nkeynes@1265 | 4109 | offset += pc + 4;
|
nkeynes@1265 | 4110 |
|
nkeynes@1265 | 4111 | /* BLX target addresses are always word aligned. */
|
nkeynes@1265 | 4112 | if ((given & 0x00001000u) == 0)
|
nkeynes@1265 | 4113 | offset &= ~2u;
|
nkeynes@1265 | 4114 |
|
nkeynes@1265 | 4115 | info->print_address_func (offset, info);
|
nkeynes@1265 | 4116 | }
|
nkeynes@1265 | 4117 | break;
|
nkeynes@1265 | 4118 |
|
nkeynes@1265 | 4119 | case 's':
|
nkeynes@1265 | 4120 | {
|
nkeynes@1265 | 4121 | unsigned int shift = 0;
|
nkeynes@1265 | 4122 |
|
nkeynes@1265 | 4123 | shift |= (given & 0x000000c0u) >> 6;
|
nkeynes@1265 | 4124 | shift |= (given & 0x00007000u) >> 10;
|
nkeynes@1265 | 4125 | if (WRITEBACK_BIT_SET)
|
nkeynes@1265 | 4126 | func (stream, ", asr #%u", shift);
|
nkeynes@1265 | 4127 | else if (shift)
|
nkeynes@1265 | 4128 | func (stream, ", lsl #%u", shift);
|
nkeynes@1265 | 4129 | /* else print nothing - lsl #0 */
|
nkeynes@1265 | 4130 | }
|
nkeynes@1265 | 4131 | break;
|
nkeynes@1265 | 4132 |
|
nkeynes@1265 | 4133 | case 'R':
|
nkeynes@1265 | 4134 | {
|
nkeynes@1265 | 4135 | unsigned int rot = (given & 0x00000030) >> 4;
|
nkeynes@1265 | 4136 |
|
nkeynes@1265 | 4137 | if (rot)
|
nkeynes@1265 | 4138 | func (stream, ", ror #%u", rot * 8);
|
nkeynes@1265 | 4139 | }
|
nkeynes@1265 | 4140 | break;
|
nkeynes@1265 | 4141 |
|
nkeynes@1265 | 4142 | case 'U':
|
nkeynes@1265 | 4143 | if ((given & 0xf0) == 0x60)
|
nkeynes@1265 | 4144 | {
|
nkeynes@1265 | 4145 | switch (given & 0xf)
|
nkeynes@1265 | 4146 | {
|
nkeynes@1265 | 4147 | case 0xf: func (stream, "sy"); break;
|
nkeynes@1265 | 4148 | default:
|
nkeynes@1265 | 4149 | func (stream, "#%d", (int) given & 0xf);
|
nkeynes@1265 | 4150 | break;
|
nkeynes@1265 | 4151 | }
|
nkeynes@1265 | 4152 | }
|
nkeynes@1265 | 4153 | else
|
nkeynes@1265 | 4154 | {
|
nkeynes@1265 | 4155 | switch (given & 0xf)
|
nkeynes@1265 | 4156 | {
|
nkeynes@1265 | 4157 | case 0xf: func (stream, "sy"); break;
|
nkeynes@1265 | 4158 | case 0x7: func (stream, "un"); break;
|
nkeynes@1265 | 4159 | case 0xe: func (stream, "st"); break;
|
nkeynes@1265 | 4160 | case 0x6: func (stream, "unst"); break;
|
nkeynes@1265 | 4161 | case 0xb: func (stream, "ish"); break;
|
nkeynes@1265 | 4162 | case 0xa: func (stream, "ishst"); break;
|
nkeynes@1265 | 4163 | case 0x3: func (stream, "osh"); break;
|
nkeynes@1265 | 4164 | case 0x2: func (stream, "oshst"); break;
|
nkeynes@1265 | 4165 | default:
|
nkeynes@1265 | 4166 | func (stream, "#%d", (int) given & 0xf);
|
nkeynes@1265 | 4167 | break;
|
nkeynes@1265 | 4168 | }
|
nkeynes@1265 | 4169 | }
|
nkeynes@1265 | 4170 | break;
|
nkeynes@1265 | 4171 |
|
nkeynes@1265 | 4172 | case 'C':
|
nkeynes@1265 | 4173 | if ((given & 0xff) == 0)
|
nkeynes@1265 | 4174 | {
|
nkeynes@1265 | 4175 | func (stream, "%cPSR_", (given & 0x100000) ? 'S' : 'C');
|
nkeynes@1265 | 4176 | if (given & 0x800)
|
nkeynes@1265 | 4177 | func (stream, "f");
|
nkeynes@1265 | 4178 | if (given & 0x400)
|
nkeynes@1265 | 4179 | func (stream, "s");
|
nkeynes@1265 | 4180 | if (given & 0x200)
|
nkeynes@1265 | 4181 | func (stream, "x");
|
nkeynes@1265 | 4182 | if (given & 0x100)
|
nkeynes@1265 | 4183 | func (stream, "c");
|
nkeynes@1265 | 4184 | }
|
nkeynes@1265 | 4185 | else if ((given & 0x20) == 0x20)
|
nkeynes@1265 | 4186 | {
|
nkeynes@1265 | 4187 | char const* name;
|
nkeynes@1265 | 4188 | unsigned sysm = (given & 0xf00) >> 8;
|
nkeynes@1265 | 4189 |
|
nkeynes@1265 | 4190 | sysm |= (given & 0x30);
|
nkeynes@1265 | 4191 | sysm |= (given & 0x00100000) >> 14;
|
nkeynes@1265 | 4192 | name = banked_regname (sysm);
|
nkeynes@1265 | 4193 |
|
nkeynes@1265 | 4194 | if (name != NULL)
|
nkeynes@1265 | 4195 | func (stream, "%s", name);
|
nkeynes@1265 | 4196 | else
|
nkeynes@1265 | 4197 | func (stream, "(UNDEF: %lu)", sysm);
|
nkeynes@1265 | 4198 | }
|
nkeynes@1265 | 4199 | else
|
nkeynes@1265 | 4200 | {
|
nkeynes@1265 | 4201 | func (stream, psr_name (given & 0xff));
|
nkeynes@1265 | 4202 | }
|
nkeynes@1265 | 4203 | break;
|
nkeynes@1265 | 4204 |
|
nkeynes@1265 | 4205 | case 'D':
|
nkeynes@1265 | 4206 | if (((given & 0xff) == 0)
|
nkeynes@1265 | 4207 | || ((given & 0x20) == 0x20))
|
nkeynes@1265 | 4208 | {
|
nkeynes@1265 | 4209 | char const* name;
|
nkeynes@1265 | 4210 | unsigned sm = (given & 0xf0000) >> 16;
|
nkeynes@1265 | 4211 |
|
nkeynes@1265 | 4212 | sm |= (given & 0x30);
|
nkeynes@1265 | 4213 | sm |= (given & 0x00100000) >> 14;
|
nkeynes@1265 | 4214 | name = banked_regname (sm);
|
nkeynes@1265 | 4215 |
|
nkeynes@1265 | 4216 | if (name != NULL)
|
nkeynes@1265 | 4217 | func (stream, "%s", name);
|
nkeynes@1265 | 4218 | else
|
nkeynes@1265 | 4219 | func (stream, "(UNDEF: %lu)", sm);
|
nkeynes@1265 | 4220 | }
|
nkeynes@1265 | 4221 | else
|
nkeynes@1265 | 4222 | func (stream, psr_name (given & 0xff));
|
nkeynes@1265 | 4223 | break;
|
nkeynes@1265 | 4224 |
|
nkeynes@1265 | 4225 | case '0': case '1': case '2': case '3': case '4':
|
nkeynes@1265 | 4226 | case '5': case '6': case '7': case '8': case '9':
|
nkeynes@1265 | 4227 | {
|
nkeynes@1265 | 4228 | int width;
|
nkeynes@1265 | 4229 | unsigned long val;
|
nkeynes@1265 | 4230 |
|
nkeynes@1265 | 4231 | c = arm_decode_bitfield (c, given, &val, &width);
|
nkeynes@1265 | 4232 |
|
nkeynes@1265 | 4233 | switch (*c)
|
nkeynes@1265 | 4234 | {
|
nkeynes@1265 | 4235 | case 'd':
|
nkeynes@1265 | 4236 | func (stream, "%lu", val);
|
nkeynes@1265 | 4237 | value_in_comment = val;
|
nkeynes@1265 | 4238 | break;
|
nkeynes@1265 | 4239 |
|
nkeynes@1265 | 4240 | case 'W':
|
nkeynes@1265 | 4241 | func (stream, "%lu", val * 4);
|
nkeynes@1265 | 4242 | value_in_comment = val * 4;
|
nkeynes@1265 | 4243 | break;
|
nkeynes@1265 | 4244 |
|
nkeynes@1265 | 4245 | case 'R':
|
nkeynes@1265 | 4246 | if (val == 15)
|
nkeynes@1265 | 4247 | is_unpredictable = TRUE;
|
nkeynes@1265 | 4248 | /* Fall through. */
|
nkeynes@1265 | 4249 | case 'r':
|
nkeynes@1265 | 4250 | func (stream, "%s", arm_regnames[val]);
|
nkeynes@1265 | 4251 | break;
|
nkeynes@1265 | 4252 |
|
nkeynes@1265 | 4253 | case 'c':
|
nkeynes@1265 | 4254 | func (stream, "%s", arm_conditional[val]);
|
nkeynes@1265 | 4255 | break;
|
nkeynes@1265 | 4256 |
|
nkeynes@1265 | 4257 | case '\'':
|
nkeynes@1265 | 4258 | c++;
|
nkeynes@1265 | 4259 | if (val == ((1ul << width) - 1))
|
nkeynes@1265 | 4260 | func (stream, "%c", *c);
|
nkeynes@1265 | 4261 | break;
|
nkeynes@1265 | 4262 |
|
nkeynes@1265 | 4263 | case '`':
|
nkeynes@1265 | 4264 | c++;
|
nkeynes@1265 | 4265 | if (val == 0)
|
nkeynes@1265 | 4266 | func (stream, "%c", *c);
|
nkeynes@1265 | 4267 | break;
|
nkeynes@1265 | 4268 |
|
nkeynes@1265 | 4269 | case '?':
|
nkeynes@1265 | 4270 | func (stream, "%c", c[(1 << width) - (int) val]);
|
nkeynes@1265 | 4271 | c += 1 << width;
|
nkeynes@1265 | 4272 | break;
|
nkeynes@1265 | 4273 |
|
nkeynes@1265 | 4274 | case 'x':
|
nkeynes@1265 | 4275 | func (stream, "0x%lx", val & 0xffffffffUL);
|
nkeynes@1265 | 4276 | break;
|
nkeynes@1265 | 4277 |
|
nkeynes@1265 | 4278 | default:
|
nkeynes@1265 | 4279 | abort ();
|
nkeynes@1265 | 4280 | }
|
nkeynes@1265 | 4281 | }
|
nkeynes@1265 | 4282 | break;
|
nkeynes@1265 | 4283 |
|
nkeynes@1265 | 4284 | case 'L':
|
nkeynes@1265 | 4285 | /* PR binutils/12534
|
nkeynes@1265 | 4286 | If we have a PC relative offset in an LDRD or STRD
|
nkeynes@1265 | 4287 | instructions then display the decoded address. */
|
nkeynes@1265 | 4288 | if (((given >> 16) & 0xf) == 0xf)
|
nkeynes@1265 | 4289 | {
|
nkeynes@1265 | 4290 | bfd_vma offset = (given & 0xff) * 4;
|
nkeynes@1265 | 4291 |
|
nkeynes@1265 | 4292 | if ((given & (1 << 23)) == 0)
|
nkeynes@1265 | 4293 | offset = - offset;
|
nkeynes@1265 | 4294 | func (stream, "\t; ");
|
nkeynes@1265 | 4295 | info->print_address_func ((pc & ~3) + 4 + offset, info);
|
nkeynes@1265 | 4296 | }
|
nkeynes@1265 | 4297 | break;
|
nkeynes@1265 | 4298 |
|
nkeynes@1265 | 4299 | default:
|
nkeynes@1265 | 4300 | abort ();
|
nkeynes@1265 | 4301 | }
|
nkeynes@1265 | 4302 | }
|
nkeynes@1265 | 4303 |
|
nkeynes@1265 | 4304 | if (value_in_comment > 32 || value_in_comment < -16)
|
nkeynes@1265 | 4305 | func (stream, "\t; 0x%lx", value_in_comment);
|
nkeynes@1265 | 4306 |
|
nkeynes@1265 | 4307 | if (is_unpredictable)
|
nkeynes@1265 | 4308 | func (stream, UNPREDICTABLE_INSTRUCTION);
|
nkeynes@1265 | 4309 |
|
nkeynes@1265 | 4310 | return;
|
nkeynes@1265 | 4311 | }
|
nkeynes@1265 | 4312 |
|
nkeynes@1265 | 4313 | /* No match. */
|
nkeynes@1265 | 4314 | abort ();
|
nkeynes@1265 | 4315 | }
|
nkeynes@1265 | 4316 |
|
nkeynes@1265 | 4317 | /* Print data bytes on INFO->STREAM. */
|
nkeynes@1265 | 4318 |
|
nkeynes@1265 | 4319 | static void
|
nkeynes@1265 | 4320 | print_insn_data (bfd_vma pc ATTRIBUTE_UNUSED,
|
nkeynes@1265 | 4321 | struct disassemble_info *info,
|
nkeynes@1265 | 4322 | long given)
|
nkeynes@1265 | 4323 | {
|
nkeynes@1265 | 4324 | switch (info->bytes_per_chunk)
|
nkeynes@1265 | 4325 | {
|
nkeynes@1265 | 4326 | case 1:
|
nkeynes@1265 | 4327 | info->fprintf_func (info->stream, ".byte\t0x%02lx", given);
|
nkeynes@1265 | 4328 | break;
|
nkeynes@1265 | 4329 | case 2:
|
nkeynes@1265 | 4330 | info->fprintf_func (info->stream, ".short\t0x%04lx", given);
|
nkeynes@1265 | 4331 | break;
|
nkeynes@1265 | 4332 | case 4:
|
nkeynes@1265 | 4333 | info->fprintf_func (info->stream, ".word\t0x%08lx", given);
|
nkeynes@1265 | 4334 | break;
|
nkeynes@1265 | 4335 | default:
|
nkeynes@1265 | 4336 | abort ();
|
nkeynes@1265 | 4337 | }
|
nkeynes@1265 | 4338 | }
|
nkeynes@1265 | 4339 |
|
nkeynes@1265 | 4340 | /* Disallow mapping symbols ($a, $b, $d, $t etc) from
|
nkeynes@1265 | 4341 | being displayed in symbol relative addresses. */
|
nkeynes@1265 | 4342 |
|
nkeynes@1265 | 4343 | bfd_boolean
|
nkeynes@1265 | 4344 | arm_symbol_is_valid (asymbol * sym,
|
nkeynes@1265 | 4345 | struct disassemble_info * info ATTRIBUTE_UNUSED)
|
nkeynes@1265 | 4346 | {
|
nkeynes@1265 | 4347 | const char * name;
|
nkeynes@1265 | 4348 |
|
nkeynes@1265 | 4349 | if (sym == NULL)
|
nkeynes@1265 | 4350 | return FALSE;
|
nkeynes@1265 | 4351 |
|
nkeynes@1265 | 4352 | name = bfd_asymbol_name (sym);
|
nkeynes@1265 | 4353 |
|
nkeynes@1265 | 4354 | return (name && *name != '$');
|
nkeynes@1265 | 4355 | }
|
nkeynes@1265 | 4356 |
|
nkeynes@1265 | 4357 | /* Parse an individual disassembler option. */
|
nkeynes@1265 | 4358 |
|
nkeynes@1265 | 4359 | void
|
nkeynes@1265 | 4360 | parse_arm_disassembler_option (char *option)
|
nkeynes@1265 | 4361 | {
|
nkeynes@1265 | 4362 | if (option == NULL)
|
nkeynes@1265 | 4363 | return;
|
nkeynes@1265 | 4364 |
|
nkeynes@1265 | 4365 | if (CONST_STRNEQ (option, "reg-names-"))
|
nkeynes@1265 | 4366 | {
|
nkeynes@1265 | 4367 | int i;
|
nkeynes@1265 | 4368 |
|
nkeynes@1265 | 4369 | option += 10;
|
nkeynes@1265 | 4370 |
|
nkeynes@1265 | 4371 | for (i = NUM_ARM_REGNAMES; i--;)
|
nkeynes@1265 | 4372 | if (strneq (option, regnames[i].name, strlen (regnames[i].name)))
|
nkeynes@1265 | 4373 | {
|
nkeynes@1265 | 4374 | regname_selected = i;
|
nkeynes@1265 | 4375 | break;
|
nkeynes@1265 | 4376 | }
|
nkeynes@1265 | 4377 |
|
nkeynes@1265 | 4378 | if (i < 0)
|
nkeynes@1265 | 4379 | /* XXX - should break 'option' at following delimiter. */
|
nkeynes@1265 | 4380 | fprintf (stderr, _("Unrecognised register name set: %s\n"), option);
|
nkeynes@1265 | 4381 | }
|
nkeynes@1265 | 4382 | else if (CONST_STRNEQ (option, "force-thumb"))
|
nkeynes@1265 | 4383 | force_thumb = 1;
|
nkeynes@1265 | 4384 | else if (CONST_STRNEQ (option, "no-force-thumb"))
|
nkeynes@1265 | 4385 | force_thumb = 0;
|
nkeynes@1265 | 4386 | else
|
nkeynes@1265 | 4387 | /* XXX - should break 'option' at following delimiter. */
|
nkeynes@1265 | 4388 | fprintf (stderr, _("Unrecognised disassembler option: %s\n"), option);
|
nkeynes@1265 | 4389 |
|
nkeynes@1265 | 4390 | return;
|
nkeynes@1265 | 4391 | }
|
nkeynes@1265 | 4392 |
|
nkeynes@1265 | 4393 | /* Parse the string of disassembler options, spliting it at whitespaces
|
nkeynes@1265 | 4394 | or commas. (Whitespace separators supported for backwards compatibility). */
|
nkeynes@1265 | 4395 |
|
nkeynes@1265 | 4396 | static void
|
nkeynes@1265 | 4397 | parse_disassembler_options (char *options)
|
nkeynes@1265 | 4398 | {
|
nkeynes@1265 | 4399 | if (options == NULL)
|
nkeynes@1265 | 4400 | return;
|
nkeynes@1265 | 4401 |
|
nkeynes@1265 | 4402 | while (*options)
|
nkeynes@1265 | 4403 | {
|
nkeynes@1265 | 4404 | parse_arm_disassembler_option (options);
|
nkeynes@1265 | 4405 |
|
nkeynes@1265 | 4406 | /* Skip forward to next seperator. */
|
nkeynes@1265 | 4407 | while ((*options) && (! ISSPACE (*options)) && (*options != ','))
|
nkeynes@1265 | 4408 | ++ options;
|
nkeynes@1265 | 4409 | /* Skip forward past seperators. */
|
nkeynes@1265 | 4410 | while (ISSPACE (*options) || (*options == ','))
|
nkeynes@1265 | 4411 | ++ options;
|
nkeynes@1265 | 4412 | }
|
nkeynes@1265 | 4413 | }
|
nkeynes@1265 | 4414 |
|
nkeynes@1265 | 4415 | /* Search back through the insn stream to determine if this instruction is
|
nkeynes@1265 | 4416 | conditionally executed. */
|
nkeynes@1265 | 4417 |
|
nkeynes@1265 | 4418 | static void
|
nkeynes@1265 | 4419 | find_ifthen_state (bfd_vma pc,
|
nkeynes@1265 | 4420 | struct disassemble_info *info,
|
nkeynes@1265 | 4421 | bfd_boolean little)
|
nkeynes@1265 | 4422 | {
|
nkeynes@1265 | 4423 | unsigned char b[2];
|
nkeynes@1265 | 4424 | unsigned int insn;
|
nkeynes@1265 | 4425 | int status;
|
nkeynes@1265 | 4426 | /* COUNT is twice the number of instructions seen. It will be odd if we
|
nkeynes@1265 | 4427 | just crossed an instruction boundary. */
|
nkeynes@1265 | 4428 | int count;
|
nkeynes@1265 | 4429 | int it_count;
|
nkeynes@1265 | 4430 | unsigned int seen_it;
|
nkeynes@1265 | 4431 | bfd_vma addr;
|
nkeynes@1265 | 4432 |
|
nkeynes@1265 | 4433 | ifthen_address = pc;
|
nkeynes@1265 | 4434 | ifthen_state = 0;
|
nkeynes@1265 | 4435 |
|
nkeynes@1265 | 4436 | addr = pc;
|
nkeynes@1265 | 4437 | count = 1;
|
nkeynes@1265 | 4438 | it_count = 0;
|
nkeynes@1265 | 4439 | seen_it = 0;
|
nkeynes@1265 | 4440 | /* Scan backwards looking for IT instructions, keeping track of where
|
nkeynes@1265 | 4441 | instruction boundaries are. We don't know if something is actually an
|
nkeynes@1265 | 4442 | IT instruction until we find a definite instruction boundary. */
|
nkeynes@1265 | 4443 | for (;;)
|
nkeynes@1265 | 4444 | {
|
nkeynes@1265 | 4445 | if (addr == 0 || info->symbol_at_address_func (addr, info))
|
nkeynes@1265 | 4446 | {
|
nkeynes@1265 | 4447 | /* A symbol must be on an instruction boundary, and will not
|
nkeynes@1265 | 4448 | be within an IT block. */
|
nkeynes@1265 | 4449 | if (seen_it && (count & 1))
|
nkeynes@1265 | 4450 | break;
|
nkeynes@1265 | 4451 |
|
nkeynes@1265 | 4452 | return;
|
nkeynes@1265 | 4453 | }
|
nkeynes@1265 | 4454 | addr -= 2;
|
nkeynes@1265 | 4455 | status = info->read_memory_func (addr, (bfd_byte *) b, 2, info);
|
nkeynes@1265 | 4456 | if (status)
|
nkeynes@1265 | 4457 | return;
|
nkeynes@1265 | 4458 |
|
nkeynes@1265 | 4459 | if (little)
|
nkeynes@1265 | 4460 | insn = (b[0]) | (b[1] << 8);
|
nkeynes@1265 | 4461 | else
|
nkeynes@1265 | 4462 | insn = (b[1]) | (b[0] << 8);
|
nkeynes@1265 | 4463 | if (seen_it)
|
nkeynes@1265 | 4464 | {
|
nkeynes@1265 | 4465 | if ((insn & 0xf800) < 0xe800)
|
nkeynes@1265 | 4466 | {
|
nkeynes@1265 | 4467 | /* Addr + 2 is an instruction boundary. See if this matches
|
nkeynes@1265 | 4468 | the expected boundary based on the position of the last
|
nkeynes@1265 | 4469 | IT candidate. */
|
nkeynes@1265 | 4470 | if (count & 1)
|
nkeynes@1265 | 4471 | break;
|
nkeynes@1265 | 4472 | seen_it = 0;
|
nkeynes@1265 | 4473 | }
|
nkeynes@1265 | 4474 | }
|
nkeynes@1265 | 4475 | if ((insn & 0xff00) == 0xbf00 && (insn & 0xf) != 0)
|
nkeynes@1265 | 4476 | {
|
nkeynes@1265 | 4477 | /* This could be an IT instruction. */
|
nkeynes@1265 | 4478 | seen_it = insn;
|
nkeynes@1265 | 4479 | it_count = count >> 1;
|
nkeynes@1265 | 4480 | }
|
nkeynes@1265 | 4481 | if ((insn & 0xf800) >= 0xe800)
|
nkeynes@1265 | 4482 | count++;
|
nkeynes@1265 | 4483 | else
|
nkeynes@1265 | 4484 | count = (count + 2) | 1;
|
nkeynes@1265 | 4485 | /* IT blocks contain at most 4 instructions. */
|
nkeynes@1265 | 4486 | if (count >= 8 && !seen_it)
|
nkeynes@1265 | 4487 | return;
|
nkeynes@1265 | 4488 | }
|
nkeynes@1265 | 4489 | /* We found an IT instruction. */
|
nkeynes@1265 | 4490 | ifthen_state = (seen_it & 0xe0) | ((seen_it << it_count) & 0x1f);
|
nkeynes@1265 | 4491 | if ((ifthen_state & 0xf) == 0)
|
nkeynes@1265 | 4492 | ifthen_state = 0;
|
nkeynes@1265 | 4493 | }
|
nkeynes@1265 | 4494 |
|
nkeynes@1265 | 4495 | /* Returns nonzero and sets *MAP_TYPE if the N'th symbol is a
|
nkeynes@1265 | 4496 | mapping symbol. */
|
nkeynes@1265 | 4497 |
|
nkeynes@1265 | 4498 | static int
|
nkeynes@1265 | 4499 | is_mapping_symbol (struct disassemble_info *info, int n,
|
nkeynes@1265 | 4500 | enum map_type *map_type)
|
nkeynes@1265 | 4501 | {
|
nkeynes@1265 | 4502 | const char *name;
|
nkeynes@1265 | 4503 |
|
nkeynes@1265 | 4504 | name = bfd_asymbol_name (info->symtab[n]);
|
nkeynes@1265 | 4505 | if (name[0] == '$' && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
|
nkeynes@1265 | 4506 | && (name[2] == 0 || name[2] == '.'))
|
nkeynes@1265 | 4507 | {
|
nkeynes@1265 | 4508 | *map_type = ((name[1] == 'a') ? MAP_ARM
|
nkeynes@1265 | 4509 | : (name[1] == 't') ? MAP_THUMB
|
nkeynes@1265 | 4510 | : MAP_DATA);
|
nkeynes@1265 | 4511 | return TRUE;
|
nkeynes@1265 | 4512 | }
|
nkeynes@1265 | 4513 |
|
nkeynes@1265 | 4514 | return FALSE;
|
nkeynes@1265 | 4515 | }
|
nkeynes@1265 | 4516 |
|
nkeynes@1265 | 4517 | /* Try to infer the code type (ARM or Thumb) from a mapping symbol.
|
nkeynes@1265 | 4518 | Returns nonzero if *MAP_TYPE was set. */
|
nkeynes@1265 | 4519 |
|
nkeynes@1265 | 4520 | static int
|
nkeynes@1265 | 4521 | get_map_sym_type (struct disassemble_info *info,
|
nkeynes@1265 | 4522 | int n,
|
nkeynes@1265 | 4523 | enum map_type *map_type)
|
nkeynes@1265 | 4524 | {
|
nkeynes@1265 | 4525 | /* If the symbol is in a different section, ignore it. */
|
nkeynes@1265 | 4526 | if (info->section != NULL && info->section != info->symtab[n]->section)
|
nkeynes@1265 | 4527 | return FALSE;
|
nkeynes@1265 | 4528 |
|
nkeynes@1265 | 4529 | return is_mapping_symbol (info, n, map_type);
|
nkeynes@1265 | 4530 | }
|
nkeynes@1265 | 4531 |
|
nkeynes@1265 | 4532 | /* Try to infer the code type (ARM or Thumb) from a non-mapping symbol.
|
nkeynes@1265 | 4533 | Returns nonzero if *MAP_TYPE was set. */
|
nkeynes@1265 | 4534 |
|
nkeynes@1265 | 4535 | static int
|
nkeynes@1265 | 4536 | get_sym_code_type (struct disassemble_info *info,
|
nkeynes@1265 | 4537 | int n,
|
nkeynes@1265 | 4538 | enum map_type *map_type)
|
nkeynes@1265 | 4539 | {
|
nkeynes@1265 | 4540 | #if 0
|
nkeynes@1265 | 4541 | elf_symbol_type *es;
|
nkeynes@1265 | 4542 | unsigned int type;
|
nkeynes@1265 | 4543 |
|
nkeynes@1265 | 4544 | /* If the symbol is in a different section, ignore it. */
|
nkeynes@1265 | 4545 | if (info->section != NULL && info->section != info->symtab[n]->section)
|
nkeynes@1265 | 4546 | return FALSE;
|
nkeynes@1265 | 4547 |
|
nkeynes@1265 | 4548 | es = *(elf_symbol_type **)(info->symtab + n);
|
nkeynes@1265 | 4549 | type = ELF_ST_TYPE (es->internal_elf_sym.st_info);
|
nkeynes@1265 | 4550 |
|
nkeynes@1265 | 4551 | /* If the symbol has function type then use that. */
|
nkeynes@1265 | 4552 | if (type == STT_FUNC || type == STT_GNU_IFUNC)
|
nkeynes@1265 | 4553 | {
|
nkeynes@1265 | 4554 | if (ARM_SYM_BRANCH_TYPE (&es->internal_elf_sym) == ST_BRANCH_TO_THUMB)
|
nkeynes@1265 | 4555 | *map_type = MAP_THUMB;
|
nkeynes@1265 | 4556 | else
|
nkeynes@1265 | 4557 | *map_type = MAP_ARM;
|
nkeynes@1265 | 4558 | return TRUE;
|
nkeynes@1265 | 4559 | }
|
nkeynes@1265 | 4560 | #endif
|
nkeynes@1265 | 4561 | return FALSE;
|
nkeynes@1265 | 4562 | }
|
nkeynes@1265 | 4563 |
|
nkeynes@1265 | 4564 | /* Given a bfd_mach_arm_XXX value, this function fills in the fields
|
nkeynes@1265 | 4565 | of the supplied arm_feature_set structure with bitmasks indicating
|
nkeynes@1265 | 4566 | the support base architectures and coprocessor extensions.
|
nkeynes@1265 | 4567 |
|
nkeynes@1265 | 4568 | FIXME: This could more efficiently implemented as a constant array,
|
nkeynes@1265 | 4569 | although it would also be less robust. */
|
nkeynes@1265 | 4570 |
|
nkeynes@1265 | 4571 | static void
|
nkeynes@1265 | 4572 | select_arm_features (unsigned long mach,
|
nkeynes@1265 | 4573 | arm_feature_set * features)
|
nkeynes@1265 | 4574 | {
|
nkeynes@1265 | 4575 | #undef ARM_FEATURE
|
nkeynes@1265 | 4576 | #define ARM_FEATURE(ARCH,CEXT) \
|
nkeynes@1265 | 4577 | features->core = (ARCH); \
|
nkeynes@1265 | 4578 | features->coproc = (CEXT) | FPU_FPA; \
|
nkeynes@1265 | 4579 | return
|
nkeynes@1265 | 4580 |
|
nkeynes@1265 | 4581 | switch (mach)
|
nkeynes@1265 | 4582 | {
|
nkeynes@1265 | 4583 | case bfd_mach_arm_2: ARM_ARCH_V2;
|
nkeynes@1265 | 4584 | case bfd_mach_arm_2a: ARM_ARCH_V2S;
|
nkeynes@1265 | 4585 | case bfd_mach_arm_3: ARM_ARCH_V3;
|
nkeynes@1265 | 4586 | case bfd_mach_arm_3M: ARM_ARCH_V3M;
|
nkeynes@1265 | 4587 | case bfd_mach_arm_4: ARM_ARCH_V4;
|
nkeynes@1265 | 4588 | case bfd_mach_arm_4T: ARM_ARCH_V4T;
|
nkeynes@1265 | 4589 | case bfd_mach_arm_5: ARM_ARCH_V5;
|
nkeynes@1265 | 4590 | case bfd_mach_arm_5T: ARM_ARCH_V5T;
|
nkeynes@1265 | 4591 | case bfd_mach_arm_5TE: ARM_ARCH_V5TE;
|
nkeynes@1265 | 4592 | case bfd_mach_arm_XScale: ARM_ARCH_XSCALE;
|
nkeynes@1265 | 4593 | case bfd_mach_arm_ep9312: ARM_FEATURE (ARM_AEXT_V4T, ARM_CEXT_MAVERICK | FPU_MAVERICK);
|
nkeynes@1265 | 4594 | case bfd_mach_arm_iWMMXt: ARM_ARCH_IWMMXT;
|
nkeynes@1265 | 4595 | case bfd_mach_arm_iWMMXt2: ARM_ARCH_IWMMXT2;
|
nkeynes@1265 | 4596 | /* If the machine type is unknown allow all
|
nkeynes@1265 | 4597 | architecture types and all extensions. */
|
nkeynes@1265 | 4598 | case bfd_mach_arm_unknown: ARM_FEATURE (-1UL, -1UL);
|
nkeynes@1265 | 4599 | default:
|
nkeynes@1265 | 4600 | abort ();
|
nkeynes@1265 | 4601 | }
|
nkeynes@1265 | 4602 | }
|
nkeynes@1265 | 4603 |
|
nkeynes@1265 | 4604 |
|
nkeynes@1265 | 4605 | /* NOTE: There are no checks in these routines that
|
nkeynes@1265 | 4606 | the relevant number of data bytes exist. */
|
nkeynes@1265 | 4607 |
|
nkeynes@1265 | 4608 | static int
|
nkeynes@1265 | 4609 | print_insn (bfd_vma pc, struct disassemble_info *info, bfd_boolean little)
|
nkeynes@1265 | 4610 | {
|
nkeynes@1265 | 4611 | unsigned char b[4];
|
nkeynes@1265 | 4612 | long given;
|
nkeynes@1265 | 4613 | int status;
|
nkeynes@1265 | 4614 | int is_thumb = FALSE;
|
nkeynes@1265 | 4615 | int is_data = FALSE;
|
nkeynes@1265 | 4616 | int little_code;
|
nkeynes@1265 | 4617 | unsigned int size = 4;
|
nkeynes@1265 | 4618 | void (*printer) (bfd_vma, struct disassemble_info *, long);
|
nkeynes@1265 | 4619 | bfd_boolean found = FALSE;
|
nkeynes@1265 | 4620 | struct arm_private_data *private_data;
|
nkeynes@1265 | 4621 |
|
nkeynes@1265 | 4622 | if (info->disassembler_options)
|
nkeynes@1265 | 4623 | {
|
nkeynes@1265 | 4624 | parse_disassembler_options (info->disassembler_options);
|
nkeynes@1265 | 4625 |
|
nkeynes@1265 | 4626 | /* To avoid repeated parsing of these options, we remove them here. */
|
nkeynes@1265 | 4627 | info->disassembler_options = NULL;
|
nkeynes@1265 | 4628 | }
|
nkeynes@1265 | 4629 |
|
nkeynes@1265 | 4630 | /* PR 10288: Control which instructions will be disassembled. */
|
nkeynes@1265 | 4631 | if (info->private_data == NULL)
|
nkeynes@1265 | 4632 | {
|
nkeynes@1265 | 4633 | static struct arm_private_data private;
|
nkeynes@1265 | 4634 |
|
nkeynes@1265 | 4635 | if ((info->flags & USER_SPECIFIED_MACHINE_TYPE) == 0)
|
nkeynes@1265 | 4636 | /* If the user did not use the -m command line switch then default to
|
nkeynes@1265 | 4637 | disassembling all types of ARM instruction.
|
nkeynes@1265 | 4638 |
|
nkeynes@1265 | 4639 | The info->mach value has to be ignored as this will be based on
|
nkeynes@1265 | 4640 | the default archictecture for the target and/or hints in the notes
|
nkeynes@1265 | 4641 | section, but it will never be greater than the current largest arm
|
nkeynes@1265 | 4642 | machine value (iWMMXt2), which is only equivalent to the V5TE
|
nkeynes@1265 | 4643 | architecture. ARM architectures have advanced beyond the machine
|
nkeynes@1265 | 4644 | value encoding, and these newer architectures would be ignored if
|
nkeynes@1265 | 4645 | the machine value was used.
|
nkeynes@1265 | 4646 |
|
nkeynes@1265 | 4647 | Ie the -m switch is used to restrict which instructions will be
|
nkeynes@1265 | 4648 | disassembled. If it is necessary to use the -m switch to tell
|
nkeynes@1265 | 4649 | objdump that an ARM binary is being disassembled, eg because the
|
nkeynes@1265 | 4650 | input is a raw binary file, but it is also desired to disassemble
|
nkeynes@1265 | 4651 | all ARM instructions then use "-marm". This will select the
|
nkeynes@1265 | 4652 | "unknown" arm architecture which is compatible with any ARM
|
nkeynes@1265 | 4653 | instruction. */
|
nkeynes@1265 | 4654 | info->mach = bfd_mach_arm_unknown;
|
nkeynes@1265 | 4655 |
|
nkeynes@1265 | 4656 | /* Compute the architecture bitmask from the machine number.
|
nkeynes@1265 | 4657 | Note: This assumes that the machine number will not change
|
nkeynes@1265 | 4658 | during disassembly.... */
|
nkeynes@1265 | 4659 | select_arm_features (info->mach, & private.features);
|
nkeynes@1265 | 4660 |
|
nkeynes@1265 | 4661 | private.has_mapping_symbols = -1;
|
nkeynes@1265 | 4662 | private.last_mapping_sym = -1;
|
nkeynes@1265 | 4663 | private.last_mapping_addr = 0;
|
nkeynes@1265 | 4664 |
|
nkeynes@1265 | 4665 | info->private_data = & private;
|
nkeynes@1265 | 4666 | }
|
nkeynes@1265 | 4667 |
|
nkeynes@1265 | 4668 | private_data = info->private_data;
|
nkeynes@1265 | 4669 |
|
nkeynes@1265 | 4670 | /* Decide if our code is going to be little-endian, despite what the
|
nkeynes@1265 | 4671 | function argument might say. */
|
nkeynes@1265 | 4672 | little_code = ((info->endian_code == BFD_ENDIAN_LITTLE) || little);
|
nkeynes@1265 | 4673 |
|
nkeynes@1265 | 4674 | /* For ELF, consult the symbol table to determine what kind of code
|
nkeynes@1265 | 4675 | or data we have. */
|
nkeynes@1265 | 4676 | if (info->symtab_size != 0
|
nkeynes@1265 | 4677 | && bfd_asymbol_flavour (*info->symtab) == bfd_target_elf_flavour)
|
nkeynes@1265 | 4678 | {
|
nkeynes@1265 | 4679 | bfd_vma addr;
|
nkeynes@1265 | 4680 | int n, start;
|
nkeynes@1265 | 4681 | int last_sym = -1;
|
nkeynes@1265 | 4682 | enum map_type type = MAP_ARM;
|
nkeynes@1265 | 4683 |
|
nkeynes@1265 | 4684 | /* Start scanning at the start of the function, or wherever
|
nkeynes@1265 | 4685 | we finished last time. */
|
nkeynes@1265 | 4686 | start = info->symtab_pos + 1;
|
nkeynes@1265 | 4687 | if (start < private_data->last_mapping_sym)
|
nkeynes@1265 | 4688 | start = private_data->last_mapping_sym;
|
nkeynes@1265 | 4689 | found = FALSE;
|
nkeynes@1265 | 4690 |
|
nkeynes@1265 | 4691 | /* First, look for mapping symbols. */
|
nkeynes@1265 | 4692 | if (private_data->has_mapping_symbols != 0)
|
nkeynes@1265 | 4693 | {
|
nkeynes@1265 | 4694 | /* Scan up to the location being disassembled. */
|
nkeynes@1265 | 4695 | for (n = start; n < info->symtab_size; n++)
|
nkeynes@1265 | 4696 | {
|
nkeynes@1265 | 4697 | addr = bfd_asymbol_value (info->symtab[n]);
|
nkeynes@1265 | 4698 | if (addr > pc)
|
nkeynes@1265 | 4699 | break;
|
nkeynes@1265 | 4700 | if (get_map_sym_type (info, n, &type))
|
nkeynes@1265 | 4701 | {
|
nkeynes@1265 | 4702 | last_sym = n;
|
nkeynes@1265 | 4703 | found = TRUE;
|
nkeynes@1265 | 4704 | }
|
nkeynes@1265 | 4705 | }
|
nkeynes@1265 | 4706 |
|
nkeynes@1265 | 4707 | if (!found)
|
nkeynes@1265 | 4708 | {
|
nkeynes@1265 | 4709 | /* No mapping symbol found at this address. Look backwards
|
nkeynes@1265 | 4710 | for a preceding one. */
|
nkeynes@1265 | 4711 | for (n = start - 1; n >= 0; n--)
|
nkeynes@1265 | 4712 | {
|
nkeynes@1265 | 4713 | if (get_map_sym_type (info, n, &type))
|
nkeynes@1265 | 4714 | {
|
nkeynes@1265 | 4715 | last_sym = n;
|
nkeynes@1265 | 4716 | found = TRUE;
|
nkeynes@1265 | 4717 | break;
|
nkeynes@1265 | 4718 | }
|
nkeynes@1265 | 4719 | }
|
nkeynes@1265 | 4720 | }
|
nkeynes@1265 | 4721 |
|
nkeynes@1265 | 4722 | if (found)
|
nkeynes@1265 | 4723 | private_data->has_mapping_symbols = 1;
|
nkeynes@1265 | 4724 |
|
nkeynes@1265 | 4725 | /* No mapping symbols were found. A leading $d may be
|
nkeynes@1265 | 4726 | omitted for sections which start with data; but for
|
nkeynes@1265 | 4727 | compatibility with legacy and stripped binaries, only
|
nkeynes@1265 | 4728 | assume the leading $d if there is at least one mapping
|
nkeynes@1265 | 4729 | symbol in the file. */
|
nkeynes@1265 | 4730 | if (!found && private_data->has_mapping_symbols == -1)
|
nkeynes@1265 | 4731 | {
|
nkeynes@1265 | 4732 | /* Look for mapping symbols, in any section. */
|
nkeynes@1265 | 4733 | for (n = 0; n < info->symtab_size; n++)
|
nkeynes@1265 | 4734 | if (is_mapping_symbol (info, n, &type))
|
nkeynes@1265 | 4735 | {
|
nkeynes@1265 | 4736 | private_data->has_mapping_symbols = 1;
|
nkeynes@1265 | 4737 | break;
|
nkeynes@1265 | 4738 | }
|
nkeynes@1265 | 4739 | if (private_data->has_mapping_symbols == -1)
|
nkeynes@1265 | 4740 | private_data->has_mapping_symbols = 0;
|
nkeynes@1265 | 4741 | }
|
nkeynes@1265 | 4742 |
|
nkeynes@1265 | 4743 | if (!found && private_data->has_mapping_symbols == 1)
|
nkeynes@1265 | 4744 | {
|
nkeynes@1265 | 4745 | type = MAP_DATA;
|
nkeynes@1265 | 4746 | found = TRUE;
|
nkeynes@1265 | 4747 | }
|
nkeynes@1265 | 4748 | }
|
nkeynes@1265 | 4749 |
|
nkeynes@1265 | 4750 | /* Next search for function symbols to separate ARM from Thumb
|
nkeynes@1265 | 4751 | in binaries without mapping symbols. */
|
nkeynes@1265 | 4752 | if (!found)
|
nkeynes@1265 | 4753 | {
|
nkeynes@1265 | 4754 | /* Scan up to the location being disassembled. */
|
nkeynes@1265 | 4755 | for (n = start; n < info->symtab_size; n++)
|
nkeynes@1265 | 4756 | {
|
nkeynes@1265 | 4757 | addr = bfd_asymbol_value (info->symtab[n]);
|
nkeynes@1265 | 4758 | if (addr > pc)
|
nkeynes@1265 | 4759 | break;
|
nkeynes@1265 | 4760 | if (get_sym_code_type (info, n, &type))
|
nkeynes@1265 | 4761 | {
|
nkeynes@1265 | 4762 | last_sym = n;
|
nkeynes@1265 | 4763 | found = TRUE;
|
nkeynes@1265 | 4764 | }
|
nkeynes@1265 | 4765 | }
|
nkeynes@1265 | 4766 |
|
nkeynes@1265 | 4767 | if (!found)
|
nkeynes@1265 | 4768 | {
|
nkeynes@1265 | 4769 | /* No mapping symbol found at this address. Look backwards
|
nkeynes@1265 | 4770 | for a preceding one. */
|
nkeynes@1265 | 4771 | for (n = start - 1; n >= 0; n--)
|
nkeynes@1265 | 4772 | {
|
nkeynes@1265 | 4773 | if (get_sym_code_type (info, n, &type))
|
nkeynes@1265 | 4774 | {
|
nkeynes@1265 | 4775 | last_sym = n;
|
nkeynes@1265 | 4776 | found = TRUE;
|
nkeynes@1265 | 4777 | break;
|
nkeynes@1265 | 4778 | }
|
nkeynes@1265 | 4779 | }
|
nkeynes@1265 | 4780 | }
|
nkeynes@1265 | 4781 | }
|
nkeynes@1265 | 4782 |
|
nkeynes@1265 | 4783 | private_data->last_mapping_sym = last_sym;
|
nkeynes@1265 | 4784 | private_data->last_type = type;
|
nkeynes@1265 | 4785 | is_thumb = (private_data->last_type == MAP_THUMB);
|
nkeynes@1265 | 4786 | is_data = (private_data->last_type == MAP_DATA);
|
nkeynes@1265 | 4787 |
|
nkeynes@1265 | 4788 | /* Look a little bit ahead to see if we should print out
|
nkeynes@1265 | 4789 | two or four bytes of data. If there's a symbol,
|
nkeynes@1265 | 4790 | mapping or otherwise, after two bytes then don't
|
nkeynes@1265 | 4791 | print more. */
|
nkeynes@1265 | 4792 | if (is_data)
|
nkeynes@1265 | 4793 | {
|
nkeynes@1265 | 4794 | size = 4 - (pc & 3);
|
nkeynes@1265 | 4795 | for (n = last_sym + 1; n < info->symtab_size; n++)
|
nkeynes@1265 | 4796 | {
|
nkeynes@1265 | 4797 | addr = bfd_asymbol_value (info->symtab[n]);
|
nkeynes@1265 | 4798 | if (addr > pc
|
nkeynes@1265 | 4799 | && (info->section == NULL
|
nkeynes@1265 | 4800 | || info->section == info->symtab[n]->section))
|
nkeynes@1265 | 4801 | {
|
nkeynes@1265 | 4802 | if (addr - pc < size)
|
nkeynes@1265 | 4803 | size = addr - pc;
|
nkeynes@1265 | 4804 | break;
|
nkeynes@1265 | 4805 | }
|
nkeynes@1265 | 4806 | }
|
nkeynes@1265 | 4807 | /* If the next symbol is after three bytes, we need to
|
nkeynes@1265 | 4808 | print only part of the data, so that we can use either
|
nkeynes@1265 | 4809 | .byte or .short. */
|
nkeynes@1265 | 4810 | if (size == 3)
|
nkeynes@1265 | 4811 | size = (pc & 1) ? 1 : 2;
|
nkeynes@1265 | 4812 | }
|
nkeynes@1265 | 4813 | }
|
nkeynes@1265 | 4814 |
|
nkeynes@1265 | 4815 | #if 0
|
nkeynes@1265 | 4816 | if (info->symbols != NULL)
|
nkeynes@1265 | 4817 | {
|
nkeynes@1265 | 4818 | if (bfd_asymbol_flavour (*info->symbols) == bfd_target_coff_flavour)
|
nkeynes@1265 | 4819 | {
|
nkeynes@1265 | 4820 | coff_symbol_type * cs;
|
nkeynes@1265 | 4821 |
|
nkeynes@1265 | 4822 | cs = coffsymbol (*info->symbols);
|
nkeynes@1265 | 4823 | is_thumb = ( cs->native->u.syment.n_sclass == C_THUMBEXT
|
nkeynes@1265 | 4824 | || cs->native->u.syment.n_sclass == C_THUMBSTAT
|
nkeynes@1265 | 4825 | || cs->native->u.syment.n_sclass == C_THUMBLABEL
|
nkeynes@1265 | 4826 | || cs->native->u.syment.n_sclass == C_THUMBEXTFUNC
|
nkeynes@1265 | 4827 | || cs->native->u.syment.n_sclass == C_THUMBSTATFUNC);
|
nkeynes@1265 | 4828 | }
|
nkeynes@1265 | 4829 | else if (bfd_asymbol_flavour (*info->symbols) == bfd_target_elf_flavour
|
nkeynes@1265 | 4830 | && !found)
|
nkeynes@1265 | 4831 | {
|
nkeynes@1265 | 4832 | /* If no mapping symbol has been found then fall back to the type
|
nkeynes@1265 | 4833 | of the function symbol. */
|
nkeynes@1265 | 4834 | elf_symbol_type * es;
|
nkeynes@1265 | 4835 | unsigned int type;
|
nkeynes@1265 | 4836 |
|
nkeynes@1265 | 4837 | es = *(elf_symbol_type **)(info->symbols);
|
nkeynes@1265 | 4838 | type = ELF_ST_TYPE (es->internal_elf_sym.st_info);
|
nkeynes@1265 | 4839 |
|
nkeynes@1265 | 4840 | is_thumb = ((ARM_SYM_BRANCH_TYPE (&es->internal_elf_sym)
|
nkeynes@1265 | 4841 | == ST_BRANCH_TO_THUMB)
|
nkeynes@1265 | 4842 | || type == STT_ARM_16BIT);
|
nkeynes@1265 | 4843 | }
|
nkeynes@1265 | 4844 | }
|
nkeynes@1265 | 4845 | #endif
|
nkeynes@1265 | 4846 | if (force_thumb)
|
nkeynes@1265 | 4847 | is_thumb = TRUE;
|
nkeynes@1265 | 4848 |
|
nkeynes@1265 | 4849 | if (is_data)
|
nkeynes@1265 | 4850 | info->display_endian = little ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG;
|
nkeynes@1265 | 4851 | else
|
nkeynes@1265 | 4852 | info->display_endian = little_code ? BFD_ENDIAN_LITTLE : BFD_ENDIAN_BIG;
|
nkeynes@1265 | 4853 |
|
nkeynes@1265 | 4854 | info->bytes_per_line = 4;
|
nkeynes@1265 | 4855 |
|
nkeynes@1265 | 4856 | /* PR 10263: Disassemble data if requested to do so by the user. */
|
nkeynes@1265 | 4857 | if (is_data && ((info->flags & DISASSEMBLE_DATA) == 0))
|
nkeynes@1265 | 4858 | {
|
nkeynes@1265 | 4859 | int i;
|
nkeynes@1265 | 4860 |
|
nkeynes@1265 | 4861 | /* Size was already set above. */
|
nkeynes@1265 | 4862 | info->bytes_per_chunk = size;
|
nkeynes@1265 | 4863 | printer = print_insn_data;
|
nkeynes@1265 | 4864 |
|
nkeynes@1265 | 4865 | status = info->read_memory_func (pc, (bfd_byte *) b, size, info);
|
nkeynes@1265 | 4866 | given = 0;
|
nkeynes@1265 | 4867 | if (little)
|
nkeynes@1265 | 4868 | for (i = size - 1; i >= 0; i--)
|
nkeynes@1265 | 4869 | given = b[i] | (given << 8);
|
nkeynes@1265 | 4870 | else
|
nkeynes@1265 | 4871 | for (i = 0; i < (int) size; i++)
|
nkeynes@1265 | 4872 | given = b[i] | (given << 8);
|
nkeynes@1265 | 4873 | }
|
nkeynes@1265 | 4874 | else if (!is_thumb)
|
nkeynes@1265 | 4875 | {
|
nkeynes@1265 | 4876 | /* In ARM mode endianness is a straightforward issue: the instruction
|
nkeynes@1265 | 4877 | is four bytes long and is either ordered 0123 or 3210. */
|
nkeynes@1265 | 4878 | printer = print_insn_arm;
|
nkeynes@1265 | 4879 | info->bytes_per_chunk = 4;
|
nkeynes@1265 | 4880 | size = 4;
|
nkeynes@1265 | 4881 |
|
nkeynes@1265 | 4882 | status = info->read_memory_func (pc, (bfd_byte *) b, 4, info);
|
nkeynes@1265 | 4883 | if (little_code)
|
nkeynes@1265 | 4884 | given = (b[0]) | (b[1] << 8) | (b[2] << 16) | (b[3] << 24);
|
nkeynes@1265 | 4885 | else
|
nkeynes@1265 | 4886 | given = (b[3]) | (b[2] << 8) | (b[1] << 16) | (b[0] << 24);
|
nkeynes@1265 | 4887 | }
|
nkeynes@1265 | 4888 | else
|
nkeynes@1265 | 4889 | {
|
nkeynes@1265 | 4890 | /* In Thumb mode we have the additional wrinkle of two
|
nkeynes@1265 | 4891 | instruction lengths. Fortunately, the bits that determine
|
nkeynes@1265 | 4892 | the length of the current instruction are always to be found
|
nkeynes@1265 | 4893 | in the first two bytes. */
|
nkeynes@1265 | 4894 | printer = print_insn_thumb16;
|
nkeynes@1265 | 4895 | info->bytes_per_chunk = 2;
|
nkeynes@1265 | 4896 | size = 2;
|
nkeynes@1265 | 4897 |
|
nkeynes@1265 | 4898 | status = info->read_memory_func (pc, (bfd_byte *) b, 2, info);
|
nkeynes@1265 | 4899 | if (little_code)
|
nkeynes@1265 | 4900 | given = (b[0]) | (b[1] << 8);
|
nkeynes@1265 | 4901 | else
|
nkeynes@1265 | 4902 | given = (b[1]) | (b[0] << 8);
|
nkeynes@1265 | 4903 |
|
nkeynes@1265 | 4904 | if (!status)
|
nkeynes@1265 | 4905 | {
|
nkeynes@1265 | 4906 | /* These bit patterns signal a four-byte Thumb
|
nkeynes@1265 | 4907 | instruction. */
|
nkeynes@1265 | 4908 | if ((given & 0xF800) == 0xF800
|
nkeynes@1265 | 4909 | || (given & 0xF800) == 0xF000
|
nkeynes@1265 | 4910 | || (given & 0xF800) == 0xE800)
|
nkeynes@1265 | 4911 | {
|
nkeynes@1265 | 4912 | status = info->read_memory_func (pc + 2, (bfd_byte *) b, 2, info);
|
nkeynes@1265 | 4913 | if (little_code)
|
nkeynes@1265 | 4914 | given = (b[0]) | (b[1] << 8) | (given << 16);
|
nkeynes@1265 | 4915 | else
|
nkeynes@1265 | 4916 | given = (b[1]) | (b[0] << 8) | (given << 16);
|
nkeynes@1265 | 4917 |
|
nkeynes@1265 | 4918 | printer = print_insn_thumb32;
|
nkeynes@1265 | 4919 | size = 4;
|
nkeynes@1265 | 4920 | }
|
nkeynes@1265 | 4921 | }
|
nkeynes@1265 | 4922 |
|
nkeynes@1265 | 4923 | if (ifthen_address != pc)
|
nkeynes@1265 | 4924 | find_ifthen_state (pc, info, little_code);
|
nkeynes@1265 | 4925 |
|
nkeynes@1265 | 4926 | if (ifthen_state)
|
nkeynes@1265 | 4927 | {
|
nkeynes@1265 | 4928 | if ((ifthen_state & 0xf) == 0x8)
|
nkeynes@1265 | 4929 | ifthen_next_state = 0;
|
nkeynes@1265 | 4930 | else
|
nkeynes@1265 | 4931 | ifthen_next_state = (ifthen_state & 0xe0)
|
nkeynes@1265 | 4932 | | ((ifthen_state & 0xf) << 1);
|
nkeynes@1265 | 4933 | }
|
nkeynes@1265 | 4934 | }
|
nkeynes@1265 | 4935 |
|
nkeynes@1265 | 4936 | if (status)
|
nkeynes@1265 | 4937 | {
|
nkeynes@1265 | 4938 | info->memory_error_func (status, pc, info);
|
nkeynes@1265 | 4939 | return -1;
|
nkeynes@1265 | 4940 | }
|
nkeynes@1265 | 4941 | if (info->flags & INSN_HAS_RELOC)
|
nkeynes@1265 | 4942 | /* If the instruction has a reloc associated with it, then
|
nkeynes@1265 | 4943 | the offset field in the instruction will actually be the
|
nkeynes@1265 | 4944 | addend for the reloc. (We are using REL type relocs).
|
nkeynes@1265 | 4945 | In such cases, we can ignore the pc when computing
|
nkeynes@1265 | 4946 | addresses, since the addend is not currently pc-relative. */
|
nkeynes@1265 | 4947 | pc = 0;
|
nkeynes@1265 | 4948 |
|
nkeynes@1265 | 4949 | printer (pc, info, given);
|
nkeynes@1265 | 4950 |
|
nkeynes@1265 | 4951 | if (is_thumb)
|
nkeynes@1265 | 4952 | {
|
nkeynes@1265 | 4953 | ifthen_state = ifthen_next_state;
|
nkeynes@1265 | 4954 | ifthen_address += size;
|
nkeynes@1265 | 4955 | }
|
nkeynes@1265 | 4956 | return size;
|
nkeynes@1265 | 4957 | }
|
nkeynes@1265 | 4958 |
|
nkeynes@1265 | 4959 | int
|
nkeynes@1265 | 4960 | print_insn_big_arm (bfd_vma pc, struct disassemble_info *info)
|
nkeynes@1265 | 4961 | {
|
nkeynes@1265 | 4962 | /* Detect BE8-ness and record it in the disassembler info. */
|
nkeynes@1265 | 4963 | #if 0
|
nkeynes@1265 | 4964 | if (info->flavour == bfd_target_elf_flavour
|
nkeynes@1265 | 4965 | && info->section != NULL
|
nkeynes@1265 | 4966 | && (elf_elfheader (info->section->owner)->e_flags & EF_ARM_BE8))
|
nkeynes@1265 | 4967 | info->endian_code = BFD_ENDIAN_LITTLE;
|
nkeynes@1265 | 4968 | #endif
|
nkeynes@1265 | 4969 | return print_insn (pc, info, FALSE);
|
nkeynes@1265 | 4970 | }
|
nkeynes@1265 | 4971 |
|
nkeynes@1265 | 4972 | int
|
nkeynes@1265 | 4973 | print_insn_little_arm (bfd_vma pc, struct disassemble_info *info)
|
nkeynes@1265 | 4974 | {
|
nkeynes@1265 | 4975 | return print_insn (pc, info, TRUE);
|
nkeynes@1265 | 4976 | }
|
nkeynes@1265 | 4977 |
|
nkeynes@1265 | 4978 | void
|
nkeynes@1265 | 4979 | print_arm_disassembler_options (FILE *stream)
|
nkeynes@1265 | 4980 | {
|
nkeynes@1265 | 4981 | int i;
|
nkeynes@1265 | 4982 |
|
nkeynes@1265 | 4983 | fprintf (stream, _("\n\
|
nkeynes@1265 | 4984 | The following ARM specific disassembler options are supported for use with\n\
|
nkeynes@1265 | 4985 | the -M switch:\n"));
|
nkeynes@1265 | 4986 |
|
nkeynes@1265 | 4987 | for (i = NUM_ARM_REGNAMES; i--;)
|
nkeynes@1265 | 4988 | fprintf (stream, " reg-names-%s %*c%s\n",
|
nkeynes@1265 | 4989 | regnames[i].name,
|
nkeynes@1265 | 4990 | (int)(14 - strlen (regnames[i].name)), ' ',
|
nkeynes@1265 | 4991 | regnames[i].description);
|
nkeynes@1265 | 4992 |
|
nkeynes@1265 | 4993 | fprintf (stream, " force-thumb Assume all insns are Thumb insns\n");
|
nkeynes@1265 | 4994 | fprintf (stream, " no-force-thumb Examine preceding label to determine an insn's type\n\n");
|
nkeynes@1265 | 4995 | }
|