| nkeynes@387 | 1 | /**
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| nkeynes@500 | 2 | * $Id: sh4stat.c,v 1.2 2007-11-08 11:37:49 nkeynes Exp $
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| nkeynes@387 | 3 | *
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| nkeynes@387 | 4 | * Support module for collecting instruction stats
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| nkeynes@387 | 5 | *
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| nkeynes@387 | 6 | * Copyright (c) 2005 Nathan Keynes.
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| nkeynes@387 | 7 | *
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| nkeynes@387 | 8 | * This program is free software; you can redistribute it and/or modify
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| nkeynes@387 | 9 | * it under the terms of the GNU General Public License as published by
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| nkeynes@387 | 10 | * the Free Software Foundation; either version 2 of the License, or
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| nkeynes@387 | 11 | * (at your option) any later version.
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| nkeynes@387 | 12 | *
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| nkeynes@387 | 13 | * This program is distributed in the hope that it will be useful,
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| nkeynes@387 | 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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| nkeynes@387 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| nkeynes@387 | 16 | * GNU General Public License for more details.
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| nkeynes@387 | 17 | */
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| nkeynes@387 | 18 |
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| nkeynes@387 | 19 | #include "dream.h"
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| nkeynes@387 | 20 | #include "sh4stat.h"
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| nkeynes@387 | 21 | #include "sh4core.h"
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| nkeynes@387 | 22 |
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| nkeynes@387 | 23 | static uint64_t sh4_stats[SH4_INSTRUCTION_COUNT+1];
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| nkeynes@387 | 24 | static uint64_t sh4_stats_total;
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| nkeynes@387 | 25 | static const char *sh4_stats_names[] = {
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| nkeynes@387 | 26 | "???",
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| nkeynes@387 | 27 | "ADD Rm, Rn",
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| nkeynes@387 | 28 | "ADD #imm, Rn",
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| nkeynes@387 | 29 | "ADDC Rm, Rn",
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| nkeynes@387 | 30 | "ADDV Rm, Rn",
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| nkeynes@387 | 31 | "AND Rm, Rn",
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| nkeynes@387 | 32 | "AND #imm, R0",
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| nkeynes@387 | 33 | "AND.B #imm, @(R0, GBR)",
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| nkeynes@387 | 34 | "BF disp",
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| nkeynes@387 | 35 | "BF/S disp",
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| nkeynes@387 | 36 | "BRA disp",
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| nkeynes@387 | 37 | "BRAF Rn",
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| nkeynes@387 | 38 | "BSR disp",
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| nkeynes@387 | 39 | "BSRF Rn",
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| nkeynes@387 | 40 | "BT disp",
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| nkeynes@387 | 41 | "BT/S disp",
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| nkeynes@387 | 42 | "CLRMAC",
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| nkeynes@387 | 43 | "CLRS",
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| nkeynes@387 | 44 | "CLRT",
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| nkeynes@387 | 45 | "CMP/EQ Rm, Rn",
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| nkeynes@387 | 46 | "CMP/EQ #imm, R0",
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| nkeynes@387 | 47 | "CMP/GE Rm, Rn",
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| nkeynes@387 | 48 | "CMP/GT Rm, Rn",
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| nkeynes@387 | 49 | "CMP/HI Rm, Rn",
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| nkeynes@387 | 50 | "CMP/HS Rm, Rn",
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| nkeynes@387 | 51 | "CMP/PL Rn",
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| nkeynes@387 | 52 | "CMP/PZ Rn",
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| nkeynes@387 | 53 | "CMP/STR Rm, Rn",
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| nkeynes@387 | 54 | "DIV0S Rm, Rn",
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| nkeynes@387 | 55 | "DIV0U",
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| nkeynes@387 | 56 | "DIV1 Rm, Rn",
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| nkeynes@387 | 57 | "DMULS.L Rm, Rn",
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| nkeynes@387 | 58 | "DMULU.L Rm, Rn",
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| nkeynes@387 | 59 | "DT Rn",
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| nkeynes@387 | 60 | "EXTS.B Rm, Rn",
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| nkeynes@387 | 61 | "EXTS.W Rm, Rn",
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| nkeynes@387 | 62 | "EXTU.B Rm, Rn",
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| nkeynes@387 | 63 | "EXTU.W Rm, Rn",
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| nkeynes@387 | 64 | "FABS FRn",
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| nkeynes@387 | 65 | "FADD FRm, FRn",
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| nkeynes@387 | 66 | "FCMP/EQ FRm, FRn",
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| nkeynes@387 | 67 | "FCMP/GT FRm, FRn",
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| nkeynes@387 | 68 | "FCNVDS FRm, FPUL",
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| nkeynes@387 | 69 | "FCNVSD FPUL, FRn",
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| nkeynes@387 | 70 | "FDIV FRm, FRn",
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| nkeynes@387 | 71 | "FIPR FVm, FVn",
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| nkeynes@387 | 72 | "FLDS FRm, FPUL",
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| nkeynes@387 | 73 | "FLDI0 FRn",
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| nkeynes@387 | 74 | "FLDI1 FRn",
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| nkeynes@387 | 75 | "FLOAT FPUL, FRn",
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| nkeynes@387 | 76 | "FMAC FR0, FRm, FRn",
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| nkeynes@387 | 77 | "FMOV FRm, FRn",
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| nkeynes@387 | 78 | "FMOV FRm, @Rn",
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| nkeynes@387 | 79 | "FMOV FRm, @-Rn",
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| nkeynes@387 | 80 | "FMOV FRm, @(R0, Rn)",
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| nkeynes@387 | 81 | "FMOV @Rm, FRn",
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| nkeynes@387 | 82 | "FMOV @Rm+, FRn",
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| nkeynes@387 | 83 | "FMOV @(R0, Rm), FRn",
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| nkeynes@387 | 84 | "FMUL FRm, FRn",
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| nkeynes@387 | 85 | "FNEG FRn",
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| nkeynes@387 | 86 | "FRCHG",
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| nkeynes@387 | 87 | "FSCA FPUL, FRn",
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| nkeynes@387 | 88 | "FSCHG",
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| nkeynes@387 | 89 | "FSQRT FRn",
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| nkeynes@387 | 90 | "FSRRA FRn",
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| nkeynes@387 | 91 | "FSTS FPUL, FRn",
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| nkeynes@387 | 92 | "FSUB FRm, FRn",
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| nkeynes@387 | 93 | "FTRC FRm, FPUL",
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| nkeynes@387 | 94 | "FTRV XMTRX, FVn",
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| nkeynes@387 | 95 | "JMP @Rn",
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| nkeynes@387 | 96 | "JSR @Rn",
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| nkeynes@387 | 97 | "LDC Rm, SR",
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| nkeynes@387 | 98 | "LDC Rm, *",
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| nkeynes@387 | 99 | "LDC.L @Rm+, SR",
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| nkeynes@387 | 100 | "LDC.L @Rm+, *",
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| nkeynes@387 | 101 | "LDS Rm, *",
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| nkeynes@387 | 102 | "LDS.L @Rm+, *",
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| nkeynes@387 | 103 | "LDTLB",
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| nkeynes@387 | 104 | "MAC.L @Rm+, @Rn+",
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| nkeynes@387 | 105 | "MAC.W @Rm+, @Rn+",
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| nkeynes@387 | 106 | "MOV Rm, Rn",
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| nkeynes@387 | 107 | "MOV #imm, Rn",
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| nkeynes@387 | 108 | "MOV.B ...",
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| nkeynes@387 | 109 | "MOV.L ...",
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| nkeynes@387 | 110 | "MOV.L @(disp, PC)",
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| nkeynes@387 | 111 | "MOV.W ...",
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| nkeynes@387 | 112 | "MOVA @(disp, PC), R0",
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| nkeynes@387 | 113 | "MOVCA.L R0, @Rn",
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| nkeynes@387 | 114 | "MOVT Rn",
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| nkeynes@387 | 115 | "MUL.L Rm, Rn",
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| nkeynes@387 | 116 | "MULS.W Rm, Rn",
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| nkeynes@387 | 117 | "MULU.W Rm, Rn",
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| nkeynes@387 | 118 | "NEG Rm, Rn",
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| nkeynes@387 | 119 | "NEGC Rm, Rn",
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| nkeynes@387 | 120 | "NOP",
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| nkeynes@387 | 121 | "NOT Rm, Rn",
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| nkeynes@387 | 122 | "OCBI @Rn",
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| nkeynes@387 | 123 | "OCBP @Rn",
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| nkeynes@387 | 124 | "OCBWB @Rn",
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| nkeynes@387 | 125 | "OR Rm, Rn",
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| nkeynes@387 | 126 | "OR #imm, R0",
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| nkeynes@387 | 127 | "OR.B #imm, @(R0, GBR)",
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| nkeynes@387 | 128 | "PREF @Rn",
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| nkeynes@387 | 129 | "ROTCL Rn",
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| nkeynes@387 | 130 | "ROTCR Rn",
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| nkeynes@387 | 131 | "ROTL Rn",
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| nkeynes@387 | 132 | "ROTR Rn",
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| nkeynes@387 | 133 | "RTE",
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| nkeynes@387 | 134 | "RTS",
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| nkeynes@387 | 135 | "SETS",
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| nkeynes@387 | 136 | "SETT",
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| nkeynes@387 | 137 | "SHAD Rm, Rn",
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| nkeynes@387 | 138 | "SHAL Rn",
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| nkeynes@387 | 139 | "SHAR Rn",
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| nkeynes@387 | 140 | "SHLD Rm, Rn",
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| nkeynes@387 | 141 | "SHLL* Rn",
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| nkeynes@387 | 142 | "SHLR* Rn",
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| nkeynes@387 | 143 | "SLEEP",
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| nkeynes@387 | 144 | "STC SR, Rn",
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| nkeynes@387 | 145 | "STC *, Rn",
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| nkeynes@387 | 146 | "STC.L SR, @-Rn",
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| nkeynes@387 | 147 | "STC.L *, @-Rn",
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| nkeynes@387 | 148 | "STS *, Rn",
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| nkeynes@387 | 149 | "STS.L *, @-Rn",
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| nkeynes@387 | 150 | "SUB Rm, Rn",
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| nkeynes@387 | 151 | "SUBC Rm, Rn",
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| nkeynes@387 | 152 | "SUBV Rm, Rn",
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| nkeynes@387 | 153 | "SWAP.B Rm, Rn",
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| nkeynes@387 | 154 | "SWAP.W Rm, Rn",
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| nkeynes@387 | 155 | "TAS.B @Rn",
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| nkeynes@387 | 156 | "TRAPA #imm",
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| nkeynes@387 | 157 | "TST Rm, Rn",
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| nkeynes@387 | 158 | "TST #imm, R0",
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| nkeynes@387 | 159 | "TST.B #imm, @(R0, GBR)",
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| nkeynes@387 | 160 | "XOR Rm, Rn",
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| nkeynes@387 | 161 | "XOR #imm, R0",
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| nkeynes@387 | 162 | "XOR.B #imm, @(R0, GBR)",
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| nkeynes@387 | 163 | "XTRCT Rm, Rn",
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| nkeynes@387 | 164 | "UNDEF"
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| nkeynes@387 | 165 | };
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| nkeynes@387 | 166 |
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| nkeynes@387 | 167 | void sh4_stats_reset( void )
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| nkeynes@387 | 168 | {
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| nkeynes@387 | 169 | int i;
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| nkeynes@387 | 170 | for( i=0; i<= I_UNDEF; i++ ) {
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| nkeynes@387 | 171 | sh4_stats[i] = 0;
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| nkeynes@387 | 172 | }
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| nkeynes@387 | 173 | sh4_stats_total = 0;
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| nkeynes@387 | 174 | }
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| nkeynes@387 | 175 |
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| nkeynes@387 | 176 | void sh4_stats_print( FILE *out )
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| nkeynes@387 | 177 | {
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| nkeynes@387 | 178 | int i;
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| nkeynes@387 | 179 | for( i=0; i<= I_UNDEF; i++ ) {
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| nkeynes@500 | 180 | fprintf( out, "%-20s\t%d\t%.2f%%\n", sh4_stats_names[i], (uint32_t)sh4_stats[i], ((double)sh4_stats[i])*100.0/(double)sh4_stats_total );
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| nkeynes@387 | 181 | }
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| nkeynes@500 | 182 | fprintf( out, "Total: %lld\n", sh4_stats_total );
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| nkeynes@387 | 183 | }
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| nkeynes@387 | 184 |
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| nkeynes@387 | 185 | void sh4_stats_add( uint32_t pc )
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| nkeynes@387 | 186 | {
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| nkeynes@387 | 187 | uint16_t ir = sh4_read_word(pc);
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| nkeynes@387 | 188 | #define UNDEF() sh4_stats[0]++
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| nkeynes@387 | 189 | switch( (ir&0xF000) >> 12 ) {
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| nkeynes@387 | 190 | case 0x0:
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| nkeynes@387 | 191 | switch( ir&0xF ) {
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| nkeynes@387 | 192 | case 0x2:
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| nkeynes@387 | 193 | switch( (ir&0x80) >> 7 ) {
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| nkeynes@387 | 194 | case 0x0:
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| nkeynes@387 | 195 | switch( (ir&0x70) >> 4 ) {
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| nkeynes@387 | 196 | case 0x0:
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| nkeynes@387 | 197 | { /* STC SR, Rn */
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| nkeynes@387 | 198 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 199 | sh4_stats[I_STCSR]++;
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| nkeynes@387 | 200 | }
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| nkeynes@387 | 201 | break;
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| nkeynes@387 | 202 | case 0x1:
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| nkeynes@387 | 203 | { /* STC GBR, Rn */
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| nkeynes@387 | 204 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 205 | sh4_stats[I_STC]++;
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| nkeynes@387 | 206 | }
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| nkeynes@387 | 207 | break;
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| nkeynes@387 | 208 | case 0x2:
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| nkeynes@387 | 209 | { /* STC VBR, Rn */
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| nkeynes@387 | 210 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 211 | sh4_stats[I_STC]++;
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| nkeynes@387 | 212 | }
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| nkeynes@387 | 213 | break;
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| nkeynes@387 | 214 | case 0x3:
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| nkeynes@387 | 215 | { /* STC SSR, Rn */
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| nkeynes@387 | 216 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 217 | sh4_stats[I_STC]++;
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| nkeynes@387 | 218 | }
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| nkeynes@387 | 219 | break;
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| nkeynes@387 | 220 | case 0x4:
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| nkeynes@387 | 221 | { /* STC SPC, Rn */
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| nkeynes@387 | 222 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 223 | sh4_stats[I_STC]++;
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| nkeynes@387 | 224 | }
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| nkeynes@387 | 225 | break;
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| nkeynes@387 | 226 | default:
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| nkeynes@387 | 227 | UNDEF();
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| nkeynes@387 | 228 | break;
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| nkeynes@387 | 229 | }
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| nkeynes@387 | 230 | break;
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| nkeynes@387 | 231 | case 0x1:
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| nkeynes@387 | 232 | { /* STC Rm_BANK, Rn */
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| nkeynes@387 | 233 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
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| nkeynes@387 | 234 | sh4_stats[I_STC]++;
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| nkeynes@387 | 235 | }
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| nkeynes@387 | 236 | break;
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| nkeynes@387 | 237 | }
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| nkeynes@387 | 238 | break;
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| nkeynes@387 | 239 | case 0x3:
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| nkeynes@387 | 240 | switch( (ir&0xF0) >> 4 ) {
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| nkeynes@387 | 241 | case 0x0:
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| nkeynes@387 | 242 | { /* BSRF Rn */
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| nkeynes@387 | 243 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 244 | sh4_stats[I_BSRF]++;
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| nkeynes@387 | 245 | }
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| nkeynes@387 | 246 | break;
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| nkeynes@387 | 247 | case 0x2:
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| nkeynes@387 | 248 | { /* BRAF Rn */
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| nkeynes@387 | 249 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 250 | sh4_stats[I_BRAF]++;
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| nkeynes@387 | 251 | }
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| nkeynes@387 | 252 | break;
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| nkeynes@387 | 253 | case 0x8:
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| nkeynes@387 | 254 | { /* PREF @Rn */
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| nkeynes@387 | 255 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 256 | sh4_stats[I_PREF]++;
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| nkeynes@387 | 257 | }
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| nkeynes@387 | 258 | break;
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| nkeynes@387 | 259 | case 0x9:
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| nkeynes@387 | 260 | { /* OCBI @Rn */
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| nkeynes@387 | 261 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 262 | sh4_stats[I_OCBI]++;
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| nkeynes@387 | 263 | }
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| nkeynes@387 | 264 | break;
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| nkeynes@387 | 265 | case 0xA:
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| nkeynes@387 | 266 | { /* OCBP @Rn */
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| nkeynes@387 | 267 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 268 | sh4_stats[I_OCBP]++;
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| nkeynes@387 | 269 | }
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| nkeynes@387 | 270 | break;
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| nkeynes@387 | 271 | case 0xB:
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| nkeynes@387 | 272 | { /* OCBWB @Rn */
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| nkeynes@387 | 273 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 274 | sh4_stats[I_OCBWB]++;
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| nkeynes@387 | 275 | }
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| nkeynes@387 | 276 | break;
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| nkeynes@387 | 277 | case 0xC:
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| nkeynes@387 | 278 | { /* MOVCA.L R0, @Rn */
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| nkeynes@387 | 279 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 280 | sh4_stats[I_MOVCA]++;
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| nkeynes@387 | 281 | }
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| nkeynes@387 | 282 | break;
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| nkeynes@387 | 283 | default:
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| nkeynes@387 | 284 | UNDEF();
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| nkeynes@387 | 285 | break;
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| nkeynes@387 | 286 | }
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| nkeynes@387 | 287 | break;
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| nkeynes@387 | 288 | case 0x4:
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| nkeynes@387 | 289 | { /* MOV.B Rm, @(R0, Rn) */
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| nkeynes@387 | 290 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
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| nkeynes@387 | 291 | sh4_stats[I_MOVB]++;
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| nkeynes@387 | 292 | }
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| nkeynes@387 | 293 | break;
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| nkeynes@387 | 294 | case 0x5:
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| nkeynes@387 | 295 | { /* MOV.W Rm, @(R0, Rn) */
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| nkeynes@387 | 296 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
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| nkeynes@387 | 297 | sh4_stats[I_MOVW]++;
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| nkeynes@387 | 298 | }
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| nkeynes@387 | 299 | break;
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| nkeynes@387 | 300 | case 0x6:
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| nkeynes@387 | 301 | { /* MOV.L Rm, @(R0, Rn) */
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| nkeynes@387 | 302 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
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| nkeynes@387 | 303 | sh4_stats[I_MOVL]++;
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| nkeynes@387 | 304 | }
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| nkeynes@387 | 305 | break;
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| nkeynes@387 | 306 | case 0x7:
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| nkeynes@387 | 307 | { /* MUL.L Rm, Rn */
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| nkeynes@387 | 308 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
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| nkeynes@387 | 309 | sh4_stats[I_MULL]++;
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| nkeynes@387 | 310 | }
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| nkeynes@387 | 311 | break;
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| nkeynes@387 | 312 | case 0x8:
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| nkeynes@387 | 313 | switch( (ir&0xFF0) >> 4 ) {
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| nkeynes@387 | 314 | case 0x0:
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| nkeynes@387 | 315 | { /* CLRT */
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| nkeynes@387 | 316 | sh4_stats[I_CLRT]++;
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| nkeynes@387 | 317 | }
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| nkeynes@387 | 318 | break;
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| nkeynes@387 | 319 | case 0x1:
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| nkeynes@387 | 320 | { /* SETT */
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| nkeynes@387 | 321 | sh4_stats[I_SETT]++;
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| nkeynes@387 | 322 | }
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| nkeynes@387 | 323 | break;
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| nkeynes@387 | 324 | case 0x2:
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| nkeynes@387 | 325 | { /* CLRMAC */
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| nkeynes@387 | 326 | sh4_stats[I_CLRMAC]++;
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| nkeynes@387 | 327 | }
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| nkeynes@387 | 328 | break;
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| nkeynes@387 | 329 | case 0x3:
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| nkeynes@387 | 330 | { /* LDTLB */
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| nkeynes@387 | 331 | sh4_stats[I_LDTLB]++;
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| nkeynes@387 | 332 | }
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| nkeynes@387 | 333 | break;
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| nkeynes@387 | 334 | case 0x4:
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| nkeynes@387 | 335 | { /* CLRS */
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| nkeynes@387 | 336 | sh4_stats[I_CLRS]++;
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| nkeynes@387 | 337 | }
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| nkeynes@387 | 338 | break;
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| nkeynes@387 | 339 | case 0x5:
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| nkeynes@387 | 340 | { /* SETS */
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| nkeynes@387 | 341 | sh4_stats[I_SETS]++;
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| nkeynes@387 | 342 | }
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| nkeynes@387 | 343 | break;
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| nkeynes@387 | 344 | default:
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| nkeynes@387 | 345 | UNDEF();
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| nkeynes@387 | 346 | break;
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| nkeynes@387 | 347 | }
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| nkeynes@387 | 348 | break;
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| nkeynes@387 | 349 | case 0x9:
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| nkeynes@387 | 350 | switch( (ir&0xF0) >> 4 ) {
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| nkeynes@387 | 351 | case 0x0:
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| nkeynes@387 | 352 | { /* NOP */
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| nkeynes@387 | 353 | sh4_stats[I_NOP]++;
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| nkeynes@387 | 354 | }
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| nkeynes@387 | 355 | break;
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| nkeynes@387 | 356 | case 0x1:
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| nkeynes@387 | 357 | { /* DIV0U */
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| nkeynes@387 | 358 | sh4_stats[I_DIV0U]++;
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| nkeynes@387 | 359 | }
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| nkeynes@387 | 360 | break;
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| nkeynes@387 | 361 | case 0x2:
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| nkeynes@387 | 362 | { /* MOVT Rn */
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| nkeynes@387 | 363 | uint32_t Rn = ((ir>>8)&0xF);
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| nkeynes@387 | 364 | sh4_stats[I_MOVT]++;
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| nkeynes@387 | 365 | }
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| nkeynes@387 | 366 | break;
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| nkeynes@387 | 367 | default:
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| nkeynes@387 | 368 | UNDEF();
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| nkeynes@387 | 369 | break;
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| nkeynes@387 | 370 | }
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| nkeynes@387 | 371 | break;
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| nkeynes@387 | 372 | case 0xA:
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| nkeynes@387 | 373 | switch( (ir&0xF0) >> 4 ) {
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| nkeynes@387 | 374 | case 0x0:
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| nkeynes@387 | 375 | { /* STS MACH, Rn */
|
| nkeynes@387 | 376 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 377 | sh4_stats[I_STS]++;
|
| nkeynes@387 | 378 | }
|
| nkeynes@387 | 379 | break;
|
| nkeynes@387 | 380 | case 0x1:
|
| nkeynes@387 | 381 | { /* STS MACL, Rn */
|
| nkeynes@387 | 382 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 383 | sh4_stats[I_STS]++;
|
| nkeynes@387 | 384 | }
|
| nkeynes@387 | 385 | break;
|
| nkeynes@387 | 386 | case 0x2:
|
| nkeynes@387 | 387 | { /* STS PR, Rn */
|
| nkeynes@387 | 388 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 389 | sh4_stats[I_STS]++;
|
| nkeynes@387 | 390 | }
|
| nkeynes@387 | 391 | break;
|
| nkeynes@387 | 392 | case 0x3:
|
| nkeynes@387 | 393 | { /* STC SGR, Rn */
|
| nkeynes@387 | 394 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 395 | sh4_stats[I_STC]++;
|
| nkeynes@387 | 396 | }
|
| nkeynes@387 | 397 | break;
|
| nkeynes@387 | 398 | case 0x5:
|
| nkeynes@387 | 399 | { /* STS FPUL, Rn */
|
| nkeynes@387 | 400 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 401 | sh4_stats[I_STS]++;
|
| nkeynes@387 | 402 | }
|
| nkeynes@387 | 403 | break;
|
| nkeynes@387 | 404 | case 0x6:
|
| nkeynes@387 | 405 | { /* STS FPSCR, Rn */
|
| nkeynes@387 | 406 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 407 | sh4_stats[I_STS]++;
|
| nkeynes@387 | 408 | }
|
| nkeynes@387 | 409 | break;
|
| nkeynes@387 | 410 | case 0xF:
|
| nkeynes@387 | 411 | { /* STC DBR, Rn */
|
| nkeynes@387 | 412 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 413 | sh4_stats[I_STC]++;
|
| nkeynes@387 | 414 | }
|
| nkeynes@387 | 415 | break;
|
| nkeynes@387 | 416 | default:
|
| nkeynes@387 | 417 | UNDEF();
|
| nkeynes@387 | 418 | break;
|
| nkeynes@387 | 419 | }
|
| nkeynes@387 | 420 | break;
|
| nkeynes@387 | 421 | case 0xB:
|
| nkeynes@387 | 422 | switch( (ir&0xFF0) >> 4 ) {
|
| nkeynes@387 | 423 | case 0x0:
|
| nkeynes@387 | 424 | { /* RTS */
|
| nkeynes@387 | 425 | sh4_stats[I_RTS]++;
|
| nkeynes@387 | 426 | }
|
| nkeynes@387 | 427 | break;
|
| nkeynes@387 | 428 | case 0x1:
|
| nkeynes@387 | 429 | { /* SLEEP */
|
| nkeynes@387 | 430 | sh4_stats[I_SLEEP]++;
|
| nkeynes@387 | 431 | }
|
| nkeynes@387 | 432 | break;
|
| nkeynes@387 | 433 | case 0x2:
|
| nkeynes@387 | 434 | { /* RTE */
|
| nkeynes@387 | 435 | sh4_stats[I_RTE]++;
|
| nkeynes@387 | 436 | }
|
| nkeynes@387 | 437 | break;
|
| nkeynes@387 | 438 | default:
|
| nkeynes@387 | 439 | UNDEF();
|
| nkeynes@387 | 440 | break;
|
| nkeynes@387 | 441 | }
|
| nkeynes@387 | 442 | break;
|
| nkeynes@387 | 443 | case 0xC:
|
| nkeynes@387 | 444 | { /* MOV.B @(R0, Rm), Rn */
|
| nkeynes@387 | 445 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 446 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 447 | }
|
| nkeynes@387 | 448 | break;
|
| nkeynes@387 | 449 | case 0xD:
|
| nkeynes@387 | 450 | { /* MOV.W @(R0, Rm), Rn */
|
| nkeynes@387 | 451 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 452 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 453 | }
|
| nkeynes@387 | 454 | break;
|
| nkeynes@387 | 455 | case 0xE:
|
| nkeynes@387 | 456 | { /* MOV.L @(R0, Rm), Rn */
|
| nkeynes@387 | 457 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 458 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 459 | }
|
| nkeynes@387 | 460 | break;
|
| nkeynes@387 | 461 | case 0xF:
|
| nkeynes@387 | 462 | { /* MAC.L @Rm+, @Rn+ */
|
| nkeynes@387 | 463 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 464 | sh4_stats[I_MACL]++;
|
| nkeynes@387 | 465 | }
|
| nkeynes@387 | 466 | break;
|
| nkeynes@387 | 467 | default:
|
| nkeynes@387 | 468 | UNDEF();
|
| nkeynes@387 | 469 | break;
|
| nkeynes@387 | 470 | }
|
| nkeynes@387 | 471 | break;
|
| nkeynes@387 | 472 | case 0x1:
|
| nkeynes@387 | 473 | { /* MOV.L Rm, @(disp, Rn) */
|
| nkeynes@387 | 474 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
|
| nkeynes@387 | 475 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 476 | }
|
| nkeynes@387 | 477 | break;
|
| nkeynes@387 | 478 | case 0x2:
|
| nkeynes@387 | 479 | switch( ir&0xF ) {
|
| nkeynes@387 | 480 | case 0x0:
|
| nkeynes@387 | 481 | { /* MOV.B Rm, @Rn */
|
| nkeynes@387 | 482 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 483 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 484 | }
|
| nkeynes@387 | 485 | break;
|
| nkeynes@387 | 486 | case 0x1:
|
| nkeynes@387 | 487 | { /* MOV.W Rm, @Rn */
|
| nkeynes@387 | 488 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 489 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 490 | }
|
| nkeynes@387 | 491 | break;
|
| nkeynes@387 | 492 | case 0x2:
|
| nkeynes@387 | 493 | { /* MOV.L Rm, @Rn */
|
| nkeynes@387 | 494 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 495 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 496 | }
|
| nkeynes@387 | 497 | break;
|
| nkeynes@387 | 498 | case 0x4:
|
| nkeynes@387 | 499 | { /* MOV.B Rm, @-Rn */
|
| nkeynes@387 | 500 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 501 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 502 | }
|
| nkeynes@387 | 503 | break;
|
| nkeynes@387 | 504 | case 0x5:
|
| nkeynes@387 | 505 | { /* MOV.W Rm, @-Rn */
|
| nkeynes@387 | 506 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 507 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 508 | }
|
| nkeynes@387 | 509 | break;
|
| nkeynes@387 | 510 | case 0x6:
|
| nkeynes@387 | 511 | { /* MOV.L Rm, @-Rn */
|
| nkeynes@387 | 512 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 513 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 514 | }
|
| nkeynes@387 | 515 | break;
|
| nkeynes@387 | 516 | case 0x7:
|
| nkeynes@387 | 517 | { /* DIV0S Rm, Rn */
|
| nkeynes@387 | 518 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 519 | sh4_stats[I_DIV0S]++;
|
| nkeynes@387 | 520 | }
|
| nkeynes@387 | 521 | break;
|
| nkeynes@387 | 522 | case 0x8:
|
| nkeynes@387 | 523 | { /* TST Rm, Rn */
|
| nkeynes@387 | 524 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 525 | sh4_stats[I_TST]++;
|
| nkeynes@387 | 526 | }
|
| nkeynes@387 | 527 | break;
|
| nkeynes@387 | 528 | case 0x9:
|
| nkeynes@387 | 529 | { /* AND Rm, Rn */
|
| nkeynes@387 | 530 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 531 | sh4_stats[I_AND]++;
|
| nkeynes@387 | 532 | }
|
| nkeynes@387 | 533 | break;
|
| nkeynes@387 | 534 | case 0xA:
|
| nkeynes@387 | 535 | { /* XOR Rm, Rn */
|
| nkeynes@387 | 536 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 537 | sh4_stats[I_XOR]++;
|
| nkeynes@387 | 538 | }
|
| nkeynes@387 | 539 | break;
|
| nkeynes@387 | 540 | case 0xB:
|
| nkeynes@387 | 541 | { /* OR Rm, Rn */
|
| nkeynes@387 | 542 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 543 | sh4_stats[I_OR]++;
|
| nkeynes@387 | 544 | }
|
| nkeynes@387 | 545 | break;
|
| nkeynes@387 | 546 | case 0xC:
|
| nkeynes@387 | 547 | { /* CMP/STR Rm, Rn */
|
| nkeynes@387 | 548 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 549 | sh4_stats[I_CMPSTR]++;
|
| nkeynes@387 | 550 | }
|
| nkeynes@387 | 551 | break;
|
| nkeynes@387 | 552 | case 0xD:
|
| nkeynes@387 | 553 | { /* XTRCT Rm, Rn */
|
| nkeynes@387 | 554 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 555 | sh4_stats[I_XTRCT]++;
|
| nkeynes@387 | 556 | }
|
| nkeynes@387 | 557 | break;
|
| nkeynes@387 | 558 | case 0xE:
|
| nkeynes@387 | 559 | { /* MULU.W Rm, Rn */
|
| nkeynes@387 | 560 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 561 | sh4_stats[I_MULUW]++;
|
| nkeynes@387 | 562 | }
|
| nkeynes@387 | 563 | break;
|
| nkeynes@387 | 564 | case 0xF:
|
| nkeynes@387 | 565 | { /* MULS.W Rm, Rn */
|
| nkeynes@387 | 566 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 567 | sh4_stats[I_MULSW]++;
|
| nkeynes@387 | 568 | }
|
| nkeynes@387 | 569 | break;
|
| nkeynes@387 | 570 | default:
|
| nkeynes@387 | 571 | UNDEF();
|
| nkeynes@387 | 572 | break;
|
| nkeynes@387 | 573 | }
|
| nkeynes@387 | 574 | break;
|
| nkeynes@387 | 575 | case 0x3:
|
| nkeynes@387 | 576 | switch( ir&0xF ) {
|
| nkeynes@387 | 577 | case 0x0:
|
| nkeynes@387 | 578 | { /* CMP/EQ Rm, Rn */
|
| nkeynes@387 | 579 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 580 | sh4_stats[I_CMPEQ]++;
|
| nkeynes@387 | 581 | }
|
| nkeynes@387 | 582 | break;
|
| nkeynes@387 | 583 | case 0x2:
|
| nkeynes@387 | 584 | { /* CMP/HS Rm, Rn */
|
| nkeynes@387 | 585 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 586 | sh4_stats[I_CMPHS]++;
|
| nkeynes@387 | 587 | }
|
| nkeynes@387 | 588 | break;
|
| nkeynes@387 | 589 | case 0x3:
|
| nkeynes@387 | 590 | { /* CMP/GE Rm, Rn */
|
| nkeynes@387 | 591 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 592 | sh4_stats[I_CMPGE]++;
|
| nkeynes@387 | 593 | }
|
| nkeynes@387 | 594 | break;
|
| nkeynes@387 | 595 | case 0x4:
|
| nkeynes@387 | 596 | { /* DIV1 Rm, Rn */
|
| nkeynes@387 | 597 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 598 | sh4_stats[I_DIV1]++;
|
| nkeynes@387 | 599 | }
|
| nkeynes@387 | 600 | break;
|
| nkeynes@387 | 601 | case 0x5:
|
| nkeynes@387 | 602 | { /* DMULU.L Rm, Rn */
|
| nkeynes@387 | 603 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 604 | sh4_stats[I_DMULU]++;
|
| nkeynes@387 | 605 | }
|
| nkeynes@387 | 606 | break;
|
| nkeynes@387 | 607 | case 0x6:
|
| nkeynes@387 | 608 | { /* CMP/HI Rm, Rn */
|
| nkeynes@387 | 609 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 610 | sh4_stats[I_CMPHI]++;
|
| nkeynes@387 | 611 | }
|
| nkeynes@387 | 612 | break;
|
| nkeynes@387 | 613 | case 0x7:
|
| nkeynes@387 | 614 | { /* CMP/GT Rm, Rn */
|
| nkeynes@387 | 615 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 616 | sh4_stats[I_CMPGT]++;
|
| nkeynes@387 | 617 | }
|
| nkeynes@387 | 618 | break;
|
| nkeynes@387 | 619 | case 0x8:
|
| nkeynes@387 | 620 | { /* SUB Rm, Rn */
|
| nkeynes@387 | 621 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 622 | sh4_stats[I_SUB]++;
|
| nkeynes@387 | 623 | }
|
| nkeynes@387 | 624 | break;
|
| nkeynes@387 | 625 | case 0xA:
|
| nkeynes@387 | 626 | { /* SUBC Rm, Rn */
|
| nkeynes@387 | 627 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 628 | sh4_stats[I_SUBC]++;
|
| nkeynes@387 | 629 | }
|
| nkeynes@387 | 630 | break;
|
| nkeynes@387 | 631 | case 0xB:
|
| nkeynes@387 | 632 | { /* SUBV Rm, Rn */
|
| nkeynes@387 | 633 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 634 | sh4_stats[I_SUBV]++;
|
| nkeynes@387 | 635 | }
|
| nkeynes@387 | 636 | break;
|
| nkeynes@387 | 637 | case 0xC:
|
| nkeynes@387 | 638 | { /* ADD Rm, Rn */
|
| nkeynes@387 | 639 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 640 | sh4_stats[I_ADD]++;
|
| nkeynes@387 | 641 | }
|
| nkeynes@387 | 642 | break;
|
| nkeynes@387 | 643 | case 0xD:
|
| nkeynes@387 | 644 | { /* DMULS.L Rm, Rn */
|
| nkeynes@387 | 645 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 646 | sh4_stats[I_DMULS]++;
|
| nkeynes@387 | 647 | }
|
| nkeynes@387 | 648 | break;
|
| nkeynes@387 | 649 | case 0xE:
|
| nkeynes@387 | 650 | { /* ADDC Rm, Rn */
|
| nkeynes@387 | 651 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 652 | sh4_stats[I_ADDC]++;
|
| nkeynes@387 | 653 | }
|
| nkeynes@387 | 654 | break;
|
| nkeynes@387 | 655 | case 0xF:
|
| nkeynes@387 | 656 | { /* ADDV Rm, Rn */
|
| nkeynes@387 | 657 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 658 | sh4_stats[I_ADDV]++;
|
| nkeynes@387 | 659 | }
|
| nkeynes@387 | 660 | break;
|
| nkeynes@387 | 661 | default:
|
| nkeynes@387 | 662 | UNDEF();
|
| nkeynes@387 | 663 | break;
|
| nkeynes@387 | 664 | }
|
| nkeynes@387 | 665 | break;
|
| nkeynes@387 | 666 | case 0x4:
|
| nkeynes@387 | 667 | switch( ir&0xF ) {
|
| nkeynes@387 | 668 | case 0x0:
|
| nkeynes@387 | 669 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 670 | case 0x0:
|
| nkeynes@387 | 671 | { /* SHLL Rn */
|
| nkeynes@387 | 672 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 673 | sh4_stats[I_SHLL]++;
|
| nkeynes@387 | 674 | }
|
| nkeynes@387 | 675 | break;
|
| nkeynes@387 | 676 | case 0x1:
|
| nkeynes@387 | 677 | { /* DT Rn */
|
| nkeynes@387 | 678 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 679 | sh4_stats[I_DT]++;
|
| nkeynes@387 | 680 | }
|
| nkeynes@387 | 681 | break;
|
| nkeynes@387 | 682 | case 0x2:
|
| nkeynes@387 | 683 | { /* SHAL Rn */
|
| nkeynes@387 | 684 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 685 | sh4_stats[I_SHAL]++;
|
| nkeynes@387 | 686 | }
|
| nkeynes@387 | 687 | break;
|
| nkeynes@387 | 688 | default:
|
| nkeynes@387 | 689 | UNDEF();
|
| nkeynes@387 | 690 | break;
|
| nkeynes@387 | 691 | }
|
| nkeynes@387 | 692 | break;
|
| nkeynes@387 | 693 | case 0x1:
|
| nkeynes@387 | 694 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 695 | case 0x0:
|
| nkeynes@387 | 696 | { /* SHLR Rn */
|
| nkeynes@387 | 697 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 698 | sh4_stats[I_SHLR]++;
|
| nkeynes@387 | 699 | }
|
| nkeynes@387 | 700 | break;
|
| nkeynes@387 | 701 | case 0x1:
|
| nkeynes@387 | 702 | { /* CMP/PZ Rn */
|
| nkeynes@387 | 703 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 704 | sh4_stats[I_CMPPZ]++;
|
| nkeynes@387 | 705 | }
|
| nkeynes@387 | 706 | break;
|
| nkeynes@387 | 707 | case 0x2:
|
| nkeynes@387 | 708 | { /* SHAR Rn */
|
| nkeynes@387 | 709 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 710 | sh4_stats[I_SHAR]++;
|
| nkeynes@387 | 711 | }
|
| nkeynes@387 | 712 | break;
|
| nkeynes@387 | 713 | default:
|
| nkeynes@387 | 714 | UNDEF();
|
| nkeynes@387 | 715 | break;
|
| nkeynes@387 | 716 | }
|
| nkeynes@387 | 717 | break;
|
| nkeynes@387 | 718 | case 0x2:
|
| nkeynes@387 | 719 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 720 | case 0x0:
|
| nkeynes@387 | 721 | { /* STS.L MACH, @-Rn */
|
| nkeynes@387 | 722 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 723 | sh4_stats[I_STSM]++;
|
| nkeynes@387 | 724 | }
|
| nkeynes@387 | 725 | break;
|
| nkeynes@387 | 726 | case 0x1:
|
| nkeynes@387 | 727 | { /* STS.L MACL, @-Rn */
|
| nkeynes@387 | 728 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 729 | sh4_stats[I_STSM]++;
|
| nkeynes@387 | 730 | }
|
| nkeynes@387 | 731 | break;
|
| nkeynes@387 | 732 | case 0x2:
|
| nkeynes@387 | 733 | { /* STS.L PR, @-Rn */
|
| nkeynes@387 | 734 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 735 | sh4_stats[I_STSM]++;
|
| nkeynes@387 | 736 | }
|
| nkeynes@387 | 737 | break;
|
| nkeynes@387 | 738 | case 0x3:
|
| nkeynes@387 | 739 | { /* STC.L SGR, @-Rn */
|
| nkeynes@387 | 740 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 741 | sh4_stats[I_STCM]++;
|
| nkeynes@387 | 742 | }
|
| nkeynes@387 | 743 | break;
|
| nkeynes@387 | 744 | case 0x5:
|
| nkeynes@387 | 745 | { /* STS.L FPUL, @-Rn */
|
| nkeynes@387 | 746 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 747 | sh4_stats[I_STSM]++;
|
| nkeynes@387 | 748 | }
|
| nkeynes@387 | 749 | break;
|
| nkeynes@387 | 750 | case 0x6:
|
| nkeynes@387 | 751 | { /* STS.L FPSCR, @-Rn */
|
| nkeynes@387 | 752 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 753 | sh4_stats[I_STSM]++;
|
| nkeynes@387 | 754 | }
|
| nkeynes@387 | 755 | break;
|
| nkeynes@387 | 756 | case 0xF:
|
| nkeynes@387 | 757 | { /* STC.L DBR, @-Rn */
|
| nkeynes@387 | 758 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 759 | sh4_stats[I_STCM]++;
|
| nkeynes@387 | 760 | }
|
| nkeynes@387 | 761 | break;
|
| nkeynes@387 | 762 | default:
|
| nkeynes@387 | 763 | UNDEF();
|
| nkeynes@387 | 764 | break;
|
| nkeynes@387 | 765 | }
|
| nkeynes@387 | 766 | break;
|
| nkeynes@387 | 767 | case 0x3:
|
| nkeynes@387 | 768 | switch( (ir&0x80) >> 7 ) {
|
| nkeynes@387 | 769 | case 0x0:
|
| nkeynes@387 | 770 | switch( (ir&0x70) >> 4 ) {
|
| nkeynes@387 | 771 | case 0x0:
|
| nkeynes@387 | 772 | { /* STC.L SR, @-Rn */
|
| nkeynes@387 | 773 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 774 | sh4_stats[I_STCSRM]++;
|
| nkeynes@387 | 775 | }
|
| nkeynes@387 | 776 | break;
|
| nkeynes@387 | 777 | case 0x1:
|
| nkeynes@387 | 778 | { /* STC.L GBR, @-Rn */
|
| nkeynes@387 | 779 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 780 | sh4_stats[I_STCM]++;
|
| nkeynes@387 | 781 | }
|
| nkeynes@387 | 782 | break;
|
| nkeynes@387 | 783 | case 0x2:
|
| nkeynes@387 | 784 | { /* STC.L VBR, @-Rn */
|
| nkeynes@387 | 785 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 786 | sh4_stats[I_STCM]++;
|
| nkeynes@387 | 787 | }
|
| nkeynes@387 | 788 | break;
|
| nkeynes@387 | 789 | case 0x3:
|
| nkeynes@387 | 790 | { /* STC.L SSR, @-Rn */
|
| nkeynes@387 | 791 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 792 | sh4_stats[I_STCM]++;
|
| nkeynes@387 | 793 | }
|
| nkeynes@387 | 794 | break;
|
| nkeynes@387 | 795 | case 0x4:
|
| nkeynes@387 | 796 | { /* STC.L SPC, @-Rn */
|
| nkeynes@387 | 797 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 798 | sh4_stats[I_STCM]++;
|
| nkeynes@387 | 799 | }
|
| nkeynes@387 | 800 | break;
|
| nkeynes@387 | 801 | default:
|
| nkeynes@387 | 802 | UNDEF();
|
| nkeynes@387 | 803 | break;
|
| nkeynes@387 | 804 | }
|
| nkeynes@387 | 805 | break;
|
| nkeynes@387 | 806 | case 0x1:
|
| nkeynes@387 | 807 | { /* STC.L Rm_BANK, @-Rn */
|
| nkeynes@387 | 808 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
|
| nkeynes@387 | 809 | sh4_stats[I_STCM]++;
|
| nkeynes@387 | 810 | }
|
| nkeynes@387 | 811 | break;
|
| nkeynes@387 | 812 | }
|
| nkeynes@387 | 813 | break;
|
| nkeynes@387 | 814 | case 0x4:
|
| nkeynes@387 | 815 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 816 | case 0x0:
|
| nkeynes@387 | 817 | { /* ROTL Rn */
|
| nkeynes@387 | 818 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 819 | sh4_stats[I_ROTL]++;
|
| nkeynes@387 | 820 | }
|
| nkeynes@387 | 821 | break;
|
| nkeynes@387 | 822 | case 0x2:
|
| nkeynes@387 | 823 | { /* ROTCL Rn */
|
| nkeynes@387 | 824 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 825 | sh4_stats[I_ROTCL]++;
|
| nkeynes@387 | 826 | }
|
| nkeynes@387 | 827 | break;
|
| nkeynes@387 | 828 | default:
|
| nkeynes@387 | 829 | UNDEF();
|
| nkeynes@387 | 830 | break;
|
| nkeynes@387 | 831 | }
|
| nkeynes@387 | 832 | break;
|
| nkeynes@387 | 833 | case 0x5:
|
| nkeynes@387 | 834 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 835 | case 0x0:
|
| nkeynes@387 | 836 | { /* ROTR Rn */
|
| nkeynes@387 | 837 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 838 | sh4_stats[I_ROTR]++;
|
| nkeynes@387 | 839 | }
|
| nkeynes@387 | 840 | break;
|
| nkeynes@387 | 841 | case 0x1:
|
| nkeynes@387 | 842 | { /* CMP/PL Rn */
|
| nkeynes@387 | 843 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 844 | sh4_stats[I_CMPPL]++;
|
| nkeynes@387 | 845 | }
|
| nkeynes@387 | 846 | break;
|
| nkeynes@387 | 847 | case 0x2:
|
| nkeynes@387 | 848 | { /* ROTCR Rn */
|
| nkeynes@387 | 849 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 850 | sh4_stats[I_ROTCR]++;
|
| nkeynes@387 | 851 | }
|
| nkeynes@387 | 852 | break;
|
| nkeynes@387 | 853 | default:
|
| nkeynes@387 | 854 | UNDEF();
|
| nkeynes@387 | 855 | break;
|
| nkeynes@387 | 856 | }
|
| nkeynes@387 | 857 | break;
|
| nkeynes@387 | 858 | case 0x6:
|
| nkeynes@387 | 859 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 860 | case 0x0:
|
| nkeynes@387 | 861 | { /* LDS.L @Rm+, MACH */
|
| nkeynes@387 | 862 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 863 | sh4_stats[I_LDSM]++;
|
| nkeynes@387 | 864 | }
|
| nkeynes@387 | 865 | break;
|
| nkeynes@387 | 866 | case 0x1:
|
| nkeynes@387 | 867 | { /* LDS.L @Rm+, MACL */
|
| nkeynes@387 | 868 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 869 | sh4_stats[I_LDSM]++;
|
| nkeynes@387 | 870 | }
|
| nkeynes@387 | 871 | break;
|
| nkeynes@387 | 872 | case 0x2:
|
| nkeynes@387 | 873 | { /* LDS.L @Rm+, PR */
|
| nkeynes@387 | 874 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 875 | sh4_stats[I_LDSM]++;
|
| nkeynes@387 | 876 | }
|
| nkeynes@387 | 877 | break;
|
| nkeynes@387 | 878 | case 0x3:
|
| nkeynes@387 | 879 | { /* LDC.L @Rm+, SGR */
|
| nkeynes@387 | 880 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 881 | sh4_stats[I_LDCM]++;
|
| nkeynes@387 | 882 | }
|
| nkeynes@387 | 883 | break;
|
| nkeynes@387 | 884 | case 0x5:
|
| nkeynes@387 | 885 | { /* LDS.L @Rm+, FPUL */
|
| nkeynes@387 | 886 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 887 | sh4_stats[I_LDSM]++;
|
| nkeynes@387 | 888 | }
|
| nkeynes@387 | 889 | break;
|
| nkeynes@387 | 890 | case 0x6:
|
| nkeynes@387 | 891 | { /* LDS.L @Rm+, FPSCR */
|
| nkeynes@387 | 892 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 893 | sh4_stats[I_LDSM]++;
|
| nkeynes@387 | 894 | }
|
| nkeynes@387 | 895 | break;
|
| nkeynes@387 | 896 | case 0xF:
|
| nkeynes@387 | 897 | { /* LDC.L @Rm+, DBR */
|
| nkeynes@387 | 898 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 899 | sh4_stats[I_LDCM]++;
|
| nkeynes@387 | 900 | }
|
| nkeynes@387 | 901 | break;
|
| nkeynes@387 | 902 | default:
|
| nkeynes@387 | 903 | UNDEF();
|
| nkeynes@387 | 904 | break;
|
| nkeynes@387 | 905 | }
|
| nkeynes@387 | 906 | break;
|
| nkeynes@387 | 907 | case 0x7:
|
| nkeynes@387 | 908 | switch( (ir&0x80) >> 7 ) {
|
| nkeynes@387 | 909 | case 0x0:
|
| nkeynes@387 | 910 | switch( (ir&0x70) >> 4 ) {
|
| nkeynes@387 | 911 | case 0x0:
|
| nkeynes@387 | 912 | { /* LDC.L @Rm+, SR */
|
| nkeynes@387 | 913 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 914 | sh4_stats[I_LDCSRM]++;
|
| nkeynes@387 | 915 | }
|
| nkeynes@387 | 916 | break;
|
| nkeynes@387 | 917 | case 0x1:
|
| nkeynes@387 | 918 | { /* LDC.L @Rm+, GBR */
|
| nkeynes@387 | 919 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 920 | sh4_stats[I_LDCM]++;
|
| nkeynes@387 | 921 | }
|
| nkeynes@387 | 922 | break;
|
| nkeynes@387 | 923 | case 0x2:
|
| nkeynes@387 | 924 | { /* LDC.L @Rm+, VBR */
|
| nkeynes@387 | 925 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 926 | sh4_stats[I_LDCM]++;
|
| nkeynes@387 | 927 | }
|
| nkeynes@387 | 928 | break;
|
| nkeynes@387 | 929 | case 0x3:
|
| nkeynes@387 | 930 | { /* LDC.L @Rm+, SSR */
|
| nkeynes@387 | 931 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 932 | sh4_stats[I_LDCM]++;
|
| nkeynes@387 | 933 | }
|
| nkeynes@387 | 934 | break;
|
| nkeynes@387 | 935 | case 0x4:
|
| nkeynes@387 | 936 | { /* LDC.L @Rm+, SPC */
|
| nkeynes@387 | 937 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 938 | sh4_stats[I_LDCM]++;
|
| nkeynes@387 | 939 | }
|
| nkeynes@387 | 940 | break;
|
| nkeynes@387 | 941 | default:
|
| nkeynes@387 | 942 | UNDEF();
|
| nkeynes@387 | 943 | break;
|
| nkeynes@387 | 944 | }
|
| nkeynes@387 | 945 | break;
|
| nkeynes@387 | 946 | case 0x1:
|
| nkeynes@387 | 947 | { /* LDC.L @Rm+, Rn_BANK */
|
| nkeynes@387 | 948 | uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
|
| nkeynes@387 | 949 | sh4_stats[I_LDCM]++;
|
| nkeynes@387 | 950 | }
|
| nkeynes@387 | 951 | break;
|
| nkeynes@387 | 952 | }
|
| nkeynes@387 | 953 | break;
|
| nkeynes@387 | 954 | case 0x8:
|
| nkeynes@387 | 955 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 956 | case 0x0:
|
| nkeynes@387 | 957 | { /* SHLL2 Rn */
|
| nkeynes@387 | 958 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 959 | sh4_stats[I_SHLL]++;
|
| nkeynes@387 | 960 | }
|
| nkeynes@387 | 961 | break;
|
| nkeynes@387 | 962 | case 0x1:
|
| nkeynes@387 | 963 | { /* SHLL8 Rn */
|
| nkeynes@387 | 964 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 965 | sh4_stats[I_SHLL]++;
|
| nkeynes@387 | 966 | }
|
| nkeynes@387 | 967 | break;
|
| nkeynes@387 | 968 | case 0x2:
|
| nkeynes@387 | 969 | { /* SHLL16 Rn */
|
| nkeynes@387 | 970 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 971 | sh4_stats[I_SHLL]++;
|
| nkeynes@387 | 972 | }
|
| nkeynes@387 | 973 | break;
|
| nkeynes@387 | 974 | default:
|
| nkeynes@387 | 975 | UNDEF();
|
| nkeynes@387 | 976 | break;
|
| nkeynes@387 | 977 | }
|
| nkeynes@387 | 978 | break;
|
| nkeynes@387 | 979 | case 0x9:
|
| nkeynes@387 | 980 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 981 | case 0x0:
|
| nkeynes@387 | 982 | { /* SHLR2 Rn */
|
| nkeynes@387 | 983 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 984 | sh4_stats[I_SHLR]++;
|
| nkeynes@387 | 985 | }
|
| nkeynes@387 | 986 | break;
|
| nkeynes@387 | 987 | case 0x1:
|
| nkeynes@387 | 988 | { /* SHLR8 Rn */
|
| nkeynes@387 | 989 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 990 | sh4_stats[I_SHLR]++;
|
| nkeynes@387 | 991 | }
|
| nkeynes@387 | 992 | break;
|
| nkeynes@387 | 993 | case 0x2:
|
| nkeynes@387 | 994 | { /* SHLR16 Rn */
|
| nkeynes@387 | 995 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 996 | sh4_stats[I_SHLR]++;
|
| nkeynes@387 | 997 | }
|
| nkeynes@387 | 998 | break;
|
| nkeynes@387 | 999 | default:
|
| nkeynes@387 | 1000 | UNDEF();
|
| nkeynes@387 | 1001 | break;
|
| nkeynes@387 | 1002 | }
|
| nkeynes@387 | 1003 | break;
|
| nkeynes@387 | 1004 | case 0xA:
|
| nkeynes@387 | 1005 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 1006 | case 0x0:
|
| nkeynes@387 | 1007 | { /* LDS Rm, MACH */
|
| nkeynes@387 | 1008 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1009 | sh4_stats[I_LDS]++;
|
| nkeynes@387 | 1010 | }
|
| nkeynes@387 | 1011 | break;
|
| nkeynes@387 | 1012 | case 0x1:
|
| nkeynes@387 | 1013 | { /* LDS Rm, MACL */
|
| nkeynes@387 | 1014 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1015 | sh4_stats[I_LDS]++;
|
| nkeynes@387 | 1016 | }
|
| nkeynes@387 | 1017 | break;
|
| nkeynes@387 | 1018 | case 0x2:
|
| nkeynes@387 | 1019 | { /* LDS Rm, PR */
|
| nkeynes@387 | 1020 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1021 | sh4_stats[I_LDS]++;
|
| nkeynes@387 | 1022 | }
|
| nkeynes@387 | 1023 | break;
|
| nkeynes@387 | 1024 | case 0x3:
|
| nkeynes@387 | 1025 | { /* LDC Rm, SGR */
|
| nkeynes@387 | 1026 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1027 | sh4_stats[I_LDC]++;
|
| nkeynes@387 | 1028 | }
|
| nkeynes@387 | 1029 | break;
|
| nkeynes@387 | 1030 | case 0x5:
|
| nkeynes@387 | 1031 | { /* LDS Rm, FPUL */
|
| nkeynes@387 | 1032 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1033 | sh4_stats[I_LDS]++;
|
| nkeynes@387 | 1034 | }
|
| nkeynes@387 | 1035 | break;
|
| nkeynes@387 | 1036 | case 0x6:
|
| nkeynes@387 | 1037 | { /* LDS Rm, FPSCR */
|
| nkeynes@387 | 1038 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1039 | sh4_stats[I_LDS]++;
|
| nkeynes@387 | 1040 | }
|
| nkeynes@387 | 1041 | break;
|
| nkeynes@387 | 1042 | case 0xF:
|
| nkeynes@387 | 1043 | { /* LDC Rm, DBR */
|
| nkeynes@387 | 1044 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1045 | sh4_stats[I_LDC]++;
|
| nkeynes@387 | 1046 | }
|
| nkeynes@387 | 1047 | break;
|
| nkeynes@387 | 1048 | default:
|
| nkeynes@387 | 1049 | UNDEF();
|
| nkeynes@387 | 1050 | break;
|
| nkeynes@387 | 1051 | }
|
| nkeynes@387 | 1052 | break;
|
| nkeynes@387 | 1053 | case 0xB:
|
| nkeynes@387 | 1054 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 1055 | case 0x0:
|
| nkeynes@387 | 1056 | { /* JSR @Rn */
|
| nkeynes@387 | 1057 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1058 | sh4_stats[I_JSR]++;
|
| nkeynes@387 | 1059 | }
|
| nkeynes@387 | 1060 | break;
|
| nkeynes@387 | 1061 | case 0x1:
|
| nkeynes@387 | 1062 | { /* TAS.B @Rn */
|
| nkeynes@387 | 1063 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1064 | sh4_stats[I_TASB]++;
|
| nkeynes@387 | 1065 | }
|
| nkeynes@387 | 1066 | break;
|
| nkeynes@387 | 1067 | case 0x2:
|
| nkeynes@387 | 1068 | { /* JMP @Rn */
|
| nkeynes@387 | 1069 | uint32_t Rn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1070 | sh4_stats[I_JMP]++;
|
| nkeynes@387 | 1071 | }
|
| nkeynes@387 | 1072 | break;
|
| nkeynes@387 | 1073 | default:
|
| nkeynes@387 | 1074 | UNDEF();
|
| nkeynes@387 | 1075 | break;
|
| nkeynes@387 | 1076 | }
|
| nkeynes@387 | 1077 | break;
|
| nkeynes@387 | 1078 | case 0xC:
|
| nkeynes@387 | 1079 | { /* SHAD Rm, Rn */
|
| nkeynes@387 | 1080 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1081 | sh4_stats[I_SHAD]++;
|
| nkeynes@387 | 1082 | }
|
| nkeynes@387 | 1083 | break;
|
| nkeynes@387 | 1084 | case 0xD:
|
| nkeynes@387 | 1085 | { /* SHLD Rm, Rn */
|
| nkeynes@387 | 1086 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1087 | sh4_stats[I_SHLD]++;
|
| nkeynes@387 | 1088 | }
|
| nkeynes@387 | 1089 | break;
|
| nkeynes@387 | 1090 | case 0xE:
|
| nkeynes@387 | 1091 | switch( (ir&0x80) >> 7 ) {
|
| nkeynes@387 | 1092 | case 0x0:
|
| nkeynes@387 | 1093 | switch( (ir&0x70) >> 4 ) {
|
| nkeynes@387 | 1094 | case 0x0:
|
| nkeynes@387 | 1095 | { /* LDC Rm, SR */
|
| nkeynes@387 | 1096 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1097 | sh4_stats[I_LDCSR]++;
|
| nkeynes@387 | 1098 | }
|
| nkeynes@387 | 1099 | break;
|
| nkeynes@387 | 1100 | case 0x1:
|
| nkeynes@387 | 1101 | { /* LDC Rm, GBR */
|
| nkeynes@387 | 1102 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1103 | sh4_stats[I_LDC]++;
|
| nkeynes@387 | 1104 | }
|
| nkeynes@387 | 1105 | break;
|
| nkeynes@387 | 1106 | case 0x2:
|
| nkeynes@387 | 1107 | { /* LDC Rm, VBR */
|
| nkeynes@387 | 1108 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1109 | sh4_stats[I_LDC]++;
|
| nkeynes@387 | 1110 | }
|
| nkeynes@387 | 1111 | break;
|
| nkeynes@387 | 1112 | case 0x3:
|
| nkeynes@387 | 1113 | { /* LDC Rm, SSR */
|
| nkeynes@387 | 1114 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1115 | sh4_stats[I_LDC]++;
|
| nkeynes@387 | 1116 | }
|
| nkeynes@387 | 1117 | break;
|
| nkeynes@387 | 1118 | case 0x4:
|
| nkeynes@387 | 1119 | { /* LDC Rm, SPC */
|
| nkeynes@387 | 1120 | uint32_t Rm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1121 | sh4_stats[I_LDC]++;
|
| nkeynes@387 | 1122 | }
|
| nkeynes@387 | 1123 | break;
|
| nkeynes@387 | 1124 | default:
|
| nkeynes@387 | 1125 | UNDEF();
|
| nkeynes@387 | 1126 | break;
|
| nkeynes@387 | 1127 | }
|
| nkeynes@387 | 1128 | break;
|
| nkeynes@387 | 1129 | case 0x1:
|
| nkeynes@387 | 1130 | { /* LDC Rm, Rn_BANK */
|
| nkeynes@387 | 1131 | uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
|
| nkeynes@387 | 1132 | sh4_stats[I_LDC]++;
|
| nkeynes@387 | 1133 | }
|
| nkeynes@387 | 1134 | break;
|
| nkeynes@387 | 1135 | }
|
| nkeynes@387 | 1136 | break;
|
| nkeynes@387 | 1137 | case 0xF:
|
| nkeynes@387 | 1138 | { /* MAC.W @Rm+, @Rn+ */
|
| nkeynes@387 | 1139 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1140 | sh4_stats[I_MACW]++;
|
| nkeynes@387 | 1141 | }
|
| nkeynes@387 | 1142 | break;
|
| nkeynes@387 | 1143 | }
|
| nkeynes@387 | 1144 | break;
|
| nkeynes@387 | 1145 | case 0x5:
|
| nkeynes@387 | 1146 | { /* MOV.L @(disp, Rm), Rn */
|
| nkeynes@387 | 1147 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
|
| nkeynes@387 | 1148 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 1149 | }
|
| nkeynes@387 | 1150 | break;
|
| nkeynes@387 | 1151 | case 0x6:
|
| nkeynes@387 | 1152 | switch( ir&0xF ) {
|
| nkeynes@387 | 1153 | case 0x0:
|
| nkeynes@387 | 1154 | { /* MOV.B @Rm, Rn */
|
| nkeynes@387 | 1155 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1156 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 1157 | }
|
| nkeynes@387 | 1158 | break;
|
| nkeynes@387 | 1159 | case 0x1:
|
| nkeynes@387 | 1160 | { /* MOV.W @Rm, Rn */
|
| nkeynes@387 | 1161 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1162 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 1163 | }
|
| nkeynes@387 | 1164 | break;
|
| nkeynes@387 | 1165 | case 0x2:
|
| nkeynes@387 | 1166 | { /* MOV.L @Rm, Rn */
|
| nkeynes@387 | 1167 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1168 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 1169 | }
|
| nkeynes@387 | 1170 | break;
|
| nkeynes@387 | 1171 | case 0x3:
|
| nkeynes@387 | 1172 | { /* MOV Rm, Rn */
|
| nkeynes@387 | 1173 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1174 | sh4_stats[I_MOV]++;
|
| nkeynes@387 | 1175 | }
|
| nkeynes@387 | 1176 | break;
|
| nkeynes@387 | 1177 | case 0x4:
|
| nkeynes@387 | 1178 | { /* MOV.B @Rm+, Rn */
|
| nkeynes@387 | 1179 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1180 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 1181 | }
|
| nkeynes@387 | 1182 | break;
|
| nkeynes@387 | 1183 | case 0x5:
|
| nkeynes@387 | 1184 | { /* MOV.W @Rm+, Rn */
|
| nkeynes@387 | 1185 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1186 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 1187 | }
|
| nkeynes@387 | 1188 | break;
|
| nkeynes@387 | 1189 | case 0x6:
|
| nkeynes@387 | 1190 | { /* MOV.L @Rm+, Rn */
|
| nkeynes@387 | 1191 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1192 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 1193 | }
|
| nkeynes@387 | 1194 | break;
|
| nkeynes@387 | 1195 | case 0x7:
|
| nkeynes@387 | 1196 | { /* NOT Rm, Rn */
|
| nkeynes@387 | 1197 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1198 | sh4_stats[I_NOT]++;
|
| nkeynes@387 | 1199 | }
|
| nkeynes@387 | 1200 | break;
|
| nkeynes@387 | 1201 | case 0x8:
|
| nkeynes@387 | 1202 | { /* SWAP.B Rm, Rn */
|
| nkeynes@387 | 1203 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1204 | sh4_stats[I_SWAPB]++;
|
| nkeynes@387 | 1205 | }
|
| nkeynes@387 | 1206 | break;
|
| nkeynes@387 | 1207 | case 0x9:
|
| nkeynes@387 | 1208 | { /* SWAP.W Rm, Rn */
|
| nkeynes@387 | 1209 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1210 | sh4_stats[I_SWAPW]++;
|
| nkeynes@387 | 1211 | }
|
| nkeynes@387 | 1212 | break;
|
| nkeynes@387 | 1213 | case 0xA:
|
| nkeynes@387 | 1214 | { /* NEGC Rm, Rn */
|
| nkeynes@387 | 1215 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1216 | sh4_stats[I_NEGC]++;
|
| nkeynes@387 | 1217 | }
|
| nkeynes@387 | 1218 | break;
|
| nkeynes@387 | 1219 | case 0xB:
|
| nkeynes@387 | 1220 | { /* NEG Rm, Rn */
|
| nkeynes@387 | 1221 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1222 | sh4_stats[I_NEG]++;
|
| nkeynes@387 | 1223 | }
|
| nkeynes@387 | 1224 | break;
|
| nkeynes@387 | 1225 | case 0xC:
|
| nkeynes@387 | 1226 | { /* EXTU.B Rm, Rn */
|
| nkeynes@387 | 1227 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1228 | sh4_stats[I_EXTUB]++;
|
| nkeynes@387 | 1229 | }
|
| nkeynes@387 | 1230 | break;
|
| nkeynes@387 | 1231 | case 0xD:
|
| nkeynes@387 | 1232 | { /* EXTU.W Rm, Rn */
|
| nkeynes@387 | 1233 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1234 | sh4_stats[I_EXTUW]++;
|
| nkeynes@387 | 1235 | }
|
| nkeynes@387 | 1236 | break;
|
| nkeynes@387 | 1237 | case 0xE:
|
| nkeynes@387 | 1238 | { /* EXTS.B Rm, Rn */
|
| nkeynes@387 | 1239 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1240 | sh4_stats[I_EXTSB]++;
|
| nkeynes@387 | 1241 | }
|
| nkeynes@387 | 1242 | break;
|
| nkeynes@387 | 1243 | case 0xF:
|
| nkeynes@387 | 1244 | { /* EXTS.W Rm, Rn */
|
| nkeynes@387 | 1245 | uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1246 | sh4_stats[I_EXTSW]++;
|
| nkeynes@387 | 1247 | }
|
| nkeynes@387 | 1248 | break;
|
| nkeynes@387 | 1249 | }
|
| nkeynes@387 | 1250 | break;
|
| nkeynes@387 | 1251 | case 0x7:
|
| nkeynes@387 | 1252 | { /* ADD #imm, Rn */
|
| nkeynes@387 | 1253 | uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
|
| nkeynes@387 | 1254 | sh4_stats[I_ADDI]++;
|
| nkeynes@387 | 1255 | }
|
| nkeynes@387 | 1256 | break;
|
| nkeynes@387 | 1257 | case 0x8:
|
| nkeynes@387 | 1258 | switch( (ir&0xF00) >> 8 ) {
|
| nkeynes@387 | 1259 | case 0x0:
|
| nkeynes@387 | 1260 | { /* MOV.B R0, @(disp, Rn) */
|
| nkeynes@387 | 1261 | uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
|
| nkeynes@387 | 1262 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 1263 | }
|
| nkeynes@387 | 1264 | break;
|
| nkeynes@387 | 1265 | case 0x1:
|
| nkeynes@387 | 1266 | { /* MOV.W R0, @(disp, Rn) */
|
| nkeynes@387 | 1267 | uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
|
| nkeynes@387 | 1268 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 1269 | }
|
| nkeynes@387 | 1270 | break;
|
| nkeynes@387 | 1271 | case 0x4:
|
| nkeynes@387 | 1272 | { /* MOV.B @(disp, Rm), R0 */
|
| nkeynes@387 | 1273 | uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
|
| nkeynes@387 | 1274 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 1275 | }
|
| nkeynes@387 | 1276 | break;
|
| nkeynes@387 | 1277 | case 0x5:
|
| nkeynes@387 | 1278 | { /* MOV.W @(disp, Rm), R0 */
|
| nkeynes@387 | 1279 | uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
|
| nkeynes@387 | 1280 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 1281 | }
|
| nkeynes@387 | 1282 | break;
|
| nkeynes@387 | 1283 | case 0x8:
|
| nkeynes@387 | 1284 | { /* CMP/EQ #imm, R0 */
|
| nkeynes@387 | 1285 | int32_t imm = SIGNEXT8(ir&0xFF);
|
| nkeynes@387 | 1286 | sh4_stats[I_CMPEQI]++;
|
| nkeynes@387 | 1287 | }
|
| nkeynes@387 | 1288 | break;
|
| nkeynes@387 | 1289 | case 0x9:
|
| nkeynes@387 | 1290 | { /* BT disp */
|
| nkeynes@387 | 1291 | int32_t disp = SIGNEXT8(ir&0xFF)<<1;
|
| nkeynes@387 | 1292 | sh4_stats[I_BT]++;
|
| nkeynes@387 | 1293 | }
|
| nkeynes@387 | 1294 | break;
|
| nkeynes@387 | 1295 | case 0xB:
|
| nkeynes@387 | 1296 | { /* BF disp */
|
| nkeynes@387 | 1297 | int32_t disp = SIGNEXT8(ir&0xFF)<<1;
|
| nkeynes@387 | 1298 | sh4_stats[I_BF]++;
|
| nkeynes@387 | 1299 | }
|
| nkeynes@387 | 1300 | break;
|
| nkeynes@387 | 1301 | case 0xD:
|
| nkeynes@387 | 1302 | { /* BT/S disp */
|
| nkeynes@387 | 1303 | int32_t disp = SIGNEXT8(ir&0xFF)<<1;
|
| nkeynes@387 | 1304 | sh4_stats[I_BTS]++;
|
| nkeynes@387 | 1305 | }
|
| nkeynes@387 | 1306 | break;
|
| nkeynes@387 | 1307 | case 0xF:
|
| nkeynes@387 | 1308 | { /* BF/S disp */
|
| nkeynes@387 | 1309 | int32_t disp = SIGNEXT8(ir&0xFF)<<1;
|
| nkeynes@387 | 1310 | sh4_stats[I_BFS]++;
|
| nkeynes@387 | 1311 | }
|
| nkeynes@387 | 1312 | break;
|
| nkeynes@387 | 1313 | default:
|
| nkeynes@387 | 1314 | UNDEF();
|
| nkeynes@387 | 1315 | break;
|
| nkeynes@387 | 1316 | }
|
| nkeynes@387 | 1317 | break;
|
| nkeynes@387 | 1318 | case 0x9:
|
| nkeynes@387 | 1319 | { /* MOV.W @(disp, PC), Rn */
|
| nkeynes@387 | 1320 | uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1;
|
| nkeynes@387 | 1321 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 1322 | }
|
| nkeynes@387 | 1323 | break;
|
| nkeynes@387 | 1324 | case 0xA:
|
| nkeynes@387 | 1325 | { /* BRA disp */
|
| nkeynes@387 | 1326 | int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
|
| nkeynes@387 | 1327 | sh4_stats[I_BRA]++;
|
| nkeynes@387 | 1328 | }
|
| nkeynes@387 | 1329 | break;
|
| nkeynes@387 | 1330 | case 0xB:
|
| nkeynes@387 | 1331 | { /* BSR disp */
|
| nkeynes@387 | 1332 | int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
|
| nkeynes@387 | 1333 | sh4_stats[I_BSR]++;
|
| nkeynes@387 | 1334 | }
|
| nkeynes@387 | 1335 | break;
|
| nkeynes@387 | 1336 | case 0xC:
|
| nkeynes@387 | 1337 | switch( (ir&0xF00) >> 8 ) {
|
| nkeynes@387 | 1338 | case 0x0:
|
| nkeynes@387 | 1339 | { /* MOV.B R0, @(disp, GBR) */
|
| nkeynes@387 | 1340 | uint32_t disp = (ir&0xFF);
|
| nkeynes@387 | 1341 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 1342 | }
|
| nkeynes@387 | 1343 | break;
|
| nkeynes@387 | 1344 | case 0x1:
|
| nkeynes@387 | 1345 | { /* MOV.W R0, @(disp, GBR) */
|
| nkeynes@387 | 1346 | uint32_t disp = (ir&0xFF)<<1;
|
| nkeynes@387 | 1347 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 1348 | }
|
| nkeynes@387 | 1349 | break;
|
| nkeynes@387 | 1350 | case 0x2:
|
| nkeynes@387 | 1351 | { /* MOV.L R0, @(disp, GBR) */
|
| nkeynes@387 | 1352 | uint32_t disp = (ir&0xFF)<<2;
|
| nkeynes@387 | 1353 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 1354 | }
|
| nkeynes@387 | 1355 | break;
|
| nkeynes@387 | 1356 | case 0x3:
|
| nkeynes@387 | 1357 | { /* TRAPA #imm */
|
| nkeynes@387 | 1358 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1359 | sh4_stats[I_TRAPA]++;
|
| nkeynes@387 | 1360 | }
|
| nkeynes@387 | 1361 | break;
|
| nkeynes@387 | 1362 | case 0x4:
|
| nkeynes@387 | 1363 | { /* MOV.B @(disp, GBR), R0 */
|
| nkeynes@387 | 1364 | uint32_t disp = (ir&0xFF);
|
| nkeynes@387 | 1365 | sh4_stats[I_MOVB]++;
|
| nkeynes@387 | 1366 | }
|
| nkeynes@387 | 1367 | break;
|
| nkeynes@387 | 1368 | case 0x5:
|
| nkeynes@387 | 1369 | { /* MOV.W @(disp, GBR), R0 */
|
| nkeynes@387 | 1370 | uint32_t disp = (ir&0xFF)<<1;
|
| nkeynes@387 | 1371 | sh4_stats[I_MOVW]++;
|
| nkeynes@387 | 1372 | }
|
| nkeynes@387 | 1373 | break;
|
| nkeynes@387 | 1374 | case 0x6:
|
| nkeynes@387 | 1375 | { /* MOV.L @(disp, GBR), R0 */
|
| nkeynes@387 | 1376 | uint32_t disp = (ir&0xFF)<<2;
|
| nkeynes@387 | 1377 | sh4_stats[I_MOVL]++;
|
| nkeynes@387 | 1378 | }
|
| nkeynes@387 | 1379 | break;
|
| nkeynes@387 | 1380 | case 0x7:
|
| nkeynes@387 | 1381 | { /* MOVA @(disp, PC), R0 */
|
| nkeynes@387 | 1382 | uint32_t disp = (ir&0xFF)<<2;
|
| nkeynes@387 | 1383 | sh4_stats[I_MOVA]++;
|
| nkeynes@387 | 1384 | }
|
| nkeynes@387 | 1385 | break;
|
| nkeynes@387 | 1386 | case 0x8:
|
| nkeynes@387 | 1387 | { /* TST #imm, R0 */
|
| nkeynes@387 | 1388 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1389 | sh4_stats[I_TSTI]++;
|
| nkeynes@387 | 1390 | }
|
| nkeynes@387 | 1391 | break;
|
| nkeynes@387 | 1392 | case 0x9:
|
| nkeynes@387 | 1393 | { /* AND #imm, R0 */
|
| nkeynes@387 | 1394 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1395 | sh4_stats[I_ANDI]++;
|
| nkeynes@387 | 1396 | }
|
| nkeynes@387 | 1397 | break;
|
| nkeynes@387 | 1398 | case 0xA:
|
| nkeynes@387 | 1399 | { /* XOR #imm, R0 */
|
| nkeynes@387 | 1400 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1401 | sh4_stats[I_XORI]++;
|
| nkeynes@387 | 1402 | }
|
| nkeynes@387 | 1403 | break;
|
| nkeynes@387 | 1404 | case 0xB:
|
| nkeynes@387 | 1405 | { /* OR #imm, R0 */
|
| nkeynes@387 | 1406 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1407 | sh4_stats[I_ORI]++;
|
| nkeynes@387 | 1408 | }
|
| nkeynes@387 | 1409 | break;
|
| nkeynes@387 | 1410 | case 0xC:
|
| nkeynes@387 | 1411 | { /* TST.B #imm, @(R0, GBR) */
|
| nkeynes@387 | 1412 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1413 | sh4_stats[I_TSTB]++;
|
| nkeynes@387 | 1414 | }
|
| nkeynes@387 | 1415 | break;
|
| nkeynes@387 | 1416 | case 0xD:
|
| nkeynes@387 | 1417 | { /* AND.B #imm, @(R0, GBR) */
|
| nkeynes@387 | 1418 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1419 | sh4_stats[I_ANDB]++;
|
| nkeynes@387 | 1420 | }
|
| nkeynes@387 | 1421 | break;
|
| nkeynes@387 | 1422 | case 0xE:
|
| nkeynes@387 | 1423 | { /* XOR.B #imm, @(R0, GBR) */
|
| nkeynes@387 | 1424 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1425 | sh4_stats[I_XORB]++;
|
| nkeynes@387 | 1426 | }
|
| nkeynes@387 | 1427 | break;
|
| nkeynes@387 | 1428 | case 0xF:
|
| nkeynes@387 | 1429 | { /* OR.B #imm, @(R0, GBR) */
|
| nkeynes@387 | 1430 | uint32_t imm = (ir&0xFF);
|
| nkeynes@387 | 1431 | sh4_stats[I_ORB]++;
|
| nkeynes@387 | 1432 | }
|
| nkeynes@387 | 1433 | break;
|
| nkeynes@387 | 1434 | }
|
| nkeynes@387 | 1435 | break;
|
| nkeynes@387 | 1436 | case 0xD:
|
| nkeynes@387 | 1437 | { /* MOV.L @(disp, PC), Rn */
|
| nkeynes@387 | 1438 | uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2;
|
| nkeynes@387 | 1439 | sh4_stats[I_MOVLPC]++;
|
| nkeynes@387 | 1440 | }
|
| nkeynes@387 | 1441 | break;
|
| nkeynes@387 | 1442 | case 0xE:
|
| nkeynes@387 | 1443 | { /* MOV #imm, Rn */
|
| nkeynes@387 | 1444 | uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
|
| nkeynes@387 | 1445 | sh4_stats[I_MOVI]++;
|
| nkeynes@387 | 1446 | }
|
| nkeynes@387 | 1447 | break;
|
| nkeynes@387 | 1448 | case 0xF:
|
| nkeynes@387 | 1449 | switch( ir&0xF ) {
|
| nkeynes@387 | 1450 | case 0x0:
|
| nkeynes@387 | 1451 | { /* FADD FRm, FRn */
|
| nkeynes@387 | 1452 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1453 | sh4_stats[I_FADD]++;
|
| nkeynes@387 | 1454 | }
|
| nkeynes@387 | 1455 | break;
|
| nkeynes@387 | 1456 | case 0x1:
|
| nkeynes@387 | 1457 | { /* FSUB FRm, FRn */
|
| nkeynes@387 | 1458 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1459 | sh4_stats[I_FSUB]++;
|
| nkeynes@387 | 1460 | }
|
| nkeynes@387 | 1461 | break;
|
| nkeynes@387 | 1462 | case 0x2:
|
| nkeynes@387 | 1463 | { /* FMUL FRm, FRn */
|
| nkeynes@387 | 1464 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1465 | sh4_stats[I_FMUL]++;
|
| nkeynes@387 | 1466 | }
|
| nkeynes@387 | 1467 | break;
|
| nkeynes@387 | 1468 | case 0x3:
|
| nkeynes@387 | 1469 | { /* FDIV FRm, FRn */
|
| nkeynes@387 | 1470 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1471 | sh4_stats[I_FDIV]++;
|
| nkeynes@387 | 1472 | }
|
| nkeynes@387 | 1473 | break;
|
| nkeynes@387 | 1474 | case 0x4:
|
| nkeynes@387 | 1475 | { /* FCMP/EQ FRm, FRn */
|
| nkeynes@387 | 1476 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1477 | sh4_stats[I_FCMPEQ]++;
|
| nkeynes@387 | 1478 | }
|
| nkeynes@387 | 1479 | break;
|
| nkeynes@387 | 1480 | case 0x5:
|
| nkeynes@387 | 1481 | { /* FCMP/GT FRm, FRn */
|
| nkeynes@387 | 1482 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1483 | sh4_stats[I_FCMPGT]++;
|
| nkeynes@387 | 1484 | }
|
| nkeynes@387 | 1485 | break;
|
| nkeynes@387 | 1486 | case 0x6:
|
| nkeynes@387 | 1487 | { /* FMOV @(R0, Rm), FRn */
|
| nkeynes@387 | 1488 | uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1489 | sh4_stats[I_FMOV7]++;
|
| nkeynes@387 | 1490 | }
|
| nkeynes@387 | 1491 | break;
|
| nkeynes@387 | 1492 | case 0x7:
|
| nkeynes@387 | 1493 | { /* FMOV FRm, @(R0, Rn) */
|
| nkeynes@387 | 1494 | uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1495 | sh4_stats[I_FMOV4]++;
|
| nkeynes@387 | 1496 | }
|
| nkeynes@387 | 1497 | break;
|
| nkeynes@387 | 1498 | case 0x8:
|
| nkeynes@387 | 1499 | { /* FMOV @Rm, FRn */
|
| nkeynes@387 | 1500 | uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1501 | sh4_stats[I_FMOV5]++;
|
| nkeynes@387 | 1502 | }
|
| nkeynes@387 | 1503 | break;
|
| nkeynes@387 | 1504 | case 0x9:
|
| nkeynes@387 | 1505 | { /* FMOV @Rm+, FRn */
|
| nkeynes@387 | 1506 | uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1507 | sh4_stats[I_FMOV6]++;
|
| nkeynes@387 | 1508 | }
|
| nkeynes@387 | 1509 | break;
|
| nkeynes@387 | 1510 | case 0xA:
|
| nkeynes@387 | 1511 | { /* FMOV FRm, @Rn */
|
| nkeynes@387 | 1512 | uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1513 | sh4_stats[I_FMOV2]++;
|
| nkeynes@387 | 1514 | }
|
| nkeynes@387 | 1515 | break;
|
| nkeynes@387 | 1516 | case 0xB:
|
| nkeynes@387 | 1517 | { /* FMOV FRm, @-Rn */
|
| nkeynes@387 | 1518 | uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1519 | sh4_stats[I_FMOV3]++;
|
| nkeynes@387 | 1520 | }
|
| nkeynes@387 | 1521 | break;
|
| nkeynes@387 | 1522 | case 0xC:
|
| nkeynes@387 | 1523 | { /* FMOV FRm, FRn */
|
| nkeynes@387 | 1524 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1525 | sh4_stats[I_FMOV1]++;
|
| nkeynes@387 | 1526 | }
|
| nkeynes@387 | 1527 | break;
|
| nkeynes@387 | 1528 | case 0xD:
|
| nkeynes@387 | 1529 | switch( (ir&0xF0) >> 4 ) {
|
| nkeynes@387 | 1530 | case 0x0:
|
| nkeynes@387 | 1531 | { /* FSTS FPUL, FRn */
|
| nkeynes@387 | 1532 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1533 | sh4_stats[I_FSTS]++;
|
| nkeynes@387 | 1534 | }
|
| nkeynes@387 | 1535 | break;
|
| nkeynes@387 | 1536 | case 0x1:
|
| nkeynes@387 | 1537 | { /* FLDS FRm, FPUL */
|
| nkeynes@387 | 1538 | uint32_t FRm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1539 | sh4_stats[I_FLDS]++;
|
| nkeynes@387 | 1540 | }
|
| nkeynes@387 | 1541 | break;
|
| nkeynes@387 | 1542 | case 0x2:
|
| nkeynes@387 | 1543 | { /* FLOAT FPUL, FRn */
|
| nkeynes@387 | 1544 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1545 | sh4_stats[I_FLOAT]++;
|
| nkeynes@387 | 1546 | }
|
| nkeynes@387 | 1547 | break;
|
| nkeynes@387 | 1548 | case 0x3:
|
| nkeynes@387 | 1549 | { /* FTRC FRm, FPUL */
|
| nkeynes@387 | 1550 | uint32_t FRm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1551 | sh4_stats[I_FTRC]++;
|
| nkeynes@387 | 1552 | }
|
| nkeynes@387 | 1553 | break;
|
| nkeynes@387 | 1554 | case 0x4:
|
| nkeynes@387 | 1555 | { /* FNEG FRn */
|
| nkeynes@387 | 1556 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1557 | sh4_stats[I_FNEG]++;
|
| nkeynes@387 | 1558 | }
|
| nkeynes@387 | 1559 | break;
|
| nkeynes@387 | 1560 | case 0x5:
|
| nkeynes@387 | 1561 | { /* FABS FRn */
|
| nkeynes@387 | 1562 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1563 | sh4_stats[I_FABS]++;
|
| nkeynes@387 | 1564 | }
|
| nkeynes@387 | 1565 | break;
|
| nkeynes@387 | 1566 | case 0x6:
|
| nkeynes@387 | 1567 | { /* FSQRT FRn */
|
| nkeynes@387 | 1568 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1569 | sh4_stats[I_FSQRT]++;
|
| nkeynes@387 | 1570 | }
|
| nkeynes@387 | 1571 | break;
|
| nkeynes@387 | 1572 | case 0x7:
|
| nkeynes@387 | 1573 | { /* FSRRA FRn */
|
| nkeynes@387 | 1574 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1575 | sh4_stats[I_FSRRA]++;
|
| nkeynes@387 | 1576 | }
|
| nkeynes@387 | 1577 | break;
|
| nkeynes@387 | 1578 | case 0x8:
|
| nkeynes@387 | 1579 | { /* FLDI0 FRn */
|
| nkeynes@387 | 1580 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1581 | sh4_stats[I_FLDI0]++;
|
| nkeynes@387 | 1582 | }
|
| nkeynes@387 | 1583 | break;
|
| nkeynes@387 | 1584 | case 0x9:
|
| nkeynes@387 | 1585 | { /* FLDI1 FRn */
|
| nkeynes@387 | 1586 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1587 | sh4_stats[I_FLDI1]++;
|
| nkeynes@387 | 1588 | }
|
| nkeynes@387 | 1589 | break;
|
| nkeynes@387 | 1590 | case 0xA:
|
| nkeynes@387 | 1591 | { /* FCNVSD FPUL, FRn */
|
| nkeynes@387 | 1592 | uint32_t FRn = ((ir>>8)&0xF);
|
| nkeynes@387 | 1593 | sh4_stats[I_FCNVSD]++;
|
| nkeynes@387 | 1594 | }
|
| nkeynes@387 | 1595 | break;
|
| nkeynes@387 | 1596 | case 0xB:
|
| nkeynes@387 | 1597 | { /* FCNVDS FRm, FPUL */
|
| nkeynes@387 | 1598 | uint32_t FRm = ((ir>>8)&0xF);
|
| nkeynes@387 | 1599 | sh4_stats[I_FCNVDS]++;
|
| nkeynes@387 | 1600 | }
|
| nkeynes@387 | 1601 | break;
|
| nkeynes@387 | 1602 | case 0xE:
|
| nkeynes@387 | 1603 | { /* FIPR FVm, FVn */
|
| nkeynes@387 | 1604 | uint32_t FVn = ((ir>>10)&0x3); uint32_t FVm = ((ir>>8)&0x3);
|
| nkeynes@387 | 1605 | sh4_stats[I_FIPR]++;
|
| nkeynes@387 | 1606 | }
|
| nkeynes@387 | 1607 | break;
|
| nkeynes@387 | 1608 | case 0xF:
|
| nkeynes@387 | 1609 | switch( (ir&0x100) >> 8 ) {
|
| nkeynes@387 | 1610 | case 0x0:
|
| nkeynes@387 | 1611 | { /* FSCA FPUL, FRn */
|
| nkeynes@387 | 1612 | uint32_t FRn = ((ir>>9)&0x7)<<1;
|
| nkeynes@387 | 1613 | sh4_stats[I_FSCA]++;
|
| nkeynes@387 | 1614 | }
|
| nkeynes@387 | 1615 | break;
|
| nkeynes@387 | 1616 | case 0x1:
|
| nkeynes@387 | 1617 | switch( (ir&0x200) >> 9 ) {
|
| nkeynes@387 | 1618 | case 0x0:
|
| nkeynes@387 | 1619 | { /* FTRV XMTRX, FVn */
|
| nkeynes@387 | 1620 | uint32_t FVn = ((ir>>10)&0x3);
|
| nkeynes@387 | 1621 | sh4_stats[I_FTRV]++;
|
| nkeynes@387 | 1622 | }
|
| nkeynes@387 | 1623 | break;
|
| nkeynes@387 | 1624 | case 0x1:
|
| nkeynes@387 | 1625 | switch( (ir&0xC00) >> 10 ) {
|
| nkeynes@387 | 1626 | case 0x0:
|
| nkeynes@387 | 1627 | { /* FSCHG */
|
| nkeynes@387 | 1628 | sh4_stats[I_FSCHG]++;
|
| nkeynes@387 | 1629 | }
|
| nkeynes@387 | 1630 | break;
|
| nkeynes@387 | 1631 | case 0x2:
|
| nkeynes@387 | 1632 | { /* FRCHG */
|
| nkeynes@387 | 1633 | sh4_stats[I_FRCHG]++;
|
| nkeynes@387 | 1634 | }
|
| nkeynes@387 | 1635 | break;
|
| nkeynes@387 | 1636 | case 0x3:
|
| nkeynes@387 | 1637 | { /* UNDEF */
|
| nkeynes@387 | 1638 | sh4_stats[I_UNDEF]++;
|
| nkeynes@387 | 1639 | }
|
| nkeynes@387 | 1640 | break;
|
| nkeynes@387 | 1641 | default:
|
| nkeynes@387 | 1642 | UNDEF();
|
| nkeynes@387 | 1643 | break;
|
| nkeynes@387 | 1644 | }
|
| nkeynes@387 | 1645 | break;
|
| nkeynes@387 | 1646 | }
|
| nkeynes@387 | 1647 | break;
|
| nkeynes@387 | 1648 | }
|
| nkeynes@387 | 1649 | break;
|
| nkeynes@387 | 1650 | default:
|
| nkeynes@387 | 1651 | UNDEF();
|
| nkeynes@387 | 1652 | break;
|
| nkeynes@387 | 1653 | }
|
| nkeynes@387 | 1654 | break;
|
| nkeynes@387 | 1655 | case 0xE:
|
| nkeynes@387 | 1656 | { /* FMAC FR0, FRm, FRn */
|
| nkeynes@387 | 1657 | uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
|
| nkeynes@387 | 1658 | sh4_stats[I_FMAC]++;
|
| nkeynes@387 | 1659 | }
|
| nkeynes@387 | 1660 | break;
|
| nkeynes@387 | 1661 | default:
|
| nkeynes@387 | 1662 | UNDEF();
|
| nkeynes@387 | 1663 | break;
|
| nkeynes@387 | 1664 | }
|
| nkeynes@387 | 1665 | break;
|
| nkeynes@387 | 1666 | }
|
| nkeynes@387 | 1667 |
|
| nkeynes@387 | 1668 |
|
| nkeynes@387 | 1669 | sh4_stats_total++;
|
| nkeynes@387 | 1670 | }
|
lxdream 0.9.1