Search
lxdream.org :: lxdream/src/aica/aica.c
lxdream 0.9.1
released Jun 29
Download Now
filename src/aica/aica.c
changeset 434:8af49a412d92
prev431:248dd77a9e44
next463:0655796f9bb5
author nkeynes
date Tue Oct 09 11:37:36 2007 +0000 (14 years ago)
permissions -rw-r--r--
last change Fix ADPCM (to some degree at least)
Fix key-on/off (triggers all channels at once)
file annotate diff log raw
nkeynes@11
     1
/**
nkeynes@434
     2
 * $Id: aica.c,v 1.23 2007-10-09 11:37:36 nkeynes Exp $
nkeynes@11
     3
 * 
nkeynes@11
     4
 * This is the core sound system (ie the bit which does the actual work)
nkeynes@11
     5
 *
nkeynes@11
     6
 * Copyright (c) 2005 Nathan Keynes.
nkeynes@11
     7
 *
nkeynes@11
     8
 * This program is free software; you can redistribute it and/or modify
nkeynes@11
     9
 * it under the terms of the GNU General Public License as published by
nkeynes@11
    10
 * the Free Software Foundation; either version 2 of the License, or
nkeynes@11
    11
 * (at your option) any later version.
nkeynes@11
    12
 *
nkeynes@11
    13
 * This program is distributed in the hope that it will be useful,
nkeynes@11
    14
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@11
    15
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
nkeynes@11
    16
 * GNU General Public License for more details.
nkeynes@11
    17
 */
nkeynes@11
    18
nkeynes@35
    19
#define MODULE aica_module
nkeynes@35
    20
nkeynes@131
    21
#include <time.h>
nkeynes@11
    22
#include "dream.h"
nkeynes@66
    23
#include "dreamcast.h"
nkeynes@15
    24
#include "mem.h"
nkeynes@106
    25
#include "aica/aica.h"
nkeynes@61
    26
#include "armcore.h"
nkeynes@106
    27
#include "aica/audio.h"
nkeynes@11
    28
#define MMIO_IMPL
nkeynes@11
    29
#include "aica.h"
nkeynes@11
    30
nkeynes@11
    31
MMIO_REGION_READ_DEFFN( AICA0 )
nkeynes@11
    32
MMIO_REGION_READ_DEFFN( AICA1 )
nkeynes@11
    33
MMIO_REGION_READ_DEFFN( AICA2 )
nkeynes@11
    34
nkeynes@23
    35
void aica_init( void );
nkeynes@23
    36
void aica_reset( void );
nkeynes@23
    37
void aica_start( void );
nkeynes@23
    38
void aica_stop( void );
nkeynes@35
    39
void aica_save_state( FILE *f );
nkeynes@35
    40
int aica_load_state( FILE *f );
nkeynes@30
    41
uint32_t aica_run_slice( uint32_t );
nkeynes@23
    42
nkeynes@23
    43
struct dreamcast_module aica_module = { "AICA", aica_init, aica_reset, 
nkeynes@23
    44
					aica_start, aica_run_slice, aica_stop,
nkeynes@35
    45
					aica_save_state, aica_load_state };
nkeynes@15
    46
nkeynes@173
    47
/* 20 years in seconds */
nkeynes@173
    48
#define RTC_OFFSET 631152000
nkeynes@173
    49
unsigned int aica_time_of_day = 0;
nkeynes@173
    50
nkeynes@11
    51
/**
nkeynes@11
    52
 * Initialize the AICA subsystem. Note requires that 
nkeynes@11
    53
 */
nkeynes@11
    54
void aica_init( void )
nkeynes@11
    55
{
nkeynes@11
    56
    register_io_regions( mmio_list_spu );
nkeynes@11
    57
    MMIO_NOTRACE(AICA0);
nkeynes@11
    58
    MMIO_NOTRACE(AICA1);
nkeynes@11
    59
    arm_mem_init();
nkeynes@66
    60
    aica_reset();
nkeynes@11
    61
}
nkeynes@11
    62
nkeynes@11
    63
void aica_reset( void )
nkeynes@11
    64
{
nkeynes@35
    65
    arm_reset();
nkeynes@66
    66
    aica_event(2); /* Pre-deliver a timer interrupt */
nkeynes@173
    67
    aica_time_of_day = 0x5bfc8900;
nkeynes@11
    68
}
nkeynes@11
    69
nkeynes@23
    70
void aica_start( void )
nkeynes@23
    71
{
nkeynes@23
    72
nkeynes@23
    73
}
nkeynes@23
    74
nkeynes@66
    75
/**
nkeynes@66
    76
 * Keep track of what we've done so far this second, to try to keep the
nkeynes@66
    77
 * precision of samples/second.
nkeynes@66
    78
 */
nkeynes@66
    79
int samples_done = 0;
nkeynes@66
    80
uint32_t nanosecs_done = 0;
nkeynes@66
    81
nkeynes@30
    82
uint32_t aica_run_slice( uint32_t nanosecs )
nkeynes@23
    83
{
nkeynes@23
    84
    /* Run arm instructions */
nkeynes@35
    85
    int reset = MMIO_READ( AICA2, AICA_RESET );
nkeynes@66
    86
    if( (reset & 1) == 0 ) { /* Running */
nkeynes@76
    87
	int num_samples = (int)((uint64_t)AICA_SAMPLE_RATE * (nanosecs_done + nanosecs) / 1000000000) - samples_done;
nkeynes@73
    88
	num_samples = arm_run_slice( num_samples );
nkeynes@73
    89
	audio_mix_samples( num_samples );
nkeynes@73
    90
nkeynes@66
    91
	samples_done += num_samples;
nkeynes@66
    92
	nanosecs_done += nanosecs;
nkeynes@35
    93
    }
nkeynes@73
    94
    if( nanosecs_done > 1000000000 ) {
nkeynes@73
    95
	samples_done -= AICA_SAMPLE_RATE;
nkeynes@73
    96
	nanosecs_done -= 1000000000;
nkeynes@173
    97
	aica_time_of_day++;
nkeynes@73
    98
    }
nkeynes@43
    99
    return nanosecs;
nkeynes@23
   100
}
nkeynes@23
   101
nkeynes@23
   102
void aica_stop( void )
nkeynes@23
   103
{
nkeynes@23
   104
nkeynes@23
   105
}
nkeynes@23
   106
nkeynes@35
   107
void aica_save_state( FILE *f )
nkeynes@35
   108
{
nkeynes@35
   109
    arm_save_state( f );
nkeynes@35
   110
}
nkeynes@35
   111
nkeynes@35
   112
int aica_load_state( FILE *f )
nkeynes@35
   113
{
nkeynes@35
   114
    return arm_load_state( f );
nkeynes@35
   115
}
nkeynes@35
   116
nkeynes@61
   117
int aica_event_pending = 0;
nkeynes@61
   118
int aica_clear_count = 0;
nkeynes@61
   119
nkeynes@61
   120
/* Note: This is probably not necessarily technically correct but it should
nkeynes@61
   121
 * work in the meantime.
nkeynes@61
   122
 */
nkeynes@61
   123
nkeynes@61
   124
void aica_event( int event )
nkeynes@61
   125
{
nkeynes@61
   126
    if( aica_event_pending == 0 )
nkeynes@61
   127
	armr.int_pending |= CPSR_F;
nkeynes@61
   128
    aica_event_pending |= (1<<event);
nkeynes@61
   129
    
nkeynes@61
   130
    int pending = MMIO_READ( AICA2, AICA_IRQ );
nkeynes@61
   131
    if( pending == 0 || event < pending )
nkeynes@61
   132
	MMIO_WRITE( AICA2, AICA_IRQ, event );
nkeynes@61
   133
}
nkeynes@61
   134
nkeynes@61
   135
void aica_clear_event( )
nkeynes@61
   136
{
nkeynes@61
   137
    aica_clear_count++;
nkeynes@61
   138
    if( aica_clear_count == 4 ) {
nkeynes@61
   139
	int i;
nkeynes@61
   140
	aica_clear_count = 0;
nkeynes@61
   141
nkeynes@61
   142
	for( i=0; i<8; i++ ) {
nkeynes@61
   143
	    if( aica_event_pending & (1<<i) ) {
nkeynes@61
   144
		aica_event_pending &= ~(1<<i);
nkeynes@61
   145
		break;
nkeynes@61
   146
	    }
nkeynes@61
   147
	}
nkeynes@61
   148
	for( ;i<8; i++ ) {
nkeynes@61
   149
	    if( aica_event_pending & (1<<i) ) {
nkeynes@61
   150
		MMIO_WRITE( AICA2, AICA_IRQ, i );
nkeynes@61
   151
		break;
nkeynes@61
   152
	    }
nkeynes@61
   153
	}
nkeynes@61
   154
	if( aica_event_pending == 0 )
nkeynes@61
   155
	    armr.int_pending &= ~CPSR_F;
nkeynes@61
   156
    }
nkeynes@61
   157
}
nkeynes@66
   158
nkeynes@86
   159
void aica_enable( void )
nkeynes@86
   160
{
nkeynes@86
   161
    mmio_region_AICA2_write( AICA_RESET, MMIO_READ(AICA2,AICA_RESET) & ~1 );
nkeynes@86
   162
}
nkeynes@86
   163
nkeynes@11
   164
/** Channel register structure:
nkeynes@43
   165
 * 00  4  Channel config
nkeynes@43
   166
 * 04  4  Waveform address lo (16 bits)
nkeynes@11
   167
 * 08  4  Loop start address
nkeynes@11
   168
 * 0C  4  Loop end address
nkeynes@11
   169
 * 10  4  Volume envelope
nkeynes@43
   170
 * 14  4  Init to 0x1F
nkeynes@43
   171
 * 18  4  Frequency (floating point)
nkeynes@43
   172
 * 1C  4  ?? 
nkeynes@43
   173
 * 20  4  ??
nkeynes@11
   174
 * 24  1  Pan
nkeynes@11
   175
 * 25  1  ??
nkeynes@11
   176
 * 26  
nkeynes@11
   177
 * 27  
nkeynes@11
   178
 * 28  1  ??
nkeynes@11
   179
 * 29  1  Volume
nkeynes@11
   180
 * 2C
nkeynes@11
   181
 * 30
nkeynes@431
   182
 */
nkeynes@11
   183
nkeynes@11
   184
/* Write to channels 0-31 */
nkeynes@11
   185
void mmio_region_AICA0_write( uint32_t reg, uint32_t val )
nkeynes@11
   186
{
nkeynes@35
   187
    MMIO_WRITE( AICA0, reg, val );
nkeynes@66
   188
    aica_write_channel( reg >> 7, reg % 128, val );
nkeynes@37
   189
    //    DEBUG( "AICA0 Write %08X => %08X", val, reg );
nkeynes@11
   190
}
nkeynes@11
   191
nkeynes@11
   192
/* Write to channels 32-64 */
nkeynes@11
   193
void mmio_region_AICA1_write( uint32_t reg, uint32_t val )
nkeynes@11
   194
{
nkeynes@35
   195
    MMIO_WRITE( AICA1, reg, val );
nkeynes@66
   196
    aica_write_channel( (reg >> 7) + 32, reg % 128, val );
nkeynes@37
   197
    // DEBUG( "AICA1 Write %08X => %08X", val, reg );
nkeynes@11
   198
}
nkeynes@11
   199
nkeynes@66
   200
/**
nkeynes@66
   201
 * AICA control registers 
nkeynes@66
   202
 */
nkeynes@11
   203
void mmio_region_AICA2_write( uint32_t reg, uint32_t val )
nkeynes@11
   204
{
nkeynes@35
   205
    uint32_t tmp;
nkeynes@35
   206
    switch( reg ) {
nkeynes@35
   207
    case AICA_RESET:
nkeynes@35
   208
	tmp = MMIO_READ( AICA2, AICA_RESET );
nkeynes@37
   209
	if( (tmp & 1) == 1 && (val & 1) == 0 ) {
nkeynes@35
   210
	    /* ARM enabled - execute a core reset */
nkeynes@37
   211
	    DEBUG( "ARM enabled" );
nkeynes@35
   212
	    arm_reset();
nkeynes@66
   213
	    samples_done = 0;
nkeynes@66
   214
	    nanosecs_done = 0;
nkeynes@37
   215
	} else if( (tmp&1) == 0 && (val&1) == 1 ) {
nkeynes@37
   216
	    DEBUG( "ARM disabled" );
nkeynes@35
   217
	}
nkeynes@35
   218
	MMIO_WRITE( AICA2, AICA_RESET, val );
nkeynes@35
   219
	break;
nkeynes@61
   220
    case AICA_IRQCLEAR:
nkeynes@61
   221
	aica_clear_event();
nkeynes@61
   222
	break;
nkeynes@35
   223
    default:
nkeynes@35
   224
	MMIO_WRITE( AICA2, reg, val );
nkeynes@35
   225
	break;
nkeynes@35
   226
    }
nkeynes@11
   227
}
nkeynes@66
   228
nkeynes@131
   229
nkeynes@131
   230
int32_t mmio_region_AICARTC_read( uint32_t reg )
nkeynes@131
   231
{
nkeynes@173
   232
    int32_t rv = 0;
nkeynes@131
   233
    switch( reg ) {
nkeynes@131
   234
    case AICA_RTCHI:
nkeynes@173
   235
        rv = (aica_time_of_day >> 16) & 0xFFFF;
nkeynes@131
   236
	break;
nkeynes@131
   237
    case AICA_RTCLO:
nkeynes@173
   238
	rv = aica_time_of_day & 0xFFFF;
nkeynes@131
   239
	break;
nkeynes@131
   240
    }
nkeynes@241
   241
    // DEBUG( "Read AICA RTC %d => %08X", reg, rv );
nkeynes@173
   242
    return rv;
nkeynes@131
   243
}
nkeynes@131
   244
nkeynes@131
   245
nkeynes@301
   246
void mmio_region_AICARTC_write( uint32_t reg, uint32_t val )
nkeynes@301
   247
{
nkeynes@301
   248
    switch( reg ) {
nkeynes@301
   249
    case AICA_RTCEN:
nkeynes@301
   250
	MMIO_WRITE( AICARTC, reg, val&0x01 );
nkeynes@301
   251
	break;
nkeynes@301
   252
    case AICA_RTCLO:
nkeynes@301
   253
	if( MMIO_READ( AICARTC, AICA_RTCEN ) & 0x01 ) {
nkeynes@301
   254
	    aica_time_of_day = (aica_time_of_day & 0xFFFF0000) | (val & 0xFFFF);
nkeynes@301
   255
	}
nkeynes@301
   256
	break;
nkeynes@301
   257
    case AICA_RTCHI:
nkeynes@301
   258
	if( MMIO_READ( AICARTC, AICA_RTCEN ) & 0x01 ) {
nkeynes@301
   259
	    aica_time_of_day = (aica_time_of_day & 0xFFFF) | (val<<16);
nkeynes@301
   260
	    MMIO_WRITE( AICARTC, AICA_RTCEN, 0 );
nkeynes@301
   261
	}
nkeynes@301
   262
	break;
nkeynes@301
   263
    }
nkeynes@301
   264
}
nkeynes@301
   265
	
nkeynes@66
   266
/**
nkeynes@66
   267
 * Translate the channel frequency to a sample rate. The frequency is a
nkeynes@66
   268
 * 14-bit floating point number, where bits 0..9 is the mantissa,
nkeynes@66
   269
 * 11..14 is the signed exponent (-8 to +7). Bit 10 appears to
nkeynes@66
   270
 * be unused.
nkeynes@66
   271
 *
nkeynes@66
   272
 * @return sample rate in samples per second.
nkeynes@66
   273
 */
nkeynes@66
   274
uint32_t aica_frequency_to_sample_rate( uint32_t freq )
nkeynes@66
   275
{
nkeynes@66
   276
    uint32_t exponent = (freq & 0x3800) >> 11;
nkeynes@66
   277
    uint32_t mantissa = freq & 0x03FF;
nkeynes@82
   278
    uint32_t rate;
nkeynes@66
   279
    if( freq & 0x4000 ) {
nkeynes@66
   280
	/* neg exponent - rate < 44100 */
nkeynes@66
   281
	exponent = 8 - exponent;
nkeynes@82
   282
	rate = (44100 >> exponent) +
nkeynes@66
   283
	    ((44100 * mantissa) >> (10+exponent));
nkeynes@66
   284
    } else {
nkeynes@66
   285
	/* pos exponent - rate > 44100 */
nkeynes@82
   286
	rate = (44100 << exponent) +
nkeynes@66
   287
	    ((44100 * mantissa) >> (10-exponent));
nkeynes@66
   288
    }
nkeynes@82
   289
    return rate;
nkeynes@66
   290
}
nkeynes@66
   291
nkeynes@434
   292
void aica_start_stop_channels()
nkeynes@434
   293
{
nkeynes@434
   294
    int i;
nkeynes@434
   295
    for( i=0; i<32; i++ ) {
nkeynes@434
   296
	uint32_t val = MMIO_READ( AICA0, i<<7 );
nkeynes@434
   297
	audio_start_stop_channel(i, val&0x4000);
nkeynes@434
   298
    }
nkeynes@434
   299
    for( ; i<64; i++ ) {
nkeynes@434
   300
	uint32_t val = MMIO_READ( AICA1, (i-32)<<7 );
nkeynes@434
   301
	audio_start_stop_channel(i, val&0x4000);
nkeynes@434
   302
    }
nkeynes@434
   303
}
nkeynes@434
   304
nkeynes@82
   305
/**
nkeynes@82
   306
 * Derived directly from Dan Potter's log table
nkeynes@82
   307
 */
nkeynes@82
   308
uint8_t aica_volume_table[256] = {
nkeynes@82
   309
      0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   0,   1,
nkeynes@82
   310
      1,   1,   1,   1,   1,   1,   2,   2,   2,   2,   2,   3,   3,   3,   3,   4,
nkeynes@82
   311
      4,   4,   4,   5,   5,   5,   5,   6,   6,   6,   7,   7,   7,   8,   8,   9,
nkeynes@82
   312
      9,   9,  10,  10,  11,  11,  11,  12,  12,  13,  13,  14,  14,  15,  15,  16,
nkeynes@82
   313
     16,  17,  17,  18,  18,  19,  19,  20,  20,  21,  22,  22,  23,  23,  24,  25,
nkeynes@82
   314
     25,  26,  27,  27,  28,  29,  29,  30,  31,  31,  32,  33,  34,  34,  35,  36,
nkeynes@82
   315
     37,  37,  38,  39,  40,  40,  41,  42,  43,  44,  45,  45,  46,  47,  48,  49,
nkeynes@82
   316
     50,  51,  52,  52,  53,  54,  55,  56,  57,  58,  59,  60,  61,  62,  63,  64,
nkeynes@82
   317
     65,  66,  67,  68,  69,  70,  71,  72,  73,  74,  76,  77,  78,  79,  80,  81,
nkeynes@82
   318
     82,  83,  85,  86,  87,  88,  89,  90,  92,  93,  94,  95,  97,  98,  99, 100,
nkeynes@82
   319
    102, 103, 104, 105, 107, 108, 109, 111, 112, 113, 115, 116, 117, 119, 120, 121,
nkeynes@82
   320
    123, 124, 126, 127, 128, 130, 131, 133, 134, 136, 137, 139, 140, 142, 143, 145,
nkeynes@82
   321
    146, 148, 149, 151, 152, 154, 155, 157, 159, 160, 162, 163, 165, 167, 168, 170,
nkeynes@82
   322
    171, 173, 175, 176, 178, 180, 181, 183, 185, 187, 188, 190, 192, 194, 195, 197,
nkeynes@82
   323
    199, 201, 202, 204, 206, 208, 210, 211, 213, 215, 217, 219, 221, 223, 224, 226,
nkeynes@82
   324
    228, 230, 232, 234, 236, 238, 240, 242, 244, 246, 248, 250, 252, 253, 254, 255 };
nkeynes@82
   325
nkeynes@82
   326
nkeynes@66
   327
void aica_write_channel( int channelNo, uint32_t reg, uint32_t val ) 
nkeynes@66
   328
{
nkeynes@66
   329
    val &= 0x0000FFFF;
nkeynes@66
   330
    audio_channel_t channel = audio_get_channel(channelNo);
nkeynes@66
   331
    switch( reg ) {
nkeynes@66
   332
    case 0x00: /* Config + high address bits*/
nkeynes@66
   333
	channel->start = (channel->start & 0xFFFF) | ((val&0x1F) << 16);
nkeynes@66
   334
	if( val & 0x200 ) 
nkeynes@73
   335
	    channel->loop = TRUE;
nkeynes@66
   336
	else 
nkeynes@73
   337
	    channel->loop = FALSE;
nkeynes@66
   338
	switch( (val >> 7) & 0x03 ) {
nkeynes@66
   339
	case 0:
nkeynes@66
   340
	    channel->sample_format = AUDIO_FMT_16BIT;
nkeynes@66
   341
	    break;
nkeynes@66
   342
	case 1:
nkeynes@66
   343
	    channel->sample_format = AUDIO_FMT_8BIT;
nkeynes@66
   344
	    break;
nkeynes@66
   345
	case 2:
nkeynes@66
   346
	case 3:
nkeynes@66
   347
	    channel->sample_format = AUDIO_FMT_ADPCM;
nkeynes@66
   348
	    break;
nkeynes@66
   349
	}
nkeynes@434
   350
	if( val & 0x8000 ) {
nkeynes@434
   351
	    aica_start_stop_channels();
nkeynes@66
   352
	}
nkeynes@66
   353
	break;
nkeynes@66
   354
    case 0x04: /* Low 16 address bits */
nkeynes@66
   355
	channel->start = (channel->start & 0x001F0000) | val;
nkeynes@66
   356
	break;
nkeynes@66
   357
    case 0x08: /* Loop start */
nkeynes@66
   358
	channel->loop_start = val;
nkeynes@66
   359
	break;
nkeynes@73
   360
    case 0x0C: /* End */
nkeynes@73
   361
	channel->end = val;
nkeynes@66
   362
	break;
nkeynes@66
   363
    case 0x10: /* Envelope register 1 */
nkeynes@66
   364
	break;
nkeynes@66
   365
    case 0x14: /* Envelope register 2 */
nkeynes@66
   366
	break;
nkeynes@66
   367
    case 0x18: /* Frequency */
nkeynes@66
   368
	channel->sample_rate = aica_frequency_to_sample_rate ( val );
nkeynes@66
   369
	break;
nkeynes@66
   370
    case 0x1C: /* ??? */
nkeynes@66
   371
    case 0x20: /* ??? */
nkeynes@66
   372
    case 0x24: /* Volume? /pan */
nkeynes@82
   373
	val = val & 0x1F;
nkeynes@82
   374
	if( val <= 0x0F ) 
nkeynes@82
   375
	    val = 0x0F - val; /* Convert to smooth pan over 0..31 */
nkeynes@82
   376
	channel->pan = val;
nkeynes@66
   377
	break;
nkeynes@66
   378
    case 0x28: /* Volume */
nkeynes@82
   379
	channel->vol = aica_volume_table[val & 0xFF];
nkeynes@66
   380
	break;
nkeynes@66
   381
    default: /* ??? */
nkeynes@66
   382
	break;
nkeynes@66
   383
    }
nkeynes@66
   384
nkeynes@66
   385
}
.