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lxdream.org :: lxdream/test/testaica.c
lxdream 0.9.1
released Jun 29
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filename test/testaica.c
changeset 812:8cc61d5ea1f8
next821:4398dafeb77d
author nkeynes
date Wed Aug 13 10:32:00 2008 +0000 (14 years ago)
permissions -rw-r--r--
last change Add ARM test harness (not quite working on DC but almost...)
file annotate diff log raw
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/**
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 * $Id: testdata.c 602 2008-01-15 20:50:23Z nkeynes $
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 * 
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 * AICA test loader
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 *
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 * Copyright (c) 2006 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include <stdio.h>
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#include "lib.h"
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#define AICA_RAM_BASE 0x00800000
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#define AICA_SYSCALL (AICA_RAM_BASE+0x30)
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#define AICA_SYSCALL_ARG1 (AICA_SYSCALL+4)
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#define AICA_SYSCALL_ARG2 (AICA_SYSCALL+8)
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#define AICA_SYSCALL_ARG3 (AICA_SYSCALL+12)
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#define AICA_SYSCALL_RETURN (AICA_SYSCALL+4)
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#define SYS_READ 0
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#define SYS_WRITE 1
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#define SYS_OPEN 2
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#define SYS_CLOSE 3
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#define SYS_CREAT 4
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#define SYS_LINK 5
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#define SYS_UNLINK 6
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#define SYS_CHDIR 7
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#define SYS_CHMOD 8
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#define SYS_LSEEK 9
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#define SYS_FSTAT 10
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#define SYS_TIME 11
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#define SYS_STAT 12
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#define SYS_UTIME 13
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#define SYS_ASSIGNWRKMEM 14
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#define SYS_EXIT 15
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#define SYS_OPENDIR 16
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#define SYS_CLOSEDIR 17
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#define SYS_READDIR 18
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#define SYS_GETHOSTINFO 19
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uint32_t do_syscall( uint32_t syscall, uint32_t arg1, uint32_t arg2, uint32_t arg3 )
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{
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    uint32_t fd, len;
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    char *data;
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    switch( syscall ) {
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    case SYS_READ:
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        fd = arg1;
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        data = (char *)(AICA_RAM_BASE + (arg2 & 0x001FFFFF));
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        len = arg3;
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        return read( fd, data, len );
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    case SYS_WRITE:
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        fd = arg1;
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        data = (char *)(AICA_RAM_BASE + (arg2 & 0x001FFFFF));
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        len = arg3;
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        return write( fd, data, len );
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        break;
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    case SYS_EXIT:
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        aica_disable();
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        exit(arg1);
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    default:
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        return 0;
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    }        
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}
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int main( int argc, char *argv[] ) 
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{
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    char buf[65536] __attribute__((aligned(32)));
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    uint32_t aica_addr = AICA_RAM_BASE;
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    int len;
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    aica_disable();
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    /* Load ARM program from stdin and copy to ARM memory */
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    while( (len = read(0, buf, sizeof(buf))) > 0 ) {
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        aica_dma_write( aica_addr, buf, len );
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        aica_addr += len;
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    }
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    /* Main loop waiting for IO commands */
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    aica_enable();
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    do {
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        int syscall = long_read(AICA_SYSCALL);
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        if( syscall != -1 ) {
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            uint32_t result = do_syscall( syscall, long_read(AICA_SYSCALL_ARG1), 
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                    long_read(AICA_SYSCALL_ARG2), long_read(AICA_SYSCALL_ARG3) );
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            long_write( AICA_SYSCALL_RETURN, result );
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            long_write( AICA_SYSCALL, -1 );
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        }
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    } while( 1 );
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}
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