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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 103:9b9cfc5855e0
prev100:995e42e96cc9
next108:565de331ccec
author nkeynes
date Mon Mar 13 12:39:07 2006 +0000 (14 years ago)
permissions -rw-r--r--
last change More rendering work in progress. Almost there now...
file annotate diff log raw
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/**
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 * $Id: pvr2.h,v 1.9 2006-03-13 12:39:07 nkeynes Exp $
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 *
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 * PVR2 (video chip) functions and macros.
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include "dream.h"
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#include "mem.h"
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#include "video.h"
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#include "pvr2/pvr2mmio.h"
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#include <GL/gl.h>
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#define DISPMODE_DE  0x00000001 /* Display enable */
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#define DISPMODE_SD  0x00000002 /* Scan double */
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#define DISPMODE_COL 0x0000000C /* Colour mode */
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#define DISPMODE_CD  0x08000000 /* Clock double */
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#define COLFMT_RGB15 0x00000000
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#define COLFMT_RGB16 0x00000004
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#define COLFMT_RGB24 0x00000008
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#define COLFMT_RGB32 0x0000000C
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#define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
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#define DISPSIZE_LPF    0x000FFC00 /* lines per field */
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#define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
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#define DISPCFG_VP 0x00000001 /* V-sync polarity */
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#define DISPCFG_HP 0x00000002 /* H-sync polarity */
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#define DISPCFG_I  0x00000010 /* Interlace enable */
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#define DISPCFG_BS 0x000000C0 /* Broadcast standard */
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#define DISPCFG_VO 0x00000100 /* Video output enable */
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#define BS_NTSC 0x00000000
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#define BS_PAL  0x00000040
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#define BS_PALM 0x00000080 /* ? */
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#define BS_PALN 0x000000C0 /* ? */
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#define PVR2_RAM_BASE 0x05000000
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#define PVR2_RAM_BASE_INT 0x04000000
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#define PVR2_RAM_SIZE (8 * 1024 * 1024)
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#define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
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void pvr2_next_frame( void );
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void pvr2_set_base_address( uint32_t );
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#define PVR2_CMD_END_OF_LIST 0x00
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#define PVR2_CMD_USER_CLIP   0x20
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#define PVR2_CMD_POLY_OPAQUE 0x80
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#define PVR2_CMD_MOD_OPAQUE  0x81
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#define PVR2_CMD_POLY_TRANS  0x82
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#define PVR2_CMD_MOD_TRANS   0x83
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#define PVR2_CMD_POLY_PUNCHOUT 0x84
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#define PVR2_CMD_VERTEX      0xE0
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#define PVR2_CMD_VERTEX_LAST 0xF0
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#define PVR2_POLY_TEXTURED 0x00000008
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#define PVR2_POLY_SPECULAR 0x00000004
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#define PVR2_POLY_SHADED   0x00000002
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#define PVR2_POLY_UV_16BIT 0x00000001
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#define PVR2_TEX_FORMAT_ARGB1555 0x00000000
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#define PVR2_TEX_FORMAT_RGB565   0x08000000
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#define PVR2_TEX_FORMAT_ARGB4444 0x10000000
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#define PVR2_TEX_FORMAT_YUV422   0x18000000
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#define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
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#define PVR2_TEX_FORMAT_IDX4     0x28000000
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#define PVR2_TEX_FORMAT_IDX8     0x30000000
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#define PVR2_TEX_MIPMAP      0x80000000
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#define PVR2_TEX_COMPRESSED  0x40000000
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#define PVR2_TEX_FORMAT_MASK 0x38000000
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#define PVR2_TEX_UNTWIDDLED  0x04000000
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#define PVR2_TEX_ADDR(x) ( ((x)&0x1FFFFF)<<3 );
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#define PVR2_TEX_IS_MIPMAPPED(x) ( (x) & PVR2_TEX_MIPMAP )
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#define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
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#define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
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extern video_driver_t video_driver;
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/****************************** Frame Buffer *****************************/
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/**
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 * Write to the interleaved memory address space (aka 64-bit address space).
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 */
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void pvr2_vram64_write( sh4addr_t dest, char *src, uint32_t length );
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/**
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 * Read from the interleaved memory address space (aka 64-bit address space)
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 */
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void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
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/**************************** Tile Accelerator ***************************/
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/**
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 * Process the data in the supplied buffer as an array of TA command lists.
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 * Any excess bytes are held pending until a complete list is sent
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 */
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void pvr2_ta_write( char *buf, uint32_t length );
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/**
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 * (Re)initialize the tile accelerator in preparation for the next scene.
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 * Normally called immediately before commencing polygon transmission.
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 */
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void pvr2_ta_init( void );
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/********************************* Renderer ******************************/
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/**
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 * Initialize the rendering pipeline.
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 * @return TRUE on success, FALSE on failure.
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 */
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gboolean pvr2_render_init( void );
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/**
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 * Render the current scene stored in PVR ram to the GL back buffer.
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 */
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void pvr2_render_scene( void );
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/**
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 * Display the scene rendered to the supplied address.
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 * @return TRUE if there was an available render that was displayed,
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 * otherwise FALSE (and no action was taken)
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 */
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gboolean pvr2_render_display_frame( uint32_t address );
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/****************************** Texture Cache ****************************/
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/**
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 * Initialize the texture cache. Note that the GL context must have been
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 * initialized before calling this function.
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 */
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void texcache_init( void );
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/**
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 * Flush all textures and delete. The cache will be non-functional until
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 * the next call to texcache_init(). This would typically be done if
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 * switching GL targets.
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 */    
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void texcache_shutdown( void );
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/**
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 * Evict all textures contained in the page identified by a texture address.
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 */
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void texcache_invalidate_page( uint32_t texture_addr );
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/**
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 * Return a texture ID for the texture specified at the supplied address
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 * and given parameters (the same sequence of bytes could in theory have
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 * multiple interpretations). We use the texture address as the primary
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 * index, but allow for multiple instances at each address. The texture
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 * will be bound to the GL_TEXTURE_2D target before being returned.
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 * 
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 * If the texture has already been bound, return the ID to which it was
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 * bound. Otherwise obtain an unused texture ID and set it up appropriately.
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 */
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GLuint texcache_get_texture( uint32_t texture_addr, int width, int height,
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			     int mode );
.