lxdream.org :: lxdream/src/sh4/sh4core.c r367:9c52dcbad3fb (annotated)

tree revision 367:9c52dcbad3fb

filename	src/sh4/sh4core.c
changeset	367:9c52dcbad3fb
prev	359:c588dce7ebde
next	369:4b4223e7d720
author	nkeynes
date	Tue Sep 04 08:38:33 2007 +0000 (14 years ago)
permissions	-rw-r--r--
last change	Move EXC_* codes to sh4core.h and rename to match the EX_* codes

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nkeynes@23	1	/**
nkeynes@367	2	* $Id: sh4core.c,v 1.42 2007-09-04 08:38:33 nkeynes Exp $
nkeynes@23	3	*
nkeynes@23	4	* SH4 emulation core, and parent module for all the SH4 peripheral
nkeynes@23	5	* modules.
nkeynes@23	6	*
nkeynes@23	7	* Copyright (c) 2005 Nathan Keynes.
nkeynes@23	8	*
nkeynes@23	9	* This program is free software; you can redistribute it and/or modify
nkeynes@23	10	* it under the terms of the GNU General Public License as published by
nkeynes@23	11	* the Free Software Foundation; either version 2 of the License, or
nkeynes@23	12	* (at your option) any later version.
nkeynes@23	13	*
nkeynes@23	14	* This program is distributed in the hope that it will be useful,
nkeynes@23	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@23	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
nkeynes@23	17	* GNU General Public License for more details.
nkeynes@23	18	*/
nkeynes@23	19
nkeynes@35	20	#define MODULE sh4_module
nkeynes@1	21	#include <math.h>
nkeynes@1	22	#include "dream.h"
nkeynes@84	23	#include "sh4/sh4core.h"
nkeynes@84	24	#include "sh4/sh4mmio.h"
nkeynes@84	25	#include "sh4/intc.h"
nkeynes@1	26	#include "mem.h"
nkeynes@23	27	#include "clock.h"
nkeynes@102	28	#include "syscall.h"
nkeynes@1	29
nkeynes@157	30	#define SH4_CALLTRACE 1
nkeynes@157	31
nkeynes@123	32	#define MAX_INT 0x7FFFFFFF
nkeynes@123	33	#define MIN_INT 0x80000000
nkeynes@123	34	#define MAX_INTF 2147483647.0
nkeynes@123	35	#define MIN_INTF -2147483648.0
nkeynes@123	36
nkeynes@246	37	#define EXV_EXCEPTION 0x100 /* General exception vector */
nkeynes@246	38	#define EXV_TLBMISS 0x400 /* TLB-miss exception vector */
nkeynes@246	39	#define EXV_INTERRUPT 0x600 /* External interrupt vector */
nkeynes@27	40
nkeynes@23	41	/******************** SH4 Module Definition **************************/
nkeynes@23	42
nkeynes@23	43	void sh4_init( void );
nkeynes@23	44	void sh4_reset( void );
nkeynes@30	45	uint32_t sh4_run_slice( uint32_t );
nkeynes@23	46	void sh4_start( void );
nkeynes@23	47	void sh4_stop( void );
nkeynes@23	48	void sh4_save_state( FILE *f );
nkeynes@23	49	int sh4_load_state( FILE *f );
nkeynes@359	50	void sh4_accept_interrupt( void );
nkeynes@16	51
nkeynes@15	52	struct dreamcast_module sh4_module = { "SH4", sh4_init, sh4_reset,
nkeynes@23	53	NULL, sh4_run_slice, sh4_stop,
nkeynes@23	54	sh4_save_state, sh4_load_state };
nkeynes@15	55
nkeynes@1	56	struct sh4_registers sh4r;
nkeynes@1	57
nkeynes@1	58	void sh4_init(void)
nkeynes@1	59	{
nkeynes@1	60	register_io_regions( mmio_list_sh4mmio );
nkeynes@312	61	MMU_init();
nkeynes@27	62	sh4_reset();
nkeynes@1	63	}
nkeynes@1	64
nkeynes@1	65	void sh4_reset(void)
nkeynes@1	66	{
nkeynes@19	67	/* zero everything out, for the sake of having a consistent state. */
nkeynes@19	68	memset( &sh4r, 0, sizeof(sh4r) );
nkeynes@27	69
nkeynes@27	70	/* Resume running if we were halted */
nkeynes@27	71	sh4r.sh4_state = SH4_STATE_RUNNING;
nkeynes@27	72
nkeynes@1	73	sh4r.pc = 0xA0000000;
nkeynes@1	74	sh4r.new_pc= 0xA0000002;
nkeynes@1	75	sh4r.vbr = 0x00000000;
nkeynes@1	76	sh4r.fpscr = 0x00040001;
nkeynes@1	77	sh4r.sr = 0x700000F0;
nkeynes@27	78
nkeynes@27	79	/* Mem reset will do this, but if we want to reset _just_ the SH4... */
nkeynes@27	80	MMIO_WRITE( MMU, EXPEVT, EXC_POWER_RESET );
nkeynes@27	81
nkeynes@27	82	/* Peripheral modules */
nkeynes@260	83	CPG_reset();
nkeynes@157	84	INTC_reset();
nkeynes@312	85	MMU_reset();
nkeynes@157	86	TMU_reset();
nkeynes@32	87	SCIF_reset();
nkeynes@1	88	}
nkeynes@1	89
nkeynes@43	90	static struct breakpoint_struct sh4_breakpoints[MAX_BREAKPOINTS];
nkeynes@43	91	static int sh4_breakpoint_count = 0;
nkeynes@235	92	static uint16_t *sh4_icache = NULL;
nkeynes@235	93	static uint32_t sh4_icache_addr = 0;
nkeynes@43	94
nkeynes@43	95	void sh4_set_breakpoint( uint32_t pc, int type )
nkeynes@43	96	{
nkeynes@43	97	sh4_breakpoints[sh4_breakpoint_count].address = pc;
nkeynes@43	98	sh4_breakpoints[sh4_breakpoint_count].type = type;
nkeynes@43	99	sh4_breakpoint_count++;
nkeynes@43	100	}
nkeynes@43	101
nkeynes@43	102	gboolean sh4_clear_breakpoint( uint32_t pc, int type )
nkeynes@43	103	{
nkeynes@43	104	int i;
nkeynes@43	105
nkeynes@43	106	for( i=0; i<sh4_breakpoint_count; i++ ) {
nkeynes@43	107	if( sh4_breakpoints[i].address == pc &&
nkeynes@43	108	sh4_breakpoints[i].type == type ) {
nkeynes@43	109	while( ++i < sh4_breakpoint_count ) {
nkeynes@43	110	sh4_breakpoints[i-1].address = sh4_breakpoints[i].address;
nkeynes@43	111	sh4_breakpoints[i-1].type = sh4_breakpoints[i].type;
nkeynes@43	112	}
nkeynes@43	113	sh4_breakpoint_count--;
nkeynes@43	114	return TRUE;
nkeynes@43	115	}
nkeynes@43	116	}
nkeynes@43	117	return FALSE;
nkeynes@43	118	}
nkeynes@43	119
nkeynes@43	120	int sh4_get_breakpoint( uint32_t pc )
nkeynes@43	121	{
nkeynes@43	122	int i;
nkeynes@43	123	for( i=0; i<sh4_breakpoint_count; i++ ) {
nkeynes@43	124	if( sh4_breakpoints[i].address == pc )
nkeynes@43	125	return sh4_breakpoints[i].type;
nkeynes@43	126	}
nkeynes@43	127	return 0;
nkeynes@43	128	}
nkeynes@43	129
nkeynes@30	130	uint32_t sh4_run_slice( uint32_t nanosecs )
nkeynes@1	131	{
nkeynes@23	132	int i;
nkeynes@265	133	sh4r.slice_cycle = 0;
nkeynes@23	134
nkeynes@27	135	if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
nkeynes@265	136	if( sh4r.event_pending < nanosecs ) {
nkeynes@265	137	sh4r.sh4_state = SH4_STATE_RUNNING;
nkeynes@265	138	sh4r.slice_cycle = sh4r.event_pending;
nkeynes@265	139	}
nkeynes@23	140	}
nkeynes@27	141
nkeynes@235	142	if( sh4_breakpoint_count == 0 ) {
nkeynes@265	143	for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
nkeynes@265	144	if( SH4_EVENT_PENDING() ) {
nkeynes@265	145	if( sh4r.event_types & PENDING_EVENT ) {
nkeynes@265	146	event_execute();
nkeynes@265	147	}
nkeynes@265	148	/* Eventq execute may (quite likely) deliver an immediate IRQ */
nkeynes@265	149	if( sh4r.event_types & PENDING_IRQ ) {
nkeynes@265	150	sh4_accept_interrupt();
nkeynes@265	151	}
nkeynes@265	152	}
nkeynes@235	153	if( !sh4_execute_instruction() ) {
nkeynes@43	154	break;
nkeynes@43	155	}
nkeynes@43	156	}
nkeynes@235	157	} else {
nkeynes@265	158	for( ;sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
nkeynes@265	159	if( SH4_EVENT_PENDING() ) {
nkeynes@265	160	if( sh4r.event_types & PENDING_EVENT ) {
nkeynes@265	161	event_execute();
nkeynes@265	162	}
nkeynes@265	163	/* Eventq execute may (quite likely) deliver an immediate IRQ */
nkeynes@265	164	if( sh4r.event_types & PENDING_IRQ ) {
nkeynes@265	165	sh4_accept_interrupt();
nkeynes@265	166	}
nkeynes@265	167	}
nkeynes@265	168
nkeynes@235	169	if( !sh4_execute_instruction() )
nkeynes@235	170	break;
nkeynes@235	171	#ifdef ENABLE_DEBUG_MODE
nkeynes@235	172	for( i=0; i<sh4_breakpoint_count; i++ ) {
nkeynes@235	173	if( sh4_breakpoints[i].address == sh4r.pc ) {
nkeynes@235	174	break;
nkeynes@235	175	}
nkeynes@235	176	}
nkeynes@235	177	if( i != sh4_breakpoint_count ) {
nkeynes@235	178	dreamcast_stop();
nkeynes@235	179	if( sh4_breakpoints[i].type == BREAK_ONESHOT )
nkeynes@235	180	sh4_clear_breakpoint( sh4r.pc, BREAK_ONESHOT );
nkeynes@235	181	break;
nkeynes@235	182	}
nkeynes@235	183	#endif
nkeynes@43	184	}
nkeynes@27	185	}
nkeynes@30	186
nkeynes@30	187	/* If we aborted early, but the cpu is still technically running,
nkeynes@30	188	* we're doing a hard abort - cut the timeslice back to what we
nkeynes@30	189	* actually executed
nkeynes@30	190	*/
nkeynes@53	191	if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
nkeynes@53	192	nanosecs = sh4r.slice_cycle;
nkeynes@27	193	}
nkeynes@27	194	if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
nkeynes@30	195	TMU_run_slice( nanosecs );
nkeynes@30	196	SCIF_run_slice( nanosecs );
nkeynes@27	197	}
nkeynes@30	198	return nanosecs;
nkeynes@1	199	}
nkeynes@1	200
nkeynes@1	201	void sh4_stop(void)
nkeynes@1	202	{
nkeynes@27	203
nkeynes@1	204	}
nkeynes@1	205
nkeynes@23	206	void sh4_save_state( FILE *f )
nkeynes@16	207	{
nkeynes@16	208	fwrite( &sh4r, sizeof(sh4r), 1, f );
nkeynes@312	209	MMU_save_state( f );
nkeynes@157	210	INTC_save_state( f );
nkeynes@53	211	TMU_save_state( f );
nkeynes@23	212	SCIF_save_state( f );
nkeynes@16	213	}
nkeynes@16	214
nkeynes@23	215	int sh4_load_state( FILE * f )
nkeynes@16	216	{
nkeynes@18	217	fread( &sh4r, sizeof(sh4r), 1, f );
nkeynes@312	218	MMU_load_state( f );
nkeynes@157	219	INTC_load_state( f );
nkeynes@53	220	TMU_load_state( f );
nkeynes@23	221	return SCIF_load_state( f );
nkeynes@16	222	}
nkeynes@16	223
nkeynes@23	224	/******************** SH4 emulation core **************************/
nkeynes@23	225
nkeynes@23	226	void sh4_set_pc( int pc )
nkeynes@23	227	{
nkeynes@23	228	sh4r.pc = pc;
nkeynes@23	229	sh4r.new_pc = pc+2;
nkeynes@23	230	}
nkeynes@23	231
nkeynes@246	232	#define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
nkeynes@27	233	#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); dreamcast_stop(); return FALSE; }while(0)
nkeynes@1	234
nkeynes@157	235	#if(SH4_CALLTRACE == 1)
nkeynes@157	236	#define MAX_CALLSTACK 32
nkeynes@157	237	static struct call_stack {
nkeynes@157	238	sh4addr_t call_addr;
nkeynes@157	239	sh4addr_t target_addr;
nkeynes@157	240	sh4addr_t stack_pointer;
nkeynes@157	241	} call_stack[MAX_CALLSTACK];
nkeynes@157	242
nkeynes@157	243	static int call_stack_depth = 0;
nkeynes@157	244	int sh4_call_trace_on = 0;
nkeynes@157	245
nkeynes@157	246	static inline trace_call( sh4addr_t source, sh4addr_t dest )
nkeynes@157	247	{
nkeynes@157	248	if( call_stack_depth < MAX_CALLSTACK ) {
nkeynes@157	249	call_stack[call_stack_depth].call_addr = source;
nkeynes@157	250	call_stack[call_stack_depth].target_addr = dest;
nkeynes@157	251	call_stack[call_stack_depth].stack_pointer = sh4r.r[15];
nkeynes@157	252	}
nkeynes@157	253	call_stack_depth++;
nkeynes@157	254	}
nkeynes@157	255
nkeynes@157	256	static inline trace_return( sh4addr_t source, sh4addr_t dest )
nkeynes@157	257	{
nkeynes@157	258	if( call_stack_depth > 0 ) {
nkeynes@157	259	call_stack_depth--;
nkeynes@157	260	}
nkeynes@157	261	}
nkeynes@157	262
nkeynes@157	263	void fprint_stack_trace( FILE *f )
nkeynes@157	264	{
nkeynes@157	265	int i = call_stack_depth -1;
nkeynes@157	266	if( i >= MAX_CALLSTACK )
nkeynes@157	267	i = MAX_CALLSTACK - 1;
nkeynes@157	268	for( ; i >= 0; i-- ) {
nkeynes@157	269	fprintf( f, "%d. Call from %08X => %08X, SP=%08X\n",
nkeynes@157	270	(call_stack_depth - i), call_stack[i].call_addr,
nkeynes@157	271	call_stack[i].target_addr, call_stack[i].stack_pointer );
nkeynes@157	272	}
nkeynes@157	273	}
nkeynes@157	274
nkeynes@157	275	#define TRACE_CALL( source, dest ) trace_call(source, dest)
nkeynes@157	276	#define TRACE_RETURN( source, dest ) trace_return(source, dest)
nkeynes@157	277	#else
nkeynes@157	278	#define TRACE_CALL( dest, rts )
nkeynes@157	279	#define TRACE_RETURN( source, dest )
nkeynes@157	280	#endif
nkeynes@157	281
nkeynes@246	282	#define RAISE( x, v ) do{ \
nkeynes@1	283	if( sh4r.vbr == 0 ) { \
nkeynes@1	284	ERROR( "%08X: VBR not initialized while raising exception %03X, halting", sh4r.pc, x ); \
nkeynes@104	285	dreamcast_stop(); return FALSE; \
nkeynes@1	286	} else { \
nkeynes@246	287	sh4r.spc = sh4r.pc; \
nkeynes@1	288	sh4r.ssr = sh4_read_sr(); \
nkeynes@1	289	sh4r.sgr = sh4r.r[15]; \
nkeynes@1	290	MMIO_WRITE(MMU,EXPEVT,x); \
nkeynes@1	291	sh4r.pc = sh4r.vbr + v; \
nkeynes@1	292	sh4r.new_pc = sh4r.pc + 2; \
nkeynes@1	293	sh4_load_sr( sh4r.ssr \|SR_MD\|SR_BL\|SR_RB ); \
nkeynes@246	294	if( sh4r.in_delay_slot ) { \
nkeynes@246	295	sh4r.in_delay_slot = 0; \
nkeynes@246	296	sh4r.spc -= 2; \
nkeynes@246	297	} \
nkeynes@1	298	} \
nkeynes@27	299	return TRUE; } while(0)
nkeynes@229	300
nkeynes@10	301	#define MEM_READ_BYTE( addr ) sh4_read_byte(addr)
nkeynes@10	302	#define MEM_READ_WORD( addr ) sh4_read_word(addr)
nkeynes@10	303	#define MEM_READ_LONG( addr ) sh4_read_long(addr)
nkeynes@10	304	#define MEM_WRITE_BYTE( addr, val ) sh4_write_byte(addr, val)
nkeynes@10	305	#define MEM_WRITE_WORD( addr, val ) sh4_write_word(addr, val)
nkeynes@10	306	#define MEM_WRITE_LONG( addr, val ) sh4_write_long(addr, val)
nkeynes@1	307
nkeynes@1	308	#define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
nkeynes@1	309
nkeynes@124	310	#define MEM_FP_READ( addr, reg ) sh4_read_float( addr, reg );
nkeynes@124	311	#define MEM_FP_WRITE( addr, reg ) sh4_write_float( addr, reg );
nkeynes@84	312
nkeynes@246	313	#define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL )
nkeynes@367	314	#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
nkeynes@367	315	#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
nkeynes@367	316	#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
nkeynes@367	317	#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
nkeynes@208	318
nkeynes@367	319	#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
nkeynes@84	320	#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
nkeynes@246	321	#define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
nkeynes@1	322
nkeynes@1	323	static void sh4_switch_banks( )
nkeynes@1	324	{
nkeynes@1	325	uint32_t tmp[8];
nkeynes@1	326
nkeynes@1	327	memcpy( tmp, sh4r.r, sizeof(uint32_t)*8 );
nkeynes@1	328	memcpy( sh4r.r, sh4r.r_bank, sizeof(uint32_t)*8 );
nkeynes@1	329	memcpy( sh4r.r_bank, tmp, sizeof(uint32_t)*8 );
nkeynes@1	330	}
nkeynes@1	331
nkeynes@1	332	static void sh4_load_sr( uint32_t newval )
nkeynes@1	333	{
nkeynes@1	334	if( (newval ^ sh4r.sr) & SR_RB )
nkeynes@1	335	sh4_switch_banks();
nkeynes@1	336	sh4r.sr = newval;
nkeynes@1	337	sh4r.t = (newval&SR_T) ? 1 : 0;
nkeynes@1	338	sh4r.s = (newval&SR_S) ? 1 : 0;
nkeynes@1	339	sh4r.m = (newval&SR_M) ? 1 : 0;
nkeynes@1	340	sh4r.q = (newval&SR_Q) ? 1 : 0;
nkeynes@1	341	intc_mask_changed();
nkeynes@1	342	}
nkeynes@1	343
nkeynes@124	344	static void sh4_write_float( uint32_t addr, int reg )
nkeynes@124	345	{
nkeynes@124	346	if( IS_FPU_DOUBLESIZE() ) {
nkeynes@124	347	if( reg & 1 ) {
nkeynes@124	348	sh4_write_long( addr, ((uint32_t )&XF((reg)&0x0E)) );
nkeynes@124	349	sh4_write_long( addr+4, ((uint32_t )&XF(reg)) );
nkeynes@124	350	} else {
nkeynes@124	351	sh4_write_long( addr, ((uint32_t )&FR(reg)) );
nkeynes@124	352	sh4_write_long( addr+4, ((uint32_t )&FR((reg)\|0x01)) );
nkeynes@124	353	}
nkeynes@124	354	} else {
nkeynes@124	355	sh4_write_long( addr, ((uint32_t )&FR((reg))) );
nkeynes@124	356	}
nkeynes@124	357	}
nkeynes@124	358
nkeynes@124	359	static void sh4_read_float( uint32_t addr, int reg )
nkeynes@124	360	{
nkeynes@124	361	if( IS_FPU_DOUBLESIZE() ) {
nkeynes@124	362	if( reg & 1 ) {
nkeynes@124	363	((uint32_t )&XF((reg) & 0x0E)) = sh4_read_long(addr);
nkeynes@124	364	((uint32_t )&XF(reg)) = sh4_read_long(addr+4);
nkeynes@124	365	} else {
nkeynes@124	366	((uint32_t )&FR(reg)) = sh4_read_long(addr);
nkeynes@124	367	((uint32_t )&FR((reg) \| 0x01)) = sh4_read_long(addr+4);
nkeynes@124	368	}
nkeynes@124	369	} else {
nkeynes@124	370	((uint32_t )&FR(reg)) = sh4_read_long(addr);
nkeynes@124	371	}
nkeynes@124	372	}
nkeynes@124	373
nkeynes@1	374	static uint32_t sh4_read_sr( void )
nkeynes@1	375	{
nkeynes@1	376	/* synchronize sh4r.sr with the various bitflags */
nkeynes@1	377	sh4r.sr &= SR_MQSTMASK;
nkeynes@1	378	if( sh4r.t ) sh4r.sr \|= SR_T;
nkeynes@1	379	if( sh4r.s ) sh4r.sr \|= SR_S;
nkeynes@1	380	if( sh4r.m ) sh4r.sr \|= SR_M;
nkeynes@1	381	if( sh4r.q ) sh4r.sr \|= SR_Q;
nkeynes@1	382	return sh4r.sr;
nkeynes@1	383	}
nkeynes@246	384
nkeynes@246	385	/**
nkeynes@246	386	* Raise a general CPU exception for the specified exception code.
nkeynes@246	387	* (NOT for TRAPA or TLB exceptions)
nkeynes@246	388	*/
nkeynes@246	389	gboolean sh4_raise_exception( int code )
nkeynes@1	390	{
nkeynes@246	391	RAISE( code, EXV_EXCEPTION );
nkeynes@246	392	}
nkeynes@246	393
nkeynes@246	394	gboolean sh4_raise_slot_exception( int normal_code, int slot_code ) {
nkeynes@246	395	if( sh4r.in_delay_slot ) {
nkeynes@246	396	return sh4_raise_exception(slot_code);
nkeynes@246	397	} else {
nkeynes@246	398	return sh4_raise_exception(normal_code);
nkeynes@246	399	}
nkeynes@246	400	}
nkeynes@246	401
nkeynes@246	402	gboolean sh4_raise_tlb_exception( int code )
nkeynes@246	403	{
nkeynes@246	404	RAISE( code, EXV_TLBMISS );
nkeynes@1	405	}
nkeynes@1	406
nkeynes@359	407	void sh4_accept_interrupt( void )
nkeynes@1	408	{
nkeynes@1	409	uint32_t code = intc_accept_interrupt();
nkeynes@1	410	sh4r.ssr = sh4_read_sr();
nkeynes@1	411	sh4r.spc = sh4r.pc;
nkeynes@1	412	sh4r.sgr = sh4r.r[15];
nkeynes@1	413	sh4_load_sr( sh4r.ssr\|SR_BL\|SR_MD\|SR_RB );
nkeynes@1	414	MMIO_WRITE( MMU, INTEVT, code );
nkeynes@1	415	sh4r.pc = sh4r.vbr + 0x600;
nkeynes@1	416	sh4r.new_pc = sh4r.pc + 2;
nkeynes@92	417	// WARN( "Accepting interrupt %03X, from %08X => %08X", code, sh4r.spc, sh4r.pc );
nkeynes@1	418	}
nkeynes@1	419
nkeynes@27	420	gboolean sh4_execute_instruction( void )
nkeynes@1	421	{
nkeynes@84	422	uint32_t pc;
nkeynes@2	423	unsigned short ir;
nkeynes@1	424	uint32_t tmp;
nkeynes@123	425	float ftmp;
nkeynes@123	426	double dtmp;
nkeynes@1	427
nkeynes@1	428	#define R0 sh4r.r[0]
nkeynes@2	429	pc = sh4r.pc;
nkeynes@84	430	if( pc > 0xFFFFFF00 ) {
nkeynes@84	431	/* SYSCALL Magic */
nkeynes@102	432	syscall_invoke( pc );
nkeynes@104	433	sh4r.in_delay_slot = 0;
nkeynes@84	434	pc = sh4r.pc = sh4r.pr;
nkeynes@84	435	sh4r.new_pc = sh4r.pc + 2;
nkeynes@84	436	}
nkeynes@208	437	CHECKRALIGN16(pc);
nkeynes@235	438
nkeynes@235	439	/* Read instruction */
nkeynes@235	440	uint32_t pageaddr = pc >> 12;
nkeynes@235	441	if( sh4_icache != NULL && pageaddr == sh4_icache_addr ) {
nkeynes@235	442	ir = sh4_icache[(pc&0xFFF)>>1];
nkeynes@235	443	} else {
nkeynes@235	444	sh4_icache = (uint16_t *)mem_get_page(pc);
nkeynes@235	445	if( ((uint32_t)sh4_icache) < MAX_IO_REGIONS ) {
nkeynes@235	446	/* If someone's actually been so daft as to try to execute out of an IO
nkeynes@235	447	* region, fallback on the full-blown memory read
nkeynes@235	448	*/
nkeynes@235	449	sh4_icache = NULL;
nkeynes@235	450	ir = MEM_READ_WORD(pc);
nkeynes@235	451	} else {
nkeynes@235	452	sh4_icache_addr = pageaddr;
nkeynes@235	453	ir = sh4_icache[(pc&0xFFF)>>1];
nkeynes@235	454	}
nkeynes@235	455	}
nkeynes@359	456	switch( (ir&0xF000) >> 12 ) {
nkeynes@359	457	case 0x0:
nkeynes@359	458	switch( ir&0xF ) {
nkeynes@359	459	case 0x2:
nkeynes@359	460	switch( (ir&0x80) >> 7 ) {
nkeynes@359	461	case 0x0:
nkeynes@359	462	switch( (ir&0x70) >> 4 ) {
nkeynes@359	463	case 0x0:
nkeynes@359	464	{ /* STC SR, Rn */
nkeynes@359	465	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	466	CHECKPRIV();
nkeynes@359	467	sh4r.r[Rn] = sh4_read_sr();
nkeynes@359	468	}
nkeynes@359	469	break;
nkeynes@359	470	case 0x1:
nkeynes@359	471	{ /* STC GBR, Rn */
nkeynes@359	472	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	473	CHECKPRIV();
nkeynes@359	474	sh4r.r[Rn] = sh4r.gbr;
nkeynes@359	475	}
nkeynes@359	476	break;
nkeynes@359	477	case 0x2:
nkeynes@359	478	{ /* STC VBR, Rn */
nkeynes@359	479	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	480	CHECKPRIV();
nkeynes@359	481	sh4r.r[Rn] = sh4r.vbr;
nkeynes@359	482	}
nkeynes@359	483	break;
nkeynes@359	484	case 0x3:
nkeynes@359	485	{ /* STC SSR, Rn */
nkeynes@359	486	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	487	CHECKPRIV();
nkeynes@359	488	sh4r.r[Rn] = sh4r.ssr;
nkeynes@359	489	}
nkeynes@359	490	break;
nkeynes@359	491	case 0x4:
nkeynes@359	492	{ /* STC SPC, Rn */
nkeynes@359	493	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	494	CHECKPRIV();
nkeynes@359	495	sh4r.r[Rn] = sh4r.spc;
nkeynes@359	496	}
nkeynes@359	497	break;
nkeynes@359	498	default:
nkeynes@359	499	UNDEF();
nkeynes@359	500	break;
nkeynes@359	501	}
nkeynes@359	502	break;
nkeynes@359	503	case 0x1:
nkeynes@359	504	{ /* STC Rm_BANK, Rn */
nkeynes@359	505	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
nkeynes@359	506	CHECKPRIV();
nkeynes@359	507	sh4r.r[Rn] = sh4r.r_bank[Rm_BANK];
nkeynes@359	508	}
nkeynes@359	509	break;
nkeynes@359	510	}
nkeynes@359	511	break;
nkeynes@359	512	case 0x3:
nkeynes@359	513	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	514	case 0x0:
nkeynes@359	515	{ /* BSRF Rn */
nkeynes@359	516	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	517	CHECKSLOTILLEGAL();
nkeynes@359	518	CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359	519	sh4r.in_delay_slot = 1;
nkeynes@359	520	sh4r.pr = sh4r.pc + 4;
nkeynes@359	521	sh4r.pc = sh4r.new_pc;
nkeynes@359	522	sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359	523	TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359	524	return TRUE;
nkeynes@359	525	}
nkeynes@359	526	break;
nkeynes@359	527	case 0x2:
nkeynes@359	528	{ /* BRAF Rn */
nkeynes@359	529	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	530	CHECKSLOTILLEGAL();
nkeynes@359	531	CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359	532	sh4r.in_delay_slot = 1;
nkeynes@359	533	sh4r.pc = sh4r.new_pc;
nkeynes@359	534	sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359	535	return TRUE;
nkeynes@359	536	}
nkeynes@359	537	break;
nkeynes@359	538	case 0x8:
nkeynes@359	539	{ /* PREF @Rn */
nkeynes@359	540	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	541	tmp = sh4r.r[Rn];
nkeynes@359	542	if( (tmp & 0xFC000000) == 0xE0000000 ) {
nkeynes@359	543	/* Store queue operation */
nkeynes@359	544	int queue = (tmp&0x20)>>2;
nkeynes@359	545	int32_t *src = &sh4r.store_queue[queue];
nkeynes@359	546	uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
nkeynes@359	547	uint32_t target = tmp&0x03FFFFE0 \| hi;
nkeynes@359	548	mem_copy_to_sh4( target, src, 32 );
nkeynes@359	549	}
nkeynes@359	550	}
nkeynes@359	551	break;
nkeynes@359	552	case 0x9:
nkeynes@359	553	{ /* OCBI @Rn */
nkeynes@359	554	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	555	}
nkeynes@359	556	break;
nkeynes@359	557	case 0xA:
nkeynes@359	558	{ /* OCBP @Rn */
nkeynes@359	559	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	560	}
nkeynes@359	561	break;
nkeynes@359	562	case 0xB:
nkeynes@359	563	{ /* OCBWB @Rn */
nkeynes@359	564	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	565	}
nkeynes@359	566	break;
nkeynes@359	567	case 0xC:
nkeynes@359	568	{ /* MOVCA.L R0, @Rn */
nkeynes@359	569	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	570	tmp = sh4r.r[Rn];
nkeynes@359	571	CHECKWALIGN32(tmp);
nkeynes@359	572	MEM_WRITE_LONG( tmp, R0 );
nkeynes@359	573	}
nkeynes@359	574	break;
nkeynes@359	575	default:
nkeynes@359	576	UNDEF();
nkeynes@359	577	break;
nkeynes@359	578	}
nkeynes@359	579	break;
nkeynes@359	580	case 0x4:
nkeynes@359	581	{ /* MOV.B Rm, @(R0, Rn) */
nkeynes@359	582	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	583	MEM_WRITE_BYTE( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	584	}
nkeynes@359	585	break;
nkeynes@359	586	case 0x5:
nkeynes@359	587	{ /* MOV.W Rm, @(R0, Rn) */
nkeynes@359	588	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	589	CHECKWALIGN16( R0 + sh4r.r[Rn] );
nkeynes@359	590	MEM_WRITE_WORD( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	591	}
nkeynes@359	592	break;
nkeynes@359	593	case 0x6:
nkeynes@359	594	{ /* MOV.L Rm, @(R0, Rn) */
nkeynes@359	595	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	596	CHECKWALIGN32( R0 + sh4r.r[Rn] );
nkeynes@359	597	MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	598	}
nkeynes@359	599	break;
nkeynes@359	600	case 0x7:
nkeynes@359	601	{ /* MUL.L Rm, Rn */
nkeynes@359	602	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	603	sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) \|
nkeynes@359	604	(sh4r.r[Rm] * sh4r.r[Rn]);
nkeynes@359	605	}
nkeynes@359	606	break;
nkeynes@359	607	case 0x8:
nkeynes@359	608	switch( (ir&0xFF0) >> 4 ) {
nkeynes@359	609	case 0x0:
nkeynes@359	610	{ /* CLRT */
nkeynes@359	611	sh4r.t = 0;
nkeynes@359	612	}
nkeynes@359	613	break;
nkeynes@359	614	case 0x1:
nkeynes@359	615	{ /* SETT */
nkeynes@359	616	sh4r.t = 1;
nkeynes@359	617	}
nkeynes@359	618	break;
nkeynes@359	619	case 0x2:
nkeynes@359	620	{ /* CLRMAC */
nkeynes@359	621	sh4r.mac = 0;
nkeynes@359	622	}
nkeynes@359	623	break;
nkeynes@359	624	case 0x3:
nkeynes@359	625	{ /* LDTLB */
nkeynes@359	626	/* TODO */
nkeynes@359	627	}
nkeynes@359	628	break;
nkeynes@359	629	case 0x4:
nkeynes@359	630	{ /* CLRS */
nkeynes@359	631	sh4r.s = 0;
nkeynes@359	632	}
nkeynes@359	633	break;
nkeynes@359	634	case 0x5:
nkeynes@359	635	{ /* SETS */
nkeynes@359	636	sh4r.s = 1;
nkeynes@359	637	}
nkeynes@359	638	break;
nkeynes@359	639	default:
nkeynes@359	640	UNDEF();
nkeynes@359	641	break;
nkeynes@359	642	}
nkeynes@359	643	break;
nkeynes@359	644	case 0x9:
nkeynes@359	645	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	646	case 0x0:
nkeynes@359	647	{ /* NOP */
nkeynes@359	648	/* NOP */
nkeynes@359	649	}
nkeynes@359	650	break;
nkeynes@359	651	case 0x1:
nkeynes@359	652	{ /* DIV0U */
nkeynes@359	653	sh4r.m = sh4r.q = sh4r.t = 0;
nkeynes@359	654	}
nkeynes@359	655	break;
nkeynes@359	656	case 0x2:
nkeynes@359	657	{ /* MOVT Rn */
nkeynes@359	658	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	659	sh4r.r[Rn] = sh4r.t;
nkeynes@359	660	}
nkeynes@359	661	break;
nkeynes@359	662	default:
nkeynes@359	663	UNDEF();
nkeynes@359	664	break;
nkeynes@359	665	}
nkeynes@359	666	break;
nkeynes@359	667	case 0xA:
nkeynes@359	668	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	669	case 0x0:
nkeynes@359	670	{ /* STS MACH, Rn */
nkeynes@359	671	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	672	sh4r.r[Rn] = (sh4r.mac>>32);
nkeynes@359	673	}
nkeynes@359	674	break;
nkeynes@359	675	case 0x1:
nkeynes@359	676	{ /* STS MACL, Rn */
nkeynes@359	677	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	678	sh4r.r[Rn] = (uint32_t)sh4r.mac;
nkeynes@359	679	}
nkeynes@359	680	break;
nkeynes@359	681	case 0x2:
nkeynes@359	682	{ /* STS PR, Rn */
nkeynes@359	683	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	684	sh4r.r[Rn] = sh4r.pr;
nkeynes@359	685	}
nkeynes@359	686	break;
nkeynes@359	687	case 0x3:
nkeynes@359	688	{ /* STC SGR, Rn */
nkeynes@359	689	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	690	CHECKPRIV();
nkeynes@359	691	sh4r.r[Rn] = sh4r.sgr;
nkeynes@359	692	}
nkeynes@359	693	break;
nkeynes@359	694	case 0x5:
nkeynes@359	695	{ /* STS FPUL, Rn */
nkeynes@359	696	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	697	sh4r.r[Rn] = sh4r.fpul;
nkeynes@359	698	}
nkeynes@359	699	break;
nkeynes@359	700	case 0x6:
nkeynes@359	701	{ /* STS FPSCR, Rn */
nkeynes@359	702	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	703	sh4r.r[Rn] = sh4r.fpscr;
nkeynes@359	704	}
nkeynes@359	705	break;
nkeynes@359	706	case 0xF:
nkeynes@359	707	{ /* STC DBR, Rn */
nkeynes@359	708	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	709	CHECKPRIV(); sh4r.r[Rn] = sh4r.dbr;
nkeynes@359	710	}
nkeynes@359	711	break;
nkeynes@359	712	default:
nkeynes@359	713	UNDEF();
nkeynes@359	714	break;
nkeynes@359	715	}
nkeynes@359	716	break;
nkeynes@359	717	case 0xB:
nkeynes@359	718	switch( (ir&0xFF0) >> 4 ) {
nkeynes@359	719	case 0x0:
nkeynes@359	720	{ /* RTS */
nkeynes@359	721	CHECKSLOTILLEGAL();
nkeynes@359	722	CHECKDEST( sh4r.pr );
nkeynes@359	723	sh4r.in_delay_slot = 1;
nkeynes@359	724	sh4r.pc = sh4r.new_pc;
nkeynes@359	725	sh4r.new_pc = sh4r.pr;
nkeynes@359	726	TRACE_RETURN( pc, sh4r.new_pc );
nkeynes@359	727	return TRUE;
nkeynes@359	728	}
nkeynes@359	729	break;
nkeynes@359	730	case 0x1:
nkeynes@359	731	{ /* SLEEP */
nkeynes@359	732	if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
nkeynes@359	733	sh4r.sh4_state = SH4_STATE_STANDBY;
nkeynes@359	734	} else {
nkeynes@359	735	sh4r.sh4_state = SH4_STATE_SLEEP;
nkeynes@359	736	}
nkeynes@359	737	return FALSE; /* Halt CPU */
nkeynes@359	738	}
nkeynes@359	739	break;
nkeynes@359	740	case 0x2:
nkeynes@359	741	{ /* RTE */
nkeynes@359	742	CHECKPRIV();
nkeynes@359	743	CHECKDEST( sh4r.spc );
nkeynes@359	744	CHECKSLOTILLEGAL();
nkeynes@359	745	sh4r.in_delay_slot = 1;
nkeynes@359	746	sh4r.pc = sh4r.new_pc;
nkeynes@359	747	sh4r.new_pc = sh4r.spc;
nkeynes@359	748	sh4_load_sr( sh4r.ssr );
nkeynes@359	749	return TRUE;
nkeynes@359	750	}
nkeynes@359	751	break;
nkeynes@359	752	default:
nkeynes@359	753	UNDEF();
nkeynes@359	754	break;
nkeynes@359	755	}
nkeynes@359	756	break;
nkeynes@359	757	case 0xC:
nkeynes@359	758	{ /* MOV.B @(R0, Rm), Rn */
nkeynes@359	759	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	760	sh4r.r[Rn] = MEM_READ_BYTE( R0 + sh4r.r[Rm] );
nkeynes@359	761	}
nkeynes@359	762	break;
nkeynes@359	763	case 0xD:
nkeynes@359	764	{ /* MOV.W @(R0, Rm), Rn */
nkeynes@359	765	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	766	CHECKRALIGN16( R0 + sh4r.r[Rm] );
nkeynes@359	767	sh4r.r[Rn] = MEM_READ_WORD( R0 + sh4r.r[Rm] );
nkeynes@359	768	}
nkeynes@359	769	break;
nkeynes@359	770	case 0xE:
nkeynes@359	771	{ /* MOV.L @(R0, Rm), Rn */
nkeynes@359	772	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	773	CHECKRALIGN32( R0 + sh4r.r[Rm] );
nkeynes@359	774	sh4r.r[Rn] = MEM_READ_LONG( R0 + sh4r.r[Rm] );
nkeynes@359	775	}
nkeynes@359	776	break;
nkeynes@359	777	case 0xF:
nkeynes@359	778	{ /* MAC.L @Rm+, @Rn+ */
nkeynes@359	779	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	780	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	781	CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@359	782	int64_t tmpl = SIGNEXT32(MEM_READ_LONG(sh4r.r[Rn]));
nkeynes@359	783	sh4r.r[Rn] += 4;
nkeynes@359	784	tmpl = tmpl * SIGNEXT32(MEM_READ_LONG(sh4r.r[Rm])) + sh4r.mac;
nkeynes@359	785	sh4r.r[Rm] += 4;
nkeynes@359	786	if( sh4r.s ) {
nkeynes@359	787	/* 48-bit Saturation. Yuch */
nkeynes@359	788	if( tmpl < (int64_t)0xFFFF800000000000LL )
nkeynes@359	789	tmpl = 0xFFFF800000000000LL;
nkeynes@359	790	else if( tmpl > (int64_t)0x00007FFFFFFFFFFFLL )
nkeynes@359	791	tmpl = 0x00007FFFFFFFFFFFLL;
nkeynes@359	792	}
nkeynes@359	793	sh4r.mac = tmpl;
nkeynes@359	794	}
nkeynes@359	795	break;
nkeynes@359	796	default:
nkeynes@359	797	UNDEF();
nkeynes@359	798	break;
nkeynes@359	799	}
nkeynes@359	800	break;
nkeynes@359	801	case 0x1:
nkeynes@359	802	{ /* MOV.L Rm, @(disp, Rn) */
nkeynes@359	803	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
nkeynes@359	804	tmp = sh4r.r[Rn] + disp;
nkeynes@359	805	CHECKWALIGN32( tmp );
nkeynes@359	806	MEM_WRITE_LONG( tmp, sh4r.r[Rm] );
nkeynes@359	807	}
nkeynes@359	808	break;
nkeynes@359	809	case 0x2:
nkeynes@359	810	switch( ir&0xF ) {
nkeynes@359	811	case 0x0:
nkeynes@359	812	{ /* MOV.B Rm, @Rn */
nkeynes@359	813	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	814	MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	815	}
nkeynes@359	816	break;
nkeynes@359	817	case 0x1:
nkeynes@359	818	{ /* MOV.W Rm, @Rn */
nkeynes@359	819	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	820	CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	821	}
nkeynes@359	822	break;
nkeynes@359	823	case 0x2:
nkeynes@359	824	{ /* MOV.L Rm, @Rn */
nkeynes@359	825	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	826	CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	827	}
nkeynes@359	828	break;
nkeynes@359	829	case 0x4:
nkeynes@359	830	{ /* MOV.B Rm, @-Rn */
nkeynes@359	831	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	832	sh4r.r[Rn] --; MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	833	}
nkeynes@359	834	break;
nkeynes@359	835	case 0x5:
nkeynes@359	836	{ /* MOV.W Rm, @-Rn */
nkeynes@359	837	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	838	sh4r.r[Rn] -= 2; CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	839	}
nkeynes@359	840	break;
nkeynes@359	841	case 0x6:
nkeynes@359	842	{ /* MOV.L Rm, @-Rn */
nkeynes@359	843	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	844	sh4r.r[Rn] -= 4; CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	845	}
nkeynes@359	846	break;
nkeynes@359	847	case 0x7:
nkeynes@359	848	{ /* DIV0S Rm, Rn */
nkeynes@359	849	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	850	sh4r.q = sh4r.r[Rn]>>31;
nkeynes@359	851	sh4r.m = sh4r.r[Rm]>>31;
nkeynes@359	852	sh4r.t = sh4r.q ^ sh4r.m;
nkeynes@359	853	}
nkeynes@359	854	break;
nkeynes@359	855	case 0x8:
nkeynes@359	856	{ /* TST Rm, Rn */
nkeynes@359	857	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	858	sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1);
nkeynes@359	859	}
nkeynes@359	860	break;
nkeynes@359	861	case 0x9:
nkeynes@359	862	{ /* AND Rm, Rn */
nkeynes@359	863	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	864	sh4r.r[Rn] &= sh4r.r[Rm];
nkeynes@359	865	}
nkeynes@359	866	break;
nkeynes@359	867	case 0xA:
nkeynes@359	868	{ /* XOR Rm, Rn */
nkeynes@359	869	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	870	sh4r.r[Rn] ^= sh4r.r[Rm];
nkeynes@359	871	}
nkeynes@359	872	break;
nkeynes@359	873	case 0xB:
nkeynes@359	874	{ /* OR Rm, Rn */
nkeynes@359	875	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	876	sh4r.r[Rn] \|= sh4r.r[Rm];
nkeynes@359	877	}
nkeynes@359	878	break;
nkeynes@359	879	case 0xC:
nkeynes@359	880	{ /* CMP/STR Rm, Rn */
nkeynes@359	881	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	882	/* set T = 1 if any byte in RM & RN is the same */
nkeynes@359	883	tmp = sh4r.r[Rm] ^ sh4r.r[Rn];
nkeynes@359	884	sh4r.t = ((tmp&0x000000FF)==0 \|\| (tmp&0x0000FF00)==0 \|\|
nkeynes@359	885	(tmp&0x00FF0000)==0 \|\| (tmp&0xFF000000)==0)?1:0;
nkeynes@359	886	}
nkeynes@359	887	break;
nkeynes@359	888	case 0xD:
nkeynes@359	889	{ /* XTRCT Rm, Rn */
nkeynes@359	890	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	891	sh4r.r[Rn] = (sh4r.r[Rn]>>16) \| (sh4r.r[Rm]<<16);
nkeynes@359	892	}
nkeynes@359	893	break;
nkeynes@359	894	case 0xE:
nkeynes@359	895	{ /* MULU.W Rm, Rn */
nkeynes@359	896	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	897	sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) \|
nkeynes@359	898	(uint32_t)((sh4r.r[Rm]&0xFFFF) * (sh4r.r[Rn]&0xFFFF));
nkeynes@359	899	}
nkeynes@359	900	break;
nkeynes@359	901	case 0xF:
nkeynes@359	902	{ /* MULS.W Rm, Rn */
nkeynes@359	903	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	904	sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) \|
nkeynes@359	905	(uint32_t)(SIGNEXT32(sh4r.r[Rm]&0xFFFF) * SIGNEXT32(sh4r.r[Rn]&0xFFFF));
nkeynes@359	906	}
nkeynes@359	907	break;
nkeynes@359	908	default:
nkeynes@359	909	UNDEF();
nkeynes@359	910	break;
nkeynes@359	911	}
nkeynes@359	912	break;
nkeynes@359	913	case 0x3:
nkeynes@359	914	switch( ir&0xF ) {
nkeynes@359	915	case 0x0:
nkeynes@359	916	{ /* CMP/EQ Rm, Rn */
nkeynes@359	917	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	918	sh4r.t = ( sh4r.r[Rm] == sh4r.r[Rn] ? 1 : 0 );
nkeynes@359	919	}
nkeynes@359	920	break;
nkeynes@359	921	case 0x2:
nkeynes@359	922	{ /* CMP/HS Rm, Rn */
nkeynes@359	923	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	924	sh4r.t = ( sh4r.r[Rn] >= sh4r.r[Rm] ? 1 : 0 );
nkeynes@359	925	}
nkeynes@359	926	break;
nkeynes@359	927	case 0x3:
nkeynes@359	928	{ /* CMP/GE Rm, Rn */
nkeynes@359	929	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	930	sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= ((int32_t)sh4r.r[Rm]) ? 1 : 0 );
nkeynes@359	931	}
nkeynes@359	932	break;
nkeynes@359	933	case 0x4:
nkeynes@359	934	{ /* DIV1 Rm, Rn */
nkeynes@359	935	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	936	/* This is just from the sh4p manual with some
nkeynes@359	937	* simplifications (someone want to check it's correct? :)
nkeynes@359	938	* Why they couldn't just provide a real DIV instruction...
nkeynes@359	939	*/
nkeynes@359	940	uint32_t tmp0, tmp1, tmp2, dir;
nkeynes@359	941
nkeynes@359	942	dir = sh4r.q ^ sh4r.m;
nkeynes@359	943	sh4r.q = (sh4r.r[Rn] >> 31);
nkeynes@359	944	tmp2 = sh4r.r[Rm];
nkeynes@359	945	sh4r.r[Rn] = (sh4r.r[Rn] << 1) \| sh4r.t;
nkeynes@359	946	tmp0 = sh4r.r[Rn];
nkeynes@359	947	if( dir ) {
nkeynes@359	948	sh4r.r[Rn] += tmp2;
nkeynes@359	949	tmp1 = (sh4r.r[Rn]<tmp0 ? 1 : 0 );
nkeynes@359	950	} else {
nkeynes@359	951	sh4r.r[Rn] -= tmp2;
nkeynes@359	952	tmp1 = (sh4r.r[Rn]>tmp0 ? 1 : 0 );
nkeynes@359	953	}
nkeynes@359	954	sh4r.q ^= sh4r.m ^ tmp1;
nkeynes@359	955	sh4r.t = ( sh4r.q == sh4r.m ? 1 : 0 );
nkeynes@359	956	}
nkeynes@359	957	break;
nkeynes@359	958	case 0x5:
nkeynes@359	959	{ /* DMULU.L Rm, Rn */
nkeynes@359	960	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	961	sh4r.mac = ((uint64_t)sh4r.r[Rm]) * ((uint64_t)sh4r.r[Rn]);
nkeynes@359	962	}
nkeynes@359	963	break;
nkeynes@359	964	case 0x6:
nkeynes@359	965	{ /* CMP/HI Rm, Rn */
nkeynes@359	966	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	967	sh4r.t = ( sh4r.r[Rn] > sh4r.r[Rm] ? 1 : 0 );
nkeynes@359	968	}
nkeynes@359	969	break;
nkeynes@359	970	case 0x7:
nkeynes@359	971	{ /* CMP/GT Rm, Rn */
nkeynes@359	972	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	973	sh4r.t = ( ((int32_t)sh4r.r[Rn]) > ((int32_t)sh4r.r[Rm]) ? 1 : 0 );
nkeynes@359	974	}
nkeynes@359	975	break;
nkeynes@359	976	case 0x8:
nkeynes@359	977	{ /* SUB Rm, Rn */
nkeynes@359	978	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	979	sh4r.r[Rn] -= sh4r.r[Rm];
nkeynes@359	980	}
nkeynes@359	981	break;
nkeynes@359	982	case 0xA:
nkeynes@359	983	{ /* SUBC Rm, Rn */
nkeynes@359	984	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	985	tmp = sh4r.r[Rn];
nkeynes@359	986	sh4r.r[Rn] = sh4r.r[Rn] - sh4r.r[Rm] - sh4r.t;
nkeynes@359	987	sh4r.t = (sh4r.r[Rn] > tmp \|\| (sh4r.r[Rn] == tmp && sh4r.t == 1));
nkeynes@359	988	}
nkeynes@359	989	break;
nkeynes@359	990	case 0xB:
nkeynes@359	991	UNIMP(ir); /* SUBV Rm, Rn */
nkeynes@359	992	break;
nkeynes@359	993	case 0xC:
nkeynes@359	994	{ /* ADD Rm, Rn */
nkeynes@359	995	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	996	sh4r.r[Rn] += sh4r.r[Rm];
nkeynes@359	997	}
nkeynes@359	998	break;
nkeynes@359	999	case 0xD:
nkeynes@359	1000	{ /* DMULS.L Rm, Rn */
nkeynes@359	1001	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1002	sh4r.mac = SIGNEXT32(sh4r.r[Rm]) * SIGNEXT32(sh4r.r[Rn]);
nkeynes@359	1003	}
nkeynes@359	1004	break;
nkeynes@359	1005	case 0xE:
nkeynes@359	1006	{ /* ADDC Rm, Rn */
nkeynes@359	1007	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1008	tmp = sh4r.r[Rn];
nkeynes@359	1009	sh4r.r[Rn] += sh4r.r[Rm] + sh4r.t;
nkeynes@359	1010	sh4r.t = ( sh4r.r[Rn] < tmp \|\| (sh4r.r[Rn] == tmp && sh4r.t != 0) ? 1 : 0 );
nkeynes@359	1011	}
nkeynes@359	1012	break;
nkeynes@359	1013	case 0xF:
nkeynes@359	1014	{ /* ADDV Rm, Rn */
nkeynes@359	1015	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1016	tmp = sh4r.r[Rn] + sh4r.r[Rm];
nkeynes@359	1017	sh4r.t = ( (sh4r.r[Rn]>>31) == (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
nkeynes@359	1018	sh4r.r[Rn] = tmp;
nkeynes@359	1019	}
nkeynes@359	1020	break;
nkeynes@359	1021	default:
nkeynes@359	1022	UNDEF();
nkeynes@359	1023	break;
nkeynes@359	1024	}
nkeynes@359	1025	break;
nkeynes@359	1026	case 0x4:
nkeynes@359	1027	switch( ir&0xF ) {
nkeynes@359	1028	case 0x0:
nkeynes@359	1029	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1030	case 0x0:
nkeynes@359	1031	{ /* SHLL Rn */
nkeynes@359	1032	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1033	sh4r.t = sh4r.r[Rn] >> 31; sh4r.r[Rn] <<= 1;
nkeynes@359	1034	}
nkeynes@359	1035	break;
nkeynes@359	1036	case 0x1:
nkeynes@359	1037	{ /* DT Rn */
nkeynes@359	1038	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1039	sh4r.r[Rn] --;
nkeynes@359	1040	sh4r.t = ( sh4r.r[Rn] == 0 ? 1 : 0 );
nkeynes@359	1041	}
nkeynes@359	1042	break;
nkeynes@359	1043	case 0x2:
nkeynes@359	1044	{ /* SHAL Rn */
nkeynes@359	1045	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1046	sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359	1047	sh4r.r[Rn] <<= 1;
nkeynes@359	1048	}
nkeynes@359	1049	break;
nkeynes@359	1050	default:
nkeynes@359	1051	UNDEF();
nkeynes@359	1052	break;
nkeynes@359	1053	}
nkeynes@359	1054	break;
nkeynes@359	1055	case 0x1:
nkeynes@359	1056	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1057	case 0x0:
nkeynes@359	1058	{ /* SHLR Rn */
nkeynes@359	1059	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1060	sh4r.t = sh4r.r[Rn] & 0x00000001; sh4r.r[Rn] >>= 1;
nkeynes@359	1061	}
nkeynes@359	1062	break;
nkeynes@359	1063	case 0x1:
nkeynes@359	1064	{ /* CMP/PZ Rn */
nkeynes@359	1065	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1066	sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= 0 ? 1 : 0 );
nkeynes@359	1067	}
nkeynes@359	1068	break;
nkeynes@359	1069	case 0x2:
nkeynes@359	1070	{ /* SHAR Rn */
nkeynes@359	1071	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1072	sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359	1073	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 1;
nkeynes@359	1074	}
nkeynes@359	1075	break;
nkeynes@359	1076	default:
nkeynes@359	1077	UNDEF();
nkeynes@359	1078	break;
nkeynes@359	1079	}
nkeynes@359	1080	break;
nkeynes@359	1081	case 0x2:
nkeynes@359	1082	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1083	case 0x0:
nkeynes@359	1084	{ /* STS.L MACH, @-Rn */
nkeynes@359	1085	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1086	sh4r.r[Rn] -= 4;
nkeynes@359	1087	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1088	MEM_WRITE_LONG( sh4r.r[Rn], (sh4r.mac>>32) );
nkeynes@359	1089	}
nkeynes@359	1090	break;
nkeynes@359	1091	case 0x1:
nkeynes@359	1092	{ /* STS.L MACL, @-Rn */
nkeynes@359	1093	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1094	sh4r.r[Rn] -= 4;
nkeynes@359	1095	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1096	MEM_WRITE_LONG( sh4r.r[Rn], (uint32_t)sh4r.mac );
nkeynes@359	1097	}
nkeynes@359	1098	break;
nkeynes@359	1099	case 0x2:
nkeynes@359	1100	{ /* STS.L PR, @-Rn */
nkeynes@359	1101	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1102	sh4r.r[Rn] -= 4;
nkeynes@359	1103	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1104	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.pr );
nkeynes@359	1105	}
nkeynes@359	1106	break;
nkeynes@359	1107	case 0x3:
nkeynes@359	1108	{ /* STC.L SGR, @-Rn */
nkeynes@359	1109	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1110	CHECKPRIV();
nkeynes@359	1111	sh4r.r[Rn] -= 4;
nkeynes@359	1112	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1113	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.sgr );
nkeynes@359	1114	}
nkeynes@359	1115	break;
nkeynes@359	1116	case 0x5:
nkeynes@359	1117	{ /* STS.L FPUL, @-Rn */
nkeynes@359	1118	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1119	sh4r.r[Rn] -= 4;
nkeynes@359	1120	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1121	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpul );
nkeynes@359	1122	}
nkeynes@359	1123	break;
nkeynes@359	1124	case 0x6:
nkeynes@359	1125	{ /* STS.L FPSCR, @-Rn */
nkeynes@359	1126	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1127	sh4r.r[Rn] -= 4;
nkeynes@359	1128	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1129	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpscr );
nkeynes@359	1130	}
nkeynes@359	1131	break;
nkeynes@359	1132	case 0xF:
nkeynes@359	1133	{ /* STC.L DBR, @-Rn */
nkeynes@359	1134	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1135	CHECKPRIV();
nkeynes@359	1136	sh4r.r[Rn] -= 4;
nkeynes@359	1137	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1138	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.dbr );
nkeynes@359	1139	}
nkeynes@359	1140	break;
nkeynes@359	1141	default:
nkeynes@359	1142	UNDEF();
nkeynes@359	1143	break;
nkeynes@359	1144	}
nkeynes@359	1145	break;
nkeynes@359	1146	case 0x3:
nkeynes@359	1147	switch( (ir&0x80) >> 7 ) {
nkeynes@359	1148	case 0x0:
nkeynes@359	1149	switch( (ir&0x70) >> 4 ) {
nkeynes@359	1150	case 0x0:
nkeynes@359	1151	{ /* STC.L SR, @-Rn */
nkeynes@359	1152	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1153	CHECKPRIV();
nkeynes@359	1154	sh4r.r[Rn] -= 4;
nkeynes@359	1155	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1156	MEM_WRITE_LONG( sh4r.r[Rn], sh4_read_sr() );
nkeynes@359	1157	}
nkeynes@359	1158	break;
nkeynes@359	1159	case 0x1:
nkeynes@359	1160	{ /* STC.L GBR, @-Rn */
nkeynes@359	1161	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1162	sh4r.r[Rn] -= 4;
nkeynes@359	1163	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1164	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.gbr );
nkeynes@359	1165	}
nkeynes@359	1166	break;
nkeynes@359	1167	case 0x2:
nkeynes@359	1168	{ /* STC.L VBR, @-Rn */
nkeynes@359	1169	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1170	CHECKPRIV();
nkeynes@359	1171	sh4r.r[Rn] -= 4;
nkeynes@359	1172	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1173	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.vbr );
nkeynes@359	1174	}
nkeynes@359	1175	break;
nkeynes@359	1176	case 0x3:
nkeynes@359	1177	{ /* STC.L SSR, @-Rn */
nkeynes@359	1178	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1179	CHECKPRIV();
nkeynes@359	1180	sh4r.r[Rn] -= 4;
nkeynes@359	1181	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1182	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.ssr );
nkeynes@359	1183	}
nkeynes@359	1184	break;
nkeynes@359	1185	case 0x4:
nkeynes@359	1186	{ /* STC.L SPC, @-Rn */
nkeynes@359	1187	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1188	CHECKPRIV();
nkeynes@359	1189	sh4r.r[Rn] -= 4;
nkeynes@359	1190	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1191	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.spc );
nkeynes@359	1192	}
nkeynes@359	1193	break;
nkeynes@359	1194	default:
nkeynes@359	1195	UNDEF();
nkeynes@359	1196	break;
nkeynes@359	1197	}
nkeynes@359	1198	break;
nkeynes@359	1199	case 0x1:
nkeynes@359	1200	{ /* STC.L Rm_BANK, @-Rn */
nkeynes@359	1201	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
nkeynes@359	1202	CHECKPRIV();
nkeynes@359	1203	sh4r.r[Rn] -= 4;
nkeynes@359	1204	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1205	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r_bank[Rm_BANK] );
nkeynes@359	1206	}
nkeynes@359	1207	break;
nkeynes@359	1208	}
nkeynes@359	1209	break;
nkeynes@359	1210	case 0x4:
nkeynes@359	1211	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1212	case 0x0:
nkeynes@359	1213	{ /* ROTL Rn */
nkeynes@359	1214	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1215	sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359	1216	sh4r.r[Rn] <<= 1;
nkeynes@359	1217	sh4r.r[Rn] \|= sh4r.t;
nkeynes@359	1218	}
nkeynes@359	1219	break;
nkeynes@359	1220	case 0x2:
nkeynes@359	1221	{ /* ROTCL Rn */
nkeynes@359	1222	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1223	tmp = sh4r.r[Rn] >> 31;
nkeynes@359	1224	sh4r.r[Rn] <<= 1;
nkeynes@359	1225	sh4r.r[Rn] \|= sh4r.t;
nkeynes@359	1226	sh4r.t = tmp;
nkeynes@359	1227	}
nkeynes@359	1228	break;
nkeynes@359	1229	default:
nkeynes@359	1230	UNDEF();
nkeynes@359	1231	break;
nkeynes@359	1232	}
nkeynes@359	1233	break;
nkeynes@359	1234	case 0x5:
nkeynes@359	1235	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1236	case 0x0:
nkeynes@359	1237	{ /* ROTR Rn */
nkeynes@359	1238	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1239	sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359	1240	sh4r.r[Rn] >>= 1;
nkeynes@359	1241	sh4r.r[Rn] \|= (sh4r.t << 31);
nkeynes@359	1242	}
nkeynes@359	1243	break;
nkeynes@359	1244	case 0x1:
nkeynes@359	1245	{ /* CMP/PL Rn */
nkeynes@359	1246	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1247	sh4r.t = ( ((int32_t)sh4r.r[Rn]) > 0 ? 1 : 0 );
nkeynes@359	1248	}
nkeynes@359	1249	break;
nkeynes@359	1250	case 0x2:
nkeynes@359	1251	{ /* ROTCR Rn */
nkeynes@359	1252	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1253	tmp = sh4r.r[Rn] & 0x00000001;
nkeynes@359	1254	sh4r.r[Rn] >>= 1;
nkeynes@359	1255	sh4r.r[Rn] \|= (sh4r.t << 31 );
nkeynes@359	1256	sh4r.t = tmp;
nkeynes@359	1257	}
nkeynes@359	1258	break;
nkeynes@359	1259	default:
nkeynes@359	1260	UNDEF();
nkeynes@359	1261	break;
nkeynes@359	1262	}
nkeynes@359	1263	break;
nkeynes@359	1264	case 0x6:
nkeynes@359	1265	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1266	case 0x0:
nkeynes@359	1267	{ /* LDS.L @Rm+, MACH */
nkeynes@359	1268	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1269	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1270	sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) \|
nkeynes@359	1271	(((uint64_t)MEM_READ_LONG(sh4r.r[Rm]))<<32);
nkeynes@359	1272	sh4r.r[Rm] += 4;
nkeynes@359	1273	}
nkeynes@359	1274	break;
nkeynes@359	1275	case 0x1:
nkeynes@359	1276	{ /* LDS.L @Rm+, MACL */
nkeynes@359	1277	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1278	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1279	sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) \|
nkeynes@359	1280	(uint64_t)((uint32_t)MEM_READ_LONG(sh4r.r[Rm]));
nkeynes@359	1281	sh4r.r[Rm] += 4;
nkeynes@359	1282	}
nkeynes@359	1283	break;
nkeynes@359	1284	case 0x2:
nkeynes@359	1285	{ /* LDS.L @Rm+, PR */
nkeynes@359	1286	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1287	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1288	sh4r.pr = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359	1289	sh4r.r[Rm] += 4;
nkeynes@359	1290	}
nkeynes@359	1291	break;
nkeynes@359	1292	case 0x3:
nkeynes@359	1293	{ /* LDC.L @Rm+, SGR */
nkeynes@359	1294	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1295	CHECKPRIV();
nkeynes@359	1296	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1297	sh4r.sgr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1298	sh4r.r[Rm] +=4;
nkeynes@359	1299	}
nkeynes@359	1300	break;
nkeynes@359	1301	case 0x5:
nkeynes@359	1302	{ /* LDS.L @Rm+, FPUL */
nkeynes@359	1303	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1304	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1305	sh4r.fpul = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1306	sh4r.r[Rm] +=4;
nkeynes@359	1307	}
nkeynes@359	1308	break;
nkeynes@359	1309	case 0x6:
nkeynes@359	1310	{ /* LDS.L @Rm+, FPSCR */
nkeynes@359	1311	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1312	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1313	sh4r.fpscr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1314	sh4r.r[Rm] +=4;
nkeynes@359	1315	}
nkeynes@359	1316	break;
nkeynes@359	1317	case 0xF:
nkeynes@359	1318	{ /* LDC.L @Rm+, DBR */
nkeynes@359	1319	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1320	CHECKPRIV();
nkeynes@359	1321	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1322	sh4r.dbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1323	sh4r.r[Rm] +=4;
nkeynes@359	1324	}
nkeynes@359	1325	break;
nkeynes@359	1326	default:
nkeynes@359	1327	UNDEF();
nkeynes@359	1328	break;
nkeynes@359	1329	}
nkeynes@359	1330	break;
nkeynes@359	1331	case 0x7:
nkeynes@359	1332	switch( (ir&0x80) >> 7 ) {
nkeynes@359	1333	case 0x0:
nkeynes@359	1334	switch( (ir&0x70) >> 4 ) {
nkeynes@359	1335	case 0x0:
nkeynes@359	1336	{ /* LDC.L @Rm+, SR */
nkeynes@359	1337	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1338	CHECKSLOTILLEGAL();
nkeynes@359	1339	CHECKPRIV();
nkeynes@359	1340	CHECKWALIGN32( sh4r.r[Rm] );
nkeynes@359	1341	sh4_load_sr( MEM_READ_LONG(sh4r.r[Rm]) );
nkeynes@359	1342	sh4r.r[Rm] +=4;
nkeynes@359	1343	}
nkeynes@359	1344	break;
nkeynes@359	1345	case 0x1:
nkeynes@359	1346	{ /* LDC.L @Rm+, GBR */
nkeynes@359	1347	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1348	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1349	sh4r.gbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1350	sh4r.r[Rm] +=4;
nkeynes@359	1351	}
nkeynes@359	1352	break;
nkeynes@359	1353	case 0x2:
nkeynes@359	1354	{ /* LDC.L @Rm+, VBR */
nkeynes@359	1355	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1356	CHECKPRIV();
nkeynes@359	1357	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1358	sh4r.vbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1359	sh4r.r[Rm] +=4;
nkeynes@359	1360	}
nkeynes@359	1361	break;
nkeynes@359	1362	case 0x3:
nkeynes@359	1363	{ /* LDC.L @Rm+, SSR */
nkeynes@359	1364	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1365	CHECKPRIV();
nkeynes@359	1366	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1367	sh4r.ssr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1368	sh4r.r[Rm] +=4;
nkeynes@359	1369	}
nkeynes@359	1370	break;
nkeynes@359	1371	case 0x4:
nkeynes@359	1372	{ /* LDC.L @Rm+, SPC */
nkeynes@359	1373	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1374	CHECKPRIV();
nkeynes@359	1375	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1376	sh4r.spc = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1377	sh4r.r[Rm] +=4;
nkeynes@359	1378	}
nkeynes@359	1379	break;
nkeynes@359	1380	default:
nkeynes@359	1381	UNDEF();
nkeynes@359	1382	break;
nkeynes@359	1383	}
nkeynes@359	1384	break;
nkeynes@359	1385	case 0x1:
nkeynes@359	1386	{ /* LDC.L @Rm+, Rn_BANK */
nkeynes@359	1387	uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
nkeynes@359	1388	CHECKPRIV();
nkeynes@359	1389	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1390	sh4r.r_bank[Rn_BANK] = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359	1391	sh4r.r[Rm] += 4;
nkeynes@359	1392	}
nkeynes@359	1393	break;
nkeynes@359	1394	}
nkeynes@359	1395	break;
nkeynes@359	1396	case 0x8:
nkeynes@359	1397	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1398	case 0x0:
nkeynes@359	1399	{ /* SHLL2 Rn */
nkeynes@359	1400	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1401	sh4r.r[Rn] <<= 2;
nkeynes@359	1402	}
nkeynes@359	1403	break;
nkeynes@359	1404	case 0x1:
nkeynes@359	1405	{ /* SHLL8 Rn */
nkeynes@359	1406	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1407	sh4r.r[Rn] <<= 8;
nkeynes@359	1408	}
nkeynes@359	1409	break;
nkeynes@359	1410	case 0x2:
nkeynes@359	1411	{ /* SHLL16 Rn */
nkeynes@359	1412	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1413	sh4r.r[Rn] <<= 16;
nkeynes@359	1414	}
nkeynes@359	1415	break;
nkeynes@359	1416	default:
nkeynes@359	1417	UNDEF();
nkeynes@359	1418	break;
nkeynes@359	1419	}
nkeynes@359	1420	break;
nkeynes@359	1421	case 0x9:
nkeynes@359	1422	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1423	case 0x0:
nkeynes@359	1424	{ /* SHLR2 Rn */
nkeynes@359	1425	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1426	sh4r.r[Rn] >>= 2;
nkeynes@359	1427	}
nkeynes@359	1428	break;
nkeynes@359	1429	case 0x1:
nkeynes@359	1430	{ /* SHLR8 Rn */
nkeynes@359	1431	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1432	sh4r.r[Rn] >>= 8;
nkeynes@359	1433	}
nkeynes@359	1434	break;
nkeynes@359	1435	case 0x2:
nkeynes@359	1436	{ /* SHLR16 Rn */
nkeynes@359	1437	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1438	sh4r.r[Rn] >>= 16;
nkeynes@359	1439	}
nkeynes@359	1440	break;
nkeynes@359	1441	default:
nkeynes@359	1442	UNDEF();
nkeynes@359	1443	break;
nkeynes@359	1444	}
nkeynes@359	1445	break;
nkeynes@359	1446	case 0xA:
nkeynes@359	1447	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1448	case 0x0:
nkeynes@359	1449	{ /* LDS Rm, MACH */
nkeynes@359	1450	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1451	sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) \|
nkeynes@359	1452	(((uint64_t)sh4r.r[Rm])<<32);
nkeynes@359	1453	}
nkeynes@359	1454	break;
nkeynes@359	1455	case 0x1:
nkeynes@359	1456	{ /* LDS Rm, MACL */
nkeynes@359	1457	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1458	sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) \|
nkeynes@359	1459	(uint64_t)((uint32_t)(sh4r.r[Rm]));
nkeynes@359	1460	}
nkeynes@359	1461	break;
nkeynes@359	1462	case 0x2:
nkeynes@359	1463	{ /* LDS Rm, PR */
nkeynes@359	1464	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1465	sh4r.pr = sh4r.r[Rm];
nkeynes@359	1466	}
nkeynes@359	1467	break;
nkeynes@359	1468	case 0x3:
nkeynes@359	1469	{ /* LDC Rm, SGR */
nkeynes@359	1470	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1471	CHECKPRIV();
nkeynes@359	1472	sh4r.sgr = sh4r.r[Rm];
nkeynes@359	1473	}
nkeynes@359	1474	break;
nkeynes@359	1475	case 0x5:
nkeynes@359	1476	{ /* LDS Rm, FPUL */
nkeynes@359	1477	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1478	sh4r.fpul = sh4r.r[Rm];
nkeynes@359	1479	}
nkeynes@359	1480	break;
nkeynes@359	1481	case 0x6:
nkeynes@359	1482	{ /* LDS Rm, FPSCR */
nkeynes@359	1483	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1484	sh4r.fpscr = sh4r.r[Rm];
nkeynes@359	1485	}
nkeynes@359	1486	break;
nkeynes@359	1487	case 0xF:
nkeynes@359	1488	{ /* LDC Rm, DBR */
nkeynes@359	1489	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1490	CHECKPRIV();
nkeynes@359	1491	sh4r.dbr = sh4r.r[Rm];
nkeynes@359	1492	}
nkeynes@359	1493	break;
nkeynes@359	1494	default:
nkeynes@359	1495	UNDEF();
nkeynes@359	1496	break;
nkeynes@359	1497	}
nkeynes@359	1498	break;
nkeynes@359	1499	case 0xB:
nkeynes@359	1500	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1501	case 0x0:
nkeynes@359	1502	{ /* JSR @Rn */
nkeynes@359	1503	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1504	CHECKDEST( sh4r.r[Rn] );
nkeynes@359	1505	CHECKSLOTILLEGAL();
nkeynes@359	1506	sh4r.in_delay_slot = 1;
nkeynes@359	1507	sh4r.pc = sh4r.new_pc;
nkeynes@359	1508	sh4r.new_pc = sh4r.r[Rn];
nkeynes@359	1509	sh4r.pr = pc + 4;
nkeynes@359	1510	TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359	1511	return TRUE;
nkeynes@359	1512	}
nkeynes@359	1513	break;
nkeynes@359	1514	case 0x1:
nkeynes@359	1515	{ /* TAS.B @Rn */
nkeynes@359	1516	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1517	tmp = MEM_READ_BYTE( sh4r.r[Rn] );
nkeynes@359	1518	sh4r.t = ( tmp == 0 ? 1 : 0 );
nkeynes@359	1519	MEM_WRITE_BYTE( sh4r.r[Rn], tmp \| 0x80 );
nkeynes@359	1520	}
nkeynes@359	1521	break;
nkeynes@359	1522	case 0x2:
nkeynes@359	1523	{ /* JMP @Rn */
nkeynes@359	1524	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1525	CHECKDEST( sh4r.r[Rn] );
nkeynes@359	1526	CHECKSLOTILLEGAL();
nkeynes@359	1527	sh4r.in_delay_slot = 1;
nkeynes@359	1528	sh4r.pc = sh4r.new_pc;
nkeynes@359	1529	sh4r.new_pc = sh4r.r[Rn];
nkeynes@359	1530	return TRUE;
nkeynes@359	1531	}
nkeynes@359	1532	break;
nkeynes@359	1533	default:
nkeynes@359	1534	UNDEF();
nkeynes@359	1535	break;
nkeynes@359	1536	}
nkeynes@359	1537	break;
nkeynes@359	1538	case 0xC:
nkeynes@359	1539	{ /* SHAD Rm, Rn */
nkeynes@359	1540	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1541	tmp = sh4r.r[Rm];
nkeynes@359	1542	if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359	1543	else if( (tmp & 0x1F) == 0 )
nkeynes@359	1544	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 31;
nkeynes@359	1545	else
nkeynes@359	1546	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> (((~sh4r.r[Rm]) & 0x1F)+1);
nkeynes@359	1547	}
nkeynes@359	1548	break;
nkeynes@359	1549	case 0xD:
nkeynes@359	1550	{ /* SHLD Rm, Rn */
nkeynes@359	1551	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1552	tmp = sh4r.r[Rm];
nkeynes@359	1553	if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359	1554	else if( (tmp & 0x1F) == 0 ) sh4r.r[Rn] = 0;
nkeynes@359	1555	else sh4r.r[Rn] >>= (((~tmp) & 0x1F)+1);
nkeynes@359	1556	}
nkeynes@359	1557	break;
nkeynes@359	1558	case 0xE:
nkeynes@359	1559	switch( (ir&0x80) >> 7 ) {
nkeynes@359	1560	case 0x0:
nkeynes@359	1561	switch( (ir&0x70) >> 4 ) {
nkeynes@359	1562	case 0x0:
nkeynes@359	1563	{ /* LDC Rm, SR */
nkeynes@359	1564	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1565	CHECKSLOTILLEGAL();
nkeynes@359	1566	CHECKPRIV();
nkeynes@359	1567	sh4_load_sr( sh4r.r[Rm] );
nkeynes@359	1568	}
nkeynes@359	1569	break;
nkeynes@359	1570	case 0x1:
nkeynes@359	1571	{ /* LDC Rm, GBR */
nkeynes@359	1572	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1573	sh4r.gbr = sh4r.r[Rm];
nkeynes@359	1574	}
nkeynes@359	1575	break;
nkeynes@359	1576	case 0x2:
nkeynes@359	1577	{ /* LDC Rm, VBR */
nkeynes@359	1578	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1579	CHECKPRIV();
nkeynes@359	1580	sh4r.vbr = sh4r.r[Rm];
nkeynes@359	1581	}
nkeynes@359	1582	break;
nkeynes@359	1583	case 0x3:
nkeynes@359	1584	{ /* LDC Rm, SSR */
nkeynes@359	1585	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1586	CHECKPRIV();
nkeynes@359	1587	sh4r.ssr = sh4r.r[Rm];
nkeynes@359	1588	}
nkeynes@359	1589	break;
nkeynes@359	1590	case 0x4:
nkeynes@359	1591	{ /* LDC Rm, SPC */
nkeynes@359	1592	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1593	CHECKPRIV();
nkeynes@359	1594	sh4r.spc = sh4r.r[Rm];
nkeynes@359	1595	}
nkeynes@359	1596	break;
nkeynes@359	1597	default:
nkeynes@359	1598	UNDEF();
nkeynes@359	1599	break;
nkeynes@359	1600	}
nkeynes@359	1601	break;
nkeynes@359	1602	case 0x1:
nkeynes@359	1603	{ /* LDC Rm, Rn_BANK */
nkeynes@359	1604	uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
nkeynes@359	1605	CHECKPRIV();
nkeynes@359	1606	sh4r.r_bank[Rn_BANK] = sh4r.r[Rm];
nkeynes@359	1607	}
nkeynes@359	1608	break;
nkeynes@359	1609	}
nkeynes@359	1610	break;
nkeynes@359	1611	case 0xF:
nkeynes@359	1612	{ /* MAC.W @Rm+, @Rn+ */
nkeynes@359	1613	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1614	CHECKRALIGN16( sh4r.r[Rn] );
nkeynes@359	1615	CHECKRALIGN16( sh4r.r[Rm] );
nkeynes@359	1616	int32_t stmp = SIGNEXT16(MEM_READ_WORD(sh4r.r[Rn]));
nkeynes@359	1617	sh4r.r[Rn] += 2;
nkeynes@359	1618	stmp = stmp * SIGNEXT16(MEM_READ_WORD(sh4r.r[Rm]));
nkeynes@359	1619	sh4r.r[Rm] += 2;
nkeynes@359	1620	if( sh4r.s ) {
nkeynes@359	1621	int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
nkeynes@359	1622	if( tmpl > (int64_t)0x000000007FFFFFFFLL ) {
nkeynes@359	1623	sh4r.mac = 0x000000017FFFFFFFLL;
nkeynes@359	1624	} else if( tmpl < (int64_t)0xFFFFFFFF80000000LL ) {
nkeynes@359	1625	sh4r.mac = 0x0000000180000000LL;
nkeynes@359	1626	} else {
nkeynes@359	1627	sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) \|
nkeynes@359	1628	((uint32_t)(sh4r.mac + stmp));
nkeynes@359	1629	}
nkeynes@359	1630	} else {
nkeynes@359	1631	sh4r.mac += SIGNEXT32(stmp);
nkeynes@359	1632	}
nkeynes@359	1633	}
nkeynes@359	1634	break;
nkeynes@359	1635	}
nkeynes@359	1636	break;
nkeynes@359	1637	case 0x5:
nkeynes@359	1638	{ /* MOV.L @(disp, Rm), Rn */
nkeynes@359	1639	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
nkeynes@359	1640	tmp = sh4r.r[Rm] + disp;
nkeynes@359	1641	CHECKRALIGN32( tmp );
nkeynes@359	1642	sh4r.r[Rn] = MEM_READ_LONG( tmp );
nkeynes@359	1643	}
nkeynes@359	1644	break;
nkeynes@359	1645	case 0x6:
nkeynes@359	1646	switch( ir&0xF ) {
nkeynes@359	1647	case 0x0:
nkeynes@359	1648	{ /* MOV.B @Rm, Rn */
nkeynes@359	1649	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1650	sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] );
nkeynes@359	1651	}
nkeynes@359	1652	break;
nkeynes@359	1653	case 0x1:
nkeynes@359	1654	{ /* MOV.W @Rm, Rn */
nkeynes@359	1655	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1656	CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] );
nkeynes@359	1657	}
nkeynes@359	1658	break;
nkeynes@359	1659	case 0x2:
nkeynes@359	1660	{ /* MOV.L @Rm, Rn */
nkeynes@359	1661	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1662	CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359	1663	}
nkeynes@359	1664	break;
nkeynes@359	1665	case 0x3:
nkeynes@359	1666	{ /* MOV Rm, Rn */
nkeynes@359	1667	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1668	sh4r.r[Rn] = sh4r.r[Rm];
nkeynes@359	1669	}
nkeynes@359	1670	break;
nkeynes@359	1671	case 0x4:
nkeynes@359	1672	{ /* MOV.B @Rm+, Rn */
nkeynes@359	1673	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1674	sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] ); sh4r.r[Rm] ++;
nkeynes@359	1675	}
nkeynes@359	1676	break;
nkeynes@359	1677	case 0x5:
nkeynes@359	1678	{ /* MOV.W @Rm+, Rn */
nkeynes@359	1679	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1680	CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] ); sh4r.r[Rm] += 2;
nkeynes@359	1681	}
nkeynes@359	1682	break;
nkeynes@359	1683	case 0x6:
nkeynes@359	1684	{ /* MOV.L @Rm+, Rn */
nkeynes@359	1685	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1686	CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] ); sh4r.r[Rm] += 4;
nkeynes@359	1687	}
nkeynes@359	1688	break;
nkeynes@359	1689	case 0x7:
nkeynes@359	1690	{ /* NOT Rm, Rn */
nkeynes@359	1691	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1692	sh4r.r[Rn] = ~sh4r.r[Rm];
nkeynes@359	1693	}
nkeynes@359	1694	break;
nkeynes@359	1695	case 0x8:
nkeynes@359	1696	{ /* SWAP.B Rm, Rn */
nkeynes@359	1697	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1698	sh4r.r[Rn] = (sh4r.r[Rm]&0xFFFF0000) \| ((sh4r.r[Rm]&0x0000FF00)>>8) \| ((sh4r.r[Rm]&0x000000FF)<<8);
nkeynes@359	1699	}
nkeynes@359	1700	break;
nkeynes@359	1701	case 0x9:
nkeynes@359	1702	{ /* SWAP.W Rm, Rn */
nkeynes@359	1703	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1704	sh4r.r[Rn] = (sh4r.r[Rm]>>16) \| (sh4r.r[Rm]<<16);
nkeynes@359	1705	}
nkeynes@359	1706	break;
nkeynes@359	1707	case 0xA:
nkeynes@359	1708	{ /* NEGC Rm, Rn */
nkeynes@359	1709	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1710	tmp = 0 - sh4r.r[Rm];
nkeynes@359	1711	sh4r.r[Rn] = tmp - sh4r.t;
nkeynes@359	1712	sh4r.t = ( 0<tmp \|\| tmp<sh4r.r[Rn] ? 1 : 0 );
nkeynes@359	1713	}
nkeynes@359	1714	break;
nkeynes@359	1715	case 0xB:
nkeynes@359	1716	{ /* NEG Rm, Rn */
nkeynes@359	1717	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1718	sh4r.r[Rn] = 0 - sh4r.r[Rm];
nkeynes@359	1719	}
nkeynes@359	1720	break;
nkeynes@359	1721	case 0xC:
nkeynes@359	1722	{ /* EXTU.B Rm, Rn */
nkeynes@359	1723	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1724	sh4r.r[Rn] = sh4r.r[Rm]&0x000000FF;
nkeynes@359	1725	}
nkeynes@359	1726	break;
nkeynes@359	1727	case 0xD:
nkeynes@359	1728	{ /* EXTU.W Rm, Rn */
nkeynes@359	1729	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1730	sh4r.r[Rn] = sh4r.r[Rm]&0x0000FFFF;
nkeynes@359	1731	}
nkeynes@359	1732	break;
nkeynes@359	1733	case 0xE:
nkeynes@359	1734	{ /* EXTS.B Rm, Rn */
nkeynes@359	1735	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1736	sh4r.r[Rn] = SIGNEXT8( sh4r.r[Rm]&0x000000FF );
nkeynes@359	1737	}
nkeynes@359	1738	break;
nkeynes@359	1739	case 0xF:
nkeynes@359	1740	{ /* EXTS.W Rm, Rn */
nkeynes@359	1741	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1742	sh4r.r[Rn] = SIGNEXT16( sh4r.r[Rm]&0x0000FFFF );
nkeynes@359	1743	}
nkeynes@359	1744	break;
nkeynes@359	1745	}
nkeynes@359	1746	break;
nkeynes@359	1747	case 0x7:
nkeynes@359	1748	{ /* ADD #imm, Rn */
nkeynes@359	1749	uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
nkeynes@359	1750	sh4r.r[Rn] += imm;
nkeynes@359	1751	}
nkeynes@359	1752	break;
nkeynes@359	1753	case 0x8:
nkeynes@359	1754	switch( (ir&0xF00) >> 8 ) {
nkeynes@359	1755	case 0x0:
nkeynes@359	1756	{ /* MOV.B R0, @(disp, Rn) */
nkeynes@359	1757	uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
nkeynes@359	1758	MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 );
nkeynes@359	1759	}
nkeynes@359	1760	break;
nkeynes@359	1761	case 0x1:
nkeynes@359	1762	{ /* MOV.W R0, @(disp, Rn) */
nkeynes@359	1763	uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
nkeynes@359	1764	tmp = sh4r.r[Rn] + disp;
nkeynes@359	1765	CHECKWALIGN16( tmp );
nkeynes@359	1766	MEM_WRITE_WORD( tmp, R0 );
nkeynes@359	1767	}
nkeynes@359	1768	break;
nkeynes@359	1769	case 0x4:
nkeynes@359	1770	{ /* MOV.B @(disp, Rm), R0 */
nkeynes@359	1771	uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
nkeynes@359	1772	R0 = MEM_READ_BYTE( sh4r.r[Rm] + disp );
nkeynes@359	1773	}
nkeynes@359	1774	break;
nkeynes@359	1775	case 0x5:
nkeynes@359	1776	{ /* MOV.W @(disp, Rm), R0 */
nkeynes@359	1777	uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
nkeynes@359	1778	tmp = sh4r.r[Rm] + disp;
nkeynes@359	1779	CHECKRALIGN16( tmp );
nkeynes@359	1780	R0 = MEM_READ_WORD( tmp );
nkeynes@359	1781	}
nkeynes@359	1782	break;
nkeynes@359	1783	case 0x8:
nkeynes@359	1784	{ /* CMP/EQ #imm, R0 */
nkeynes@359	1785	int32_t imm = SIGNEXT8(ir&0xFF);
nkeynes@359	1786	sh4r.t = ( R0 == imm ? 1 : 0 );
nkeynes@359	1787	}
nkeynes@359	1788	break;
nkeynes@359	1789	case 0x9:
nkeynes@359	1790	{ /* BT disp */
nkeynes@359	1791	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1792	CHECKSLOTILLEGAL();
nkeynes@359	1793	if( sh4r.t ) {
nkeynes@359	1794	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359	1795	sh4r.pc += disp + 4;
nkeynes@359	1796	sh4r.new_pc = sh4r.pc + 2;
nkeynes@27	1797	return TRUE;
nkeynes@359	1798	}
nkeynes@359	1799	}
nkeynes@359	1800	break;
nkeynes@359	1801	case 0xB:
nkeynes@359	1802	{ /* BF disp */
nkeynes@359	1803	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1804	CHECKSLOTILLEGAL();
nkeynes@359	1805	if( !sh4r.t ) {
nkeynes@359	1806	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359	1807	sh4r.pc += disp + 4;
nkeynes@359	1808	sh4r.new_pc = sh4r.pc + 2;
nkeynes@359	1809	return TRUE;
nkeynes@359	1810	}
nkeynes@359	1811	}
nkeynes@359	1812	break;
nkeynes@359	1813	case 0xD:
nkeynes@359	1814	{ /* BT/S disp */
nkeynes@359	1815	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1816	CHECKSLOTILLEGAL();
nkeynes@359	1817	if( sh4r.t ) {
nkeynes@359	1818	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@2	1819	sh4r.in_delay_slot = 1;
nkeynes@1	1820	sh4r.pc = sh4r.new_pc;
nkeynes@359	1821	sh4r.new_pc = pc + disp + 4;
nkeynes@359	1822	sh4r.in_delay_slot = 1;
nkeynes@27	1823	return TRUE;
nkeynes@359	1824	}
nkeynes@359	1825	}
nkeynes@359	1826	break;
nkeynes@359	1827	case 0xF:
nkeynes@359	1828	{ /* BF/S disp */
nkeynes@359	1829	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1830	CHECKSLOTILLEGAL();
nkeynes@359	1831	if( !sh4r.t ) {
nkeynes@359	1832	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@2	1833	sh4r.in_delay_slot = 1;
nkeynes@1	1834	sh4r.pc = sh4r.new_pc;
nkeynes@359	1835	sh4r.new_pc = pc + disp + 4;
nkeynes@27	1836	return TRUE;
nkeynes@359	1837	}
nkeynes@359	1838	}
nkeynes@359	1839	break;
nkeynes@359	1840	default:
nkeynes@359	1841	UNDEF();
nkeynes@359	1842	break;
nkeynes@359	1843	}
nkeynes@359	1844	break;
nkeynes@359	1845	case 0x9:
nkeynes@359	1846	{ /* MOV.W @(disp, PC), Rn */
nkeynes@359	1847	uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1;
nkeynes@359	1848	CHECKSLOTILLEGAL();
nkeynes@359	1849	tmp = pc + 4 + disp;
nkeynes@359	1850	sh4r.r[Rn] = MEM_READ_WORD( tmp );
nkeynes@359	1851	}
nkeynes@359	1852	break;
nkeynes@359	1853	case 0xA:
nkeynes@359	1854	{ /* BRA disp */
nkeynes@359	1855	int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
nkeynes@359	1856	CHECKSLOTILLEGAL();
nkeynes@359	1857	CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359	1858	sh4r.in_delay_slot = 1;
nkeynes@359	1859	sh4r.pc = sh4r.new_pc;
nkeynes@359	1860	sh4r.new_pc = pc + 4 + disp;
nkeynes@359	1861	return TRUE;
nkeynes@359	1862	}
nkeynes@359	1863	break;
nkeynes@359	1864	case 0xB:
nkeynes@359	1865	{ /* BSR disp */
nkeynes@359	1866	int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
nkeynes@359	1867	CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359	1868	CHECKSLOTILLEGAL();
nkeynes@359	1869	sh4r.in_delay_slot = 1;
nkeynes@359	1870	sh4r.pr = pc + 4;
nkeynes@359	1871	sh4r.pc = sh4r.new_pc;
nkeynes@359	1872	sh4r.new_pc = pc + 4 + disp;
nkeynes@359	1873	TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359	1874	return TRUE;
nkeynes@359	1875	}
nkeynes@359	1876	break;
nkeynes@359	1877	case 0xC:
nkeynes@359	1878	switch( (ir&0xF00) >> 8 ) {
nkeynes@359	1879	case 0x0:
nkeynes@359	1880	{ /* MOV.B R0, @(disp, GBR) */
nkeynes@359	1881	uint32_t disp = (ir&0xFF);
nkeynes@359	1882	MEM_WRITE_BYTE( sh4r.gbr + disp, R0 );
nkeynes@359	1883	}
nkeynes@359	1884	break;
nkeynes@359	1885	case 0x1:
nkeynes@359	1886	{ /* MOV.W R0, @(disp, GBR) */
nkeynes@359	1887	uint32_t disp = (ir&0xFF)<<1;
nkeynes@359	1888	tmp = sh4r.gbr + disp;
nkeynes@359	1889	CHECKWALIGN16( tmp );
nkeynes@359	1890	MEM_WRITE_WORD( tmp, R0 );
nkeynes@359	1891	}
nkeynes@359	1892	break;
nkeynes@359	1893	case 0x2:
nkeynes@359	1894	{ /* MOV.L R0, @(disp, GBR) */
nkeynes@359	1895	uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	1896	tmp = sh4r.gbr + disp;
nkeynes@359	1897	CHECKWALIGN32( tmp );
nkeynes@359	1898	MEM_WRITE_LONG( tmp, R0 );
nkeynes@359	1899	}
nkeynes@359	1900	break;
nkeynes@359	1901	case 0x3:
nkeynes@359	1902	{ /* TRAPA #imm */
nkeynes@359	1903	uint32_t imm = (ir&0xFF);
nkeynes@359	1904	CHECKSLOTILLEGAL();
nkeynes@359	1905	MMIO_WRITE( MMU, TRA, imm<<2 );
nkeynes@359	1906	sh4r.pc += 2;
nkeynes@359	1907	sh4_raise_exception( EXC_TRAP );
nkeynes@359	1908	}
nkeynes@359	1909	break;
nkeynes@359	1910	case 0x4:
nkeynes@359	1911	{ /* MOV.B @(disp, GBR), R0 */
nkeynes@359	1912	uint32_t disp = (ir&0xFF);
nkeynes@359	1913	R0 = MEM_READ_BYTE( sh4r.gbr + disp );
nkeynes@359	1914	}
nkeynes@359	1915	break;
nkeynes@359	1916	case 0x5:
nkeynes@359	1917	{ /* MOV.W @(disp, GBR), R0 */
nkeynes@359	1918	uint32_t disp = (ir&0xFF)<<1;
nkeynes@359	1919	tmp = sh4r.gbr + disp;
nkeynes@359	1920	CHECKRALIGN16( tmp );
nkeynes@359	1921	R0 = MEM_READ_WORD( tmp );
nkeynes@359	1922	}
nkeynes@359	1923	break;
nkeynes@359	1924	case 0x6:
nkeynes@359	1925	{ /* MOV.L @(disp, GBR), R0 */
nkeynes@359	1926	uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	1927	tmp = sh4r.gbr + disp;
nkeynes@359	1928	CHECKRALIGN32( tmp );
nkeynes@359	1929	R0 = MEM_READ_LONG( tmp );
nkeynes@359	1930	}
nkeynes@359	1931	break;
nkeynes@359	1932	case 0x7:
nkeynes@359	1933	{ /* MOVA @(disp, PC), R0 */
nkeynes@359	1934	uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	1935	CHECKSLOTILLEGAL();
nkeynes@359	1936	R0 = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359	1937	}
nkeynes@359	1938	break;
nkeynes@359	1939	case 0x8:
nkeynes@359	1940	{ /* TST #imm, R0 */
nkeynes@359	1941	uint32_t imm = (ir&0xFF);
nkeynes@359	1942	sh4r.t = (R0 & imm ? 0 : 1);
nkeynes@359	1943	}
nkeynes@359	1944	break;
nkeynes@359	1945	case 0x9:
nkeynes@359	1946	{ /* AND #imm, R0 */
nkeynes@359	1947	uint32_t imm = (ir&0xFF);
nkeynes@359	1948	R0 &= imm;
nkeynes@359	1949	}
nkeynes@359	1950	break;
nkeynes@359	1951	case 0xA:
nkeynes@359	1952	{ /* XOR #imm, R0 */
nkeynes@359	1953	uint32_t imm = (ir&0xFF);
nkeynes@359	1954	R0 ^= imm;
nkeynes@359	1955	}
nkeynes@359	1956	break;
nkeynes@359	1957	case 0xB:
nkeynes@359	1958	{ /* OR #imm, R0 */
nkeynes@359	1959	uint32_t imm = (ir&0xFF);
nkeynes@359	1960	R0 \|= imm;
nkeynes@359	1961	}
nkeynes@359	1962	break;
nkeynes@359	1963	case 0xC:
nkeynes@359	1964	{ /* TST.B #imm, @(R0, GBR) */
nkeynes@359	1965	uint32_t imm = (ir&0xFF);
nkeynes@359	1966	sh4r.t = ( MEM_READ_BYTE(R0 + sh4r.gbr) & imm ? 0 : 1 );
nkeynes@359	1967	}
nkeynes@359	1968	break;
nkeynes@359	1969	case 0xD:
nkeynes@359	1970	{ /* AND.B #imm, @(R0, GBR) */
nkeynes@359	1971	uint32_t imm = (ir&0xFF);
nkeynes@359	1972	MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & MEM_READ_BYTE(R0 + sh4r.gbr) );
nkeynes@359	1973	}
nkeynes@359	1974	break;
nkeynes@359	1975	case 0xE:
nkeynes@359	1976	{ /* XOR.B #imm, @(R0, GBR) */
nkeynes@359	1977	uint32_t imm = (ir&0xFF);
nkeynes@359	1978	MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ MEM_READ_BYTE(R0 + sh4r.gbr) );
nkeynes@359	1979	}
nkeynes@359	1980	break;
nkeynes@359	1981	case 0xF:
nkeynes@359	1982	{ /* OR.B #imm, @(R0, GBR) */
nkeynes@359	1983	uint32_t imm = (ir&0xFF);
nkeynes@359	1984	MEM_WRITE_BYTE( R0 + sh4r.gbr, imm \| MEM_READ_BYTE(R0 + sh4r.gbr) );
nkeynes@359	1985	}
nkeynes@359	1986	break;
nkeynes@359	1987	}
nkeynes@359	1988	break;
nkeynes@359	1989	case 0xD:
nkeynes@359	1990	{ /* MOV.L @(disp, PC), Rn */
nkeynes@359	1991	uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	1992	CHECKSLOTILLEGAL();
nkeynes@359	1993	tmp = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359	1994	sh4r.r[Rn] = MEM_READ_LONG( tmp );
nkeynes@359	1995	}
nkeynes@359	1996	break;
nkeynes@359	1997	case 0xE:
nkeynes@359	1998	{ /* MOV #imm, Rn */
nkeynes@359	1999	uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
nkeynes@359	2000	sh4r.r[Rn] = imm;
nkeynes@359	2001	}
nkeynes@359	2002	break;
nkeynes@359	2003	case 0xF:
nkeynes@359	2004	switch( ir&0xF ) {
nkeynes@359	2005	case 0x0:
nkeynes@359	2006	{ /* FADD FRm, FRn */
nkeynes@359	2007	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2008	CHECKFPUEN();
nkeynes@359	2009	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2010	DR(FRn) += DR(FRm);
nkeynes@359	2011	} else {
nkeynes@359	2012	FR(FRn) += FR(FRm);
nkeynes@359	2013	}
nkeynes@359	2014	}
nkeynes@359	2015	break;
nkeynes@359	2016	case 0x1:
nkeynes@359	2017	{ /* FSUB FRm, FRn */
nkeynes@359	2018	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2019	CHECKFPUEN();
nkeynes@359	2020	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2021	DR(FRn) -= DR(FRm);
nkeynes@359	2022	} else {
nkeynes@359	2023	FR(FRn) -= FR(FRm);
nkeynes@359	2024	}
nkeynes@359	2025	}
nkeynes@359	2026	break;
nkeynes@359	2027	case 0x2:
nkeynes@359	2028	{ /* FMUL FRm, FRn */
nkeynes@359	2029	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2030	CHECKFPUEN();
nkeynes@359	2031	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2032	DR(FRn) *= DR(FRm);
nkeynes@359	2033	} else {
nkeynes@359	2034	FR(FRn) *= FR(FRm);
nkeynes@359	2035	}
nkeynes@359	2036	}
nkeynes@359	2037	break;
nkeynes@359	2038	case 0x3:
nkeynes@359	2039	{ /* FDIV FRm, FRn */
nkeynes@359	2040	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2041	CHECKFPUEN();
nkeynes@359	2042	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2043	DR(FRn) /= DR(FRm);
nkeynes@359	2044	} else {
nkeynes@359	2045	FR(FRn) /= FR(FRm);
nkeynes@359	2046	}
nkeynes@359	2047	}
nkeynes@359	2048	break;
nkeynes@359	2049	case 0x4:
nkeynes@359	2050	{ /* FCMP/EQ FRm, FRn */
nkeynes@359	2051	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2052	CHECKFPUEN();
nkeynes@359	2053	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2054	sh4r.t = ( DR(FRn) == DR(FRm) ? 1 : 0 );
nkeynes@359	2055	} else {
nkeynes@359	2056	sh4r.t = ( FR(FRn) == FR(FRm) ? 1 : 0 );
nkeynes@359	2057	}
nkeynes@359	2058	}
nkeynes@359	2059	break;
nkeynes@359	2060	case 0x5:
nkeynes@359	2061	{ /* FCMP/GT FRm, FRn */
nkeynes@359	2062	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2063	CHECKFPUEN();
nkeynes@359	2064	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2065	sh4r.t = ( DR(FRn) > DR(FRm) ? 1 : 0 );
nkeynes@359	2066	} else {
nkeynes@359	2067	sh4r.t = ( FR(FRn) > FR(FRm) ? 1 : 0 );
nkeynes@359	2068	}
nkeynes@359	2069	}
nkeynes@359	2070	break;
nkeynes@359	2071	case 0x6:
nkeynes@359	2072	{ /* FMOV @(R0, Rm), FRn */
nkeynes@359	2073	uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	2074	MEM_FP_READ( sh4r.r[Rm] + R0, FRn );
nkeynes@359	2075	}
nkeynes@359	2076	break;
nkeynes@359	2077	case 0x7:
nkeynes@359	2078	{ /* FMOV FRm, @(R0, Rn) */
nkeynes@359	2079	uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2080	MEM_FP_WRITE( sh4r.r[Rn] + R0, FRm );
nkeynes@359	2081	}
nkeynes@359	2082	break;
nkeynes@359	2083	case 0x8:
nkeynes@359	2084	{ /* FMOV @Rm, FRn */
nkeynes@359	2085	uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	2086	MEM_FP_READ( sh4r.r[Rm], FRn );
nkeynes@359	2087	}
nkeynes@359	2088	break;
nkeynes@359	2089	case 0x9:
nkeynes@359	2090	{ /* FMOV @Rm+, FRn */
nkeynes@359	2091	uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	2092	MEM_FP_READ( sh4r.r[Rm], FRn ); sh4r.r[Rm] += FP_WIDTH;
nkeynes@359	2093	}
nkeynes@359	2094	break;
nkeynes@359	2095	case 0xA:
nkeynes@359	2096	{ /* FMOV FRm, @Rn */
nkeynes@359	2097	uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2098	MEM_FP_WRITE( sh4r.r[Rn], FRm );
nkeynes@359	2099	}
nkeynes@359	2100	break;
nkeynes@359	2101	case 0xB:
nkeynes@359	2102	{ /* FMOV FRm, @-Rn */
nkeynes@359	2103	uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2104	sh4r.r[Rn] -= FP_WIDTH; MEM_FP_WRITE( sh4r.r[Rn], FRm );
nkeynes@359	2105	}
nkeynes@359	2106	break;
nkeynes@359	2107	case 0xC:
nkeynes@359	2108	{ /* FMOV FRm, FRn */
nkeynes@359	2109	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2110	if( IS_FPU_DOUBLESIZE() )
nkeynes@359	2111	DR(FRn) = DR(FRm);
nkeynes@359	2112	else
nkeynes@359	2113	FR(FRn) = FR(FRm);
nkeynes@359	2114	}
nkeynes@359	2115	break;
nkeynes@359	2116	case 0xD:
nkeynes@359	2117	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	2118	case 0x0:
nkeynes@359	2119	{ /* FSTS FPUL, FRn */
nkeynes@359	2120	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2121	CHECKFPUEN(); FR(FRn) = FPULf;
nkeynes@359	2122	}
nkeynes@359	2123	break;
nkeynes@359	2124	case 0x1:
nkeynes@359	2125	{ /* FLDS FRm, FPUL */
nkeynes@359	2126	uint32_t FRm = ((ir>>8)&0xF);
nkeynes@359	2127	CHECKFPUEN(); FPULf = FR(FRm);
nkeynes@359	2128	}
nkeynes@359	2129	break;
nkeynes@359	2130	case 0x2:
nkeynes@359	2131	{ /* FLOAT FPUL, FRn */
nkeynes@359	2132	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2133	CHECKFPUEN();
nkeynes@359	2134	if( IS_FPU_DOUBLEPREC() )
nkeynes@359	2135	DR(FRn) = (float)FPULi;
nkeynes@359	2136	else
nkeynes@359	2137	FR(FRn) = (float)FPULi;
nkeynes@359	2138	}
nkeynes@359	2139	break;
nkeynes@359	2140	case 0x3:
nkeynes@359	2141	{ /* FTRC FRm, FPUL */
nkeynes@359	2142	uint32_t FRm = ((ir>>8)&0xF);
nkeynes@359	2143	CHECKFPUEN();
nkeynes@359	2144	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2145	dtmp = DR(FRm);
nkeynes@359	2146	if( dtmp >= MAX_INTF )
nkeynes@359	2147	FPULi = MAX_INT;
nkeynes@359	2148	else if( dtmp <= MIN_INTF )
nkeynes@359	2149	FPULi = MIN_INT;
nkeynes@359	2150	else
nkeynes@359	2151	FPULi = (int32_t)dtmp;
nkeynes@359	2152	} else {
nkeynes@359	2153	ftmp = FR(FRm);
nkeynes@359	2154	if( ftmp >= MAX_INTF )
nkeynes@359	2155	FPULi = MAX_INT;
nkeynes@359	2156	else if( ftmp <= MIN_INTF )
nkeynes@359	2157	FPULi = MIN_INT;
nkeynes@359	2158	else
nkeynes@359	2159	FPULi = (int32_t)ftmp;
nkeynes@359	2160	}
nkeynes@359	2161	}
nkeynes@359	2162	break;
nkeynes@359	2163	case 0x4:
nkeynes@359	2164	{ /* FNEG FRn */
nkeynes@359	2165	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2166	CHECKFPUEN();
nkeynes@359	2167	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2168	DR(FRn) = -DR(FRn);
nkeynes@359	2169	} else {
nkeynes@359	2170	FR(FRn) = -FR(FRn);
nkeynes@359	2171	}
nkeynes@359	2172	}
nkeynes@359	2173	break;
nkeynes@359	2174	case 0x5:
nkeynes@359	2175	{ /* FABS FRn */
nkeynes@359	2176	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2177	CHECKFPUEN();
nkeynes@359	2178	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2179	DR(FRn) = fabs(DR(FRn));
nkeynes@359	2180	} else {
nkeynes@359	2181	FR(FRn) = fabsf(FR(FRn));
nkeynes@359	2182	}
nkeynes@359	2183	}
nkeynes@359	2184	break;
nkeynes@359	2185	case 0x6:
nkeynes@359	2186	{ /* FSQRT FRn */
nkeynes@359	2187	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2188	CHECKFPUEN();
nkeynes@359	2189	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2190	DR(FRn) = sqrt(DR(FRn));
nkeynes@359	2191	} else {
nkeynes@359	2192	FR(FRn) = sqrtf(FR(FRn));
nkeynes@359	2193	}
nkeynes@359	2194	}
nkeynes@359	2195	break;
nkeynes@359	2196	case 0x7:
nkeynes@359	2197	{ /* FSRRA FRn */
nkeynes@359	2198	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2199	CHECKFPUEN();
nkeynes@359	2200	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2201	FR(FRn) = 1.0/sqrtf(FR(FRn));
nkeynes@359	2202	}
nkeynes@359	2203	}
nkeynes@359	2204	break;
nkeynes@359	2205	case 0x8:
nkeynes@359	2206	{ /* FLDI0 FRn */
nkeynes@359	2207	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2208	CHECKFPUEN();
nkeynes@359	2209	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2210	DR(FRn) = 0.0;
nkeynes@359	2211	} else {
nkeynes@359	2212	FR(FRn) = 0.0;
nkeynes@359	2213	}
nkeynes@359	2214	}
nkeynes@359	2215	break;
nkeynes@359	2216	case 0x9:
nkeynes@359	2217	{ /* FLDI1 FRn */
nkeynes@359	2218	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2219	CHECKFPUEN();
nkeynes@359	2220	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2221	DR(FRn) = 1.0;
nkeynes@359	2222	} else {
nkeynes@359	2223	FR(FRn) = 1.0;
nkeynes@359	2224	}
nkeynes@359	2225	}
nkeynes@359	2226	break;
nkeynes@359	2227	case 0xA:
nkeynes@359	2228	{ /* FCNVSD FPUL, FRn */
nkeynes@359	2229	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2230	CHECKFPUEN();
nkeynes@359	2231	if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359	2232	DR(FRn) = (double)FPULf;
nkeynes@359	2233	}
nkeynes@359	2234	}
nkeynes@359	2235	break;
nkeynes@359	2236	case 0xB:
nkeynes@359	2237	{ /* FCNVDS FRm, FPUL */
nkeynes@359	2238	uint32_t FRm = ((ir>>8)&0xF);
nkeynes@359	2239	CHECKFPUEN();
nkeynes@359	2240	if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359	2241	FPULf = (float)DR(FRm);
nkeynes@359	2242	}
nkeynes@359	2243	}
nkeynes@359	2244	break;
nkeynes@359	2245	case 0xE:
nkeynes@359	2246	{ /* FIPR FVm, FVn */
nkeynes@359	2247	uint32_t FVn = ((ir>>10)&0x3); uint32_t FVm = ((ir>>8)&0x3);
nkeynes@359	2248	CHECKFPUEN();
nkeynes@359	2249	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2250	int tmp2 = FVn<<2;
nkeynes@359	2251	tmp = FVm<<2;
nkeynes@359	2252	FR(tmp2+3) = FR(tmp)*FR(tmp2) +
nkeynes@359	2253	FR(tmp+1)*FR(tmp2+1) +
nkeynes@359	2254	FR(tmp+2)*FR(tmp2+2) +
nkeynes@359	2255	FR(tmp+3)*FR(tmp2+3);
nkeynes@359	2256	}
nkeynes@359	2257	}
nkeynes@359	2258	break;
nkeynes@359	2259	case 0xF:
nkeynes@359	2260	switch( (ir&0x100) >> 8 ) {
nkeynes@359	2261	case 0x0:
nkeynes@359	2262	{ /* FSCA FPUL, FRn */
nkeynes@359	2263	uint32_t FRn = ((ir>>9)&0x7)<<1;
nkeynes@359	2264	CHECKFPUEN();
nkeynes@359	2265	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2266	float angle = (((float)(FPULi&0xFFFF))/65536.0) * 2 * M_PI;
nkeynes@359	2267	FR(FRn) = sinf(angle);
nkeynes@359	2268	FR((FRn)+1) = cosf(angle);
nkeynes@359	2269	}
nkeynes@359	2270	}
nkeynes@359	2271	break;
nkeynes@359	2272	case 0x1:
nkeynes@359	2273	switch( (ir&0x200) >> 9 ) {
nkeynes@359	2274	case 0x0:
nkeynes@359	2275	{ /* FTRV XMTRX, FVn */
nkeynes@359	2276	uint32_t FVn = ((ir>>10)&0x3);
nkeynes@359	2277	CHECKFPUEN();
nkeynes@359	2278	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2279	tmp = FVn<<2;
nkeynes@359	2280	float fv[4] = { FR(tmp), FR(tmp+1), FR(tmp+2), FR(tmp+3) };
nkeynes@359	2281	FR(tmp) = XF(0) * fv[0] + XF(4)*fv[1] +
nkeynes@359	2282	XF(8)fv[2] + XF(12)fv[3];
nkeynes@359	2283	FR(tmp+1) = XF(1) * fv[0] + XF(5)*fv[1] +
nkeynes@359	2284	XF(9)fv[2] + XF(13)fv[3];
nkeynes@359	2285	FR(tmp+2) = XF(2) * fv[0] + XF(6)*fv[1] +
nkeynes@359	2286	XF(10)fv[2] + XF(14)fv[3];
nkeynes@359	2287	FR(tmp+3) = XF(3) * fv[0] + XF(7)*fv[1] +
nkeynes@359	2288	XF(11)fv[2] + XF(15)fv[3];
nkeynes@359	2289	}
nkeynes@359	2290	}
nkeynes@359	2291	break;
nkeynes@359	2292	case 0x1:
nkeynes@359	2293	switch( (ir&0xC00) >> 10 ) {
nkeynes@359	2294	case 0x0:
nkeynes@359	2295	{ /* FSCHG */
nkeynes@359	2296	CHECKFPUEN(); sh4r.fpscr ^= FPSCR_SZ;
nkeynes@359	2297	}
nkeynes@359	2298	break;
nkeynes@359	2299	case 0x2:
nkeynes@359	2300	{ /* FRCHG */
nkeynes@359	2301	CHECKFPUEN(); sh4r.fpscr ^= FPSCR_FR;
nkeynes@359	2302	}
nkeynes@359	2303	break;
nkeynes@359	2304	case 0x3:
nkeynes@359	2305	{ /* UNDEF */
nkeynes@359	2306	UNDEF(ir);
nkeynes@359	2307	}
nkeynes@359	2308	break;
nkeynes@359	2309	default:
nkeynes@359	2310	UNDEF();
nkeynes@359	2311	break;
nkeynes@359	2312	}
nkeynes@359	2313	break;
nkeynes@359	2314	}
nkeynes@359	2315	break;
nkeynes@359	2316	}
nkeynes@359	2317	break;
nkeynes@359	2318	default:
nkeynes@359	2319	UNDEF();
nkeynes@359	2320	break;
nkeynes@359	2321	}
nkeynes@359	2322	break;
nkeynes@359	2323	case 0xE:
nkeynes@359	2324	{ /* FMAC FR0, FRm, FRn */
nkeynes@359	2325	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2326	CHECKFPUEN();
nkeynes@359	2327	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2328	DR(FRn) += DR(FRm)*DR(0);
nkeynes@359	2329	} else {
nkeynes@359	2330	FR(FRn) += FR(FRm)*FR(0);
nkeynes@359	2331	}
nkeynes@359	2332	}
nkeynes@359	2333	break;
nkeynes@359	2334	default:
nkeynes@359	2335	UNDEF();
nkeynes@359	2336	break;
nkeynes@359	2337	}
nkeynes@359	2338	break;
nkeynes@359	2339	}
nkeynes@1	2340
nkeynes@1	2341	sh4r.pc = sh4r.new_pc;
nkeynes@1	2342	sh4r.new_pc += 2;
nkeynes@2	2343	sh4r.in_delay_slot = 0;
nkeynes@273	2344	return TRUE;
nkeynes@1	2345	}