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lxdream.org :: lxdream/src/sh4/sh4core.in
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.in
changeset 671:a530ea88eebd
prev669:ab344e42bca9
next732:f05753bbe723
author nkeynes
date Thu May 15 10:22:39 2008 +0000 (11 years ago)
permissions -rw-r--r--
last change Permanently add SH4 instruction statistics tracking (enabled with --enable-sh4stats)
file annotate diff log raw
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/**
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 * $Id$
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 * 
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 * SH4 emulation core, and parent module for all the SH4 peripheral
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 * modules.
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE sh4_module
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#include <assert.h>
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#include <math.h>
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#include "dream.h"
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#include "dreamcast.h"
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#include "eventq.h"
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#include "mem.h"
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#include "clock.h"
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#include "syscall.h"
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#include "sh4/sh4core.h"
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#include "sh4/sh4mmio.h"
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#include "sh4/sh4stat.h"
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#include "sh4/intc.h"
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#define SH4_CALLTRACE 1
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#define MAX_INT 0x7FFFFFFF
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#define MIN_INT 0x80000000
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#define MAX_INTF 2147483647.0
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#define MIN_INTF -2147483648.0
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/********************** SH4 Module Definition ****************************/
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uint32_t sh4_run_slice( uint32_t nanosecs ) 
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{
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    int i;
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    sh4r.slice_cycle = 0;
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    if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
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	sh4_sleep_run_slice(nanosecs);
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    }
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    if( sh4_breakpoint_count == 0 ) {
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	for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    if( !sh4_execute_instruction() ) {
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		break;
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	    }
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	}
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    } else {
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	for( ;sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    if( !sh4_execute_instruction() )
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		break;
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#ifdef ENABLE_DEBUG_MODE
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	    for( i=0; i<sh4_breakpoint_count; i++ ) {
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		if( sh4_breakpoints[i].address == sh4r.pc ) {
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		    break;
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		}
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	    }
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	    if( i != sh4_breakpoint_count ) {
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		dreamcast_stop();
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		if( sh4_breakpoints[i].type == BREAK_ONESHOT )
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		    sh4_clear_breakpoint( sh4r.pc, BREAK_ONESHOT );
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		break;
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	    }
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#endif	
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	}
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    }
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    /* If we aborted early, but the cpu is still technically running,
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     * we're doing a hard abort - cut the timeslice back to what we
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     * actually executed
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     */
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    if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
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	nanosecs = sh4r.slice_cycle;
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    }
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    if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
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	TMU_run_slice( nanosecs );
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	SCIF_run_slice( nanosecs );
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    }
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    return nanosecs;
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}
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/********************** SH4 emulation core  ****************************/
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#define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
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#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); dreamcast_stop(); return FALSE; }while(0)
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#if(SH4_CALLTRACE == 1)
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#define MAX_CALLSTACK 32
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static struct call_stack {
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    sh4addr_t call_addr;
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    sh4addr_t target_addr;
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    sh4addr_t stack_pointer;
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} call_stack[MAX_CALLSTACK];
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static int call_stack_depth = 0;
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int sh4_call_trace_on = 0;
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static inline void trace_call( sh4addr_t source, sh4addr_t dest ) 
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{
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    if( call_stack_depth < MAX_CALLSTACK ) {
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	call_stack[call_stack_depth].call_addr = source;
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	call_stack[call_stack_depth].target_addr = dest;
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	call_stack[call_stack_depth].stack_pointer = sh4r.r[15];
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    }
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    call_stack_depth++;
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}
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static inline void trace_return( sh4addr_t source, sh4addr_t dest )
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{
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    if( call_stack_depth > 0 ) {
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	call_stack_depth--;
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    }
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}
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void fprint_stack_trace( FILE *f )
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{
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    int i = call_stack_depth -1;
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    if( i >= MAX_CALLSTACK )
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	i = MAX_CALLSTACK - 1;
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    for( ; i >= 0; i-- ) {
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	fprintf( f, "%d. Call from %08X => %08X, SP=%08X\n", 
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		 (call_stack_depth - i), call_stack[i].call_addr,
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		 call_stack[i].target_addr, call_stack[i].stack_pointer );
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    }
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}
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#define TRACE_CALL( source, dest ) trace_call(source, dest)
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#define TRACE_RETURN( source, dest ) trace_return(source, dest)
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#else
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#define TRACE_CALL( dest, rts ) 
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#define TRACE_RETURN( source, dest )
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#endif
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#define MEM_READ_BYTE( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_byte(memtmp); }
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#define MEM_READ_WORD( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_word(memtmp); }
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#define MEM_READ_LONG( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_long(memtmp); }
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#define MEM_WRITE_BYTE( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_byte(memtmp, val); }
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#define MEM_WRITE_WORD( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_word(memtmp, val); }
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#define MEM_WRITE_LONG( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_long(memtmp, val); }
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#define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
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#define MEM_FP_READ( addr, reg ) sh4_read_float( addr, reg );
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#define MEM_FP_WRITE( addr, reg ) sh4_write_float( addr, reg );
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#define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL )
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#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
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#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
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#define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
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static void sh4_write_float( uint32_t addr, int reg )
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{
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    if( IS_FPU_DOUBLESIZE() ) {
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	if( reg & 1 ) {
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	    sh4_write_long( addr, *((uint32_t *)&XF((reg)&0x0E)) );
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	    sh4_write_long( addr+4, *((uint32_t *)&XF(reg)) );
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	} else {
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	    sh4_write_long( addr, *((uint32_t *)&FR(reg)) ); 
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	    sh4_write_long( addr+4, *((uint32_t *)&FR((reg)|0x01)) );
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	}
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    } else {
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	sh4_write_long( addr, *((uint32_t *)&FR((reg))) );
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    }
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}
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static void sh4_read_float( uint32_t addr, int reg )
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{
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    if( IS_FPU_DOUBLESIZE() ) {
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	if( reg & 1 ) {
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	    *((uint32_t *)&XF((reg) & 0x0E)) = sh4_read_long(addr);
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	    *((uint32_t *)&XF(reg)) = sh4_read_long(addr+4);
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	} else {
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	    *((uint32_t *)&FR(reg)) = sh4_read_long(addr);
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	    *((uint32_t *)&FR((reg) | 0x01)) = sh4_read_long(addr+4);
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	}
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    } else {
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	*((uint32_t *)&FR(reg)) = sh4_read_long(addr);
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    }
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}
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gboolean sh4_execute_instruction( void )
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{
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    uint32_t pc;
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    unsigned short ir;
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    uint32_t tmp;
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    float ftmp;
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    double dtmp;
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    int64_t memtmp; // temporary holder for memory reads
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#define R0 sh4r.r[0]
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    pc = sh4r.pc;
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    if( pc > 0xFFFFFF00 ) {
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	/* SYSCALL Magic */
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	syscall_invoke( pc );
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	sh4r.in_delay_slot = 0;
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	pc = sh4r.pc = sh4r.pr;
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	sh4r.new_pc = sh4r.pc + 2;
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        return TRUE;
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    }
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    CHECKRALIGN16(pc);
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#ifdef ENABLE_SH4STATS
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    sh4_stats_add_by_pc(sh4r.pc);
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#endif
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    /* Read instruction */
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    if( !IS_IN_ICACHE(pc) ) {
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	if( !mmu_update_icache(pc) ) {
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	    // Fault - look for the fault handler
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	    if( !mmu_update_icache(sh4r.pc) ) {
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		// double fault - halt
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		ERROR( "Double fault - halting" );
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		dreamcast_stop();
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		return FALSE;
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	    }
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	}
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	pc = sh4r.pc;
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    }
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    assert( IS_IN_ICACHE(pc) );
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    ir = *(uint16_t *)GET_ICACHE_PTR(sh4r.pc);
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%%
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AND Rm, Rn {: sh4r.r[Rn] &= sh4r.r[Rm]; :}
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AND #imm, R0 {: R0 &= imm; :}
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 AND.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp ); :}
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NOT Rm, Rn {: sh4r.r[Rn] = ~sh4r.r[Rm]; :}
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OR Rm, Rn {: sh4r.r[Rn] |= sh4r.r[Rm]; :}
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OR #imm, R0  {: R0 |= imm; :}
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 OR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp ); :}
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TAS.B @Rn {:
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    MEM_READ_BYTE( sh4r.r[Rn], tmp );
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    sh4r.t = ( tmp == 0 ? 1 : 0 );
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    MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );
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:}
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TST Rm, Rn {: sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1); :}
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TST #imm, R0 {: sh4r.t = (R0 & imm ? 0 : 1); :}
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 TST.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); sh4r.t = ( tmp & imm ? 0 : 1 ); :}
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XOR Rm, Rn {: sh4r.r[Rn] ^= sh4r.r[Rm]; :}
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XOR #imm, R0 {: R0 ^= imm; :}
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 XOR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp ); :}
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XTRCT Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rn]>>16) | (sh4r.r[Rm]<<16); :}
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ROTL Rn {:
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    sh4r.t = sh4r.r[Rn] >> 31;
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    sh4r.r[Rn] <<= 1;
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    sh4r.r[Rn] |= sh4r.t;
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:}
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ROTR Rn {:
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    sh4r.t = sh4r.r[Rn] & 0x00000001;
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    sh4r.r[Rn] >>= 1;
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    sh4r.r[Rn] |= (sh4r.t << 31);
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:}
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ROTCL Rn {:
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    tmp = sh4r.r[Rn] >> 31;
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    sh4r.r[Rn] <<= 1;
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    sh4r.r[Rn] |= sh4r.t;
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    sh4r.t = tmp;
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:}
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ROTCR Rn {:
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    tmp = sh4r.r[Rn] & 0x00000001;
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    sh4r.r[Rn] >>= 1;
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    sh4r.r[Rn] |= (sh4r.t << 31 );
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    sh4r.t = tmp;
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:}
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SHAD Rm, Rn {:
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    tmp = sh4r.r[Rm];
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    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
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    else if( (tmp & 0x1F) == 0 )  
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        sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 31;
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    else 
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	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> (((~sh4r.r[Rm]) & 0x1F)+1);
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:}
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SHLD Rm, Rn {:
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    tmp = sh4r.r[Rm];
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    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
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   309
    else if( (tmp & 0x1F) == 0 ) sh4r.r[Rn] = 0;
nkeynes@359
   310
    else sh4r.r[Rn] >>= (((~tmp) & 0x1F)+1);
nkeynes@359
   311
:}
nkeynes@359
   312
SHAL Rn {:
nkeynes@359
   313
    sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359
   314
    sh4r.r[Rn] <<= 1;
nkeynes@359
   315
:}
nkeynes@359
   316
SHAR Rn {:
nkeynes@359
   317
    sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359
   318
    sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 1;
nkeynes@359
   319
:}
nkeynes@359
   320
SHLL Rn {: sh4r.t = sh4r.r[Rn] >> 31; sh4r.r[Rn] <<= 1; :}
nkeynes@359
   321
SHLR Rn {: sh4r.t = sh4r.r[Rn] & 0x00000001; sh4r.r[Rn] >>= 1; :}
nkeynes@359
   322
SHLL2 Rn {: sh4r.r[Rn] <<= 2; :}
nkeynes@359
   323
SHLR2 Rn {: sh4r.r[Rn] >>= 2; :}
nkeynes@359
   324
SHLL8 Rn {: sh4r.r[Rn] <<= 8; :}
nkeynes@359
   325
SHLR8 Rn {: sh4r.r[Rn] >>= 8; :}
nkeynes@359
   326
SHLL16 Rn {: sh4r.r[Rn] <<= 16; :}
nkeynes@359
   327
SHLR16 Rn {: sh4r.r[Rn] >>= 16; :}
nkeynes@359
   328
nkeynes@359
   329
EXTU.B Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x000000FF; :}
nkeynes@359
   330
EXTU.W Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x0000FFFF; :}
nkeynes@359
   331
EXTS.B Rm, Rn {: sh4r.r[Rn] = SIGNEXT8( sh4r.r[Rm]&0x000000FF ); :}
nkeynes@359
   332
EXTS.W Rm, Rn {: sh4r.r[Rn] = SIGNEXT16( sh4r.r[Rm]&0x0000FFFF ); :}
nkeynes@359
   333
SWAP.B Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]&0xFFFF0000) | ((sh4r.r[Rm]&0x0000FF00)>>8) | ((sh4r.r[Rm]&0x000000FF)<<8); :}
nkeynes@359
   334
SWAP.W Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]>>16) | (sh4r.r[Rm]<<16); :}
nkeynes@359
   335
nkeynes@359
   336
CLRT {: sh4r.t = 0; :}
nkeynes@359
   337
SETT {: sh4r.t = 1; :}
nkeynes@359
   338
CLRMAC {: sh4r.mac = 0; :}
nkeynes@550
   339
LDTLB {: MMU_ldtlb(); :}
nkeynes@359
   340
CLRS {: sh4r.s = 0; :}
nkeynes@359
   341
SETS {: sh4r.s = 1; :}
nkeynes@359
   342
MOVT Rn {: sh4r.r[Rn] = sh4r.t; :}
nkeynes@359
   343
NOP {: /* NOP */ :}
nkeynes@359
   344
nkeynes@359
   345
PREF @Rn {:
nkeynes@359
   346
     tmp = sh4r.r[Rn];
nkeynes@359
   347
     if( (tmp & 0xFC000000) == 0xE0000000 ) {
nkeynes@369
   348
	 sh4_flush_store_queue(tmp);
nkeynes@359
   349
     }
nkeynes@359
   350
:}
nkeynes@359
   351
OCBI @Rn {: :}
nkeynes@359
   352
OCBP @Rn {: :}
nkeynes@359
   353
OCBWB @Rn {: :}
nkeynes@359
   354
MOVCA.L R0, @Rn {:
nkeynes@359
   355
    tmp = sh4r.r[Rn];
nkeynes@359
   356
    CHECKWALIGN32(tmp);
nkeynes@359
   357
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   358
:}
nkeynes@359
   359
MOV.B Rm, @(R0, Rn) {: MEM_WRITE_BYTE( R0 + sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   360
MOV.W Rm, @(R0, Rn) {: 
nkeynes@359
   361
    CHECKWALIGN16( R0 + sh4r.r[Rn] );
nkeynes@359
   362
    MEM_WRITE_WORD( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   363
:}
nkeynes@359
   364
MOV.L Rm, @(R0, Rn) {:
nkeynes@359
   365
    CHECKWALIGN32( R0 + sh4r.r[Rn] );
nkeynes@359
   366
    MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   367
:}
nkeynes@586
   368
MOV.B @(R0, Rm), Rn {: MEM_READ_BYTE( R0 + sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@359
   369
MOV.W @(R0, Rm), Rn {: CHECKRALIGN16( R0 + sh4r.r[Rm] );
nkeynes@586
   370
    MEM_READ_WORD( R0 + sh4r.r[Rm], sh4r.r[Rn] );
nkeynes@359
   371
:}
nkeynes@359
   372
MOV.L @(R0, Rm), Rn {: CHECKRALIGN32( R0 + sh4r.r[Rm] );
nkeynes@586
   373
    MEM_READ_LONG( R0 + sh4r.r[Rm], sh4r.r[Rn] );
nkeynes@359
   374
:}
nkeynes@359
   375
MOV.L Rm, @(disp, Rn) {:
nkeynes@359
   376
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   377
    CHECKWALIGN32( tmp );
nkeynes@359
   378
    MEM_WRITE_LONG( tmp, sh4r.r[Rm] );
nkeynes@359
   379
:}
nkeynes@359
   380
MOV.B Rm, @Rn {: MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   381
MOV.W Rm, @Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   382
MOV.L Rm, @Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@587
   383
 MOV.B Rm, @-Rn {: MEM_WRITE_BYTE( sh4r.r[Rn]-1, sh4r.r[Rm] ); sh4r.r[Rn]--; :}
nkeynes@587
   384
 MOV.W Rm, @-Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn]-2, sh4r.r[Rm] ); sh4r.r[Rn] -= 2; :}
nkeynes@587
   385
 MOV.L Rm, @-Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.r[Rm] ); sh4r.r[Rn] -= 4; :}
nkeynes@359
   386
MOV.L @(disp, Rm), Rn {:
nkeynes@359
   387
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   388
    CHECKRALIGN32( tmp );
nkeynes@586
   389
    MEM_READ_LONG( tmp, sh4r.r[Rn] );
nkeynes@359
   390
:}
nkeynes@586
   391
MOV.B @Rm, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@586
   392
 MOV.W @Rm, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@586
   393
 MOV.L @Rm, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@359
   394
MOV Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]; :}
nkeynes@586
   395
 MOV.B @Rm+, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] ++; :}
nkeynes@586
   396
 MOV.W @Rm+, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 2; :}
nkeynes@586
   397
 MOV.L @Rm+, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 4; :}
nkeynes@359
   398
MOV.L @(disp, PC), Rn {:
nkeynes@359
   399
    CHECKSLOTILLEGAL();
nkeynes@359
   400
    tmp = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@586
   401
    MEM_READ_LONG( tmp, sh4r.r[Rn] );
nkeynes@359
   402
:}
nkeynes@359
   403
MOV.B R0, @(disp, GBR) {: MEM_WRITE_BYTE( sh4r.gbr + disp, R0 ); :}
nkeynes@359
   404
MOV.W R0, @(disp, GBR) {:
nkeynes@359
   405
    tmp = sh4r.gbr + disp;
nkeynes@359
   406
    CHECKWALIGN16( tmp );
nkeynes@359
   407
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   408
:}
nkeynes@359
   409
MOV.L R0, @(disp, GBR) {:
nkeynes@359
   410
    tmp = sh4r.gbr + disp;
nkeynes@359
   411
    CHECKWALIGN32( tmp );
nkeynes@359
   412
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   413
:}
nkeynes@586
   414
 MOV.B @(disp, GBR), R0 {: MEM_READ_BYTE( sh4r.gbr + disp, R0 ); :}
nkeynes@359
   415
MOV.W @(disp, GBR), R0 {: 
nkeynes@359
   416
    tmp = sh4r.gbr + disp;
nkeynes@359
   417
    CHECKRALIGN16( tmp );
nkeynes@586
   418
    MEM_READ_WORD( tmp, R0 );
nkeynes@359
   419
:}
nkeynes@359
   420
MOV.L @(disp, GBR), R0 {:
nkeynes@359
   421
    tmp = sh4r.gbr + disp;
nkeynes@359
   422
    CHECKRALIGN32( tmp );
nkeynes@586
   423
    MEM_READ_LONG( tmp, R0 );
nkeynes@359
   424
:}
nkeynes@359
   425
MOV.B R0, @(disp, Rn) {: MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 ); :}
nkeynes@359
   426
MOV.W R0, @(disp, Rn) {: 
nkeynes@359
   427
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   428
    CHECKWALIGN16( tmp );
nkeynes@359
   429
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   430
:}
nkeynes@586
   431
 MOV.B @(disp, Rm), R0 {: MEM_READ_BYTE( sh4r.r[Rm] + disp, R0 ); :}
nkeynes@359
   432
MOV.W @(disp, Rm), R0 {: 
nkeynes@359
   433
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   434
    CHECKRALIGN16( tmp );
nkeynes@586
   435
    MEM_READ_WORD( tmp, R0 );
nkeynes@359
   436
:}
nkeynes@359
   437
MOV.W @(disp, PC), Rn {:
nkeynes@359
   438
    CHECKSLOTILLEGAL();
nkeynes@359
   439
    tmp = pc + 4 + disp;
nkeynes@586
   440
    MEM_READ_WORD( tmp, sh4r.r[Rn] );
nkeynes@359
   441
:}
nkeynes@359
   442
MOVA @(disp, PC), R0 {:
nkeynes@359
   443
    CHECKSLOTILLEGAL();
nkeynes@359
   444
    R0 = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359
   445
:}
nkeynes@359
   446
MOV #imm, Rn {:  sh4r.r[Rn] = imm; :}
nkeynes@359
   447
nkeynes@359
   448
CMP/EQ #imm, R0 {: sh4r.t = ( R0 == imm ? 1 : 0 ); :}
nkeynes@359
   449
CMP/EQ Rm, Rn {: sh4r.t = ( sh4r.r[Rm] == sh4r.r[Rn] ? 1 : 0 ); :}
nkeynes@359
   450
CMP/GE Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   451
CMP/GT Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   452
CMP/HI Rm, Rn {: sh4r.t = ( sh4r.r[Rn] > sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   453
CMP/HS Rm, Rn {: sh4r.t = ( sh4r.r[Rn] >= sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   454
CMP/PL Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > 0 ? 1 : 0 ); :}
nkeynes@359
   455
CMP/PZ Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= 0 ? 1 : 0 ); :}
nkeynes@359
   456
CMP/STR Rm, Rn {: 
nkeynes@359
   457
    /* set T = 1 if any byte in RM & RN is the same */
nkeynes@359
   458
    tmp = sh4r.r[Rm] ^ sh4r.r[Rn];
nkeynes@359
   459
    sh4r.t = ((tmp&0x000000FF)==0 || (tmp&0x0000FF00)==0 ||
nkeynes@359
   460
             (tmp&0x00FF0000)==0 || (tmp&0xFF000000)==0)?1:0;
nkeynes@359
   461
:}
nkeynes@359
   462
nkeynes@359
   463
ADD Rm, Rn {: sh4r.r[Rn] += sh4r.r[Rm]; :}
nkeynes@359
   464
ADD #imm, Rn {: sh4r.r[Rn] += imm; :}
nkeynes@359
   465
ADDC Rm, Rn {:
nkeynes@359
   466
    tmp = sh4r.r[Rn];
nkeynes@359
   467
    sh4r.r[Rn] += sh4r.r[Rm] + sh4r.t;
nkeynes@359
   468
    sh4r.t = ( sh4r.r[Rn] < tmp || (sh4r.r[Rn] == tmp && sh4r.t != 0) ? 1 : 0 );
nkeynes@359
   469
:}
nkeynes@359
   470
ADDV Rm, Rn {:
nkeynes@359
   471
    tmp = sh4r.r[Rn] + sh4r.r[Rm];
nkeynes@359
   472
    sh4r.t = ( (sh4r.r[Rn]>>31) == (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
nkeynes@359
   473
    sh4r.r[Rn] = tmp;
nkeynes@359
   474
:}
nkeynes@359
   475
DIV0U {: sh4r.m = sh4r.q = sh4r.t = 0; :}
nkeynes@359
   476
DIV0S Rm, Rn {: 
nkeynes@359
   477
    sh4r.q = sh4r.r[Rn]>>31;
nkeynes@359
   478
    sh4r.m = sh4r.r[Rm]>>31;
nkeynes@359
   479
    sh4r.t = sh4r.q ^ sh4r.m;
nkeynes@359
   480
:}
nkeynes@359
   481
DIV1 Rm, Rn {:
nkeynes@384
   482
    /* This is derived from the sh4 manual with some simplifications */
nkeynes@359
   483
    uint32_t tmp0, tmp1, tmp2, dir;
nkeynes@359
   484
nkeynes@359
   485
    dir = sh4r.q ^ sh4r.m;
nkeynes@359
   486
    sh4r.q = (sh4r.r[Rn] >> 31);
nkeynes@359
   487
    tmp2 = sh4r.r[Rm];
nkeynes@359
   488
    sh4r.r[Rn] = (sh4r.r[Rn] << 1) | sh4r.t;
nkeynes@359
   489
    tmp0 = sh4r.r[Rn];
nkeynes@359
   490
    if( dir ) {
nkeynes@359
   491
         sh4r.r[Rn] += tmp2;
nkeynes@359
   492
         tmp1 = (sh4r.r[Rn]<tmp0 ? 1 : 0 );
nkeynes@359
   493
    } else {
nkeynes@359
   494
         sh4r.r[Rn] -= tmp2;
nkeynes@359
   495
         tmp1 = (sh4r.r[Rn]>tmp0 ? 1 : 0 );
nkeynes@359
   496
    }
nkeynes@359
   497
    sh4r.q ^= sh4r.m ^ tmp1;
nkeynes@359
   498
    sh4r.t = ( sh4r.q == sh4r.m ? 1 : 0 );
nkeynes@359
   499
:}
nkeynes@359
   500
DMULS.L Rm, Rn {: sh4r.mac = SIGNEXT32(sh4r.r[Rm]) * SIGNEXT32(sh4r.r[Rn]); :}
nkeynes@359
   501
DMULU.L Rm, Rn {: sh4r.mac = ((uint64_t)sh4r.r[Rm]) * ((uint64_t)sh4r.r[Rn]); :}
nkeynes@359
   502
DT Rn {:
nkeynes@359
   503
    sh4r.r[Rn] --;
nkeynes@359
   504
    sh4r.t = ( sh4r.r[Rn] == 0 ? 1 : 0 );
nkeynes@359
   505
:}
nkeynes@359
   506
MAC.W @Rm+, @Rn+ {:
nkeynes@587
   507
    int32_t stmp;
nkeynes@587
   508
    if( Rm == Rn ) {
nkeynes@587
   509
	CHECKRALIGN16(sh4r.r[Rn]);
nkeynes@587
   510
	MEM_READ_WORD( sh4r.r[Rn], tmp );
nkeynes@587
   511
	stmp = SIGNEXT16(tmp);
nkeynes@587
   512
	MEM_READ_WORD( sh4r.r[Rn]+2, tmp );
nkeynes@587
   513
	stmp *= SIGNEXT16(tmp);
nkeynes@587
   514
	sh4r.r[Rn] += 4;
nkeynes@587
   515
    } else {
nkeynes@587
   516
	CHECKRALIGN16( sh4r.r[Rn] );
nkeynes@587
   517
	CHECKRALIGN16( sh4r.r[Rm] );
nkeynes@587
   518
	MEM_READ_WORD(sh4r.r[Rn], tmp);
nkeynes@587
   519
	stmp = SIGNEXT16(tmp);
nkeynes@587
   520
	MEM_READ_WORD(sh4r.r[Rm], tmp);
nkeynes@587
   521
	stmp = stmp * SIGNEXT16(tmp);
nkeynes@587
   522
	sh4r.r[Rn] += 2;
nkeynes@587
   523
	sh4r.r[Rm] += 2;
nkeynes@587
   524
    }
nkeynes@359
   525
    if( sh4r.s ) {
nkeynes@359
   526
	int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
nkeynes@359
   527
	if( tmpl > (int64_t)0x000000007FFFFFFFLL ) {
nkeynes@359
   528
	    sh4r.mac = 0x000000017FFFFFFFLL;
nkeynes@359
   529
	} else if( tmpl < (int64_t)0xFFFFFFFF80000000LL ) {
nkeynes@359
   530
	    sh4r.mac = 0x0000000180000000LL;
nkeynes@359
   531
	} else {
nkeynes@359
   532
	    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   533
		((uint32_t)(sh4r.mac + stmp));
nkeynes@359
   534
	}
nkeynes@359
   535
    } else {
nkeynes@359
   536
	sh4r.mac += SIGNEXT32(stmp);
nkeynes@359
   537
    }
nkeynes@359
   538
:}
nkeynes@359
   539
MAC.L @Rm+, @Rn+ {:
nkeynes@587
   540
    int64_t tmpl;
nkeynes@587
   541
    if( Rm == Rn ) {
nkeynes@587
   542
	CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@587
   543
	MEM_READ_LONG(sh4r.r[Rn], tmp);
nkeynes@587
   544
	tmpl = SIGNEXT32(tmp);
nkeynes@587
   545
	MEM_READ_LONG(sh4r.r[Rn]+4, tmp);
nkeynes@587
   546
	tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
nkeynes@587
   547
	sh4r.r[Rn] += 8;
nkeynes@587
   548
    } else {
nkeynes@587
   549
	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@587
   550
	CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@587
   551
	MEM_READ_LONG(sh4r.r[Rn], tmp);
nkeynes@587
   552
	tmpl = SIGNEXT32(tmp);
nkeynes@587
   553
	MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@587
   554
	tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
nkeynes@587
   555
	sh4r.r[Rn] += 4;
nkeynes@587
   556
	sh4r.r[Rm] += 4;
nkeynes@587
   557
    }
nkeynes@359
   558
    if( sh4r.s ) {
nkeynes@359
   559
        /* 48-bit Saturation. Yuch */
nkeynes@359
   560
        if( tmpl < (int64_t)0xFFFF800000000000LL )
nkeynes@359
   561
            tmpl = 0xFFFF800000000000LL;
nkeynes@359
   562
        else if( tmpl > (int64_t)0x00007FFFFFFFFFFFLL )
nkeynes@359
   563
            tmpl = 0x00007FFFFFFFFFFFLL;
nkeynes@359
   564
    }
nkeynes@359
   565
    sh4r.mac = tmpl;
nkeynes@359
   566
:}
nkeynes@359
   567
MUL.L Rm, Rn {: sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   568
                        (sh4r.r[Rm] * sh4r.r[Rn]); :}
nkeynes@359
   569
MULU.W Rm, Rn {:
nkeynes@359
   570
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   571
               (uint32_t)((sh4r.r[Rm]&0xFFFF) * (sh4r.r[Rn]&0xFFFF));
nkeynes@359
   572
:}
nkeynes@359
   573
MULS.W Rm, Rn {:
nkeynes@359
   574
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   575
               (uint32_t)(SIGNEXT32(sh4r.r[Rm]&0xFFFF) * SIGNEXT32(sh4r.r[Rn]&0xFFFF));
nkeynes@359
   576
:}
nkeynes@359
   577
NEGC Rm, Rn {:
nkeynes@359
   578
    tmp = 0 - sh4r.r[Rm];
nkeynes@359
   579
    sh4r.r[Rn] = tmp - sh4r.t;
nkeynes@359
   580
    sh4r.t = ( 0<tmp || tmp<sh4r.r[Rn] ? 1 : 0 );
nkeynes@359
   581
:}
nkeynes@359
   582
NEG Rm, Rn {: sh4r.r[Rn] = 0 - sh4r.r[Rm]; :}
nkeynes@359
   583
SUB Rm, Rn {: sh4r.r[Rn] -= sh4r.r[Rm]; :}
nkeynes@359
   584
SUBC Rm, Rn {: 
nkeynes@359
   585
    tmp = sh4r.r[Rn];
nkeynes@359
   586
    sh4r.r[Rn] = sh4r.r[Rn] - sh4r.r[Rm] - sh4r.t;
nkeynes@359
   587
    sh4r.t = (sh4r.r[Rn] > tmp || (sh4r.r[Rn] == tmp && sh4r.t == 1));
nkeynes@359
   588
:}
nkeynes@359
   589
nkeynes@359
   590
BRAF Rn {:
nkeynes@359
   591
     CHECKSLOTILLEGAL();
nkeynes@359
   592
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   593
     sh4r.in_delay_slot = 1;
nkeynes@359
   594
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   595
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   596
     return TRUE;
nkeynes@359
   597
:}
nkeynes@359
   598
BSRF Rn {:
nkeynes@359
   599
     CHECKSLOTILLEGAL();
nkeynes@359
   600
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   601
     sh4r.in_delay_slot = 1;
nkeynes@359
   602
     sh4r.pr = sh4r.pc + 4;
nkeynes@359
   603
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   604
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   605
     TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   606
     return TRUE;
nkeynes@359
   607
:}
nkeynes@359
   608
BT disp {:
nkeynes@359
   609
    CHECKSLOTILLEGAL();
nkeynes@359
   610
    if( sh4r.t ) {
nkeynes@359
   611
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   612
        sh4r.pc += disp + 4;
nkeynes@359
   613
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   614
        return TRUE;
nkeynes@359
   615
    }
nkeynes@359
   616
:}
nkeynes@359
   617
BF disp {:
nkeynes@359
   618
    CHECKSLOTILLEGAL();
nkeynes@359
   619
    if( !sh4r.t ) {
nkeynes@359
   620
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   621
        sh4r.pc += disp + 4;
nkeynes@359
   622
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   623
        return TRUE;
nkeynes@359
   624
    }
nkeynes@359
   625
:}
nkeynes@359
   626
BT/S disp {:
nkeynes@359
   627
    CHECKSLOTILLEGAL();
nkeynes@359
   628
    if( sh4r.t ) {
nkeynes@359
   629
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   630
        sh4r.in_delay_slot = 1;
nkeynes@359
   631
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   632
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   633
        sh4r.in_delay_slot = 1;
nkeynes@359
   634
        return TRUE;
nkeynes@359
   635
    }
nkeynes@359
   636
:}
nkeynes@359
   637
BF/S disp {:
nkeynes@359
   638
    CHECKSLOTILLEGAL();
nkeynes@359
   639
    if( !sh4r.t ) {
nkeynes@359
   640
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   641
        sh4r.in_delay_slot = 1;
nkeynes@359
   642
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   643
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   644
        return TRUE;
nkeynes@359
   645
    }
nkeynes@359
   646
:}
nkeynes@359
   647
BRA disp {:
nkeynes@359
   648
    CHECKSLOTILLEGAL();
nkeynes@359
   649
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   650
    sh4r.in_delay_slot = 1;
nkeynes@359
   651
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   652
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   653
    return TRUE;
nkeynes@359
   654
:}
nkeynes@359
   655
BSR disp {:
nkeynes@359
   656
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   657
    CHECKSLOTILLEGAL();
nkeynes@359
   658
    sh4r.in_delay_slot = 1;
nkeynes@359
   659
    sh4r.pr = pc + 4;
nkeynes@359
   660
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   661
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   662
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   663
    return TRUE;
nkeynes@359
   664
:}
nkeynes@359
   665
TRAPA #imm {:
nkeynes@359
   666
    CHECKSLOTILLEGAL();
nkeynes@359
   667
    sh4r.pc += 2;
nkeynes@586
   668
    sh4_raise_trap( imm );
nkeynes@586
   669
    return TRUE;
nkeynes@359
   670
:}
nkeynes@359
   671
RTS {: 
nkeynes@359
   672
    CHECKSLOTILLEGAL();
nkeynes@359
   673
    CHECKDEST( sh4r.pr );
nkeynes@359
   674
    sh4r.in_delay_slot = 1;
nkeynes@359
   675
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   676
    sh4r.new_pc = sh4r.pr;
nkeynes@359
   677
    TRACE_RETURN( pc, sh4r.new_pc );
nkeynes@359
   678
    return TRUE;
nkeynes@359
   679
:}
nkeynes@359
   680
SLEEP {:
nkeynes@359
   681
    if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
nkeynes@359
   682
	sh4r.sh4_state = SH4_STATE_STANDBY;
nkeynes@359
   683
    } else {
nkeynes@359
   684
	sh4r.sh4_state = SH4_STATE_SLEEP;
nkeynes@359
   685
    }
nkeynes@359
   686
    return FALSE; /* Halt CPU */
nkeynes@359
   687
:}
nkeynes@359
   688
RTE {:
nkeynes@359
   689
    CHECKPRIV();
nkeynes@359
   690
    CHECKDEST( sh4r.spc );
nkeynes@359
   691
    CHECKSLOTILLEGAL();
nkeynes@359
   692
    sh4r.in_delay_slot = 1;
nkeynes@359
   693
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   694
    sh4r.new_pc = sh4r.spc;
nkeynes@374
   695
    sh4_write_sr( sh4r.ssr );
nkeynes@359
   696
    return TRUE;
nkeynes@359
   697
:}
nkeynes@359
   698
JMP @Rn {:
nkeynes@359
   699
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   700
    CHECKSLOTILLEGAL();
nkeynes@359
   701
    sh4r.in_delay_slot = 1;
nkeynes@359
   702
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   703
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   704
    return TRUE;
nkeynes@359
   705
:}
nkeynes@359
   706
JSR @Rn {:
nkeynes@359
   707
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   708
    CHECKSLOTILLEGAL();
nkeynes@359
   709
    sh4r.in_delay_slot = 1;
nkeynes@359
   710
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   711
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   712
    sh4r.pr = pc + 4;
nkeynes@359
   713
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   714
    return TRUE;
nkeynes@359
   715
:}
nkeynes@359
   716
STS MACH, Rn {: sh4r.r[Rn] = (sh4r.mac>>32); :}
nkeynes@359
   717
STS.L MACH, @-Rn {:
nkeynes@587
   718
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   719
    MEM_WRITE_LONG( sh4r.r[Rn]-4, (sh4r.mac>>32) );
nkeynes@359
   720
    sh4r.r[Rn] -= 4;
nkeynes@359
   721
:}
nkeynes@359
   722
STC.L SR, @-Rn {:
nkeynes@359
   723
    CHECKPRIV();
nkeynes@587
   724
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   725
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4_read_sr() );
nkeynes@359
   726
    sh4r.r[Rn] -= 4;
nkeynes@359
   727
:}
nkeynes@359
   728
LDS.L @Rm+, MACH {:
nkeynes@359
   729
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   730
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   731
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@586
   732
	(((uint64_t)tmp)<<32);
nkeynes@359
   733
    sh4r.r[Rm] += 4;
nkeynes@359
   734
:}
nkeynes@359
   735
LDC.L @Rm+, SR {:
nkeynes@359
   736
    CHECKSLOTILLEGAL();
nkeynes@359
   737
    CHECKPRIV();
nkeynes@359
   738
    CHECKWALIGN32( sh4r.r[Rm] );
nkeynes@586
   739
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@586
   740
    sh4_write_sr( tmp );
nkeynes@359
   741
    sh4r.r[Rm] +=4;
nkeynes@359
   742
:}
nkeynes@359
   743
LDS Rm, MACH {:
nkeynes@359
   744
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@359
   745
               (((uint64_t)sh4r.r[Rm])<<32);
nkeynes@359
   746
:}
nkeynes@359
   747
LDC Rm, SR {:
nkeynes@359
   748
    CHECKSLOTILLEGAL();
nkeynes@359
   749
    CHECKPRIV();
nkeynes@374
   750
    sh4_write_sr( sh4r.r[Rm] );
nkeynes@359
   751
:}
nkeynes@359
   752
LDC Rm, SGR {:
nkeynes@359
   753
    CHECKPRIV();
nkeynes@359
   754
    sh4r.sgr = sh4r.r[Rm];
nkeynes@359
   755
:}
nkeynes@359
   756
LDC.L @Rm+, SGR {:
nkeynes@359
   757
    CHECKPRIV();
nkeynes@359
   758
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   759
    MEM_READ_LONG(sh4r.r[Rm], sh4r.sgr);
nkeynes@359
   760
    sh4r.r[Rm] +=4;
nkeynes@359
   761
:}
nkeynes@359
   762
STS MACL, Rn {: sh4r.r[Rn] = (uint32_t)sh4r.mac; :}
nkeynes@359
   763
STS.L MACL, @-Rn {:
nkeynes@587
   764
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   765
    MEM_WRITE_LONG( sh4r.r[Rn]-4, (uint32_t)sh4r.mac );
nkeynes@359
   766
    sh4r.r[Rn] -= 4;
nkeynes@359
   767
:}
nkeynes@359
   768
STC.L GBR, @-Rn {:
nkeynes@587
   769
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   770
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.gbr );
nkeynes@359
   771
    sh4r.r[Rn] -= 4;
nkeynes@359
   772
:}
nkeynes@359
   773
LDS.L @Rm+, MACL {:
nkeynes@359
   774
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   775
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   776
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@586
   777
               (uint64_t)((uint32_t)tmp);
nkeynes@359
   778
    sh4r.r[Rm] += 4;
nkeynes@359
   779
:}
nkeynes@359
   780
LDC.L @Rm+, GBR {:
nkeynes@359
   781
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   782
    MEM_READ_LONG(sh4r.r[Rm], sh4r.gbr);
nkeynes@359
   783
    sh4r.r[Rm] +=4;
nkeynes@359
   784
:}
nkeynes@359
   785
LDS Rm, MACL {:
nkeynes@359
   786
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   787
               (uint64_t)((uint32_t)(sh4r.r[Rm]));
nkeynes@359
   788
:}
nkeynes@359
   789
LDC Rm, GBR {: sh4r.gbr = sh4r.r[Rm]; :}
nkeynes@359
   790
STS PR, Rn {: sh4r.r[Rn] = sh4r.pr; :}
nkeynes@359
   791
STS.L PR, @-Rn {:
nkeynes@587
   792
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   793
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.pr );
nkeynes@359
   794
    sh4r.r[Rn] -= 4;
nkeynes@359
   795
:}
nkeynes@359
   796
STC.L VBR, @-Rn {:
nkeynes@359
   797
    CHECKPRIV();
nkeynes@587
   798
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   799
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.vbr );
nkeynes@359
   800
    sh4r.r[Rn] -= 4;
nkeynes@359
   801
:}
nkeynes@359
   802
LDS.L @Rm+, PR {:
nkeynes@359
   803
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   804
    MEM_READ_LONG( sh4r.r[Rm], sh4r.pr );
nkeynes@359
   805
    sh4r.r[Rm] += 4;
nkeynes@359
   806
:}
nkeynes@359
   807
LDC.L @Rm+, VBR {:
nkeynes@359
   808
    CHECKPRIV();
nkeynes@359
   809
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   810
    MEM_READ_LONG(sh4r.r[Rm], sh4r.vbr);
nkeynes@359
   811
    sh4r.r[Rm] +=4;
nkeynes@359
   812
:}
nkeynes@359
   813
LDS Rm, PR {: sh4r.pr = sh4r.r[Rm]; :}
nkeynes@359
   814
LDC Rm, VBR {:
nkeynes@359
   815
    CHECKPRIV();
nkeynes@359
   816
    sh4r.vbr = sh4r.r[Rm];
nkeynes@359
   817
:}
nkeynes@359
   818
STC SGR, Rn {:
nkeynes@359
   819
    CHECKPRIV();
nkeynes@359
   820
    sh4r.r[Rn] = sh4r.sgr;
nkeynes@359
   821
:}
nkeynes@359
   822
STC.L SGR, @-Rn {:
nkeynes@359
   823
    CHECKPRIV();
nkeynes@587
   824
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   825
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.sgr );
nkeynes@359
   826
    sh4r.r[Rn] -= 4;
nkeynes@359
   827
:}
nkeynes@359
   828
STC.L SSR, @-Rn {:
nkeynes@359
   829
    CHECKPRIV();
nkeynes@587
   830
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   831
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.ssr );
nkeynes@359
   832
    sh4r.r[Rn] -= 4;
nkeynes@359
   833
:}
nkeynes@359
   834
LDC.L @Rm+, SSR {:
nkeynes@359
   835
    CHECKPRIV();
nkeynes@359
   836
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   837
    MEM_READ_LONG(sh4r.r[Rm], sh4r.ssr);
nkeynes@359
   838
    sh4r.r[Rm] +=4;
nkeynes@359
   839
:}
nkeynes@359
   840
LDC Rm, SSR {:
nkeynes@359
   841
    CHECKPRIV();
nkeynes@359
   842
    sh4r.ssr = sh4r.r[Rm];
nkeynes@359
   843
:}
nkeynes@359
   844
STC.L SPC, @-Rn {:
nkeynes@359
   845
    CHECKPRIV();
nkeynes@587
   846
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   847
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.spc );
nkeynes@359
   848
    sh4r.r[Rn] -= 4;
nkeynes@359
   849
:}
nkeynes@359
   850
LDC.L @Rm+, SPC {:
nkeynes@359
   851
    CHECKPRIV();
nkeynes@359
   852
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   853
    MEM_READ_LONG(sh4r.r[Rm], sh4r.spc);
nkeynes@359
   854
    sh4r.r[Rm] +=4;
nkeynes@359
   855
:}
nkeynes@359
   856
LDC Rm, SPC {:
nkeynes@359
   857
    CHECKPRIV();
nkeynes@359
   858
    sh4r.spc = sh4r.r[Rm];
nkeynes@359
   859
:}
nkeynes@626
   860
STS FPUL, Rn {: 
nkeynes@626
   861
    CHECKFPUEN();
nkeynes@669
   862
    sh4r.r[Rn] = FPULi; 
nkeynes@626
   863
:}
nkeynes@359
   864
STS.L FPUL, @-Rn {:
nkeynes@626
   865
    CHECKFPUEN();
nkeynes@587
   866
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@669
   867
    MEM_WRITE_LONG( sh4r.r[Rn]-4, FPULi );
nkeynes@359
   868
    sh4r.r[Rn] -= 4;
nkeynes@359
   869
:}
nkeynes@359
   870
LDS.L @Rm+, FPUL {:
nkeynes@626
   871
    CHECKFPUEN();
nkeynes@359
   872
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@669
   873
    MEM_READ_LONG(sh4r.r[Rm], FPULi);
nkeynes@359
   874
    sh4r.r[Rm] +=4;
nkeynes@359
   875
:}
nkeynes@626
   876
LDS Rm, FPUL {:
nkeynes@626
   877
    CHECKFPUEN();
nkeynes@669
   878
    FPULi = sh4r.r[Rm]; 
nkeynes@626
   879
:}
nkeynes@626
   880
STS FPSCR, Rn {: 
nkeynes@626
   881
    CHECKFPUEN();
nkeynes@626
   882
    sh4r.r[Rn] = sh4r.fpscr; 
nkeynes@626
   883
:}
nkeynes@359
   884
STS.L FPSCR, @-Rn {:
nkeynes@626
   885
    CHECKFPUEN();
nkeynes@587
   886
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   887
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.fpscr );
nkeynes@359
   888
    sh4r.r[Rn] -= 4;
nkeynes@359
   889
:}
nkeynes@359
   890
LDS.L @Rm+, FPSCR {:
nkeynes@626
   891
    CHECKFPUEN();
nkeynes@359
   892
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@669
   893
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   894
    sh4r.r[Rm] +=4;
nkeynes@669
   895
    sh4_write_fpscr( tmp );
nkeynes@359
   896
:}
nkeynes@374
   897
LDS Rm, FPSCR {: 
nkeynes@626
   898
    CHECKFPUEN();
nkeynes@669
   899
    sh4_write_fpscr( sh4r.r[Rm] );
nkeynes@374
   900
:}
nkeynes@359
   901
STC DBR, Rn {: CHECKPRIV(); sh4r.r[Rn] = sh4r.dbr; :}
nkeynes@359
   902
STC.L DBR, @-Rn {:
nkeynes@359
   903
    CHECKPRIV();
nkeynes@587
   904
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   905
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.dbr );
nkeynes@359
   906
    sh4r.r[Rn] -= 4;
nkeynes@359
   907
:}
nkeynes@359
   908
LDC.L @Rm+, DBR {:
nkeynes@359
   909
    CHECKPRIV();
nkeynes@359
   910
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   911
    MEM_READ_LONG(sh4r.r[Rm], sh4r.dbr);
nkeynes@359
   912
    sh4r.r[Rm] +=4;
nkeynes@359
   913
:}
nkeynes@359
   914
LDC Rm, DBR {:
nkeynes@359
   915
    CHECKPRIV();
nkeynes@359
   916
    sh4r.dbr = sh4r.r[Rm];
nkeynes@359
   917
:}
nkeynes@359
   918
STC.L Rm_BANK, @-Rn {:
nkeynes@359
   919
    CHECKPRIV();
nkeynes@587
   920
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   921
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.r_bank[Rm_BANK] );
nkeynes@359
   922
    sh4r.r[Rn] -= 4;
nkeynes@359
   923
:}
nkeynes@359
   924
LDC.L @Rm+, Rn_BANK {:
nkeynes@359
   925
    CHECKPRIV();
nkeynes@359
   926
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   927
    MEM_READ_LONG( sh4r.r[Rm], sh4r.r_bank[Rn_BANK] );
nkeynes@359
   928
    sh4r.r[Rm] += 4;
nkeynes@359
   929
:}
nkeynes@359
   930
LDC Rm, Rn_BANK {:
nkeynes@359
   931
    CHECKPRIV();
nkeynes@359
   932
    sh4r.r_bank[Rn_BANK] = sh4r.r[Rm];
nkeynes@359
   933
:}
nkeynes@359
   934
STC SR, Rn {: 
nkeynes@359
   935
    CHECKPRIV();
nkeynes@359
   936
    sh4r.r[Rn] = sh4_read_sr();
nkeynes@359
   937
:}
nkeynes@359
   938
STC GBR, Rn {:
nkeynes@359
   939
    sh4r.r[Rn] = sh4r.gbr;
nkeynes@359
   940
:}
nkeynes@359
   941
STC VBR, Rn {:
nkeynes@359
   942
    CHECKPRIV();
nkeynes@359
   943
    sh4r.r[Rn] = sh4r.vbr;
nkeynes@359
   944
:}
nkeynes@359
   945
STC SSR, Rn {:
nkeynes@359
   946
    CHECKPRIV();
nkeynes@359
   947
    sh4r.r[Rn] = sh4r.ssr;
nkeynes@359
   948
:}
nkeynes@359
   949
STC SPC, Rn {:
nkeynes@359
   950
    CHECKPRIV();
nkeynes@359
   951
    sh4r.r[Rn] = sh4r.spc;
nkeynes@359
   952
:}
nkeynes@359
   953
STC Rm_BANK, Rn {:
nkeynes@359
   954
    CHECKPRIV();
nkeynes@359
   955
    sh4r.r[Rn] = sh4r.r_bank[Rm_BANK];
nkeynes@359
   956
:}
nkeynes@359
   957
nkeynes@359
   958
FADD FRm, FRn {:
nkeynes@359
   959
    CHECKFPUEN();
nkeynes@359
   960
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   961
	DR(FRn) += DR(FRm);
nkeynes@359
   962
    } else {
nkeynes@359
   963
	FR(FRn) += FR(FRm);
nkeynes@359
   964
    }
nkeynes@359
   965
:}
nkeynes@359
   966
FSUB FRm, FRn {:
nkeynes@359
   967
    CHECKFPUEN();
nkeynes@359
   968
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   969
	DR(FRn) -= DR(FRm);
nkeynes@359
   970
    } else {
nkeynes@359
   971
	FR(FRn) -= FR(FRm);
nkeynes@359
   972
    }
nkeynes@359
   973
:}
nkeynes@359
   974
nkeynes@359
   975
FMUL FRm, FRn {:
nkeynes@359
   976
    CHECKFPUEN();
nkeynes@359
   977
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   978
	DR(FRn) *= DR(FRm);
nkeynes@359
   979
    } else {
nkeynes@359
   980
	FR(FRn) *= FR(FRm);
nkeynes@359
   981
    }
nkeynes@359
   982
:}
nkeynes@359
   983
nkeynes@359
   984
FDIV FRm, FRn {:
nkeynes@359
   985
    CHECKFPUEN();
nkeynes@359
   986
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   987
	DR(FRn) /= DR(FRm);
nkeynes@359
   988
    } else {
nkeynes@359
   989
	FR(FRn) /= FR(FRm);
nkeynes@359
   990
    }
nkeynes@359
   991
:}
nkeynes@359
   992
nkeynes@359
   993
FCMP/EQ FRm, FRn {:
nkeynes@359
   994
    CHECKFPUEN();
nkeynes@359
   995
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   996
	sh4r.t = ( DR(FRn) == DR(FRm) ? 1 : 0 );
nkeynes@359
   997
    } else {
nkeynes@359
   998
	sh4r.t = ( FR(FRn) == FR(FRm) ? 1 : 0 );
nkeynes@359
   999
    }
nkeynes@359
  1000
:}
nkeynes@359
  1001
nkeynes@359
  1002
FCMP/GT FRm, FRn {:
nkeynes@359
  1003
    CHECKFPUEN();
nkeynes@359
  1004
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1005
	sh4r.t = ( DR(FRn) > DR(FRm) ? 1 : 0 );
nkeynes@359
  1006
    } else {
nkeynes@359
  1007
	sh4r.t = ( FR(FRn) > FR(FRm) ? 1 : 0 );
nkeynes@359
  1008
    }
nkeynes@359
  1009
:}
nkeynes@359
  1010
nkeynes@359
  1011
FMOV @(R0, Rm), FRn {: MEM_FP_READ( sh4r.r[Rm] + R0, FRn ); :}
nkeynes@359
  1012
FMOV FRm, @(R0, Rn) {: MEM_FP_WRITE( sh4r.r[Rn] + R0, FRm ); :}
nkeynes@359
  1013
FMOV @Rm, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); :}
nkeynes@359
  1014
FMOV @Rm+, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); sh4r.r[Rm] += FP_WIDTH; :}
nkeynes@359
  1015
FMOV FRm, @Rn {: MEM_FP_WRITE( sh4r.r[Rn], FRm ); :}
nkeynes@587
  1016
 FMOV FRm, @-Rn {: MEM_FP_WRITE( sh4r.r[Rn] - FP_WIDTH, FRm ); sh4r.r[Rn] -= FP_WIDTH; :}
nkeynes@359
  1017
FMOV FRm, FRn {: 
nkeynes@359
  1018
    if( IS_FPU_DOUBLESIZE() )
nkeynes@359
  1019
	DR(FRn) = DR(FRm);
nkeynes@359
  1020
    else
nkeynes@359
  1021
	FR(FRn) = FR(FRm);
nkeynes@359
  1022
:}
nkeynes@359
  1023
FSTS FPUL, FRn {: CHECKFPUEN(); FR(FRn) = FPULf; :}
nkeynes@359
  1024
FLDS FRm, FPUL {: CHECKFPUEN(); FPULf = FR(FRm); :}
nkeynes@359
  1025
FLOAT FPUL, FRn {: 
nkeynes@359
  1026
    CHECKFPUEN();
nkeynes@374
  1027
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
  1028
	if( FRn&1 ) { // No, really...
nkeynes@374
  1029
	    dtmp = (double)FPULi;
nkeynes@374
  1030
	    FR(FRn) = *(((float *)&dtmp)+1);
nkeynes@374
  1031
	} else {
nkeynes@374
  1032
	    DRF(FRn>>1) = (double)FPULi;
nkeynes@374
  1033
	}
nkeynes@374
  1034
    } else {
nkeynes@359
  1035
	FR(FRn) = (float)FPULi;
nkeynes@374
  1036
    }
nkeynes@359
  1037
:}
nkeynes@359
  1038
FTRC FRm, FPUL {:
nkeynes@359
  1039
    CHECKFPUEN();
nkeynes@359
  1040
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
  1041
	if( FRm&1 ) {
nkeynes@374
  1042
	    dtmp = 0;
nkeynes@374
  1043
	    *(((float *)&dtmp)+1) = FR(FRm);
nkeynes@374
  1044
	} else {
nkeynes@374
  1045
	    dtmp = DRF(FRm>>1);
nkeynes@374
  1046
	}
nkeynes@359
  1047
        if( dtmp >= MAX_INTF )
nkeynes@359
  1048
            FPULi = MAX_INT;
nkeynes@359
  1049
        else if( dtmp <= MIN_INTF )
nkeynes@359
  1050
            FPULi = MIN_INT;
nkeynes@359
  1051
        else 
nkeynes@359
  1052
            FPULi = (int32_t)dtmp;
nkeynes@359
  1053
    } else {
nkeynes@359
  1054
	ftmp = FR(FRm);
nkeynes@359
  1055
	if( ftmp >= MAX_INTF )
nkeynes@359
  1056
	    FPULi = MAX_INT;
nkeynes@359
  1057
	else if( ftmp <= MIN_INTF )
nkeynes@359
  1058
	    FPULi = MIN_INT;
nkeynes@359
  1059
	else
nkeynes@359
  1060
	    FPULi = (int32_t)ftmp;
nkeynes@359
  1061
    }
nkeynes@359
  1062
:}
nkeynes@359
  1063
FNEG FRn {:
nkeynes@359
  1064
    CHECKFPUEN();
nkeynes@359
  1065
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1066
	DR(FRn) = -DR(FRn);
nkeynes@359
  1067
    } else {
nkeynes@359
  1068
        FR(FRn) = -FR(FRn);
nkeynes@359
  1069
    }
nkeynes@359
  1070
:}
nkeynes@359
  1071
FABS FRn {:
nkeynes@359
  1072
    CHECKFPUEN();
nkeynes@359
  1073
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1074
	DR(FRn) = fabs(DR(FRn));
nkeynes@359
  1075
    } else {
nkeynes@359
  1076
        FR(FRn) = fabsf(FR(FRn));
nkeynes@359
  1077
    }
nkeynes@359
  1078
:}
nkeynes@359
  1079
FSQRT FRn {:
nkeynes@359
  1080
    CHECKFPUEN();
nkeynes@359
  1081
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1082
	DR(FRn) = sqrt(DR(FRn));
nkeynes@359
  1083
    } else {
nkeynes@359
  1084
        FR(FRn) = sqrtf(FR(FRn));
nkeynes@359
  1085
    }
nkeynes@359
  1086
:}
nkeynes@359
  1087
FLDI0 FRn {:
nkeynes@359
  1088
    CHECKFPUEN();
nkeynes@359
  1089
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1090
	DR(FRn) = 0.0;
nkeynes@359
  1091
    } else {
nkeynes@359
  1092
        FR(FRn) = 0.0;
nkeynes@359
  1093
    }
nkeynes@359
  1094
:}
nkeynes@359
  1095
FLDI1 FRn {:
nkeynes@359
  1096
    CHECKFPUEN();
nkeynes@359
  1097
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1098
	DR(FRn) = 1.0;
nkeynes@359
  1099
    } else {
nkeynes@359
  1100
        FR(FRn) = 1.0;
nkeynes@359
  1101
    }
nkeynes@359
  1102
:}
nkeynes@359
  1103
FMAC FR0, FRm, FRn {:
nkeynes@359
  1104
    CHECKFPUEN();
nkeynes@359
  1105
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1106
        DR(FRn) += DR(FRm)*DR(0);
nkeynes@359
  1107
    } else {
nkeynes@359
  1108
	FR(FRn) += FR(FRm)*FR(0);
nkeynes@359
  1109
    }
nkeynes@359
  1110
:}
nkeynes@374
  1111
FRCHG {: 
nkeynes@374
  1112
    CHECKFPUEN(); 
nkeynes@374
  1113
    sh4r.fpscr ^= FPSCR_FR; 
nkeynes@669
  1114
    sh4_switch_fr_banks();
nkeynes@374
  1115
:}
nkeynes@359
  1116
FSCHG {: CHECKFPUEN(); sh4r.fpscr ^= FPSCR_SZ; :}
nkeynes@359
  1117
FCNVSD FPUL, FRn {:
nkeynes@359
  1118
    CHECKFPUEN();
nkeynes@359
  1119
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1120
	DR(FRn) = (double)FPULf;
nkeynes@359
  1121
    }
nkeynes@359
  1122
:}
nkeynes@359
  1123
FCNVDS FRm, FPUL {:
nkeynes@359
  1124
    CHECKFPUEN();
nkeynes@359
  1125
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1126
	FPULf = (float)DR(FRm);
nkeynes@359
  1127
    }
nkeynes@359
  1128
:}
nkeynes@359
  1129
nkeynes@359
  1130
FSRRA FRn {:
nkeynes@359
  1131
    CHECKFPUEN();
nkeynes@359
  1132
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1133
	FR(FRn) = 1.0/sqrtf(FR(FRn));
nkeynes@359
  1134
    }
nkeynes@359
  1135
:}
nkeynes@359
  1136
FIPR FVm, FVn {:
nkeynes@359
  1137
    CHECKFPUEN();
nkeynes@359
  1138
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1139
        int tmp2 = FVn<<2;
nkeynes@359
  1140
        tmp = FVm<<2;
nkeynes@359
  1141
        FR(tmp2+3) = FR(tmp)*FR(tmp2) +
nkeynes@359
  1142
            FR(tmp+1)*FR(tmp2+1) +
nkeynes@359
  1143
            FR(tmp+2)*FR(tmp2+2) +
nkeynes@359
  1144
            FR(tmp+3)*FR(tmp2+3);
nkeynes@359
  1145
    }
nkeynes@359
  1146
:}
nkeynes@359
  1147
FSCA FPUL, FRn {:
nkeynes@359
  1148
    CHECKFPUEN();
nkeynes@359
  1149
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@391
  1150
	sh4_fsca( FPULi, &(DRF(FRn>>1)) );
nkeynes@391
  1151
	/*
nkeynes@359
  1152
        float angle = (((float)(FPULi&0xFFFF))/65536.0) * 2 * M_PI;
nkeynes@359
  1153
        FR(FRn) = sinf(angle);
nkeynes@359
  1154
        FR((FRn)+1) = cosf(angle);
nkeynes@391
  1155
	*/
nkeynes@359
  1156
    }
nkeynes@359
  1157
:}
nkeynes@359
  1158
FTRV XMTRX, FVn {:
nkeynes@359
  1159
    CHECKFPUEN();
nkeynes@359
  1160
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@669
  1161
	sh4_ftrv(&(DRF(FVn<<1)) );
nkeynes@359
  1162
    }
nkeynes@359
  1163
:}
nkeynes@359
  1164
UNDEF {:
nkeynes@359
  1165
    UNDEF(ir);
nkeynes@359
  1166
:}
nkeynes@359
  1167
%%
nkeynes@359
  1168
    sh4r.pc = sh4r.new_pc;
nkeynes@359
  1169
    sh4r.new_pc += 2;
nkeynes@359
  1170
    sh4r.in_delay_slot = 0;
nkeynes@359
  1171
    return TRUE;
nkeynes@359
  1172
}
.