nkeynes@11 | 1 | /**
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nkeynes@561 | 2 | * $Id$
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nkeynes@11 | 3 | *
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nkeynes@11 | 4 | * MMIO definitions for the AICA sound chip. Note that the regions defined
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nkeynes@11 | 5 | * here are relative to the SH4 memory map (0x00700000 based), rather than
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nkeynes@11 | 6 | * the ARM addresses (0x00800000 based).
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nkeynes@11 | 7 | *
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nkeynes@11 | 8 | * Copyright (c) 2005 Nathan Keynes.
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nkeynes@11 | 9 | *
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nkeynes@11 | 10 | * This program is free software; you can redistribute it and/or modify
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nkeynes@11 | 11 | * it under the terms of the GNU General Public License as published by
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nkeynes@11 | 12 | * the Free Software Foundation; either version 2 of the License, or
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nkeynes@11 | 13 | * (at your option) any later version.
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nkeynes@11 | 14 | *
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nkeynes@11 | 15 | * This program is distributed in the hope that it will be useful,
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nkeynes@11 | 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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nkeynes@11 | 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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nkeynes@11 | 18 | * GNU General Public License for more details.
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nkeynes@11 | 19 | */
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nkeynes@11 | 20 |
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nkeynes@11 | 21 | #include "mmio.h"
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nkeynes@11 | 22 |
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nkeynes@11 | 23 | MMIO_REGION_BEGIN( 0x00700000, AICA0, "AICA Sound System 0-31" )
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nkeynes@11 | 24 | LONG_PORT( 0x000, AICACH0, PORT_MRW, UNDEFINED, "Channel 0" )
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nkeynes@11 | 25 | MMIO_REGION_END
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nkeynes@11 | 26 |
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nkeynes@11 | 27 | MMIO_REGION_BEGIN( 0x00701000, AICA1, "AICA Sound System 32-63" )
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nkeynes@11 | 28 | LONG_PORT( 0x000, AICACH32, PORT_MRW, UNDEFINED, "Channel 32" )
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nkeynes@11 | 29 | MMIO_REGION_END
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nkeynes@11 | 30 |
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nkeynes@11 | 31 | MMIO_REGION_BEGIN( 0x00702000, AICA2, "AICA Sound System Control" )
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nkeynes@40 | 32 | LONG_PORT( 0x040, CDDA_VOL_L, PORT_MRW, 0, "CDDA Volume left" )
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nkeynes@40 | 33 | LONG_PORT( 0x044, CDDA_VOL_R, PORT_MRW, 0, "CDDA Volume right" )
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nkeynes@40 | 34 | LONG_PORT( 0x800, VOL_MASTER, PORT_MRW, UNDEFINED, "Master volume" )
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nkeynes@61 | 35 | LONG_PORT( 0x808, AICA_UNK7, PORT_MRW, 0, "AICA ??? 7" )
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nkeynes@463 | 36 | LONG_PORT( 0x80C, AICA_CHANSEL, PORT_MRW, 0, "AICA channel select" )
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nkeynes@463 | 37 | LONG_PORT( 0x810, AICA_CHANSTATE, PORT_MRW, 0, "AICA channel state" )
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nkeynes@463 | 38 | LONG_PORT( 0x814, AICA_CHANPOSN, PORT_MRW, 0, "AICA channel position" )
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nkeynes@66 | 39 | LONG_PORT( 0x880, AICA_UNK6, PORT_MRW, 0, "AICA ??? 6" )
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nkeynes@66 | 40 | LONG_PORT( 0x890, AICA_TIMER, PORT_MRW, 0, "AICA Timer" )
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nkeynes@46 | 41 | LONG_PORT( 0x89C, AICA_UNK1, PORT_MRW, 0, "AICA ??? 1" )
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nkeynes@66 | 42 | LONG_PORT( 0x8A4, AICA_TCR, PORT_MRW, 0, "AICA Timer Control?" )
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nkeynes@46 | 43 | BYTE_PORT( 0x8A8, AICA_UNK3, PORT_MRW, 0, "AICA ??? 3" )
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nkeynes@46 | 44 | BYTE_PORT( 0x8AC, AICA_UNK4, PORT_MRW, 0, "AICA ??? 4" )
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nkeynes@46 | 45 | BYTE_PORT( 0x8B0, AICA_UNK5, PORT_MRW, 0, "AICA ??? 5" )
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nkeynes@86 | 46 | LONG_PORT( 0xC00, AICA_RESET,PORT_MRW, 1, "AICA reset" )
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nkeynes@62 | 47 | LONG_PORT( 0xD00, AICA_IRQ, PORT_MR, 0, "AICA IRQ Pending" )
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nkeynes@61 | 48 | LONG_PORT( 0xD04, AICA_IRQCLEAR, PORT_MRW, 0, "AICA IRQ Clear" )
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nkeynes@11 | 49 | MMIO_REGION_END
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nkeynes@11 | 50 |
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nkeynes@131 | 51 | MMIO_REGION_BEGIN( 0x00710000, AICARTC, "AICA Sound System RTC" )
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nkeynes@131 | 52 | LONG_PORT( 0x000, AICA_RTCHI, PORT_R, 0, "RTC High 16-bits" )
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nkeynes@131 | 53 | LONG_PORT( 0x004, AICA_RTCLO, PORT_R, 0, "RTC Low 16-bits" )
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nkeynes@301 | 54 | LONG_PORT( 0x008, AICA_RTCEN, PORT_W, 0, "RTC write enable" )
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nkeynes@131 | 55 | MMIO_REGION_END
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nkeynes@131 | 56 |
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nkeynes@11 | 57 | MMIO_REGION_LIST_BEGIN( spu )
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nkeynes@11 | 58 | MMIO_REGION( AICA0 )
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nkeynes@11 | 59 | MMIO_REGION( AICA1 )
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nkeynes@11 | 60 | MMIO_REGION( AICA2 )
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nkeynes@131 | 61 | MMIO_REGION( AICARTC )
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nkeynes@11 | 62 | MMIO_REGION_LIST_END
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nkeynes@11 | 63 |
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nkeynes@11 | 64 | void aica_init( void );
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nkeynes@11 | 65 | void aica_reset( void );
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nkeynes@86 | 66 | void aica_enable( void );
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nkeynes@61 | 67 |
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nkeynes@61 | 68 | #define AICA_EVENT_TIMER 2
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nkeynes@61 | 69 | #define AICA_EVENT_OTHER 5
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nkeynes@61 | 70 |
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nkeynes@61 | 71 | void aica_event( int event );
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nkeynes@66 | 72 | void aica_write_channel( int channel, uint32_t addr, uint32_t val );
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nkeynes@66 | 73 |
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nkeynes@66 | 74 | /**
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nkeynes@66 | 75 | * The AICA core runs at 44100 samples/second, regardless of what we're
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nkeynes@66 | 76 | * actually outputing.
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nkeynes@66 | 77 | */
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nkeynes@66 | 78 | #define AICA_SAMPLE_RATE 44100
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nkeynes@66 | 79 |
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nkeynes@66 | 80 | /**
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nkeynes@66 | 81 | * This is only used to determine number of instructions to execute
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nkeynes@66 | 82 | * per sample, which isn't cycle accurate at the moment.
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nkeynes@66 | 83 | */
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nkeynes@66 | 84 | #define AICA_SAMPLE_PERIOD (1000000000 / 44100)
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nkeynes@465 | 85 |
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nkeynes@465 | 86 | /**
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nkeynes@465 | 87 | * Offset between the AICA RTC and the unix timestamp
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nkeynes@465 | 88 | * (20 years expressed in seconds)
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nkeynes@465 | 89 | */
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nkeynes@465 | 90 | #define AICA_RTC_OFFSET 631152000
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