nkeynes@31 | 1 | /**
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nkeynes@502 | 2 | * $Id: pvr2.c,v 1.49 2007-11-08 11:54:16 nkeynes Exp $
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nkeynes@31 | 3 | *
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nkeynes@133 | 4 | * PVR2 (Video) Core module implementation and MMIO registers.
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nkeynes@31 | 5 | *
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nkeynes@31 | 6 | * Copyright (c) 2005 Nathan Keynes.
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nkeynes@31 | 7 | *
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nkeynes@31 | 8 | * This program is free software; you can redistribute it and/or modify
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nkeynes@31 | 9 | * it under the terms of the GNU General Public License as published by
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nkeynes@31 | 10 | * the Free Software Foundation; either version 2 of the License, or
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nkeynes@31 | 11 | * (at your option) any later version.
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nkeynes@31 | 12 | *
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nkeynes@31 | 13 | * This program is distributed in the hope that it will be useful,
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nkeynes@31 | 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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nkeynes@31 | 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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nkeynes@31 | 16 | * GNU General Public License for more details.
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nkeynes@31 | 17 | */
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nkeynes@35 | 18 | #define MODULE pvr2_module
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nkeynes@31 | 19 |
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nkeynes@477 | 20 | #include <assert.h>
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nkeynes@1 | 21 | #include "dream.h"
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nkeynes@265 | 22 | #include "eventq.h"
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nkeynes@144 | 23 | #include "display.h"
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nkeynes@1 | 24 | #include "mem.h"
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nkeynes@1 | 25 | #include "asic.h"
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nkeynes@261 | 26 | #include "clock.h"
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nkeynes@103 | 27 | #include "pvr2/pvr2.h"
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nkeynes@56 | 28 | #include "sh4/sh4core.h"
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nkeynes@1 | 29 | #define MMIO_IMPL
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nkeynes@103 | 30 | #include "pvr2/pvr2mmio.h"
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nkeynes@1 | 31 |
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nkeynes@502 | 32 | unsigned char *video_base;
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nkeynes@1 | 33 |
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nkeynes@352 | 34 | #define MAX_RENDER_BUFFERS 4
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nkeynes@352 | 35 |
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nkeynes@304 | 36 | #define HPOS_PER_FRAME 0
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nkeynes@304 | 37 | #define HPOS_PER_LINECOUNT 1
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nkeynes@304 | 38 |
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nkeynes@133 | 39 | static void pvr2_init( void );
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nkeynes@133 | 40 | static void pvr2_reset( void );
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nkeynes@133 | 41 | static uint32_t pvr2_run_slice( uint32_t );
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nkeynes@133 | 42 | static void pvr2_save_state( FILE *f );
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nkeynes@133 | 43 | static int pvr2_load_state( FILE *f );
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nkeynes@265 | 44 | static void pvr2_update_raster_posn( uint32_t nanosecs );
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nkeynes@304 | 45 | static void pvr2_schedule_scanline_event( int eventid, int line, int minimum_lines, int line_time_ns );
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nkeynes@352 | 46 | static render_buffer_t pvr2_get_render_buffer( frame_buffer_t frame );
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nkeynes@352 | 47 | static render_buffer_t pvr2_next_render_buffer( );
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nkeynes@477 | 48 | static render_buffer_t pvr2_frame_buffer_to_render_buffer( frame_buffer_t frame );
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nkeynes@265 | 49 | uint32_t pvr2_get_sync_status();
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nkeynes@133 | 50 |
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nkeynes@94 | 51 | void pvr2_display_frame( void );
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nkeynes@94 | 52 |
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nkeynes@477 | 53 | static int output_colour_formats[] = { COLFMT_BGRA1555, COLFMT_RGB565, COLFMT_BGR888, COLFMT_BGRA8888 };
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nkeynes@161 | 54 |
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nkeynes@133 | 55 | struct dreamcast_module pvr2_module = { "PVR2", pvr2_init, pvr2_reset, NULL,
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nkeynes@133 | 56 | pvr2_run_slice, NULL,
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nkeynes@133 | 57 | pvr2_save_state, pvr2_load_state };
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nkeynes@133 | 58 |
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nkeynes@103 | 59 |
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nkeynes@144 | 60 | display_driver_t display_driver = NULL;
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nkeynes@15 | 61 |
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nkeynes@133 | 62 | struct pvr2_state {
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nkeynes@133 | 63 | uint32_t frame_count;
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nkeynes@133 | 64 | uint32_t line_count;
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nkeynes@133 | 65 | uint32_t line_remainder;
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nkeynes@265 | 66 | uint32_t cycles_run; /* Cycles already executed prior to main time slice */
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nkeynes@304 | 67 | uint32_t irq_hpos_line;
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nkeynes@304 | 68 | uint32_t irq_hpos_line_count;
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nkeynes@304 | 69 | uint32_t irq_hpos_mode;
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nkeynes@304 | 70 | uint32_t irq_hpos_time_ns; /* Time within the line */
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nkeynes@133 | 71 | uint32_t irq_vpos1;
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nkeynes@133 | 72 | uint32_t irq_vpos2;
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nkeynes@261 | 73 | uint32_t odd_even_field; /* 1 = odd, 0 = even */
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nkeynes@337 | 74 | gboolean palette_changed; /* TRUE if palette has changed since last render */
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nkeynes@295 | 75 | gchar *save_next_render_filename;
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nkeynes@261 | 76 | /* timing */
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nkeynes@261 | 77 | uint32_t dot_clock;
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nkeynes@261 | 78 | uint32_t total_lines;
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nkeynes@261 | 79 | uint32_t line_size;
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nkeynes@261 | 80 | uint32_t line_time_ns;
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nkeynes@261 | 81 | uint32_t vsync_lines;
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nkeynes@261 | 82 | uint32_t hsync_width_ns;
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nkeynes@261 | 83 | uint32_t front_porch_ns;
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nkeynes@261 | 84 | uint32_t back_porch_ns;
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nkeynes@265 | 85 | uint32_t retrace_start_line;
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nkeynes@265 | 86 | uint32_t retrace_end_line;
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nkeynes@261 | 87 | gboolean interlaced;
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nkeynes@133 | 88 | } pvr2_state;
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nkeynes@15 | 89 |
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nkeynes@441 | 90 | static render_buffer_t render_buffers[MAX_RENDER_BUFFERS];
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nkeynes@441 | 91 | static int render_buffer_count = 0;
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nkeynes@441 | 92 | static render_buffer_t displayed_render_buffer = NULL;
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nkeynes@133 | 93 |
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nkeynes@265 | 94 | /**
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nkeynes@304 | 95 | * Event handler for the hpos callback
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nkeynes@265 | 96 | */
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nkeynes@304 | 97 | static void pvr2_hpos_callback( int eventid ) {
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nkeynes@265 | 98 | asic_event( eventid );
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nkeynes@265 | 99 | pvr2_update_raster_posn(sh4r.slice_cycle);
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nkeynes@304 | 100 | if( pvr2_state.irq_hpos_mode == HPOS_PER_LINECOUNT ) {
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nkeynes@304 | 101 | pvr2_state.irq_hpos_line += pvr2_state.irq_hpos_line_count;
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nkeynes@304 | 102 | while( pvr2_state.irq_hpos_line > (pvr2_state.total_lines>>1) ) {
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nkeynes@304 | 103 | pvr2_state.irq_hpos_line -= (pvr2_state.total_lines>>1);
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nkeynes@304 | 104 | }
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nkeynes@304 | 105 | }
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nkeynes@304 | 106 | pvr2_schedule_scanline_event( eventid, pvr2_state.irq_hpos_line, 1,
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nkeynes@304 | 107 | pvr2_state.irq_hpos_time_ns );
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nkeynes@265 | 108 | }
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nkeynes@265 | 109 |
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nkeynes@265 | 110 | /**
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nkeynes@265 | 111 | * Event handler for the scanline callbacks. Fires the corresponding
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nkeynes@265 | 112 | * ASIC event, and resets the timer for the next field.
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nkeynes@265 | 113 | */
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nkeynes@265 | 114 | static void pvr2_scanline_callback( int eventid ) {
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nkeynes@265 | 115 | asic_event( eventid );
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nkeynes@265 | 116 | pvr2_update_raster_posn(sh4r.slice_cycle);
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nkeynes@265 | 117 | if( eventid == EVENT_SCANLINE1 ) {
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nkeynes@304 | 118 | pvr2_schedule_scanline_event( eventid, pvr2_state.irq_vpos1, 1, 0 );
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nkeynes@265 | 119 | } else {
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nkeynes@304 | 120 | pvr2_schedule_scanline_event( eventid, pvr2_state.irq_vpos2, 1, 0 );
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nkeynes@265 | 121 | }
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nkeynes@265 | 122 | }
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nkeynes@265 | 123 |
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nkeynes@133 | 124 | static void pvr2_init( void )
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nkeynes@1 | 125 | {
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nkeynes@352 | 126 | int i;
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nkeynes@1 | 127 | register_io_region( &mmio_region_PVR2 );
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nkeynes@85 | 128 | register_io_region( &mmio_region_PVR2PAL );
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nkeynes@56 | 129 | register_io_region( &mmio_region_PVR2TA );
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nkeynes@304 | 130 | register_event_callback( EVENT_HPOS, pvr2_hpos_callback );
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nkeynes@265 | 131 | register_event_callback( EVENT_SCANLINE1, pvr2_scanline_callback );
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nkeynes@265 | 132 | register_event_callback( EVENT_SCANLINE2, pvr2_scanline_callback );
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nkeynes@1 | 133 | video_base = mem_get_region_by_name( MEM_REGION_VIDEO );
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nkeynes@133 | 134 | texcache_init();
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nkeynes@133 | 135 | pvr2_reset();
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nkeynes@214 | 136 | pvr2_ta_reset();
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nkeynes@295 | 137 | pvr2_state.save_next_render_filename = NULL;
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nkeynes@352 | 138 | for( i=0; i<MAX_RENDER_BUFFERS; i++ ) {
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nkeynes@352 | 139 | render_buffers[i] = NULL;
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nkeynes@352 | 140 | }
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nkeynes@352 | 141 | render_buffer_count = 0;
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nkeynes@441 | 142 | displayed_render_buffer = NULL;
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nkeynes@133 | 143 | }
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nkeynes@133 | 144 |
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nkeynes@133 | 145 | static void pvr2_reset( void )
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nkeynes@133 | 146 | {
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nkeynes@477 | 147 | int i;
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nkeynes@133 | 148 | pvr2_state.line_count = 0;
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nkeynes@133 | 149 | pvr2_state.line_remainder = 0;
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nkeynes@265 | 150 | pvr2_state.cycles_run = 0;
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nkeynes@133 | 151 | pvr2_state.irq_vpos1 = 0;
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nkeynes@133 | 152 | pvr2_state.irq_vpos2 = 0;
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nkeynes@265 | 153 | pvr2_state.dot_clock = PVR2_DOT_CLOCK;
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nkeynes@265 | 154 | pvr2_state.back_porch_ns = 4000;
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nkeynes@337 | 155 | pvr2_state.palette_changed = FALSE;
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nkeynes@265 | 156 | mmio_region_PVR2_write( DISP_TOTAL, 0x0270035F );
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nkeynes@265 | 157 | mmio_region_PVR2_write( DISP_SYNCTIME, 0x07D6A53F );
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nkeynes@284 | 158 | mmio_region_PVR2_write( YUV_ADDR, 0 );
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nkeynes@284 | 159 | mmio_region_PVR2_write( YUV_CFG, 0 );
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nkeynes@133 | 160 |
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nkeynes@133 | 161 | pvr2_ta_init();
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nkeynes@133 | 162 | texcache_flush();
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nkeynes@477 | 163 | if( display_driver ) {
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nkeynes@477 | 164 | display_driver->display_blank(0);
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nkeynes@477 | 165 | for( i=0; i<render_buffer_count; i++ ) {
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nkeynes@477 | 166 | display_driver->destroy_render_buffer(render_buffers[i]);
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nkeynes@477 | 167 | render_buffers[i] = NULL;
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nkeynes@477 | 168 | }
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nkeynes@477 | 169 | render_buffer_count = 0;
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nkeynes@477 | 170 | }
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nkeynes@133 | 171 | }
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nkeynes@133 | 172 |
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nkeynes@477 | 173 | void pvr2_save_render_buffer( FILE *f, render_buffer_t buffer )
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nkeynes@477 | 174 | {
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nkeynes@477 | 175 | struct frame_buffer fbuf;
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nkeynes@477 | 176 |
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nkeynes@477 | 177 | fbuf.width = buffer->width;
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nkeynes@477 | 178 | fbuf.height = buffer->height;
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nkeynes@477 | 179 | fbuf.rowstride = fbuf.width*3;
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nkeynes@477 | 180 | fbuf.colour_format = COLFMT_BGR888;
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nkeynes@477 | 181 | fbuf.inverted = buffer->inverted;
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nkeynes@477 | 182 | fbuf.data = g_malloc0( buffer->width * buffer->height * 3 );
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nkeynes@477 | 183 |
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nkeynes@477 | 184 | display_driver->read_render_buffer( fbuf.data, buffer, fbuf.rowstride, COLFMT_BGR888 );
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nkeynes@477 | 185 | write_png_to_stream( f, &fbuf );
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nkeynes@477 | 186 | g_free( fbuf.data );
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nkeynes@477 | 187 |
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nkeynes@477 | 188 | fwrite( &buffer->rowstride, sizeof(buffer->rowstride), 1, f );
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nkeynes@477 | 189 | fwrite( &buffer->colour_format, sizeof(buffer->colour_format), 1, f );
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nkeynes@477 | 190 | fwrite( &buffer->address, sizeof(buffer->address), 1, f );
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nkeynes@477 | 191 | fwrite( &buffer->scale, sizeof(buffer->scale), 1, f );
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nkeynes@477 | 192 | fwrite( &buffer->flushed, sizeof(buffer->flushed), 1, f );
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nkeynes@477 | 193 |
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nkeynes@477 | 194 | }
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nkeynes@477 | 195 |
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nkeynes@477 | 196 | render_buffer_t pvr2_load_render_buffer( FILE *f )
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nkeynes@477 | 197 | {
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nkeynes@477 | 198 | frame_buffer_t frame = read_png_from_stream( f );
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nkeynes@477 | 199 | if( frame == NULL ) {
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nkeynes@477 | 200 | return NULL;
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nkeynes@477 | 201 | }
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nkeynes@477 | 202 |
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nkeynes@477 | 203 | render_buffer_t buffer = pvr2_frame_buffer_to_render_buffer(frame);
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nkeynes@477 | 204 | assert( buffer != NULL );
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nkeynes@477 | 205 | fread( &buffer->rowstride, sizeof(buffer->rowstride), 1, f );
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nkeynes@477 | 206 | fread( &buffer->colour_format, sizeof(buffer->colour_format), 1, f );
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nkeynes@477 | 207 | fread( &buffer->address, sizeof(buffer->address), 1, f );
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nkeynes@477 | 208 | fread( &buffer->scale, sizeof(buffer->scale), 1, f );
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nkeynes@477 | 209 | fread( &buffer->flushed, sizeof(buffer->flushed), 1, f );
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nkeynes@477 | 210 | return buffer;
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nkeynes@477 | 211 | }
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nkeynes@477 | 212 |
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nkeynes@477 | 213 |
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nkeynes@477 | 214 |
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nkeynes@477 | 215 |
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nkeynes@477 | 216 | void pvr2_save_render_buffers( FILE *f )
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nkeynes@477 | 217 | {
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nkeynes@477 | 218 | int i;
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nkeynes@477 | 219 | fwrite( &render_buffer_count, sizeof(render_buffer_count), 1, f );
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nkeynes@477 | 220 | if( displayed_render_buffer != NULL ) {
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nkeynes@477 | 221 | i = 1;
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nkeynes@477 | 222 | fwrite( &i, sizeof(i), 1, f );
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nkeynes@477 | 223 | pvr2_save_render_buffer( f, displayed_render_buffer );
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nkeynes@477 | 224 | } else {
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nkeynes@477 | 225 | i = 0;
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nkeynes@477 | 226 | fwrite( &i, sizeof(i), 1, f );
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nkeynes@477 | 227 | }
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nkeynes@477 | 228 |
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nkeynes@477 | 229 | for( i=0; i<render_buffer_count; i++ ) {
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nkeynes@477 | 230 | if( render_buffers[i] != displayed_render_buffer && render_buffers[i] != NULL ) {
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nkeynes@477 | 231 | pvr2_save_render_buffer( f, render_buffers[i] );
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nkeynes@477 | 232 | }
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nkeynes@477 | 233 | }
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nkeynes@477 | 234 | }
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nkeynes@477 | 235 |
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nkeynes@477 | 236 | gboolean pvr2_load_render_buffers( FILE *f )
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nkeynes@477 | 237 | {
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nkeynes@477 | 238 | uint32_t count;
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nkeynes@477 | 239 | int i, has_frontbuffer;
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nkeynes@477 | 240 |
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nkeynes@477 | 241 | fread( &count, sizeof(count), 1, f );
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nkeynes@477 | 242 | if( count >= MAX_RENDER_BUFFERS ) {
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nkeynes@477 | 243 | return FALSE;
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nkeynes@477 | 244 | }
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nkeynes@477 | 245 | fread( &has_frontbuffer, sizeof(has_frontbuffer), 1, f );
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nkeynes@477 | 246 | for( i=0; i<render_buffer_count; i++ ) {
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nkeynes@477 | 247 | display_driver->destroy_render_buffer(render_buffers[i]);
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nkeynes@477 | 248 | render_buffers[i] = NULL;
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nkeynes@477 | 249 | }
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nkeynes@477 | 250 | render_buffer_count = 0;
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nkeynes@477 | 251 |
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nkeynes@477 | 252 | if( has_frontbuffer ) {
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nkeynes@477 | 253 | displayed_render_buffer = pvr2_load_render_buffer(f);
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nkeynes@477 | 254 | display_driver->display_render_buffer( displayed_render_buffer );
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nkeynes@477 | 255 | count--;
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nkeynes@477 | 256 | }
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nkeynes@477 | 257 |
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nkeynes@477 | 258 | for( i=0; i<count; i++ ) {
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nkeynes@477 | 259 | if( pvr2_load_render_buffer( f ) == NULL ) {
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nkeynes@477 | 260 | return FALSE;
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nkeynes@477 | 261 | }
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nkeynes@477 | 262 | }
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nkeynes@477 | 263 | return TRUE;
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nkeynes@477 | 264 | }
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nkeynes@477 | 265 |
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nkeynes@477 | 266 |
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nkeynes@133 | 267 | static void pvr2_save_state( FILE *f )
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nkeynes@133 | 268 | {
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nkeynes@477 | 269 | pvr2_save_render_buffers( f );
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nkeynes@133 | 270 | fwrite( &pvr2_state, sizeof(pvr2_state), 1, f );
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nkeynes@193 | 271 | pvr2_ta_save_state( f );
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nkeynes@295 | 272 | pvr2_yuv_save_state( f );
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nkeynes@133 | 273 | }
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nkeynes@133 | 274 |
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nkeynes@133 | 275 | static int pvr2_load_state( FILE *f )
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nkeynes@133 | 276 | {
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nkeynes@477 | 277 | if( !pvr2_load_render_buffers(f) )
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nkeynes@477 | 278 | return 1;
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nkeynes@153 | 279 | if( fread( &pvr2_state, sizeof(pvr2_state), 1, f ) != 1 )
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nkeynes@153 | 280 | return 1;
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nkeynes@295 | 281 | if( pvr2_ta_load_state(f) ) {
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nkeynes@295 | 282 | return 1;
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nkeynes@295 | 283 | }
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nkeynes@295 | 284 | return pvr2_yuv_load_state(f);
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nkeynes@133 | 285 | }
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nkeynes@133 | 286 |
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nkeynes@265 | 287 | /**
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nkeynes@265 | 288 | * Update the current raster position to the given number of nanoseconds,
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nkeynes@265 | 289 | * relative to the last time slice. (ie the raster will be adjusted forward
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nkeynes@265 | 290 | * by nanosecs - nanosecs_already_run_this_timeslice)
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nkeynes@265 | 291 | */
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nkeynes@265 | 292 | static void pvr2_update_raster_posn( uint32_t nanosecs )
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nkeynes@265 | 293 | {
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nkeynes@265 | 294 | uint32_t old_line_count = pvr2_state.line_count;
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nkeynes@265 | 295 | if( pvr2_state.line_time_ns == 0 ) {
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nkeynes@265 | 296 | return; /* do nothing */
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nkeynes@265 | 297 | }
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nkeynes@265 | 298 | pvr2_state.line_remainder += (nanosecs - pvr2_state.cycles_run);
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nkeynes@265 | 299 | pvr2_state.cycles_run = nanosecs;
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nkeynes@265 | 300 | while( pvr2_state.line_remainder >= pvr2_state.line_time_ns ) {
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nkeynes@265 | 301 | pvr2_state.line_count ++;
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nkeynes@265 | 302 | pvr2_state.line_remainder -= pvr2_state.line_time_ns;
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nkeynes@265 | 303 | }
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nkeynes@265 | 304 |
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nkeynes@265 | 305 | if( pvr2_state.line_count >= pvr2_state.total_lines ) {
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nkeynes@265 | 306 | pvr2_state.line_count -= pvr2_state.total_lines;
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nkeynes@265 | 307 | if( pvr2_state.interlaced ) {
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nkeynes@265 | 308 | pvr2_state.odd_even_field = !pvr2_state.odd_even_field;
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nkeynes@265 | 309 | }
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nkeynes@265 | 310 | }
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nkeynes@265 | 311 | if( pvr2_state.line_count >= pvr2_state.retrace_end_line &&
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nkeynes@265 | 312 | (old_line_count < pvr2_state.retrace_end_line ||
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nkeynes@265 | 313 | old_line_count > pvr2_state.line_count) ) {
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nkeynes@337 | 314 | pvr2_state.frame_count++;
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nkeynes@265 | 315 | pvr2_display_frame();
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nkeynes@265 | 316 | }
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nkeynes@265 | 317 | }
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nkeynes@265 | 318 |
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nkeynes@133 | 319 | static uint32_t pvr2_run_slice( uint32_t nanosecs )
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nkeynes@133 | 320 | {
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nkeynes@265 | 321 | pvr2_update_raster_posn( nanosecs );
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nkeynes@265 | 322 | pvr2_state.cycles_run = 0;
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nkeynes@133 | 323 | return nanosecs;
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nkeynes@133 | 324 | }
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nkeynes@133 | 325 |
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nkeynes@133 | 326 | int pvr2_get_frame_count()
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nkeynes@133 | 327 | {
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nkeynes@133 | 328 | return pvr2_state.frame_count;
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nkeynes@106 | 329 | }
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nkeynes@106 | 330 |
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nkeynes@477 | 331 | render_buffer_t pvr2_get_front_buffer()
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nkeynes@477 | 332 | {
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nkeynes@477 | 333 | return displayed_render_buffer;
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nkeynes@477 | 334 | }
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nkeynes@477 | 335 |
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nkeynes@295 | 336 | gboolean pvr2_save_next_scene( const gchar *filename )
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nkeynes@295 | 337 | {
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nkeynes@295 | 338 | if( pvr2_state.save_next_render_filename != NULL ) {
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nkeynes@295 | 339 | g_free( pvr2_state.save_next_render_filename );
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nkeynes@295 | 340 | }
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nkeynes@295 | 341 | pvr2_state.save_next_render_filename = g_strdup(filename);
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nkeynes@295 | 342 | return TRUE;
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nkeynes@295 | 343 | }
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nkeynes@295 | 344 |
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nkeynes@295 | 345 |
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nkeynes@295 | 346 |
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nkeynes@103 | 347 | /**
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nkeynes@1 | 348 | * Display the next frame, copying the current contents of video ram to
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nkeynes@1 | 349 | * the window. If the video configuration has changed, first recompute the
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nkeynes@1 | 350 | * new frame size/depth.
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nkeynes@1 | 351 | */
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nkeynes@94 | 352 | void pvr2_display_frame( void )
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nkeynes@1 | 353 | {
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nkeynes@197 | 354 | int dispmode = MMIO_READ( PVR2, DISP_MODE );
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nkeynes@261 | 355 | int vidcfg = MMIO_READ( PVR2, DISP_SYNCCFG );
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nkeynes@335 | 356 | gboolean bEnabled = (dispmode & DISPMODE_ENABLE) && (vidcfg & DISPCFG_VO ) ? TRUE : FALSE;
|
nkeynes@352 | 357 |
|
nkeynes@352 | 358 | if( display_driver == NULL ) {
|
nkeynes@352 | 359 | return; /* can't really do anything much */
|
nkeynes@352 | 360 | } else if( !bEnabled ) {
|
nkeynes@352 | 361 | /* Output disabled == black */
|
nkeynes@352 | 362 | display_driver->display_blank( 0 );
|
nkeynes@441 | 363 | displayed_render_buffer = NULL;
|
nkeynes@352 | 364 | } else if( MMIO_READ( PVR2, DISP_CFG2 ) & 0x08 ) {
|
nkeynes@352 | 365 | /* Enabled but blanked - border colour */
|
nkeynes@352 | 366 | uint32_t colour = MMIO_READ( PVR2, DISP_BORDER );
|
nkeynes@352 | 367 | display_driver->display_blank( colour );
|
nkeynes@441 | 368 | displayed_render_buffer = NULL;
|
nkeynes@352 | 369 | } else {
|
nkeynes@352 | 370 | /* Real output - determine dimensions etc */
|
nkeynes@352 | 371 | struct frame_buffer fbuf;
|
nkeynes@352 | 372 | uint32_t dispsize = MMIO_READ( PVR2, DISP_SIZE );
|
nkeynes@352 | 373 | int vid_stride = (((dispsize & DISPSIZE_MODULO) >> 20) - 1);
|
nkeynes@352 | 374 | int vid_ppl = ((dispsize & DISPSIZE_PPL)) + 1;
|
nkeynes@352 | 375 |
|
nkeynes@352 | 376 | fbuf.colour_format = output_colour_formats[(dispmode & DISPMODE_COLFMT) >> 2];
|
nkeynes@352 | 377 | fbuf.width = vid_ppl << 2 / colour_formats[fbuf.colour_format].bpp;
|
nkeynes@352 | 378 | fbuf.height = ((dispsize & DISPSIZE_LPF) >> 10) + 1;
|
nkeynes@352 | 379 | fbuf.size = vid_ppl << 2 * fbuf.height;
|
nkeynes@352 | 380 | fbuf.rowstride = (vid_ppl + vid_stride) << 2;
|
nkeynes@352 | 381 |
|
nkeynes@352 | 382 | /* Determine the field to display, and deinterlace if possible */
|
nkeynes@352 | 383 | if( pvr2_state.interlaced ) {
|
nkeynes@352 | 384 | if( vid_ppl == vid_stride ) { /* Magic deinterlace */
|
nkeynes@352 | 385 | fbuf.height = fbuf.height << 1;
|
nkeynes@352 | 386 | fbuf.rowstride = vid_ppl << 2;
|
nkeynes@352 | 387 | fbuf.address = MMIO_READ( PVR2, DISP_ADDR1 );
|
nkeynes@352 | 388 | } else {
|
nkeynes@352 | 389 | /* Just display the field as is, folks. This is slightly tricky -
|
nkeynes@352 | 390 | * we pick the field based on which frame is about to come through,
|
nkeynes@352 | 391 | * which may not be the same as the odd_even_field.
|
nkeynes@352 | 392 | */
|
nkeynes@352 | 393 | gboolean oddfield = pvr2_state.odd_even_field;
|
nkeynes@352 | 394 | if( pvr2_state.line_count >= pvr2_state.retrace_start_line ) {
|
nkeynes@352 | 395 | oddfield = !oddfield;
|
nkeynes@352 | 396 | }
|
nkeynes@352 | 397 | if( oddfield ) {
|
nkeynes@352 | 398 | fbuf.address = MMIO_READ( PVR2, DISP_ADDR1 );
|
nkeynes@352 | 399 | } else {
|
nkeynes@352 | 400 | fbuf.address = MMIO_READ( PVR2, DISP_ADDR2 );
|
nkeynes@352 | 401 | }
|
nkeynes@337 | 402 | }
|
nkeynes@352 | 403 | } else {
|
nkeynes@352 | 404 | fbuf.address = MMIO_READ( PVR2, DISP_ADDR1 );
|
nkeynes@335 | 405 | }
|
nkeynes@352 | 406 | fbuf.address = (fbuf.address & 0x00FFFFFF) + PVR2_RAM_BASE;
|
nkeynes@477 | 407 | fbuf.inverted = FALSE;
|
nkeynes@477 | 408 | fbuf.data = video_base + (fbuf.address&0x00FFFFFF);
|
nkeynes@352 | 409 |
|
nkeynes@352 | 410 | render_buffer_t rbuf = pvr2_get_render_buffer( &fbuf );
|
nkeynes@477 | 411 | if( rbuf == NULL ) {
|
nkeynes@477 | 412 | rbuf = pvr2_frame_buffer_to_render_buffer( &fbuf );
|
nkeynes@477 | 413 | }
|
nkeynes@441 | 414 | displayed_render_buffer = rbuf;
|
nkeynes@352 | 415 | if( rbuf != NULL ) {
|
nkeynes@352 | 416 | display_driver->display_render_buffer( rbuf );
|
nkeynes@65 | 417 | }
|
nkeynes@1 | 418 | }
|
nkeynes@1 | 419 | }
|
nkeynes@1 | 420 |
|
nkeynes@197 | 421 | /**
|
nkeynes@197 | 422 | * This has to handle every single register individually as they all get masked
|
nkeynes@197 | 423 | * off differently (and its easier to do it at write time)
|
nkeynes@197 | 424 | */
|
nkeynes@1 | 425 | void mmio_region_PVR2_write( uint32_t reg, uint32_t val )
|
nkeynes@1 | 426 | {
|
nkeynes@1 | 427 | if( reg >= 0x200 && reg < 0x600 ) { /* Fog table */
|
nkeynes@1 | 428 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@1 | 429 | return;
|
nkeynes@1 | 430 | }
|
nkeynes@1 | 431 |
|
nkeynes@1 | 432 | switch(reg) {
|
nkeynes@189 | 433 | case PVRID:
|
nkeynes@189 | 434 | case PVRVER:
|
nkeynes@261 | 435 | case GUNPOS: /* Read only registers */
|
nkeynes@189 | 436 | break;
|
nkeynes@197 | 437 | case PVRRESET:
|
nkeynes@197 | 438 | val &= 0x00000007; /* Do stuff? */
|
nkeynes@197 | 439 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@197 | 440 | break;
|
nkeynes@295 | 441 | case RENDER_START: /* Don't really care what value */
|
nkeynes@295 | 442 | if( pvr2_state.save_next_render_filename != NULL ) {
|
nkeynes@295 | 443 | if( pvr2_render_save_scene(pvr2_state.save_next_render_filename) == 0 ) {
|
nkeynes@295 | 444 | INFO( "Saved scene to %s", pvr2_state.save_next_render_filename);
|
nkeynes@295 | 445 | }
|
nkeynes@295 | 446 | g_free( pvr2_state.save_next_render_filename );
|
nkeynes@295 | 447 | pvr2_state.save_next_render_filename = NULL;
|
nkeynes@295 | 448 | }
|
nkeynes@352 | 449 | render_buffer_t buffer = pvr2_next_render_buffer();
|
nkeynes@373 | 450 | if( buffer != NULL ) {
|
nkeynes@373 | 451 | pvr2_render_scene( buffer );
|
nkeynes@373 | 452 | }
|
nkeynes@352 | 453 | asic_event( EVENT_PVR_RENDER_DONE );
|
nkeynes@189 | 454 | break;
|
nkeynes@191 | 455 | case RENDER_POLYBASE:
|
nkeynes@191 | 456 | MMIO_WRITE( PVR2, reg, val&0x00F00000 );
|
nkeynes@191 | 457 | break;
|
nkeynes@191 | 458 | case RENDER_TSPCFG:
|
nkeynes@191 | 459 | MMIO_WRITE( PVR2, reg, val&0x00010101 );
|
nkeynes@191 | 460 | break;
|
nkeynes@197 | 461 | case DISP_BORDER:
|
nkeynes@191 | 462 | MMIO_WRITE( PVR2, reg, val&0x01FFFFFF );
|
nkeynes@191 | 463 | break;
|
nkeynes@197 | 464 | case DISP_MODE:
|
nkeynes@191 | 465 | MMIO_WRITE( PVR2, reg, val&0x00FFFF7F );
|
nkeynes@191 | 466 | break;
|
nkeynes@191 | 467 | case RENDER_MODE:
|
nkeynes@191 | 468 | MMIO_WRITE( PVR2, reg, val&0x00FFFF0F );
|
nkeynes@191 | 469 | break;
|
nkeynes@191 | 470 | case RENDER_SIZE:
|
nkeynes@191 | 471 | MMIO_WRITE( PVR2, reg, val&0x000001FF );
|
nkeynes@191 | 472 | break;
|
nkeynes@197 | 473 | case DISP_ADDR1:
|
nkeynes@189 | 474 | val &= 0x00FFFFFC;
|
nkeynes@189 | 475 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@265 | 476 | pvr2_update_raster_posn(sh4r.slice_cycle);
|
nkeynes@108 | 477 | break;
|
nkeynes@197 | 478 | case DISP_ADDR2:
|
nkeynes@191 | 479 | MMIO_WRITE( PVR2, reg, val&0x00FFFFFC );
|
nkeynes@337 | 480 | pvr2_update_raster_posn(sh4r.slice_cycle);
|
nkeynes@191 | 481 | break;
|
nkeynes@197 | 482 | case DISP_SIZE:
|
nkeynes@191 | 483 | MMIO_WRITE( PVR2, reg, val&0x3FFFFFFF );
|
nkeynes@191 | 484 | break;
|
nkeynes@191 | 485 | case RENDER_ADDR1:
|
nkeynes@191 | 486 | case RENDER_ADDR2:
|
nkeynes@191 | 487 | MMIO_WRITE( PVR2, reg, val&0x01FFFFFC );
|
nkeynes@191 | 488 | break;
|
nkeynes@191 | 489 | case RENDER_HCLIP:
|
nkeynes@191 | 490 | MMIO_WRITE( PVR2, reg, val&0x07FF07FF );
|
nkeynes@189 | 491 | break;
|
nkeynes@191 | 492 | case RENDER_VCLIP:
|
nkeynes@191 | 493 | MMIO_WRITE( PVR2, reg, val&0x03FF03FF );
|
nkeynes@189 | 494 | break;
|
nkeynes@197 | 495 | case DISP_HPOSIRQ:
|
nkeynes@191 | 496 | MMIO_WRITE( PVR2, reg, val&0x03FF33FF );
|
nkeynes@304 | 497 | pvr2_state.irq_hpos_line = val & 0x03FF;
|
nkeynes@304 | 498 | pvr2_state.irq_hpos_time_ns = 2000000*((val>>16)&0x03FF)/pvr2_state.dot_clock;
|
nkeynes@304 | 499 | pvr2_state.irq_hpos_mode = (val >> 12) & 0x03;
|
nkeynes@304 | 500 | switch( pvr2_state.irq_hpos_mode ) {
|
nkeynes@304 | 501 | case 3: /* Reserved - treat as 0 */
|
nkeynes@304 | 502 | case 0: /* Once per frame at specified line */
|
nkeynes@304 | 503 | pvr2_state.irq_hpos_mode = HPOS_PER_FRAME;
|
nkeynes@304 | 504 | break;
|
nkeynes@304 | 505 | case 2: /* Once per line - as per-line-count */
|
nkeynes@304 | 506 | pvr2_state.irq_hpos_line = 1;
|
nkeynes@304 | 507 | pvr2_state.irq_hpos_mode = 1;
|
nkeynes@304 | 508 | case 1: /* Once per N lines */
|
nkeynes@304 | 509 | pvr2_state.irq_hpos_line_count = pvr2_state.irq_hpos_line;
|
nkeynes@304 | 510 | pvr2_state.irq_hpos_line = (pvr2_state.line_count >> 1) +
|
nkeynes@304 | 511 | pvr2_state.irq_hpos_line_count;
|
nkeynes@304 | 512 | while( pvr2_state.irq_hpos_line > (pvr2_state.total_lines>>1) ) {
|
nkeynes@304 | 513 | pvr2_state.irq_hpos_line -= (pvr2_state.total_lines>>1);
|
nkeynes@304 | 514 | }
|
nkeynes@304 | 515 | pvr2_state.irq_hpos_mode = HPOS_PER_LINECOUNT;
|
nkeynes@304 | 516 | }
|
nkeynes@304 | 517 | pvr2_schedule_scanline_event( EVENT_HPOS, pvr2_state.irq_hpos_line, 0,
|
nkeynes@304 | 518 | pvr2_state.irq_hpos_time_ns );
|
nkeynes@189 | 519 | break;
|
nkeynes@197 | 520 | case DISP_VPOSIRQ:
|
nkeynes@189 | 521 | val = val & 0x03FF03FF;
|
nkeynes@189 | 522 | pvr2_state.irq_vpos1 = (val >> 16);
|
nkeynes@133 | 523 | pvr2_state.irq_vpos2 = val & 0x03FF;
|
nkeynes@265 | 524 | pvr2_update_raster_posn(sh4r.slice_cycle);
|
nkeynes@304 | 525 | pvr2_schedule_scanline_event( EVENT_SCANLINE1, pvr2_state.irq_vpos1, 0, 0 );
|
nkeynes@304 | 526 | pvr2_schedule_scanline_event( EVENT_SCANLINE2, pvr2_state.irq_vpos2, 0, 0 );
|
nkeynes@189 | 527 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@103 | 528 | break;
|
nkeynes@197 | 529 | case RENDER_NEARCLIP:
|
nkeynes@197 | 530 | MMIO_WRITE( PVR2, reg, val & 0x7FFFFFFF );
|
nkeynes@197 | 531 | break;
|
nkeynes@191 | 532 | case RENDER_SHADOW:
|
nkeynes@191 | 533 | MMIO_WRITE( PVR2, reg, val&0x000001FF );
|
nkeynes@191 | 534 | break;
|
nkeynes@191 | 535 | case RENDER_OBJCFG:
|
nkeynes@191 | 536 | MMIO_WRITE( PVR2, reg, val&0x003FFFFF );
|
nkeynes@191 | 537 | break;
|
nkeynes@191 | 538 | case RENDER_TSPCLIP:
|
nkeynes@191 | 539 | MMIO_WRITE( PVR2, reg, val&0x7FFFFFFF );
|
nkeynes@191 | 540 | break;
|
nkeynes@197 | 541 | case RENDER_FARCLIP:
|
nkeynes@197 | 542 | MMIO_WRITE( PVR2, reg, val&0xFFFFFFF0 );
|
nkeynes@197 | 543 | break;
|
nkeynes@191 | 544 | case RENDER_BGPLANE:
|
nkeynes@191 | 545 | MMIO_WRITE( PVR2, reg, val&0x1FFFFFFF );
|
nkeynes@191 | 546 | break;
|
nkeynes@191 | 547 | case RENDER_ISPCFG:
|
nkeynes@191 | 548 | MMIO_WRITE( PVR2, reg, val&0x00FFFFF9 );
|
nkeynes@191 | 549 | break;
|
nkeynes@197 | 550 | case VRAM_CFG1:
|
nkeynes@197 | 551 | MMIO_WRITE( PVR2, reg, val&0x000000FF );
|
nkeynes@197 | 552 | break;
|
nkeynes@197 | 553 | case VRAM_CFG2:
|
nkeynes@197 | 554 | MMIO_WRITE( PVR2, reg, val&0x003FFFFF );
|
nkeynes@197 | 555 | break;
|
nkeynes@197 | 556 | case VRAM_CFG3:
|
nkeynes@197 | 557 | MMIO_WRITE( PVR2, reg, val&0x1FFFFFFF );
|
nkeynes@197 | 558 | break;
|
nkeynes@197 | 559 | case RENDER_FOGTBLCOL:
|
nkeynes@197 | 560 | case RENDER_FOGVRTCOL:
|
nkeynes@197 | 561 | MMIO_WRITE( PVR2, reg, val&0x00FFFFFF );
|
nkeynes@197 | 562 | break;
|
nkeynes@197 | 563 | case RENDER_FOGCOEFF:
|
nkeynes@197 | 564 | MMIO_WRITE( PVR2, reg, val&0x0000FFFF );
|
nkeynes@197 | 565 | break;
|
nkeynes@197 | 566 | case RENDER_CLAMPHI:
|
nkeynes@197 | 567 | case RENDER_CLAMPLO:
|
nkeynes@197 | 568 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@197 | 569 | break;
|
nkeynes@261 | 570 | case RENDER_TEXSIZE:
|
nkeynes@261 | 571 | MMIO_WRITE( PVR2, reg, val&0x00031F1F );
|
nkeynes@197 | 572 | break;
|
nkeynes@261 | 573 | case RENDER_PALETTE:
|
nkeynes@261 | 574 | MMIO_WRITE( PVR2, reg, val&0x00000003 );
|
nkeynes@261 | 575 | break;
|
nkeynes@261 | 576 |
|
nkeynes@261 | 577 | /********** CRTC registers *************/
|
nkeynes@197 | 578 | case DISP_HBORDER:
|
nkeynes@197 | 579 | case DISP_VBORDER:
|
nkeynes@197 | 580 | MMIO_WRITE( PVR2, reg, val&0x03FF03FF );
|
nkeynes@197 | 581 | break;
|
nkeynes@261 | 582 | case DISP_TOTAL:
|
nkeynes@261 | 583 | val = val & 0x03FF03FF;
|
nkeynes@261 | 584 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@265 | 585 | pvr2_update_raster_posn(sh4r.slice_cycle);
|
nkeynes@261 | 586 | pvr2_state.total_lines = (val >> 16) + 1;
|
nkeynes@261 | 587 | pvr2_state.line_size = (val & 0x03FF) + 1;
|
nkeynes@261 | 588 | pvr2_state.line_time_ns = 1000000 * pvr2_state.line_size / pvr2_state.dot_clock;
|
nkeynes@265 | 589 | pvr2_state.retrace_end_line = 0x2A;
|
nkeynes@265 | 590 | pvr2_state.retrace_start_line = pvr2_state.total_lines - 6;
|
nkeynes@304 | 591 | pvr2_schedule_scanline_event( EVENT_SCANLINE1, pvr2_state.irq_vpos1, 0, 0 );
|
nkeynes@304 | 592 | pvr2_schedule_scanline_event( EVENT_SCANLINE2, pvr2_state.irq_vpos2, 0, 0 );
|
nkeynes@304 | 593 | pvr2_schedule_scanline_event( EVENT_HPOS, pvr2_state.irq_hpos_line, 0,
|
nkeynes@304 | 594 | pvr2_state.irq_hpos_time_ns );
|
nkeynes@261 | 595 | break;
|
nkeynes@261 | 596 | case DISP_SYNCCFG:
|
nkeynes@261 | 597 | MMIO_WRITE( PVR2, reg, val&0x000003FF );
|
nkeynes@261 | 598 | pvr2_state.interlaced = (val & 0x0010) ? TRUE : FALSE;
|
nkeynes@261 | 599 | break;
|
nkeynes@261 | 600 | case DISP_SYNCTIME:
|
nkeynes@261 | 601 | pvr2_state.vsync_lines = (val >> 8) & 0x0F;
|
nkeynes@269 | 602 | pvr2_state.hsync_width_ns = ((val & 0x7F) + 1) * 2000000 / pvr2_state.dot_clock;
|
nkeynes@197 | 603 | MMIO_WRITE( PVR2, reg, val&0xFFFFFF7F );
|
nkeynes@197 | 604 | break;
|
nkeynes@197 | 605 | case DISP_CFG2:
|
nkeynes@197 | 606 | MMIO_WRITE( PVR2, reg, val&0x003F01FF );
|
nkeynes@197 | 607 | break;
|
nkeynes@197 | 608 | case DISP_HPOS:
|
nkeynes@261 | 609 | val = val & 0x03FF;
|
nkeynes@261 | 610 | pvr2_state.front_porch_ns = (val + 1) * 1000000 / pvr2_state.dot_clock;
|
nkeynes@261 | 611 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@197 | 612 | break;
|
nkeynes@197 | 613 | case DISP_VPOS:
|
nkeynes@197 | 614 | MMIO_WRITE( PVR2, reg, val&0x03FF03FF );
|
nkeynes@197 | 615 | break;
|
nkeynes@261 | 616 |
|
nkeynes@261 | 617 | /*********** Tile accelerator registers ***********/
|
nkeynes@261 | 618 | case TA_POLYPOS:
|
nkeynes@261 | 619 | case TA_LISTPOS:
|
nkeynes@261 | 620 | /* Readonly registers */
|
nkeynes@197 | 621 | break;
|
nkeynes@189 | 622 | case TA_TILEBASE:
|
nkeynes@193 | 623 | case TA_LISTEND:
|
nkeynes@189 | 624 | case TA_LISTBASE:
|
nkeynes@191 | 625 | MMIO_WRITE( PVR2, reg, val&0x00FFFFE0 );
|
nkeynes@189 | 626 | break;
|
nkeynes@191 | 627 | case RENDER_TILEBASE:
|
nkeynes@189 | 628 | case TA_POLYBASE:
|
nkeynes@189 | 629 | case TA_POLYEND:
|
nkeynes@191 | 630 | MMIO_WRITE( PVR2, reg, val&0x00FFFFFC );
|
nkeynes@189 | 631 | break;
|
nkeynes@189 | 632 | case TA_TILESIZE:
|
nkeynes@191 | 633 | MMIO_WRITE( PVR2, reg, val&0x000F003F );
|
nkeynes@189 | 634 | break;
|
nkeynes@189 | 635 | case TA_TILECFG:
|
nkeynes@191 | 636 | MMIO_WRITE( PVR2, reg, val&0x00133333 );
|
nkeynes@189 | 637 | break;
|
nkeynes@261 | 638 | case TA_INIT:
|
nkeynes@261 | 639 | if( val & 0x80000000 )
|
nkeynes@261 | 640 | pvr2_ta_init();
|
nkeynes@261 | 641 | break;
|
nkeynes@261 | 642 | case TA_REINIT:
|
nkeynes@261 | 643 | break;
|
nkeynes@261 | 644 | /**************** Scaler registers? ****************/
|
nkeynes@335 | 645 | case RENDER_SCALER:
|
nkeynes@261 | 646 | MMIO_WRITE( PVR2, reg, val&0x0007FFFF );
|
nkeynes@261 | 647 | break;
|
nkeynes@261 | 648 |
|
nkeynes@197 | 649 | case YUV_ADDR:
|
nkeynes@284 | 650 | val = val & 0x00FFFFF8;
|
nkeynes@284 | 651 | MMIO_WRITE( PVR2, reg, val );
|
nkeynes@284 | 652 | pvr2_yuv_init( val );
|
nkeynes@197 | 653 | break;
|
nkeynes@197 | 654 | case YUV_CFG:
|
nkeynes@197 | 655 | MMIO_WRITE( PVR2, reg, val&0x01013F3F );
|
nkeynes@284 | 656 | pvr2_yuv_set_config(val);
|
nkeynes@197 | 657 | break;
|
nkeynes@261 | 658 |
|
nkeynes@261 | 659 | /**************** Unknowns ***************/
|
nkeynes@261 | 660 | case PVRUNK1:
|
nkeynes@261 | 661 | MMIO_WRITE( PVR2, reg, val&0x000007FF );
|
nkeynes@261 | 662 | break;
|
nkeynes@261 | 663 | case PVRUNK2:
|
nkeynes@261 | 664 | MMIO_WRITE( PVR2, reg, val&0x00000007 );
|
nkeynes@100 | 665 | break;
|
nkeynes@261 | 666 | case PVRUNK3:
|
nkeynes@261 | 667 | MMIO_WRITE( PVR2, reg, val&0x000FFF3F );
|
nkeynes@261 | 668 | break;
|
nkeynes@261 | 669 | case PVRUNK5:
|
nkeynes@261 | 670 | MMIO_WRITE( PVR2, reg, val&0x0000FFFF );
|
nkeynes@261 | 671 | break;
|
nkeynes@261 | 672 | case PVRUNK6:
|
nkeynes@261 | 673 | MMIO_WRITE( PVR2, reg, val&0x000000FF );
|
nkeynes@197 | 674 | break;
|
nkeynes@197 | 675 | case PVRUNK7:
|
nkeynes@197 | 676 | MMIO_WRITE( PVR2, reg, val&0x00000001 );
|
nkeynes@197 | 677 | break;
|
nkeynes@1 | 678 | }
|
nkeynes@1 | 679 | }
|
nkeynes@1 | 680 |
|
nkeynes@261 | 681 | /**
|
nkeynes@261 | 682 | * Calculate the current read value of the syncstat register, using
|
nkeynes@261 | 683 | * the current SH4 clock time as an offset from the last timeslice.
|
nkeynes@261 | 684 | * The register reads (LSB to MSB) as:
|
nkeynes@261 | 685 | * 0..9 Current scan line
|
nkeynes@261 | 686 | * 10 Odd/even field (1 = odd, 0 = even)
|
nkeynes@261 | 687 | * 11 Display active (including border and overscan)
|
nkeynes@261 | 688 | * 12 Horizontal sync off
|
nkeynes@261 | 689 | * 13 Vertical sync off
|
nkeynes@261 | 690 | * Note this method is probably incorrect for anything other than straight
|
nkeynes@265 | 691 | * interlaced PAL/NTSC, and needs further testing.
|
nkeynes@261 | 692 | */
|
nkeynes@261 | 693 | uint32_t pvr2_get_sync_status()
|
nkeynes@261 | 694 | {
|
nkeynes@265 | 695 | pvr2_update_raster_posn(sh4r.slice_cycle);
|
nkeynes@265 | 696 | uint32_t result = pvr2_state.line_count;
|
nkeynes@261 | 697 |
|
nkeynes@265 | 698 | if( pvr2_state.odd_even_field ) {
|
nkeynes@261 | 699 | result |= 0x0400;
|
nkeynes@261 | 700 | }
|
nkeynes@265 | 701 | if( (pvr2_state.line_count & 0x01) == pvr2_state.odd_even_field ) {
|
nkeynes@265 | 702 | if( pvr2_state.line_remainder > pvr2_state.hsync_width_ns ) {
|
nkeynes@261 | 703 | result |= 0x1000; /* !HSYNC */
|
nkeynes@261 | 704 | }
|
nkeynes@265 | 705 | if( pvr2_state.line_count >= pvr2_state.vsync_lines ) {
|
nkeynes@265 | 706 | if( pvr2_state.line_remainder > pvr2_state.front_porch_ns ) {
|
nkeynes@261 | 707 | result |= 0x2800; /* Display active */
|
nkeynes@261 | 708 | } else {
|
nkeynes@261 | 709 | result |= 0x2000; /* Front porch */
|
nkeynes@261 | 710 | }
|
nkeynes@261 | 711 | }
|
nkeynes@261 | 712 | } else {
|
nkeynes@269 | 713 | if( pvr2_state.line_count >= pvr2_state.vsync_lines ) {
|
nkeynes@269 | 714 | if( pvr2_state.line_remainder < (pvr2_state.line_time_ns - pvr2_state.back_porch_ns)) {
|
nkeynes@269 | 715 | result |= 0x3800; /* Display active */
|
nkeynes@269 | 716 | } else {
|
nkeynes@269 | 717 | result |= 0x3000;
|
nkeynes@269 | 718 | }
|
nkeynes@261 | 719 | } else {
|
nkeynes@261 | 720 | result |= 0x1000; /* Back porch */
|
nkeynes@261 | 721 | }
|
nkeynes@261 | 722 | }
|
nkeynes@261 | 723 | return result;
|
nkeynes@261 | 724 | }
|
nkeynes@261 | 725 |
|
nkeynes@265 | 726 | /**
|
nkeynes@265 | 727 | * Schedule a "scanline" event. This actually goes off at
|
nkeynes@265 | 728 | * 2 * line in even fields and 2 * line + 1 in odd fields.
|
nkeynes@265 | 729 | * Otherwise this behaves as per pvr2_schedule_line_event().
|
nkeynes@265 | 730 | * The raster position should be updated before calling this
|
nkeynes@265 | 731 | * method.
|
nkeynes@304 | 732 | * @param eventid Event to fire at the specified time
|
nkeynes@304 | 733 | * @param line Line on which to fire the event (this is 2n/2n+1 for interlaced
|
nkeynes@304 | 734 | * displays).
|
nkeynes@304 | 735 | * @param hpos_ns Nanoseconds into the line at which to fire.
|
nkeynes@265 | 736 | */
|
nkeynes@304 | 737 | static void pvr2_schedule_scanline_event( int eventid, int line, int minimum_lines, int hpos_ns )
|
nkeynes@265 | 738 | {
|
nkeynes@265 | 739 | uint32_t field = pvr2_state.odd_even_field;
|
nkeynes@265 | 740 | if( line <= pvr2_state.line_count && pvr2_state.interlaced ) {
|
nkeynes@265 | 741 | field = !field;
|
nkeynes@265 | 742 | }
|
nkeynes@304 | 743 | if( hpos_ns > pvr2_state.line_time_ns ) {
|
nkeynes@304 | 744 | hpos_ns = pvr2_state.line_time_ns;
|
nkeynes@304 | 745 | }
|
nkeynes@265 | 746 |
|
nkeynes@265 | 747 | line <<= 1;
|
nkeynes@265 | 748 | if( field ) {
|
nkeynes@265 | 749 | line += 1;
|
nkeynes@265 | 750 | }
|
nkeynes@274 | 751 |
|
nkeynes@274 | 752 | if( line < pvr2_state.total_lines ) {
|
nkeynes@274 | 753 | uint32_t lines;
|
nkeynes@274 | 754 | uint32_t time;
|
nkeynes@274 | 755 | if( line <= pvr2_state.line_count ) {
|
nkeynes@274 | 756 | lines = (pvr2_state.total_lines - pvr2_state.line_count + line);
|
nkeynes@274 | 757 | } else {
|
nkeynes@274 | 758 | lines = (line - pvr2_state.line_count);
|
nkeynes@274 | 759 | }
|
nkeynes@274 | 760 | if( lines <= minimum_lines ) {
|
nkeynes@274 | 761 | lines += pvr2_state.total_lines;
|
nkeynes@274 | 762 | }
|
nkeynes@304 | 763 | time = (lines * pvr2_state.line_time_ns) - pvr2_state.line_remainder + hpos_ns;
|
nkeynes@274 | 764 | event_schedule( eventid, time );
|
nkeynes@274 | 765 | } else {
|
nkeynes@274 | 766 | event_cancel( eventid );
|
nkeynes@274 | 767 | }
|
nkeynes@265 | 768 | }
|
nkeynes@265 | 769 |
|
nkeynes@1 | 770 | MMIO_REGION_READ_FN( PVR2, reg )
|
nkeynes@1 | 771 | {
|
nkeynes@1 | 772 | switch( reg ) {
|
nkeynes@261 | 773 | case DISP_SYNCSTAT:
|
nkeynes@261 | 774 | return pvr2_get_sync_status();
|
nkeynes@1 | 775 | default:
|
nkeynes@1 | 776 | return MMIO_READ( PVR2, reg );
|
nkeynes@1 | 777 | }
|
nkeynes@1 | 778 | }
|
nkeynes@19 | 779 |
|
nkeynes@337 | 780 | MMIO_REGION_WRITE_FN( PVR2PAL, reg, val )
|
nkeynes@337 | 781 | {
|
nkeynes@337 | 782 | MMIO_WRITE( PVR2PAL, reg, val );
|
nkeynes@337 | 783 | pvr2_state.palette_changed = TRUE;
|
nkeynes@337 | 784 | }
|
nkeynes@337 | 785 |
|
nkeynes@337 | 786 | void pvr2_check_palette_changed()
|
nkeynes@337 | 787 | {
|
nkeynes@337 | 788 | if( pvr2_state.palette_changed ) {
|
nkeynes@337 | 789 | texcache_invalidate_palette();
|
nkeynes@337 | 790 | pvr2_state.palette_changed = FALSE;
|
nkeynes@337 | 791 | }
|
nkeynes@337 | 792 | }
|
nkeynes@337 | 793 |
|
nkeynes@337 | 794 | MMIO_REGION_READ_DEFFN( PVR2PAL );
|
nkeynes@85 | 795 |
|
nkeynes@19 | 796 | void pvr2_set_base_address( uint32_t base )
|
nkeynes@19 | 797 | {
|
nkeynes@197 | 798 | mmio_region_PVR2_write( DISP_ADDR1, base );
|
nkeynes@19 | 799 | }
|
nkeynes@56 | 800 |
|
nkeynes@56 | 801 |
|
nkeynes@65 | 802 |
|
nkeynes@98 | 803 |
|
nkeynes@56 | 804 | int32_t mmio_region_PVR2TA_read( uint32_t reg )
|
nkeynes@56 | 805 | {
|
nkeynes@56 | 806 | return 0xFFFFFFFF;
|
nkeynes@56 | 807 | }
|
nkeynes@56 | 808 |
|
nkeynes@56 | 809 | void mmio_region_PVR2TA_write( uint32_t reg, uint32_t val )
|
nkeynes@56 | 810 | {
|
nkeynes@433 | 811 | pvr2_ta_write( (unsigned char *)&val, sizeof(uint32_t) );
|
nkeynes@56 | 812 | }
|
nkeynes@56 | 813 |
|
nkeynes@352 | 814 | /**
|
nkeynes@352 | 815 | * Find the render buffer corresponding to the requested output frame
|
nkeynes@352 | 816 | * (does not consider texture renders).
|
nkeynes@352 | 817 | * @return the render_buffer if found, or null if no such buffer.
|
nkeynes@352 | 818 | *
|
nkeynes@352 | 819 | * Note: Currently does not consider "partial matches", ie partial
|
nkeynes@352 | 820 | * frame overlap - it probably needs to do this.
|
nkeynes@352 | 821 | */
|
nkeynes@352 | 822 | render_buffer_t pvr2_get_render_buffer( frame_buffer_t frame )
|
nkeynes@352 | 823 | {
|
nkeynes@352 | 824 | int i;
|
nkeynes@352 | 825 | for( i=0; i<render_buffer_count; i++ ) {
|
nkeynes@352 | 826 | if( render_buffers[i] != NULL && render_buffers[i]->address == frame->address ) {
|
nkeynes@352 | 827 | return render_buffers[i];
|
nkeynes@352 | 828 | }
|
nkeynes@352 | 829 | }
|
nkeynes@352 | 830 | return NULL;
|
nkeynes@352 | 831 | }
|
nkeynes@352 | 832 |
|
nkeynes@352 | 833 | /**
|
nkeynes@477 | 834 | * Allocate a render buffer with the requested parameters.
|
nkeynes@477 | 835 | * The order of preference is:
|
nkeynes@352 | 836 | * 1. An existing buffer with the same address. (not flushed unless the new
|
nkeynes@352 | 837 | * size is smaller than the old one).
|
nkeynes@352 | 838 | * 2. An existing buffer with the same size chosen by LRU order. Old buffer
|
nkeynes@352 | 839 | * is flushed to vram.
|
nkeynes@352 | 840 | * 3. A new buffer if one can be created.
|
nkeynes@352 | 841 | * 4. The current display buff
|
nkeynes@352 | 842 | * Note: The current display field(s) will never be overwritten except as a last
|
nkeynes@352 | 843 | * resort.
|
nkeynes@352 | 844 | */
|
nkeynes@477 | 845 | render_buffer_t pvr2_alloc_render_buffer( sh4addr_t render_addr, int width, int height )
|
nkeynes@352 | 846 | {
|
nkeynes@477 | 847 | int i;
|
nkeynes@352 | 848 | render_buffer_t result = NULL;
|
nkeynes@352 | 849 |
|
nkeynes@352 | 850 | /* Check existing buffers for an available buffer */
|
nkeynes@352 | 851 | for( i=0; i<render_buffer_count; i++ ) {
|
nkeynes@352 | 852 | if( render_buffers[i]->width == width && render_buffers[i]->height == height ) {
|
nkeynes@352 | 853 | /* needs to be the right dimensions */
|
nkeynes@352 | 854 | if( render_buffers[i]->address == render_addr ) {
|
nkeynes@441 | 855 | if( displayed_render_buffer == render_buffers[i] ) {
|
nkeynes@441 | 856 | /* Same address, but we can't use it because the
|
nkeynes@441 | 857 | * display has it. Mark it as unaddressed for later.
|
nkeynes@477 | 858 | */
|
nkeynes@441 | 859 | render_buffers[i]->address = -1;
|
nkeynes@441 | 860 | } else {
|
nkeynes@441 | 861 | /* perfect */
|
nkeynes@441 | 862 | result = render_buffers[i];
|
nkeynes@441 | 863 | break;
|
nkeynes@441 | 864 | }
|
nkeynes@441 | 865 | } else if( render_buffers[i]->address == -1 && result == NULL &&
|
nkeynes@441 | 866 | displayed_render_buffer != render_buffers[i] ) {
|
nkeynes@352 | 867 | result = render_buffers[i];
|
nkeynes@352 | 868 | }
|
nkeynes@441 | 869 |
|
nkeynes@352 | 870 | } else if( render_buffers[i]->address == render_addr ) {
|
nkeynes@352 | 871 | /* right address, wrong size - if it's larger, flush it, otherwise
|
nkeynes@352 | 872 | * nuke it quietly */
|
nkeynes@352 | 873 | if( render_buffers[i]->width * render_buffers[i]->height >
|
nkeynes@352 | 874 | width*height ) {
|
nkeynes@352 | 875 | pvr2_render_buffer_copy_to_sh4( render_buffers[i] );
|
nkeynes@352 | 876 | }
|
nkeynes@433 | 877 | render_buffers[i]->address = -1;
|
nkeynes@352 | 878 | }
|
nkeynes@352 | 879 | }
|
nkeynes@352 | 880 |
|
nkeynes@352 | 881 | /* Nothing available - make one */
|
nkeynes@352 | 882 | if( result == NULL ) {
|
nkeynes@352 | 883 | if( render_buffer_count == MAX_RENDER_BUFFERS ) {
|
nkeynes@352 | 884 | /* maximum buffers reached - need to throw one away */
|
nkeynes@352 | 885 | uint32_t field1_addr = MMIO_READ( PVR2, DISP_ADDR1 );
|
nkeynes@352 | 886 | uint32_t field2_addr = MMIO_READ( PVR2, DISP_ADDR2 );
|
nkeynes@352 | 887 | for( i=0; i<render_buffer_count; i++ ) {
|
nkeynes@352 | 888 | if( render_buffers[i]->address != field1_addr &&
|
nkeynes@441 | 889 | render_buffers[i]->address != field2_addr &&
|
nkeynes@441 | 890 | render_buffers[i] != displayed_render_buffer ) {
|
nkeynes@352 | 891 | /* Never throw away the current "front buffer(s)" */
|
nkeynes@352 | 892 | result = render_buffers[i];
|
nkeynes@477 | 893 | if( !result->flushed ) {
|
nkeynes@477 | 894 | pvr2_render_buffer_copy_to_sh4( result );
|
nkeynes@477 | 895 | }
|
nkeynes@352 | 896 | if( result->width != width || result->height != height ) {
|
nkeynes@352 | 897 | display_driver->destroy_render_buffer(render_buffers[i]);
|
nkeynes@352 | 898 | result = display_driver->create_render_buffer(width,height);
|
nkeynes@352 | 899 | render_buffers[i] = result;
|
nkeynes@352 | 900 | }
|
nkeynes@352 | 901 | break;
|
nkeynes@352 | 902 | }
|
nkeynes@352 | 903 | }
|
nkeynes@352 | 904 | } else {
|
nkeynes@352 | 905 | result = display_driver->create_render_buffer(width,height);
|
nkeynes@352 | 906 | if( result != NULL ) {
|
nkeynes@352 | 907 | render_buffers[render_buffer_count++] = result;
|
nkeynes@352 | 908 | }
|
nkeynes@352 | 909 | }
|
nkeynes@352 | 910 | }
|
nkeynes@352 | 911 |
|
nkeynes@477 | 912 | if( result != NULL ) {
|
nkeynes@477 | 913 | result->address = render_addr;
|
nkeynes@477 | 914 | }
|
nkeynes@352 | 915 | return result;
|
nkeynes@352 | 916 | }
|
nkeynes@352 | 917 |
|
nkeynes@352 | 918 | /**
|
nkeynes@477 | 919 | * Allocate a render buffer based on the current rendering settings
|
nkeynes@477 | 920 | */
|
nkeynes@477 | 921 | render_buffer_t pvr2_next_render_buffer()
|
nkeynes@477 | 922 | {
|
nkeynes@477 | 923 | render_buffer_t result = NULL;
|
nkeynes@477 | 924 | uint32_t render_addr = MMIO_READ( PVR2, RENDER_ADDR1 );
|
nkeynes@477 | 925 | uint32_t render_mode = MMIO_READ( PVR2, RENDER_MODE );
|
nkeynes@477 | 926 | uint32_t render_scale = MMIO_READ( PVR2, RENDER_SCALER );
|
nkeynes@477 | 927 | uint32_t render_stride = MMIO_READ( PVR2, RENDER_SIZE ) << 3;
|
nkeynes@477 | 928 |
|
nkeynes@477 | 929 | if( render_addr & 0x01000000 ) { /* vram64 */
|
nkeynes@477 | 930 | render_addr = (render_addr & 0x00FFFFFF) + PVR2_RAM_BASE_INT;
|
nkeynes@477 | 931 | } else { /* vram32 */
|
nkeynes@477 | 932 | render_addr = (render_addr & 0x00FFFFFF) + PVR2_RAM_BASE;
|
nkeynes@477 | 933 | }
|
nkeynes@477 | 934 |
|
nkeynes@477 | 935 | int width, height;
|
nkeynes@477 | 936 | int colour_format = pvr2_render_colour_format[render_mode&0x07];
|
nkeynes@477 | 937 | pvr2_render_getsize( &width, &height );
|
nkeynes@477 | 938 |
|
nkeynes@477 | 939 | result = pvr2_alloc_render_buffer( render_addr, width, height );
|
nkeynes@477 | 940 | /* Setup the buffer */
|
nkeynes@477 | 941 | if( result != NULL ) {
|
nkeynes@477 | 942 | result->rowstride = render_stride;
|
nkeynes@477 | 943 | result->colour_format = colour_format;
|
nkeynes@477 | 944 | result->scale = render_scale;
|
nkeynes@477 | 945 | result->size = width * height * colour_formats[colour_format].bpp;
|
nkeynes@477 | 946 | result->flushed = FALSE;
|
nkeynes@477 | 947 | result->inverted = TRUE; // render buffers are inverted normally
|
nkeynes@477 | 948 | }
|
nkeynes@477 | 949 | return result;
|
nkeynes@477 | 950 | }
|
nkeynes@477 | 951 |
|
nkeynes@477 | 952 | static render_buffer_t pvr2_frame_buffer_to_render_buffer( frame_buffer_t frame )
|
nkeynes@477 | 953 | {
|
nkeynes@477 | 954 | render_buffer_t result = pvr2_alloc_render_buffer( frame->address, frame->width, frame->height );
|
nkeynes@477 | 955 | if( result != NULL ) {
|
nkeynes@477 | 956 | int bpp = colour_formats[frame->colour_format].bpp;
|
nkeynes@477 | 957 | result->rowstride = frame->rowstride;
|
nkeynes@477 | 958 | result->colour_format = frame->colour_format;
|
nkeynes@477 | 959 | result->scale = 0x400;
|
nkeynes@477 | 960 | result->size = frame->width * frame->height * bpp;
|
nkeynes@477 | 961 | result->flushed = TRUE;
|
nkeynes@477 | 962 | result->inverted = frame->inverted;
|
nkeynes@477 | 963 | display_driver->load_frame_buffer( frame, result );
|
nkeynes@477 | 964 | }
|
nkeynes@477 | 965 | return result;
|
nkeynes@477 | 966 | }
|
nkeynes@477 | 967 |
|
nkeynes@477 | 968 |
|
nkeynes@477 | 969 | /**
|
nkeynes@352 | 970 | * Invalidate any caching on the supplied address. Specifically, if it falls
|
nkeynes@352 | 971 | * within any of the render buffers, flush the buffer back to PVR2 ram.
|
nkeynes@352 | 972 | */
|
nkeynes@352 | 973 | gboolean pvr2_render_buffer_invalidate( sh4addr_t address, gboolean isWrite )
|
nkeynes@352 | 974 | {
|
nkeynes@352 | 975 | int i;
|
nkeynes@352 | 976 | address = address & 0x1FFFFFFF;
|
nkeynes@352 | 977 | for( i=0; i<render_buffer_count; i++ ) {
|
nkeynes@352 | 978 | uint32_t bufaddr = render_buffers[i]->address;
|
nkeynes@352 | 979 | if( bufaddr != -1 && bufaddr <= address &&
|
nkeynes@352 | 980 | (bufaddr + render_buffers[i]->size) > address ) {
|
nkeynes@352 | 981 | if( !render_buffers[i]->flushed ) {
|
nkeynes@352 | 982 | pvr2_render_buffer_copy_to_sh4( render_buffers[i] );
|
nkeynes@352 | 983 | render_buffers[i]->flushed = TRUE;
|
nkeynes@352 | 984 | }
|
nkeynes@352 | 985 | if( isWrite ) {
|
nkeynes@352 | 986 | render_buffers[i]->address = -1; /* Invalid */
|
nkeynes@352 | 987 | }
|
nkeynes@352 | 988 | return TRUE; /* should never have overlapping buffers */
|
nkeynes@352 | 989 | }
|
nkeynes@352 | 990 | }
|
nkeynes@352 | 991 | return FALSE;
|
nkeynes@352 | 992 | }
|