lxdream.org :: lxdream/src/sh4/sh4core.c r359:c588dce7ebde (annotated)

tree revision 359:c588dce7ebde

filename	src/sh4/sh4core.c
changeset	359:c588dce7ebde
prev	312:2c34bdc36cbd
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author	nkeynes
date	Thu Aug 23 12:33:27 2007 +0000 (12 years ago)
permissions	-rw-r--r--
last change	Commit decoder generator Translator work in progress Fix mac.l, mac.w in emu core

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nkeynes@23	1	/**
nkeynes@359	2	* $Id: sh4core.c,v 1.41 2007-08-23 12:33:27 nkeynes Exp $
nkeynes@23	3	*
nkeynes@23	4	* SH4 emulation core, and parent module for all the SH4 peripheral
nkeynes@23	5	* modules.
nkeynes@23	6	*
nkeynes@23	7	* Copyright (c) 2005 Nathan Keynes.
nkeynes@23	8	*
nkeynes@23	9	* This program is free software; you can redistribute it and/or modify
nkeynes@23	10	* it under the terms of the GNU General Public License as published by
nkeynes@23	11	* the Free Software Foundation; either version 2 of the License, or
nkeynes@23	12	* (at your option) any later version.
nkeynes@23	13	*
nkeynes@23	14	* This program is distributed in the hope that it will be useful,
nkeynes@23	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
nkeynes@23	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
nkeynes@23	17	* GNU General Public License for more details.
nkeynes@23	18	*/
nkeynes@23	19
nkeynes@35	20	#define MODULE sh4_module
nkeynes@1	21	#include <math.h>
nkeynes@1	22	#include "dream.h"
nkeynes@84	23	#include "sh4/sh4core.h"
nkeynes@84	24	#include "sh4/sh4mmio.h"
nkeynes@84	25	#include "sh4/intc.h"
nkeynes@1	26	#include "mem.h"
nkeynes@23	27	#include "clock.h"
nkeynes@102	28	#include "syscall.h"
nkeynes@1	29
nkeynes@157	30	#define SH4_CALLTRACE 1
nkeynes@157	31
nkeynes@123	32	#define MAX_INT 0x7FFFFFFF
nkeynes@123	33	#define MIN_INT 0x80000000
nkeynes@123	34	#define MAX_INTF 2147483647.0
nkeynes@123	35	#define MIN_INTF -2147483648.0
nkeynes@123	36
nkeynes@27	37	/* CPU-generated exception code/vector pairs */
nkeynes@27	38	#define EXC_POWER_RESET 0x000 /* vector special */
nkeynes@27	39	#define EXC_MANUAL_RESET 0x020
nkeynes@208	40	#define EXC_READ_ADDR_ERR 0x0E0
nkeynes@208	41	#define EXC_WRITE_ADDR_ERR 0x100
nkeynes@27	42	#define EXC_SLOT_ILLEGAL 0x1A0
nkeynes@27	43	#define EXC_ILLEGAL 0x180
nkeynes@27	44	#define EXC_TRAP 0x160
nkeynes@27	45	#define EXC_FPDISABLE 0x800
nkeynes@246	46	#define EXC_SLOT_FPDISABLE 0x820
nkeynes@246	47
nkeynes@246	48	#define EXV_EXCEPTION 0x100 /* General exception vector */
nkeynes@246	49	#define EXV_TLBMISS 0x400 /* TLB-miss exception vector */
nkeynes@246	50	#define EXV_INTERRUPT 0x600 /* External interrupt vector */
nkeynes@27	51
nkeynes@23	52	/******************** SH4 Module Definition **************************/
nkeynes@23	53
nkeynes@23	54	void sh4_init( void );
nkeynes@23	55	void sh4_reset( void );
nkeynes@30	56	uint32_t sh4_run_slice( uint32_t );
nkeynes@23	57	void sh4_start( void );
nkeynes@23	58	void sh4_stop( void );
nkeynes@23	59	void sh4_save_state( FILE *f );
nkeynes@23	60	int sh4_load_state( FILE *f );
nkeynes@359	61	void sh4_accept_interrupt( void );
nkeynes@16	62
nkeynes@15	63	struct dreamcast_module sh4_module = { "SH4", sh4_init, sh4_reset,
nkeynes@23	64	NULL, sh4_run_slice, sh4_stop,
nkeynes@23	65	sh4_save_state, sh4_load_state };
nkeynes@15	66
nkeynes@1	67	struct sh4_registers sh4r;
nkeynes@1	68
nkeynes@1	69	void sh4_init(void)
nkeynes@1	70	{
nkeynes@1	71	register_io_regions( mmio_list_sh4mmio );
nkeynes@312	72	MMU_init();
nkeynes@27	73	sh4_reset();
nkeynes@1	74	}
nkeynes@1	75
nkeynes@1	76	void sh4_reset(void)
nkeynes@1	77	{
nkeynes@19	78	/* zero everything out, for the sake of having a consistent state. */
nkeynes@19	79	memset( &sh4r, 0, sizeof(sh4r) );
nkeynes@27	80
nkeynes@27	81	/* Resume running if we were halted */
nkeynes@27	82	sh4r.sh4_state = SH4_STATE_RUNNING;
nkeynes@27	83
nkeynes@1	84	sh4r.pc = 0xA0000000;
nkeynes@1	85	sh4r.new_pc= 0xA0000002;
nkeynes@1	86	sh4r.vbr = 0x00000000;
nkeynes@1	87	sh4r.fpscr = 0x00040001;
nkeynes@1	88	sh4r.sr = 0x700000F0;
nkeynes@27	89
nkeynes@27	90	/* Mem reset will do this, but if we want to reset _just_ the SH4... */
nkeynes@27	91	MMIO_WRITE( MMU, EXPEVT, EXC_POWER_RESET );
nkeynes@27	92
nkeynes@27	93	/* Peripheral modules */
nkeynes@260	94	CPG_reset();
nkeynes@157	95	INTC_reset();
nkeynes@312	96	MMU_reset();
nkeynes@157	97	TMU_reset();
nkeynes@32	98	SCIF_reset();
nkeynes@1	99	}
nkeynes@1	100
nkeynes@43	101	static struct breakpoint_struct sh4_breakpoints[MAX_BREAKPOINTS];
nkeynes@43	102	static int sh4_breakpoint_count = 0;
nkeynes@235	103	static uint16_t *sh4_icache = NULL;
nkeynes@235	104	static uint32_t sh4_icache_addr = 0;
nkeynes@43	105
nkeynes@43	106	void sh4_set_breakpoint( uint32_t pc, int type )
nkeynes@43	107	{
nkeynes@43	108	sh4_breakpoints[sh4_breakpoint_count].address = pc;
nkeynes@43	109	sh4_breakpoints[sh4_breakpoint_count].type = type;
nkeynes@43	110	sh4_breakpoint_count++;
nkeynes@43	111	}
nkeynes@43	112
nkeynes@43	113	gboolean sh4_clear_breakpoint( uint32_t pc, int type )
nkeynes@43	114	{
nkeynes@43	115	int i;
nkeynes@43	116
nkeynes@43	117	for( i=0; i<sh4_breakpoint_count; i++ ) {
nkeynes@43	118	if( sh4_breakpoints[i].address == pc &&
nkeynes@43	119	sh4_breakpoints[i].type == type ) {
nkeynes@43	120	while( ++i < sh4_breakpoint_count ) {
nkeynes@43	121	sh4_breakpoints[i-1].address = sh4_breakpoints[i].address;
nkeynes@43	122	sh4_breakpoints[i-1].type = sh4_breakpoints[i].type;
nkeynes@43	123	}
nkeynes@43	124	sh4_breakpoint_count--;
nkeynes@43	125	return TRUE;
nkeynes@43	126	}
nkeynes@43	127	}
nkeynes@43	128	return FALSE;
nkeynes@43	129	}
nkeynes@43	130
nkeynes@43	131	int sh4_get_breakpoint( uint32_t pc )
nkeynes@43	132	{
nkeynes@43	133	int i;
nkeynes@43	134	for( i=0; i<sh4_breakpoint_count; i++ ) {
nkeynes@43	135	if( sh4_breakpoints[i].address == pc )
nkeynes@43	136	return sh4_breakpoints[i].type;
nkeynes@43	137	}
nkeynes@43	138	return 0;
nkeynes@43	139	}
nkeynes@43	140
nkeynes@30	141	uint32_t sh4_run_slice( uint32_t nanosecs )
nkeynes@1	142	{
nkeynes@23	143	int i;
nkeynes@265	144	sh4r.slice_cycle = 0;
nkeynes@23	145
nkeynes@27	146	if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
nkeynes@265	147	if( sh4r.event_pending < nanosecs ) {
nkeynes@265	148	sh4r.sh4_state = SH4_STATE_RUNNING;
nkeynes@265	149	sh4r.slice_cycle = sh4r.event_pending;
nkeynes@265	150	}
nkeynes@23	151	}
nkeynes@27	152
nkeynes@235	153	if( sh4_breakpoint_count == 0 ) {
nkeynes@265	154	for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
nkeynes@265	155	if( SH4_EVENT_PENDING() ) {
nkeynes@265	156	if( sh4r.event_types & PENDING_EVENT ) {
nkeynes@265	157	event_execute();
nkeynes@265	158	}
nkeynes@265	159	/* Eventq execute may (quite likely) deliver an immediate IRQ */
nkeynes@265	160	if( sh4r.event_types & PENDING_IRQ ) {
nkeynes@265	161	sh4_accept_interrupt();
nkeynes@265	162	}
nkeynes@265	163	}
nkeynes@235	164	if( !sh4_execute_instruction() ) {
nkeynes@43	165	break;
nkeynes@43	166	}
nkeynes@43	167	}
nkeynes@235	168	} else {
nkeynes@265	169	for( ;sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
nkeynes@265	170	if( SH4_EVENT_PENDING() ) {
nkeynes@265	171	if( sh4r.event_types & PENDING_EVENT ) {
nkeynes@265	172	event_execute();
nkeynes@265	173	}
nkeynes@265	174	/* Eventq execute may (quite likely) deliver an immediate IRQ */
nkeynes@265	175	if( sh4r.event_types & PENDING_IRQ ) {
nkeynes@265	176	sh4_accept_interrupt();
nkeynes@265	177	}
nkeynes@265	178	}
nkeynes@265	179
nkeynes@235	180	if( !sh4_execute_instruction() )
nkeynes@235	181	break;
nkeynes@235	182	#ifdef ENABLE_DEBUG_MODE
nkeynes@235	183	for( i=0; i<sh4_breakpoint_count; i++ ) {
nkeynes@235	184	if( sh4_breakpoints[i].address == sh4r.pc ) {
nkeynes@235	185	break;
nkeynes@235	186	}
nkeynes@235	187	}
nkeynes@235	188	if( i != sh4_breakpoint_count ) {
nkeynes@235	189	dreamcast_stop();
nkeynes@235	190	if( sh4_breakpoints[i].type == BREAK_ONESHOT )
nkeynes@235	191	sh4_clear_breakpoint( sh4r.pc, BREAK_ONESHOT );
nkeynes@235	192	break;
nkeynes@235	193	}
nkeynes@235	194	#endif
nkeynes@43	195	}
nkeynes@27	196	}
nkeynes@30	197
nkeynes@30	198	/* If we aborted early, but the cpu is still technically running,
nkeynes@30	199	* we're doing a hard abort - cut the timeslice back to what we
nkeynes@30	200	* actually executed
nkeynes@30	201	*/
nkeynes@53	202	if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
nkeynes@53	203	nanosecs = sh4r.slice_cycle;
nkeynes@27	204	}
nkeynes@27	205	if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
nkeynes@30	206	TMU_run_slice( nanosecs );
nkeynes@30	207	SCIF_run_slice( nanosecs );
nkeynes@27	208	}
nkeynes@30	209	return nanosecs;
nkeynes@1	210	}
nkeynes@1	211
nkeynes@1	212	void sh4_stop(void)
nkeynes@1	213	{
nkeynes@27	214
nkeynes@1	215	}
nkeynes@1	216
nkeynes@23	217	void sh4_save_state( FILE *f )
nkeynes@16	218	{
nkeynes@16	219	fwrite( &sh4r, sizeof(sh4r), 1, f );
nkeynes@312	220	MMU_save_state( f );
nkeynes@157	221	INTC_save_state( f );
nkeynes@53	222	TMU_save_state( f );
nkeynes@23	223	SCIF_save_state( f );
nkeynes@16	224	}
nkeynes@16	225
nkeynes@23	226	int sh4_load_state( FILE * f )
nkeynes@16	227	{
nkeynes@18	228	fread( &sh4r, sizeof(sh4r), 1, f );
nkeynes@312	229	MMU_load_state( f );
nkeynes@157	230	INTC_load_state( f );
nkeynes@53	231	TMU_load_state( f );
nkeynes@23	232	return SCIF_load_state( f );
nkeynes@16	233	}
nkeynes@16	234
nkeynes@23	235	/******************** SH4 emulation core **************************/
nkeynes@23	236
nkeynes@23	237	void sh4_set_pc( int pc )
nkeynes@23	238	{
nkeynes@23	239	sh4r.pc = pc;
nkeynes@23	240	sh4r.new_pc = pc+2;
nkeynes@23	241	}
nkeynes@23	242
nkeynes@246	243	#define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
nkeynes@27	244	#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); dreamcast_stop(); return FALSE; }while(0)
nkeynes@1	245
nkeynes@157	246	#if(SH4_CALLTRACE == 1)
nkeynes@157	247	#define MAX_CALLSTACK 32
nkeynes@157	248	static struct call_stack {
nkeynes@157	249	sh4addr_t call_addr;
nkeynes@157	250	sh4addr_t target_addr;
nkeynes@157	251	sh4addr_t stack_pointer;
nkeynes@157	252	} call_stack[MAX_CALLSTACK];
nkeynes@157	253
nkeynes@157	254	static int call_stack_depth = 0;
nkeynes@157	255	int sh4_call_trace_on = 0;
nkeynes@157	256
nkeynes@157	257	static inline trace_call( sh4addr_t source, sh4addr_t dest )
nkeynes@157	258	{
nkeynes@157	259	if( call_stack_depth < MAX_CALLSTACK ) {
nkeynes@157	260	call_stack[call_stack_depth].call_addr = source;
nkeynes@157	261	call_stack[call_stack_depth].target_addr = dest;
nkeynes@157	262	call_stack[call_stack_depth].stack_pointer = sh4r.r[15];
nkeynes@157	263	}
nkeynes@157	264	call_stack_depth++;
nkeynes@157	265	}
nkeynes@157	266
nkeynes@157	267	static inline trace_return( sh4addr_t source, sh4addr_t dest )
nkeynes@157	268	{
nkeynes@157	269	if( call_stack_depth > 0 ) {
nkeynes@157	270	call_stack_depth--;
nkeynes@157	271	}
nkeynes@157	272	}
nkeynes@157	273
nkeynes@157	274	void fprint_stack_trace( FILE *f )
nkeynes@157	275	{
nkeynes@157	276	int i = call_stack_depth -1;
nkeynes@157	277	if( i >= MAX_CALLSTACK )
nkeynes@157	278	i = MAX_CALLSTACK - 1;
nkeynes@157	279	for( ; i >= 0; i-- ) {
nkeynes@157	280	fprintf( f, "%d. Call from %08X => %08X, SP=%08X\n",
nkeynes@157	281	(call_stack_depth - i), call_stack[i].call_addr,
nkeynes@157	282	call_stack[i].target_addr, call_stack[i].stack_pointer );
nkeynes@157	283	}
nkeynes@157	284	}
nkeynes@157	285
nkeynes@157	286	#define TRACE_CALL( source, dest ) trace_call(source, dest)
nkeynes@157	287	#define TRACE_RETURN( source, dest ) trace_return(source, dest)
nkeynes@157	288	#else
nkeynes@157	289	#define TRACE_CALL( dest, rts )
nkeynes@157	290	#define TRACE_RETURN( source, dest )
nkeynes@157	291	#endif
nkeynes@157	292
nkeynes@246	293	#define RAISE( x, v ) do{ \
nkeynes@1	294	if( sh4r.vbr == 0 ) { \
nkeynes@1	295	ERROR( "%08X: VBR not initialized while raising exception %03X, halting", sh4r.pc, x ); \
nkeynes@104	296	dreamcast_stop(); return FALSE; \
nkeynes@1	297	} else { \
nkeynes@246	298	sh4r.spc = sh4r.pc; \
nkeynes@1	299	sh4r.ssr = sh4_read_sr(); \
nkeynes@1	300	sh4r.sgr = sh4r.r[15]; \
nkeynes@1	301	MMIO_WRITE(MMU,EXPEVT,x); \
nkeynes@1	302	sh4r.pc = sh4r.vbr + v; \
nkeynes@1	303	sh4r.new_pc = sh4r.pc + 2; \
nkeynes@1	304	sh4_load_sr( sh4r.ssr \|SR_MD\|SR_BL\|SR_RB ); \
nkeynes@246	305	if( sh4r.in_delay_slot ) { \
nkeynes@246	306	sh4r.in_delay_slot = 0; \
nkeynes@246	307	sh4r.spc -= 2; \
nkeynes@246	308	} \
nkeynes@1	309	} \
nkeynes@27	310	return TRUE; } while(0)
nkeynes@229	311
nkeynes@10	312	#define MEM_READ_BYTE( addr ) sh4_read_byte(addr)
nkeynes@10	313	#define MEM_READ_WORD( addr ) sh4_read_word(addr)
nkeynes@10	314	#define MEM_READ_LONG( addr ) sh4_read_long(addr)
nkeynes@10	315	#define MEM_WRITE_BYTE( addr, val ) sh4_write_byte(addr, val)
nkeynes@10	316	#define MEM_WRITE_WORD( addr, val ) sh4_write_word(addr, val)
nkeynes@10	317	#define MEM_WRITE_LONG( addr, val ) sh4_write_long(addr, val)
nkeynes@1	318
nkeynes@1	319	#define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
nkeynes@1	320
nkeynes@124	321	#define MEM_FP_READ( addr, reg ) sh4_read_float( addr, reg );
nkeynes@124	322	#define MEM_FP_WRITE( addr, reg ) sh4_write_float( addr, reg );
nkeynes@84	323
nkeynes@246	324	#define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL )
nkeynes@246	325	#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_READ_ADDR_ERR )
nkeynes@246	326	#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_READ_ADDR_ERR )
nkeynes@246	327	#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_WRITE_ADDR_ERR )
nkeynes@246	328	#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_WRITE_ADDR_ERR )
nkeynes@208	329
nkeynes@359	330	#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPDISABLE, EXC_SLOT_FPDISABLE ); } }
nkeynes@84	331	#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
nkeynes@246	332	#define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
nkeynes@1	333
nkeynes@1	334	static void sh4_switch_banks( )
nkeynes@1	335	{
nkeynes@1	336	uint32_t tmp[8];
nkeynes@1	337
nkeynes@1	338	memcpy( tmp, sh4r.r, sizeof(uint32_t)*8 );
nkeynes@1	339	memcpy( sh4r.r, sh4r.r_bank, sizeof(uint32_t)*8 );
nkeynes@1	340	memcpy( sh4r.r_bank, tmp, sizeof(uint32_t)*8 );
nkeynes@1	341	}
nkeynes@1	342
nkeynes@1	343	static void sh4_load_sr( uint32_t newval )
nkeynes@1	344	{
nkeynes@1	345	if( (newval ^ sh4r.sr) & SR_RB )
nkeynes@1	346	sh4_switch_banks();
nkeynes@1	347	sh4r.sr = newval;
nkeynes@1	348	sh4r.t = (newval&SR_T) ? 1 : 0;
nkeynes@1	349	sh4r.s = (newval&SR_S) ? 1 : 0;
nkeynes@1	350	sh4r.m = (newval&SR_M) ? 1 : 0;
nkeynes@1	351	sh4r.q = (newval&SR_Q) ? 1 : 0;
nkeynes@1	352	intc_mask_changed();
nkeynes@1	353	}
nkeynes@1	354
nkeynes@124	355	static void sh4_write_float( uint32_t addr, int reg )
nkeynes@124	356	{
nkeynes@124	357	if( IS_FPU_DOUBLESIZE() ) {
nkeynes@124	358	if( reg & 1 ) {
nkeynes@124	359	sh4_write_long( addr, ((uint32_t )&XF((reg)&0x0E)) );
nkeynes@124	360	sh4_write_long( addr+4, ((uint32_t )&XF(reg)) );
nkeynes@124	361	} else {
nkeynes@124	362	sh4_write_long( addr, ((uint32_t )&FR(reg)) );
nkeynes@124	363	sh4_write_long( addr+4, ((uint32_t )&FR((reg)\|0x01)) );
nkeynes@124	364	}
nkeynes@124	365	} else {
nkeynes@124	366	sh4_write_long( addr, ((uint32_t )&FR((reg))) );
nkeynes@124	367	}
nkeynes@124	368	}
nkeynes@124	369
nkeynes@124	370	static void sh4_read_float( uint32_t addr, int reg )
nkeynes@124	371	{
nkeynes@124	372	if( IS_FPU_DOUBLESIZE() ) {
nkeynes@124	373	if( reg & 1 ) {
nkeynes@124	374	((uint32_t )&XF((reg) & 0x0E)) = sh4_read_long(addr);
nkeynes@124	375	((uint32_t )&XF(reg)) = sh4_read_long(addr+4);
nkeynes@124	376	} else {
nkeynes@124	377	((uint32_t )&FR(reg)) = sh4_read_long(addr);
nkeynes@124	378	((uint32_t )&FR((reg) \| 0x01)) = sh4_read_long(addr+4);
nkeynes@124	379	}
nkeynes@124	380	} else {
nkeynes@124	381	((uint32_t )&FR(reg)) = sh4_read_long(addr);
nkeynes@124	382	}
nkeynes@124	383	}
nkeynes@124	384
nkeynes@1	385	static uint32_t sh4_read_sr( void )
nkeynes@1	386	{
nkeynes@1	387	/* synchronize sh4r.sr with the various bitflags */
nkeynes@1	388	sh4r.sr &= SR_MQSTMASK;
nkeynes@1	389	if( sh4r.t ) sh4r.sr \|= SR_T;
nkeynes@1	390	if( sh4r.s ) sh4r.sr \|= SR_S;
nkeynes@1	391	if( sh4r.m ) sh4r.sr \|= SR_M;
nkeynes@1	392	if( sh4r.q ) sh4r.sr \|= SR_Q;
nkeynes@1	393	return sh4r.sr;
nkeynes@1	394	}
nkeynes@246	395
nkeynes@246	396	/**
nkeynes@246	397	* Raise a general CPU exception for the specified exception code.
nkeynes@246	398	* (NOT for TRAPA or TLB exceptions)
nkeynes@246	399	*/
nkeynes@246	400	gboolean sh4_raise_exception( int code )
nkeynes@1	401	{
nkeynes@246	402	RAISE( code, EXV_EXCEPTION );
nkeynes@246	403	}
nkeynes@246	404
nkeynes@246	405	gboolean sh4_raise_slot_exception( int normal_code, int slot_code ) {
nkeynes@246	406	if( sh4r.in_delay_slot ) {
nkeynes@246	407	return sh4_raise_exception(slot_code);
nkeynes@246	408	} else {
nkeynes@246	409	return sh4_raise_exception(normal_code);
nkeynes@246	410	}
nkeynes@246	411	}
nkeynes@246	412
nkeynes@246	413	gboolean sh4_raise_tlb_exception( int code )
nkeynes@246	414	{
nkeynes@246	415	RAISE( code, EXV_TLBMISS );
nkeynes@1	416	}
nkeynes@1	417
nkeynes@359	418	void sh4_accept_interrupt( void )
nkeynes@1	419	{
nkeynes@1	420	uint32_t code = intc_accept_interrupt();
nkeynes@1	421	sh4r.ssr = sh4_read_sr();
nkeynes@1	422	sh4r.spc = sh4r.pc;
nkeynes@1	423	sh4r.sgr = sh4r.r[15];
nkeynes@1	424	sh4_load_sr( sh4r.ssr\|SR_BL\|SR_MD\|SR_RB );
nkeynes@1	425	MMIO_WRITE( MMU, INTEVT, code );
nkeynes@1	426	sh4r.pc = sh4r.vbr + 0x600;
nkeynes@1	427	sh4r.new_pc = sh4r.pc + 2;
nkeynes@92	428	// WARN( "Accepting interrupt %03X, from %08X => %08X", code, sh4r.spc, sh4r.pc );
nkeynes@1	429	}
nkeynes@1	430
nkeynes@27	431	gboolean sh4_execute_instruction( void )
nkeynes@1	432	{
nkeynes@84	433	uint32_t pc;
nkeynes@2	434	unsigned short ir;
nkeynes@1	435	uint32_t tmp;
nkeynes@123	436	float ftmp;
nkeynes@123	437	double dtmp;
nkeynes@1	438
nkeynes@1	439	#define R0 sh4r.r[0]
nkeynes@2	440	pc = sh4r.pc;
nkeynes@84	441	if( pc > 0xFFFFFF00 ) {
nkeynes@84	442	/* SYSCALL Magic */
nkeynes@102	443	syscall_invoke( pc );
nkeynes@104	444	sh4r.in_delay_slot = 0;
nkeynes@84	445	pc = sh4r.pc = sh4r.pr;
nkeynes@84	446	sh4r.new_pc = sh4r.pc + 2;
nkeynes@84	447	}
nkeynes@208	448	CHECKRALIGN16(pc);
nkeynes@235	449
nkeynes@235	450	/* Read instruction */
nkeynes@235	451	uint32_t pageaddr = pc >> 12;
nkeynes@235	452	if( sh4_icache != NULL && pageaddr == sh4_icache_addr ) {
nkeynes@235	453	ir = sh4_icache[(pc&0xFFF)>>1];
nkeynes@235	454	} else {
nkeynes@235	455	sh4_icache = (uint16_t *)mem_get_page(pc);
nkeynes@235	456	if( ((uint32_t)sh4_icache) < MAX_IO_REGIONS ) {
nkeynes@235	457	/* If someone's actually been so daft as to try to execute out of an IO
nkeynes@235	458	* region, fallback on the full-blown memory read
nkeynes@235	459	*/
nkeynes@235	460	sh4_icache = NULL;
nkeynes@235	461	ir = MEM_READ_WORD(pc);
nkeynes@235	462	} else {
nkeynes@235	463	sh4_icache_addr = pageaddr;
nkeynes@235	464	ir = sh4_icache[(pc&0xFFF)>>1];
nkeynes@235	465	}
nkeynes@235	466	}
nkeynes@359	467	switch( (ir&0xF000) >> 12 ) {
nkeynes@359	468	case 0x0:
nkeynes@359	469	switch( ir&0xF ) {
nkeynes@359	470	case 0x2:
nkeynes@359	471	switch( (ir&0x80) >> 7 ) {
nkeynes@359	472	case 0x0:
nkeynes@359	473	switch( (ir&0x70) >> 4 ) {
nkeynes@359	474	case 0x0:
nkeynes@359	475	{ /* STC SR, Rn */
nkeynes@359	476	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	477	CHECKPRIV();
nkeynes@359	478	sh4r.r[Rn] = sh4_read_sr();
nkeynes@359	479	}
nkeynes@359	480	break;
nkeynes@359	481	case 0x1:
nkeynes@359	482	{ /* STC GBR, Rn */
nkeynes@359	483	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	484	CHECKPRIV();
nkeynes@359	485	sh4r.r[Rn] = sh4r.gbr;
nkeynes@359	486	}
nkeynes@359	487	break;
nkeynes@359	488	case 0x2:
nkeynes@359	489	{ /* STC VBR, Rn */
nkeynes@359	490	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	491	CHECKPRIV();
nkeynes@359	492	sh4r.r[Rn] = sh4r.vbr;
nkeynes@359	493	}
nkeynes@359	494	break;
nkeynes@359	495	case 0x3:
nkeynes@359	496	{ /* STC SSR, Rn */
nkeynes@359	497	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	498	CHECKPRIV();
nkeynes@359	499	sh4r.r[Rn] = sh4r.ssr;
nkeynes@359	500	}
nkeynes@359	501	break;
nkeynes@359	502	case 0x4:
nkeynes@359	503	{ /* STC SPC, Rn */
nkeynes@359	504	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	505	CHECKPRIV();
nkeynes@359	506	sh4r.r[Rn] = sh4r.spc;
nkeynes@359	507	}
nkeynes@359	508	break;
nkeynes@359	509	default:
nkeynes@359	510	UNDEF();
nkeynes@359	511	break;
nkeynes@359	512	}
nkeynes@359	513	break;
nkeynes@359	514	case 0x1:
nkeynes@359	515	{ /* STC Rm_BANK, Rn */
nkeynes@359	516	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
nkeynes@359	517	CHECKPRIV();
nkeynes@359	518	sh4r.r[Rn] = sh4r.r_bank[Rm_BANK];
nkeynes@359	519	}
nkeynes@359	520	break;
nkeynes@359	521	}
nkeynes@359	522	break;
nkeynes@359	523	case 0x3:
nkeynes@359	524	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	525	case 0x0:
nkeynes@359	526	{ /* BSRF Rn */
nkeynes@359	527	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	528	CHECKSLOTILLEGAL();
nkeynes@359	529	CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359	530	sh4r.in_delay_slot = 1;
nkeynes@359	531	sh4r.pr = sh4r.pc + 4;
nkeynes@359	532	sh4r.pc = sh4r.new_pc;
nkeynes@359	533	sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359	534	TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359	535	return TRUE;
nkeynes@359	536	}
nkeynes@359	537	break;
nkeynes@359	538	case 0x2:
nkeynes@359	539	{ /* BRAF Rn */
nkeynes@359	540	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	541	CHECKSLOTILLEGAL();
nkeynes@359	542	CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359	543	sh4r.in_delay_slot = 1;
nkeynes@359	544	sh4r.pc = sh4r.new_pc;
nkeynes@359	545	sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359	546	return TRUE;
nkeynes@359	547	}
nkeynes@359	548	break;
nkeynes@359	549	case 0x8:
nkeynes@359	550	{ /* PREF @Rn */
nkeynes@359	551	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	552	tmp = sh4r.r[Rn];
nkeynes@359	553	if( (tmp & 0xFC000000) == 0xE0000000 ) {
nkeynes@359	554	/* Store queue operation */
nkeynes@359	555	int queue = (tmp&0x20)>>2;
nkeynes@359	556	int32_t *src = &sh4r.store_queue[queue];
nkeynes@359	557	uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
nkeynes@359	558	uint32_t target = tmp&0x03FFFFE0 \| hi;
nkeynes@359	559	mem_copy_to_sh4( target, src, 32 );
nkeynes@359	560	}
nkeynes@359	561	}
nkeynes@359	562	break;
nkeynes@359	563	case 0x9:
nkeynes@359	564	{ /* OCBI @Rn */
nkeynes@359	565	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	566	}
nkeynes@359	567	break;
nkeynes@359	568	case 0xA:
nkeynes@359	569	{ /* OCBP @Rn */
nkeynes@359	570	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	571	}
nkeynes@359	572	break;
nkeynes@359	573	case 0xB:
nkeynes@359	574	{ /* OCBWB @Rn */
nkeynes@359	575	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	576	}
nkeynes@359	577	break;
nkeynes@359	578	case 0xC:
nkeynes@359	579	{ /* MOVCA.L R0, @Rn */
nkeynes@359	580	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	581	tmp = sh4r.r[Rn];
nkeynes@359	582	CHECKWALIGN32(tmp);
nkeynes@359	583	MEM_WRITE_LONG( tmp, R0 );
nkeynes@359	584	}
nkeynes@359	585	break;
nkeynes@359	586	default:
nkeynes@359	587	UNDEF();
nkeynes@359	588	break;
nkeynes@359	589	}
nkeynes@359	590	break;
nkeynes@359	591	case 0x4:
nkeynes@359	592	{ /* MOV.B Rm, @(R0, Rn) */
nkeynes@359	593	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	594	MEM_WRITE_BYTE( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	595	}
nkeynes@359	596	break;
nkeynes@359	597	case 0x5:
nkeynes@359	598	{ /* MOV.W Rm, @(R0, Rn) */
nkeynes@359	599	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	600	CHECKWALIGN16( R0 + sh4r.r[Rn] );
nkeynes@359	601	MEM_WRITE_WORD( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	602	}
nkeynes@359	603	break;
nkeynes@359	604	case 0x6:
nkeynes@359	605	{ /* MOV.L Rm, @(R0, Rn) */
nkeynes@359	606	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	607	CHECKWALIGN32( R0 + sh4r.r[Rn] );
nkeynes@359	608	MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	609	}
nkeynes@359	610	break;
nkeynes@359	611	case 0x7:
nkeynes@359	612	{ /* MUL.L Rm, Rn */
nkeynes@359	613	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	614	sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) \|
nkeynes@359	615	(sh4r.r[Rm] * sh4r.r[Rn]);
nkeynes@359	616	}
nkeynes@359	617	break;
nkeynes@359	618	case 0x8:
nkeynes@359	619	switch( (ir&0xFF0) >> 4 ) {
nkeynes@359	620	case 0x0:
nkeynes@359	621	{ /* CLRT */
nkeynes@359	622	sh4r.t = 0;
nkeynes@359	623	}
nkeynes@359	624	break;
nkeynes@359	625	case 0x1:
nkeynes@359	626	{ /* SETT */
nkeynes@359	627	sh4r.t = 1;
nkeynes@359	628	}
nkeynes@359	629	break;
nkeynes@359	630	case 0x2:
nkeynes@359	631	{ /* CLRMAC */
nkeynes@359	632	sh4r.mac = 0;
nkeynes@359	633	}
nkeynes@359	634	break;
nkeynes@359	635	case 0x3:
nkeynes@359	636	{ /* LDTLB */
nkeynes@359	637	/* TODO */
nkeynes@359	638	}
nkeynes@359	639	break;
nkeynes@359	640	case 0x4:
nkeynes@359	641	{ /* CLRS */
nkeynes@359	642	sh4r.s = 0;
nkeynes@359	643	}
nkeynes@359	644	break;
nkeynes@359	645	case 0x5:
nkeynes@359	646	{ /* SETS */
nkeynes@359	647	sh4r.s = 1;
nkeynes@359	648	}
nkeynes@359	649	break;
nkeynes@359	650	default:
nkeynes@359	651	UNDEF();
nkeynes@359	652	break;
nkeynes@359	653	}
nkeynes@359	654	break;
nkeynes@359	655	case 0x9:
nkeynes@359	656	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	657	case 0x0:
nkeynes@359	658	{ /* NOP */
nkeynes@359	659	/* NOP */
nkeynes@359	660	}
nkeynes@359	661	break;
nkeynes@359	662	case 0x1:
nkeynes@359	663	{ /* DIV0U */
nkeynes@359	664	sh4r.m = sh4r.q = sh4r.t = 0;
nkeynes@359	665	}
nkeynes@359	666	break;
nkeynes@359	667	case 0x2:
nkeynes@359	668	{ /* MOVT Rn */
nkeynes@359	669	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	670	sh4r.r[Rn] = sh4r.t;
nkeynes@359	671	}
nkeynes@359	672	break;
nkeynes@359	673	default:
nkeynes@359	674	UNDEF();
nkeynes@359	675	break;
nkeynes@359	676	}
nkeynes@359	677	break;
nkeynes@359	678	case 0xA:
nkeynes@359	679	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	680	case 0x0:
nkeynes@359	681	{ /* STS MACH, Rn */
nkeynes@359	682	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	683	sh4r.r[Rn] = (sh4r.mac>>32);
nkeynes@359	684	}
nkeynes@359	685	break;
nkeynes@359	686	case 0x1:
nkeynes@359	687	{ /* STS MACL, Rn */
nkeynes@359	688	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	689	sh4r.r[Rn] = (uint32_t)sh4r.mac;
nkeynes@359	690	}
nkeynes@359	691	break;
nkeynes@359	692	case 0x2:
nkeynes@359	693	{ /* STS PR, Rn */
nkeynes@359	694	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	695	sh4r.r[Rn] = sh4r.pr;
nkeynes@359	696	}
nkeynes@359	697	break;
nkeynes@359	698	case 0x3:
nkeynes@359	699	{ /* STC SGR, Rn */
nkeynes@359	700	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	701	CHECKPRIV();
nkeynes@359	702	sh4r.r[Rn] = sh4r.sgr;
nkeynes@359	703	}
nkeynes@359	704	break;
nkeynes@359	705	case 0x5:
nkeynes@359	706	{ /* STS FPUL, Rn */
nkeynes@359	707	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	708	sh4r.r[Rn] = sh4r.fpul;
nkeynes@359	709	}
nkeynes@359	710	break;
nkeynes@359	711	case 0x6:
nkeynes@359	712	{ /* STS FPSCR, Rn */
nkeynes@359	713	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	714	sh4r.r[Rn] = sh4r.fpscr;
nkeynes@359	715	}
nkeynes@359	716	break;
nkeynes@359	717	case 0xF:
nkeynes@359	718	{ /* STC DBR, Rn */
nkeynes@359	719	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	720	CHECKPRIV(); sh4r.r[Rn] = sh4r.dbr;
nkeynes@359	721	}
nkeynes@359	722	break;
nkeynes@359	723	default:
nkeynes@359	724	UNDEF();
nkeynes@359	725	break;
nkeynes@359	726	}
nkeynes@359	727	break;
nkeynes@359	728	case 0xB:
nkeynes@359	729	switch( (ir&0xFF0) >> 4 ) {
nkeynes@359	730	case 0x0:
nkeynes@359	731	{ /* RTS */
nkeynes@359	732	CHECKSLOTILLEGAL();
nkeynes@359	733	CHECKDEST( sh4r.pr );
nkeynes@359	734	sh4r.in_delay_slot = 1;
nkeynes@359	735	sh4r.pc = sh4r.new_pc;
nkeynes@359	736	sh4r.new_pc = sh4r.pr;
nkeynes@359	737	TRACE_RETURN( pc, sh4r.new_pc );
nkeynes@359	738	return TRUE;
nkeynes@359	739	}
nkeynes@359	740	break;
nkeynes@359	741	case 0x1:
nkeynes@359	742	{ /* SLEEP */
nkeynes@359	743	if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
nkeynes@359	744	sh4r.sh4_state = SH4_STATE_STANDBY;
nkeynes@359	745	} else {
nkeynes@359	746	sh4r.sh4_state = SH4_STATE_SLEEP;
nkeynes@359	747	}
nkeynes@359	748	return FALSE; /* Halt CPU */
nkeynes@359	749	}
nkeynes@359	750	break;
nkeynes@359	751	case 0x2:
nkeynes@359	752	{ /* RTE */
nkeynes@359	753	CHECKPRIV();
nkeynes@359	754	CHECKDEST( sh4r.spc );
nkeynes@359	755	CHECKSLOTILLEGAL();
nkeynes@359	756	sh4r.in_delay_slot = 1;
nkeynes@359	757	sh4r.pc = sh4r.new_pc;
nkeynes@359	758	sh4r.new_pc = sh4r.spc;
nkeynes@359	759	sh4_load_sr( sh4r.ssr );
nkeynes@359	760	return TRUE;
nkeynes@359	761	}
nkeynes@359	762	break;
nkeynes@359	763	default:
nkeynes@359	764	UNDEF();
nkeynes@359	765	break;
nkeynes@359	766	}
nkeynes@359	767	break;
nkeynes@359	768	case 0xC:
nkeynes@359	769	{ /* MOV.B @(R0, Rm), Rn */
nkeynes@359	770	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	771	sh4r.r[Rn] = MEM_READ_BYTE( R0 + sh4r.r[Rm] );
nkeynes@359	772	}
nkeynes@359	773	break;
nkeynes@359	774	case 0xD:
nkeynes@359	775	{ /* MOV.W @(R0, Rm), Rn */
nkeynes@359	776	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	777	CHECKRALIGN16( R0 + sh4r.r[Rm] );
nkeynes@359	778	sh4r.r[Rn] = MEM_READ_WORD( R0 + sh4r.r[Rm] );
nkeynes@359	779	}
nkeynes@359	780	break;
nkeynes@359	781	case 0xE:
nkeynes@359	782	{ /* MOV.L @(R0, Rm), Rn */
nkeynes@359	783	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	784	CHECKRALIGN32( R0 + sh4r.r[Rm] );
nkeynes@359	785	sh4r.r[Rn] = MEM_READ_LONG( R0 + sh4r.r[Rm] );
nkeynes@359	786	}
nkeynes@359	787	break;
nkeynes@359	788	case 0xF:
nkeynes@359	789	{ /* MAC.L @Rm+, @Rn+ */
nkeynes@359	790	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	791	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	792	CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@359	793	int64_t tmpl = SIGNEXT32(MEM_READ_LONG(sh4r.r[Rn]));
nkeynes@359	794	sh4r.r[Rn] += 4;
nkeynes@359	795	tmpl = tmpl * SIGNEXT32(MEM_READ_LONG(sh4r.r[Rm])) + sh4r.mac;
nkeynes@359	796	sh4r.r[Rm] += 4;
nkeynes@359	797	if( sh4r.s ) {
nkeynes@359	798	/* 48-bit Saturation. Yuch */
nkeynes@359	799	if( tmpl < (int64_t)0xFFFF800000000000LL )
nkeynes@359	800	tmpl = 0xFFFF800000000000LL;
nkeynes@359	801	else if( tmpl > (int64_t)0x00007FFFFFFFFFFFLL )
nkeynes@359	802	tmpl = 0x00007FFFFFFFFFFFLL;
nkeynes@359	803	}
nkeynes@359	804	sh4r.mac = tmpl;
nkeynes@359	805	}
nkeynes@359	806	break;
nkeynes@359	807	default:
nkeynes@359	808	UNDEF();
nkeynes@359	809	break;
nkeynes@359	810	}
nkeynes@359	811	break;
nkeynes@359	812	case 0x1:
nkeynes@359	813	{ /* MOV.L Rm, @(disp, Rn) */
nkeynes@359	814	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
nkeynes@359	815	tmp = sh4r.r[Rn] + disp;
nkeynes@359	816	CHECKWALIGN32( tmp );
nkeynes@359	817	MEM_WRITE_LONG( tmp, sh4r.r[Rm] );
nkeynes@359	818	}
nkeynes@359	819	break;
nkeynes@359	820	case 0x2:
nkeynes@359	821	switch( ir&0xF ) {
nkeynes@359	822	case 0x0:
nkeynes@359	823	{ /* MOV.B Rm, @Rn */
nkeynes@359	824	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	825	MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	826	}
nkeynes@359	827	break;
nkeynes@359	828	case 0x1:
nkeynes@359	829	{ /* MOV.W Rm, @Rn */
nkeynes@359	830	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	831	CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	832	}
nkeynes@359	833	break;
nkeynes@359	834	case 0x2:
nkeynes@359	835	{ /* MOV.L Rm, @Rn */
nkeynes@359	836	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	837	CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	838	}
nkeynes@359	839	break;
nkeynes@359	840	case 0x4:
nkeynes@359	841	{ /* MOV.B Rm, @-Rn */
nkeynes@359	842	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	843	sh4r.r[Rn] --; MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	844	}
nkeynes@359	845	break;
nkeynes@359	846	case 0x5:
nkeynes@359	847	{ /* MOV.W Rm, @-Rn */
nkeynes@359	848	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	849	sh4r.r[Rn] -= 2; CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	850	}
nkeynes@359	851	break;
nkeynes@359	852	case 0x6:
nkeynes@359	853	{ /* MOV.L Rm, @-Rn */
nkeynes@359	854	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	855	sh4r.r[Rn] -= 4; CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359	856	}
nkeynes@359	857	break;
nkeynes@359	858	case 0x7:
nkeynes@359	859	{ /* DIV0S Rm, Rn */
nkeynes@359	860	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	861	sh4r.q = sh4r.r[Rn]>>31;
nkeynes@359	862	sh4r.m = sh4r.r[Rm]>>31;
nkeynes@359	863	sh4r.t = sh4r.q ^ sh4r.m;
nkeynes@359	864	}
nkeynes@359	865	break;
nkeynes@359	866	case 0x8:
nkeynes@359	867	{ /* TST Rm, Rn */
nkeynes@359	868	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	869	sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1);
nkeynes@359	870	}
nkeynes@359	871	break;
nkeynes@359	872	case 0x9:
nkeynes@359	873	{ /* AND Rm, Rn */
nkeynes@359	874	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	875	sh4r.r[Rn] &= sh4r.r[Rm];
nkeynes@359	876	}
nkeynes@359	877	break;
nkeynes@359	878	case 0xA:
nkeynes@359	879	{ /* XOR Rm, Rn */
nkeynes@359	880	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	881	sh4r.r[Rn] ^= sh4r.r[Rm];
nkeynes@359	882	}
nkeynes@359	883	break;
nkeynes@359	884	case 0xB:
nkeynes@359	885	{ /* OR Rm, Rn */
nkeynes@359	886	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	887	sh4r.r[Rn] \|= sh4r.r[Rm];
nkeynes@359	888	}
nkeynes@359	889	break;
nkeynes@359	890	case 0xC:
nkeynes@359	891	{ /* CMP/STR Rm, Rn */
nkeynes@359	892	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	893	/* set T = 1 if any byte in RM & RN is the same */
nkeynes@359	894	tmp = sh4r.r[Rm] ^ sh4r.r[Rn];
nkeynes@359	895	sh4r.t = ((tmp&0x000000FF)==0 \|\| (tmp&0x0000FF00)==0 \|\|
nkeynes@359	896	(tmp&0x00FF0000)==0 \|\| (tmp&0xFF000000)==0)?1:0;
nkeynes@359	897	}
nkeynes@359	898	break;
nkeynes@359	899	case 0xD:
nkeynes@359	900	{ /* XTRCT Rm, Rn */
nkeynes@359	901	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	902	sh4r.r[Rn] = (sh4r.r[Rn]>>16) \| (sh4r.r[Rm]<<16);
nkeynes@359	903	}
nkeynes@359	904	break;
nkeynes@359	905	case 0xE:
nkeynes@359	906	{ /* MULU.W Rm, Rn */
nkeynes@359	907	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	908	sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) \|
nkeynes@359	909	(uint32_t)((sh4r.r[Rm]&0xFFFF) * (sh4r.r[Rn]&0xFFFF));
nkeynes@359	910	}
nkeynes@359	911	break;
nkeynes@359	912	case 0xF:
nkeynes@359	913	{ /* MULS.W Rm, Rn */
nkeynes@359	914	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	915	sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) \|
nkeynes@359	916	(uint32_t)(SIGNEXT32(sh4r.r[Rm]&0xFFFF) * SIGNEXT32(sh4r.r[Rn]&0xFFFF));
nkeynes@359	917	}
nkeynes@359	918	break;
nkeynes@359	919	default:
nkeynes@359	920	UNDEF();
nkeynes@359	921	break;
nkeynes@359	922	}
nkeynes@359	923	break;
nkeynes@359	924	case 0x3:
nkeynes@359	925	switch( ir&0xF ) {
nkeynes@359	926	case 0x0:
nkeynes@359	927	{ /* CMP/EQ Rm, Rn */
nkeynes@359	928	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	929	sh4r.t = ( sh4r.r[Rm] == sh4r.r[Rn] ? 1 : 0 );
nkeynes@359	930	}
nkeynes@359	931	break;
nkeynes@359	932	case 0x2:
nkeynes@359	933	{ /* CMP/HS Rm, Rn */
nkeynes@359	934	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	935	sh4r.t = ( sh4r.r[Rn] >= sh4r.r[Rm] ? 1 : 0 );
nkeynes@359	936	}
nkeynes@359	937	break;
nkeynes@359	938	case 0x3:
nkeynes@359	939	{ /* CMP/GE Rm, Rn */
nkeynes@359	940	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	941	sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= ((int32_t)sh4r.r[Rm]) ? 1 : 0 );
nkeynes@359	942	}
nkeynes@359	943	break;
nkeynes@359	944	case 0x4:
nkeynes@359	945	{ /* DIV1 Rm, Rn */
nkeynes@359	946	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	947	/* This is just from the sh4p manual with some
nkeynes@359	948	* simplifications (someone want to check it's correct? :)
nkeynes@359	949	* Why they couldn't just provide a real DIV instruction...
nkeynes@359	950	*/
nkeynes@359	951	uint32_t tmp0, tmp1, tmp2, dir;
nkeynes@359	952
nkeynes@359	953	dir = sh4r.q ^ sh4r.m;
nkeynes@359	954	sh4r.q = (sh4r.r[Rn] >> 31);
nkeynes@359	955	tmp2 = sh4r.r[Rm];
nkeynes@359	956	sh4r.r[Rn] = (sh4r.r[Rn] << 1) \| sh4r.t;
nkeynes@359	957	tmp0 = sh4r.r[Rn];
nkeynes@359	958	if( dir ) {
nkeynes@359	959	sh4r.r[Rn] += tmp2;
nkeynes@359	960	tmp1 = (sh4r.r[Rn]<tmp0 ? 1 : 0 );
nkeynes@359	961	} else {
nkeynes@359	962	sh4r.r[Rn] -= tmp2;
nkeynes@359	963	tmp1 = (sh4r.r[Rn]>tmp0 ? 1 : 0 );
nkeynes@359	964	}
nkeynes@359	965	sh4r.q ^= sh4r.m ^ tmp1;
nkeynes@359	966	sh4r.t = ( sh4r.q == sh4r.m ? 1 : 0 );
nkeynes@359	967	}
nkeynes@359	968	break;
nkeynes@359	969	case 0x5:
nkeynes@359	970	{ /* DMULU.L Rm, Rn */
nkeynes@359	971	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	972	sh4r.mac = ((uint64_t)sh4r.r[Rm]) * ((uint64_t)sh4r.r[Rn]);
nkeynes@359	973	}
nkeynes@359	974	break;
nkeynes@359	975	case 0x6:
nkeynes@359	976	{ /* CMP/HI Rm, Rn */
nkeynes@359	977	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	978	sh4r.t = ( sh4r.r[Rn] > sh4r.r[Rm] ? 1 : 0 );
nkeynes@359	979	}
nkeynes@359	980	break;
nkeynes@359	981	case 0x7:
nkeynes@359	982	{ /* CMP/GT Rm, Rn */
nkeynes@359	983	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	984	sh4r.t = ( ((int32_t)sh4r.r[Rn]) > ((int32_t)sh4r.r[Rm]) ? 1 : 0 );
nkeynes@359	985	}
nkeynes@359	986	break;
nkeynes@359	987	case 0x8:
nkeynes@359	988	{ /* SUB Rm, Rn */
nkeynes@359	989	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	990	sh4r.r[Rn] -= sh4r.r[Rm];
nkeynes@359	991	}
nkeynes@359	992	break;
nkeynes@359	993	case 0xA:
nkeynes@359	994	{ /* SUBC Rm, Rn */
nkeynes@359	995	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	996	tmp = sh4r.r[Rn];
nkeynes@359	997	sh4r.r[Rn] = sh4r.r[Rn] - sh4r.r[Rm] - sh4r.t;
nkeynes@359	998	sh4r.t = (sh4r.r[Rn] > tmp \|\| (sh4r.r[Rn] == tmp && sh4r.t == 1));
nkeynes@359	999	}
nkeynes@359	1000	break;
nkeynes@359	1001	case 0xB:
nkeynes@359	1002	UNIMP(ir); /* SUBV Rm, Rn */
nkeynes@359	1003	break;
nkeynes@359	1004	case 0xC:
nkeynes@359	1005	{ /* ADD Rm, Rn */
nkeynes@359	1006	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1007	sh4r.r[Rn] += sh4r.r[Rm];
nkeynes@359	1008	}
nkeynes@359	1009	break;
nkeynes@359	1010	case 0xD:
nkeynes@359	1011	{ /* DMULS.L Rm, Rn */
nkeynes@359	1012	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1013	sh4r.mac = SIGNEXT32(sh4r.r[Rm]) * SIGNEXT32(sh4r.r[Rn]);
nkeynes@359	1014	}
nkeynes@359	1015	break;
nkeynes@359	1016	case 0xE:
nkeynes@359	1017	{ /* ADDC Rm, Rn */
nkeynes@359	1018	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1019	tmp = sh4r.r[Rn];
nkeynes@359	1020	sh4r.r[Rn] += sh4r.r[Rm] + sh4r.t;
nkeynes@359	1021	sh4r.t = ( sh4r.r[Rn] < tmp \|\| (sh4r.r[Rn] == tmp && sh4r.t != 0) ? 1 : 0 );
nkeynes@359	1022	}
nkeynes@359	1023	break;
nkeynes@359	1024	case 0xF:
nkeynes@359	1025	{ /* ADDV Rm, Rn */
nkeynes@359	1026	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1027	tmp = sh4r.r[Rn] + sh4r.r[Rm];
nkeynes@359	1028	sh4r.t = ( (sh4r.r[Rn]>>31) == (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
nkeynes@359	1029	sh4r.r[Rn] = tmp;
nkeynes@359	1030	}
nkeynes@359	1031	break;
nkeynes@359	1032	default:
nkeynes@359	1033	UNDEF();
nkeynes@359	1034	break;
nkeynes@359	1035	}
nkeynes@359	1036	break;
nkeynes@359	1037	case 0x4:
nkeynes@359	1038	switch( ir&0xF ) {
nkeynes@359	1039	case 0x0:
nkeynes@359	1040	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1041	case 0x0:
nkeynes@359	1042	{ /* SHLL Rn */
nkeynes@359	1043	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1044	sh4r.t = sh4r.r[Rn] >> 31; sh4r.r[Rn] <<= 1;
nkeynes@359	1045	}
nkeynes@359	1046	break;
nkeynes@359	1047	case 0x1:
nkeynes@359	1048	{ /* DT Rn */
nkeynes@359	1049	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1050	sh4r.r[Rn] --;
nkeynes@359	1051	sh4r.t = ( sh4r.r[Rn] == 0 ? 1 : 0 );
nkeynes@359	1052	}
nkeynes@359	1053	break;
nkeynes@359	1054	case 0x2:
nkeynes@359	1055	{ /* SHAL Rn */
nkeynes@359	1056	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1057	sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359	1058	sh4r.r[Rn] <<= 1;
nkeynes@359	1059	}
nkeynes@359	1060	break;
nkeynes@359	1061	default:
nkeynes@359	1062	UNDEF();
nkeynes@359	1063	break;
nkeynes@359	1064	}
nkeynes@359	1065	break;
nkeynes@359	1066	case 0x1:
nkeynes@359	1067	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1068	case 0x0:
nkeynes@359	1069	{ /* SHLR Rn */
nkeynes@359	1070	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1071	sh4r.t = sh4r.r[Rn] & 0x00000001; sh4r.r[Rn] >>= 1;
nkeynes@359	1072	}
nkeynes@359	1073	break;
nkeynes@359	1074	case 0x1:
nkeynes@359	1075	{ /* CMP/PZ Rn */
nkeynes@359	1076	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1077	sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= 0 ? 1 : 0 );
nkeynes@359	1078	}
nkeynes@359	1079	break;
nkeynes@359	1080	case 0x2:
nkeynes@359	1081	{ /* SHAR Rn */
nkeynes@359	1082	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1083	sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359	1084	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 1;
nkeynes@359	1085	}
nkeynes@359	1086	break;
nkeynes@359	1087	default:
nkeynes@359	1088	UNDEF();
nkeynes@359	1089	break;
nkeynes@359	1090	}
nkeynes@359	1091	break;
nkeynes@359	1092	case 0x2:
nkeynes@359	1093	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1094	case 0x0:
nkeynes@359	1095	{ /* STS.L MACH, @-Rn */
nkeynes@359	1096	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1097	sh4r.r[Rn] -= 4;
nkeynes@359	1098	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1099	MEM_WRITE_LONG( sh4r.r[Rn], (sh4r.mac>>32) );
nkeynes@359	1100	}
nkeynes@359	1101	break;
nkeynes@359	1102	case 0x1:
nkeynes@359	1103	{ /* STS.L MACL, @-Rn */
nkeynes@359	1104	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1105	sh4r.r[Rn] -= 4;
nkeynes@359	1106	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1107	MEM_WRITE_LONG( sh4r.r[Rn], (uint32_t)sh4r.mac );
nkeynes@359	1108	}
nkeynes@359	1109	break;
nkeynes@359	1110	case 0x2:
nkeynes@359	1111	{ /* STS.L PR, @-Rn */
nkeynes@359	1112	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1113	sh4r.r[Rn] -= 4;
nkeynes@359	1114	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1115	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.pr );
nkeynes@359	1116	}
nkeynes@359	1117	break;
nkeynes@359	1118	case 0x3:
nkeynes@359	1119	{ /* STC.L SGR, @-Rn */
nkeynes@359	1120	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1121	CHECKPRIV();
nkeynes@359	1122	sh4r.r[Rn] -= 4;
nkeynes@359	1123	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1124	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.sgr );
nkeynes@359	1125	}
nkeynes@359	1126	break;
nkeynes@359	1127	case 0x5:
nkeynes@359	1128	{ /* STS.L FPUL, @-Rn */
nkeynes@359	1129	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1130	sh4r.r[Rn] -= 4;
nkeynes@359	1131	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1132	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpul );
nkeynes@359	1133	}
nkeynes@359	1134	break;
nkeynes@359	1135	case 0x6:
nkeynes@359	1136	{ /* STS.L FPSCR, @-Rn */
nkeynes@359	1137	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1138	sh4r.r[Rn] -= 4;
nkeynes@359	1139	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1140	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.fpscr );
nkeynes@359	1141	}
nkeynes@359	1142	break;
nkeynes@359	1143	case 0xF:
nkeynes@359	1144	{ /* STC.L DBR, @-Rn */
nkeynes@359	1145	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1146	CHECKPRIV();
nkeynes@359	1147	sh4r.r[Rn] -= 4;
nkeynes@359	1148	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1149	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.dbr );
nkeynes@359	1150	}
nkeynes@359	1151	break;
nkeynes@359	1152	default:
nkeynes@359	1153	UNDEF();
nkeynes@359	1154	break;
nkeynes@359	1155	}
nkeynes@359	1156	break;
nkeynes@359	1157	case 0x3:
nkeynes@359	1158	switch( (ir&0x80) >> 7 ) {
nkeynes@359	1159	case 0x0:
nkeynes@359	1160	switch( (ir&0x70) >> 4 ) {
nkeynes@359	1161	case 0x0:
nkeynes@359	1162	{ /* STC.L SR, @-Rn */
nkeynes@359	1163	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1164	CHECKPRIV();
nkeynes@359	1165	sh4r.r[Rn] -= 4;
nkeynes@359	1166	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1167	MEM_WRITE_LONG( sh4r.r[Rn], sh4_read_sr() );
nkeynes@359	1168	}
nkeynes@359	1169	break;
nkeynes@359	1170	case 0x1:
nkeynes@359	1171	{ /* STC.L GBR, @-Rn */
nkeynes@359	1172	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1173	sh4r.r[Rn] -= 4;
nkeynes@359	1174	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1175	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.gbr );
nkeynes@359	1176	}
nkeynes@359	1177	break;
nkeynes@359	1178	case 0x2:
nkeynes@359	1179	{ /* STC.L VBR, @-Rn */
nkeynes@359	1180	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1181	CHECKPRIV();
nkeynes@359	1182	sh4r.r[Rn] -= 4;
nkeynes@359	1183	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1184	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.vbr );
nkeynes@359	1185	}
nkeynes@359	1186	break;
nkeynes@359	1187	case 0x3:
nkeynes@359	1188	{ /* STC.L SSR, @-Rn */
nkeynes@359	1189	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1190	CHECKPRIV();
nkeynes@359	1191	sh4r.r[Rn] -= 4;
nkeynes@359	1192	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1193	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.ssr );
nkeynes@359	1194	}
nkeynes@359	1195	break;
nkeynes@359	1196	case 0x4:
nkeynes@359	1197	{ /* STC.L SPC, @-Rn */
nkeynes@359	1198	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1199	CHECKPRIV();
nkeynes@359	1200	sh4r.r[Rn] -= 4;
nkeynes@359	1201	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1202	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.spc );
nkeynes@359	1203	}
nkeynes@359	1204	break;
nkeynes@359	1205	default:
nkeynes@359	1206	UNDEF();
nkeynes@359	1207	break;
nkeynes@359	1208	}
nkeynes@359	1209	break;
nkeynes@359	1210	case 0x1:
nkeynes@359	1211	{ /* STC.L Rm_BANK, @-Rn */
nkeynes@359	1212	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7);
nkeynes@359	1213	CHECKPRIV();
nkeynes@359	1214	sh4r.r[Rn] -= 4;
nkeynes@359	1215	CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@359	1216	MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r_bank[Rm_BANK] );
nkeynes@359	1217	}
nkeynes@359	1218	break;
nkeynes@359	1219	}
nkeynes@359	1220	break;
nkeynes@359	1221	case 0x4:
nkeynes@359	1222	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1223	case 0x0:
nkeynes@359	1224	{ /* ROTL Rn */
nkeynes@359	1225	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1226	sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359	1227	sh4r.r[Rn] <<= 1;
nkeynes@359	1228	sh4r.r[Rn] \|= sh4r.t;
nkeynes@359	1229	}
nkeynes@359	1230	break;
nkeynes@359	1231	case 0x2:
nkeynes@359	1232	{ /* ROTCL Rn */
nkeynes@359	1233	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1234	tmp = sh4r.r[Rn] >> 31;
nkeynes@359	1235	sh4r.r[Rn] <<= 1;
nkeynes@359	1236	sh4r.r[Rn] \|= sh4r.t;
nkeynes@359	1237	sh4r.t = tmp;
nkeynes@359	1238	}
nkeynes@359	1239	break;
nkeynes@359	1240	default:
nkeynes@359	1241	UNDEF();
nkeynes@359	1242	break;
nkeynes@359	1243	}
nkeynes@359	1244	break;
nkeynes@359	1245	case 0x5:
nkeynes@359	1246	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1247	case 0x0:
nkeynes@359	1248	{ /* ROTR Rn */
nkeynes@359	1249	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1250	sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359	1251	sh4r.r[Rn] >>= 1;
nkeynes@359	1252	sh4r.r[Rn] \|= (sh4r.t << 31);
nkeynes@359	1253	}
nkeynes@359	1254	break;
nkeynes@359	1255	case 0x1:
nkeynes@359	1256	{ /* CMP/PL Rn */
nkeynes@359	1257	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1258	sh4r.t = ( ((int32_t)sh4r.r[Rn]) > 0 ? 1 : 0 );
nkeynes@359	1259	}
nkeynes@359	1260	break;
nkeynes@359	1261	case 0x2:
nkeynes@359	1262	{ /* ROTCR Rn */
nkeynes@359	1263	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1264	tmp = sh4r.r[Rn] & 0x00000001;
nkeynes@359	1265	sh4r.r[Rn] >>= 1;
nkeynes@359	1266	sh4r.r[Rn] \|= (sh4r.t << 31 );
nkeynes@359	1267	sh4r.t = tmp;
nkeynes@359	1268	}
nkeynes@359	1269	break;
nkeynes@359	1270	default:
nkeynes@359	1271	UNDEF();
nkeynes@359	1272	break;
nkeynes@359	1273	}
nkeynes@359	1274	break;
nkeynes@359	1275	case 0x6:
nkeynes@359	1276	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1277	case 0x0:
nkeynes@359	1278	{ /* LDS.L @Rm+, MACH */
nkeynes@359	1279	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1280	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1281	sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) \|
nkeynes@359	1282	(((uint64_t)MEM_READ_LONG(sh4r.r[Rm]))<<32);
nkeynes@359	1283	sh4r.r[Rm] += 4;
nkeynes@359	1284	}
nkeynes@359	1285	break;
nkeynes@359	1286	case 0x1:
nkeynes@359	1287	{ /* LDS.L @Rm+, MACL */
nkeynes@359	1288	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1289	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1290	sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) \|
nkeynes@359	1291	(uint64_t)((uint32_t)MEM_READ_LONG(sh4r.r[Rm]));
nkeynes@359	1292	sh4r.r[Rm] += 4;
nkeynes@359	1293	}
nkeynes@359	1294	break;
nkeynes@359	1295	case 0x2:
nkeynes@359	1296	{ /* LDS.L @Rm+, PR */
nkeynes@359	1297	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1298	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1299	sh4r.pr = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359	1300	sh4r.r[Rm] += 4;
nkeynes@359	1301	}
nkeynes@359	1302	break;
nkeynes@359	1303	case 0x3:
nkeynes@359	1304	{ /* LDC.L @Rm+, SGR */
nkeynes@359	1305	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1306	CHECKPRIV();
nkeynes@359	1307	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1308	sh4r.sgr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1309	sh4r.r[Rm] +=4;
nkeynes@359	1310	}
nkeynes@359	1311	break;
nkeynes@359	1312	case 0x5:
nkeynes@359	1313	{ /* LDS.L @Rm+, FPUL */
nkeynes@359	1314	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1315	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1316	sh4r.fpul = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1317	sh4r.r[Rm] +=4;
nkeynes@359	1318	}
nkeynes@359	1319	break;
nkeynes@359	1320	case 0x6:
nkeynes@359	1321	{ /* LDS.L @Rm+, FPSCR */
nkeynes@359	1322	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1323	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1324	sh4r.fpscr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1325	sh4r.r[Rm] +=4;
nkeynes@359	1326	}
nkeynes@359	1327	break;
nkeynes@359	1328	case 0xF:
nkeynes@359	1329	{ /* LDC.L @Rm+, DBR */
nkeynes@359	1330	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1331	CHECKPRIV();
nkeynes@359	1332	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1333	sh4r.dbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1334	sh4r.r[Rm] +=4;
nkeynes@359	1335	}
nkeynes@359	1336	break;
nkeynes@359	1337	default:
nkeynes@359	1338	UNDEF();
nkeynes@359	1339	break;
nkeynes@359	1340	}
nkeynes@359	1341	break;
nkeynes@359	1342	case 0x7:
nkeynes@359	1343	switch( (ir&0x80) >> 7 ) {
nkeynes@359	1344	case 0x0:
nkeynes@359	1345	switch( (ir&0x70) >> 4 ) {
nkeynes@359	1346	case 0x0:
nkeynes@359	1347	{ /* LDC.L @Rm+, SR */
nkeynes@359	1348	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1349	CHECKSLOTILLEGAL();
nkeynes@359	1350	CHECKPRIV();
nkeynes@359	1351	CHECKWALIGN32( sh4r.r[Rm] );
nkeynes@359	1352	sh4_load_sr( MEM_READ_LONG(sh4r.r[Rm]) );
nkeynes@359	1353	sh4r.r[Rm] +=4;
nkeynes@359	1354	}
nkeynes@359	1355	break;
nkeynes@359	1356	case 0x1:
nkeynes@359	1357	{ /* LDC.L @Rm+, GBR */
nkeynes@359	1358	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1359	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1360	sh4r.gbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1361	sh4r.r[Rm] +=4;
nkeynes@359	1362	}
nkeynes@359	1363	break;
nkeynes@359	1364	case 0x2:
nkeynes@359	1365	{ /* LDC.L @Rm+, VBR */
nkeynes@359	1366	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1367	CHECKPRIV();
nkeynes@359	1368	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1369	sh4r.vbr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1370	sh4r.r[Rm] +=4;
nkeynes@359	1371	}
nkeynes@359	1372	break;
nkeynes@359	1373	case 0x3:
nkeynes@359	1374	{ /* LDC.L @Rm+, SSR */
nkeynes@359	1375	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1376	CHECKPRIV();
nkeynes@359	1377	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1378	sh4r.ssr = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1379	sh4r.r[Rm] +=4;
nkeynes@359	1380	}
nkeynes@359	1381	break;
nkeynes@359	1382	case 0x4:
nkeynes@359	1383	{ /* LDC.L @Rm+, SPC */
nkeynes@359	1384	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1385	CHECKPRIV();
nkeynes@359	1386	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1387	sh4r.spc = MEM_READ_LONG(sh4r.r[Rm]);
nkeynes@359	1388	sh4r.r[Rm] +=4;
nkeynes@359	1389	}
nkeynes@359	1390	break;
nkeynes@359	1391	default:
nkeynes@359	1392	UNDEF();
nkeynes@359	1393	break;
nkeynes@359	1394	}
nkeynes@359	1395	break;
nkeynes@359	1396	case 0x1:
nkeynes@359	1397	{ /* LDC.L @Rm+, Rn_BANK */
nkeynes@359	1398	uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
nkeynes@359	1399	CHECKPRIV();
nkeynes@359	1400	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@359	1401	sh4r.r_bank[Rn_BANK] = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359	1402	sh4r.r[Rm] += 4;
nkeynes@359	1403	}
nkeynes@359	1404	break;
nkeynes@359	1405	}
nkeynes@359	1406	break;
nkeynes@359	1407	case 0x8:
nkeynes@359	1408	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1409	case 0x0:
nkeynes@359	1410	{ /* SHLL2 Rn */
nkeynes@359	1411	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1412	sh4r.r[Rn] <<= 2;
nkeynes@359	1413	}
nkeynes@359	1414	break;
nkeynes@359	1415	case 0x1:
nkeynes@359	1416	{ /* SHLL8 Rn */
nkeynes@359	1417	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1418	sh4r.r[Rn] <<= 8;
nkeynes@359	1419	}
nkeynes@359	1420	break;
nkeynes@359	1421	case 0x2:
nkeynes@359	1422	{ /* SHLL16 Rn */
nkeynes@359	1423	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1424	sh4r.r[Rn] <<= 16;
nkeynes@359	1425	}
nkeynes@359	1426	break;
nkeynes@359	1427	default:
nkeynes@359	1428	UNDEF();
nkeynes@359	1429	break;
nkeynes@359	1430	}
nkeynes@359	1431	break;
nkeynes@359	1432	case 0x9:
nkeynes@359	1433	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1434	case 0x0:
nkeynes@359	1435	{ /* SHLR2 Rn */
nkeynes@359	1436	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1437	sh4r.r[Rn] >>= 2;
nkeynes@359	1438	}
nkeynes@359	1439	break;
nkeynes@359	1440	case 0x1:
nkeynes@359	1441	{ /* SHLR8 Rn */
nkeynes@359	1442	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1443	sh4r.r[Rn] >>= 8;
nkeynes@359	1444	}
nkeynes@359	1445	break;
nkeynes@359	1446	case 0x2:
nkeynes@359	1447	{ /* SHLR16 Rn */
nkeynes@359	1448	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1449	sh4r.r[Rn] >>= 16;
nkeynes@359	1450	}
nkeynes@359	1451	break;
nkeynes@359	1452	default:
nkeynes@359	1453	UNDEF();
nkeynes@359	1454	break;
nkeynes@359	1455	}
nkeynes@359	1456	break;
nkeynes@359	1457	case 0xA:
nkeynes@359	1458	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1459	case 0x0:
nkeynes@359	1460	{ /* LDS Rm, MACH */
nkeynes@359	1461	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1462	sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) \|
nkeynes@359	1463	(((uint64_t)sh4r.r[Rm])<<32);
nkeynes@359	1464	}
nkeynes@359	1465	break;
nkeynes@359	1466	case 0x1:
nkeynes@359	1467	{ /* LDS Rm, MACL */
nkeynes@359	1468	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1469	sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) \|
nkeynes@359	1470	(uint64_t)((uint32_t)(sh4r.r[Rm]));
nkeynes@359	1471	}
nkeynes@359	1472	break;
nkeynes@359	1473	case 0x2:
nkeynes@359	1474	{ /* LDS Rm, PR */
nkeynes@359	1475	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1476	sh4r.pr = sh4r.r[Rm];
nkeynes@359	1477	}
nkeynes@359	1478	break;
nkeynes@359	1479	case 0x3:
nkeynes@359	1480	{ /* LDC Rm, SGR */
nkeynes@359	1481	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1482	CHECKPRIV();
nkeynes@359	1483	sh4r.sgr = sh4r.r[Rm];
nkeynes@359	1484	}
nkeynes@359	1485	break;
nkeynes@359	1486	case 0x5:
nkeynes@359	1487	{ /* LDS Rm, FPUL */
nkeynes@359	1488	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1489	sh4r.fpul = sh4r.r[Rm];
nkeynes@359	1490	}
nkeynes@359	1491	break;
nkeynes@359	1492	case 0x6:
nkeynes@359	1493	{ /* LDS Rm, FPSCR */
nkeynes@359	1494	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1495	sh4r.fpscr = sh4r.r[Rm];
nkeynes@359	1496	}
nkeynes@359	1497	break;
nkeynes@359	1498	case 0xF:
nkeynes@359	1499	{ /* LDC Rm, DBR */
nkeynes@359	1500	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1501	CHECKPRIV();
nkeynes@359	1502	sh4r.dbr = sh4r.r[Rm];
nkeynes@359	1503	}
nkeynes@359	1504	break;
nkeynes@359	1505	default:
nkeynes@359	1506	UNDEF();
nkeynes@359	1507	break;
nkeynes@359	1508	}
nkeynes@359	1509	break;
nkeynes@359	1510	case 0xB:
nkeynes@359	1511	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	1512	case 0x0:
nkeynes@359	1513	{ /* JSR @Rn */
nkeynes@359	1514	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1515	CHECKDEST( sh4r.r[Rn] );
nkeynes@359	1516	CHECKSLOTILLEGAL();
nkeynes@359	1517	sh4r.in_delay_slot = 1;
nkeynes@359	1518	sh4r.pc = sh4r.new_pc;
nkeynes@359	1519	sh4r.new_pc = sh4r.r[Rn];
nkeynes@359	1520	sh4r.pr = pc + 4;
nkeynes@359	1521	TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359	1522	return TRUE;
nkeynes@359	1523	}
nkeynes@359	1524	break;
nkeynes@359	1525	case 0x1:
nkeynes@359	1526	{ /* TAS.B @Rn */
nkeynes@359	1527	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1528	tmp = MEM_READ_BYTE( sh4r.r[Rn] );
nkeynes@359	1529	sh4r.t = ( tmp == 0 ? 1 : 0 );
nkeynes@359	1530	MEM_WRITE_BYTE( sh4r.r[Rn], tmp \| 0x80 );
nkeynes@359	1531	}
nkeynes@359	1532	break;
nkeynes@359	1533	case 0x2:
nkeynes@359	1534	{ /* JMP @Rn */
nkeynes@359	1535	uint32_t Rn = ((ir>>8)&0xF);
nkeynes@359	1536	CHECKDEST( sh4r.r[Rn] );
nkeynes@359	1537	CHECKSLOTILLEGAL();
nkeynes@359	1538	sh4r.in_delay_slot = 1;
nkeynes@359	1539	sh4r.pc = sh4r.new_pc;
nkeynes@359	1540	sh4r.new_pc = sh4r.r[Rn];
nkeynes@359	1541	return TRUE;
nkeynes@359	1542	}
nkeynes@359	1543	break;
nkeynes@359	1544	default:
nkeynes@359	1545	UNDEF();
nkeynes@359	1546	break;
nkeynes@359	1547	}
nkeynes@359	1548	break;
nkeynes@359	1549	case 0xC:
nkeynes@359	1550	{ /* SHAD Rm, Rn */
nkeynes@359	1551	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1552	tmp = sh4r.r[Rm];
nkeynes@359	1553	if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359	1554	else if( (tmp & 0x1F) == 0 )
nkeynes@359	1555	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 31;
nkeynes@359	1556	else
nkeynes@359	1557	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> (((~sh4r.r[Rm]) & 0x1F)+1);
nkeynes@359	1558	}
nkeynes@359	1559	break;
nkeynes@359	1560	case 0xD:
nkeynes@359	1561	{ /* SHLD Rm, Rn */
nkeynes@359	1562	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1563	tmp = sh4r.r[Rm];
nkeynes@359	1564	if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359	1565	else if( (tmp & 0x1F) == 0 ) sh4r.r[Rn] = 0;
nkeynes@359	1566	else sh4r.r[Rn] >>= (((~tmp) & 0x1F)+1);
nkeynes@359	1567	}
nkeynes@359	1568	break;
nkeynes@359	1569	case 0xE:
nkeynes@359	1570	switch( (ir&0x80) >> 7 ) {
nkeynes@359	1571	case 0x0:
nkeynes@359	1572	switch( (ir&0x70) >> 4 ) {
nkeynes@359	1573	case 0x0:
nkeynes@359	1574	{ /* LDC Rm, SR */
nkeynes@359	1575	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1576	CHECKSLOTILLEGAL();
nkeynes@359	1577	CHECKPRIV();
nkeynes@359	1578	sh4_load_sr( sh4r.r[Rm] );
nkeynes@359	1579	}
nkeynes@359	1580	break;
nkeynes@359	1581	case 0x1:
nkeynes@359	1582	{ /* LDC Rm, GBR */
nkeynes@359	1583	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1584	sh4r.gbr = sh4r.r[Rm];
nkeynes@359	1585	}
nkeynes@359	1586	break;
nkeynes@359	1587	case 0x2:
nkeynes@359	1588	{ /* LDC Rm, VBR */
nkeynes@359	1589	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1590	CHECKPRIV();
nkeynes@359	1591	sh4r.vbr = sh4r.r[Rm];
nkeynes@359	1592	}
nkeynes@359	1593	break;
nkeynes@359	1594	case 0x3:
nkeynes@359	1595	{ /* LDC Rm, SSR */
nkeynes@359	1596	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1597	CHECKPRIV();
nkeynes@359	1598	sh4r.ssr = sh4r.r[Rm];
nkeynes@359	1599	}
nkeynes@359	1600	break;
nkeynes@359	1601	case 0x4:
nkeynes@359	1602	{ /* LDC Rm, SPC */
nkeynes@359	1603	uint32_t Rm = ((ir>>8)&0xF);
nkeynes@359	1604	CHECKPRIV();
nkeynes@359	1605	sh4r.spc = sh4r.r[Rm];
nkeynes@359	1606	}
nkeynes@359	1607	break;
nkeynes@359	1608	default:
nkeynes@359	1609	UNDEF();
nkeynes@359	1610	break;
nkeynes@359	1611	}
nkeynes@359	1612	break;
nkeynes@359	1613	case 0x1:
nkeynes@359	1614	{ /* LDC Rm, Rn_BANK */
nkeynes@359	1615	uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
nkeynes@359	1616	CHECKPRIV();
nkeynes@359	1617	sh4r.r_bank[Rn_BANK] = sh4r.r[Rm];
nkeynes@359	1618	}
nkeynes@359	1619	break;
nkeynes@359	1620	}
nkeynes@359	1621	break;
nkeynes@359	1622	case 0xF:
nkeynes@359	1623	{ /* MAC.W @Rm+, @Rn+ */
nkeynes@359	1624	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1625	CHECKRALIGN16( sh4r.r[Rn] );
nkeynes@359	1626	CHECKRALIGN16( sh4r.r[Rm] );
nkeynes@359	1627	int32_t stmp = SIGNEXT16(MEM_READ_WORD(sh4r.r[Rn]));
nkeynes@359	1628	sh4r.r[Rn] += 2;
nkeynes@359	1629	stmp = stmp * SIGNEXT16(MEM_READ_WORD(sh4r.r[Rm]));
nkeynes@359	1630	sh4r.r[Rm] += 2;
nkeynes@359	1631	if( sh4r.s ) {
nkeynes@359	1632	int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
nkeynes@359	1633	if( tmpl > (int64_t)0x000000007FFFFFFFLL ) {
nkeynes@359	1634	sh4r.mac = 0x000000017FFFFFFFLL;
nkeynes@359	1635	} else if( tmpl < (int64_t)0xFFFFFFFF80000000LL ) {
nkeynes@359	1636	sh4r.mac = 0x0000000180000000LL;
nkeynes@359	1637	} else {
nkeynes@359	1638	sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) \|
nkeynes@359	1639	((uint32_t)(sh4r.mac + stmp));
nkeynes@359	1640	}
nkeynes@359	1641	} else {
nkeynes@359	1642	sh4r.mac += SIGNEXT32(stmp);
nkeynes@359	1643	}
nkeynes@359	1644	}
nkeynes@359	1645	break;
nkeynes@359	1646	}
nkeynes@359	1647	break;
nkeynes@359	1648	case 0x5:
nkeynes@359	1649	{ /* MOV.L @(disp, Rm), Rn */
nkeynes@359	1650	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
nkeynes@359	1651	tmp = sh4r.r[Rm] + disp;
nkeynes@359	1652	CHECKRALIGN32( tmp );
nkeynes@359	1653	sh4r.r[Rn] = MEM_READ_LONG( tmp );
nkeynes@359	1654	}
nkeynes@359	1655	break;
nkeynes@359	1656	case 0x6:
nkeynes@359	1657	switch( ir&0xF ) {
nkeynes@359	1658	case 0x0:
nkeynes@359	1659	{ /* MOV.B @Rm, Rn */
nkeynes@359	1660	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1661	sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] );
nkeynes@359	1662	}
nkeynes@359	1663	break;
nkeynes@359	1664	case 0x1:
nkeynes@359	1665	{ /* MOV.W @Rm, Rn */
nkeynes@359	1666	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1667	CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] );
nkeynes@359	1668	}
nkeynes@359	1669	break;
nkeynes@359	1670	case 0x2:
nkeynes@359	1671	{ /* MOV.L @Rm, Rn */
nkeynes@359	1672	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1673	CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] );
nkeynes@359	1674	}
nkeynes@359	1675	break;
nkeynes@359	1676	case 0x3:
nkeynes@359	1677	{ /* MOV Rm, Rn */
nkeynes@359	1678	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1679	sh4r.r[Rn] = sh4r.r[Rm];
nkeynes@359	1680	}
nkeynes@359	1681	break;
nkeynes@359	1682	case 0x4:
nkeynes@359	1683	{ /* MOV.B @Rm+, Rn */
nkeynes@359	1684	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1685	sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] ); sh4r.r[Rm] ++;
nkeynes@359	1686	}
nkeynes@359	1687	break;
nkeynes@359	1688	case 0x5:
nkeynes@359	1689	{ /* MOV.W @Rm+, Rn */
nkeynes@359	1690	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1691	CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] ); sh4r.r[Rm] += 2;
nkeynes@359	1692	}
nkeynes@359	1693	break;
nkeynes@359	1694	case 0x6:
nkeynes@359	1695	{ /* MOV.L @Rm+, Rn */
nkeynes@359	1696	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1697	CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] ); sh4r.r[Rm] += 4;
nkeynes@359	1698	}
nkeynes@359	1699	break;
nkeynes@359	1700	case 0x7:
nkeynes@359	1701	{ /* NOT Rm, Rn */
nkeynes@359	1702	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1703	sh4r.r[Rn] = ~sh4r.r[Rm];
nkeynes@359	1704	}
nkeynes@359	1705	break;
nkeynes@359	1706	case 0x8:
nkeynes@359	1707	{ /* SWAP.B Rm, Rn */
nkeynes@359	1708	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1709	sh4r.r[Rn] = (sh4r.r[Rm]&0xFFFF0000) \| ((sh4r.r[Rm]&0x0000FF00)>>8) \| ((sh4r.r[Rm]&0x000000FF)<<8);
nkeynes@359	1710	}
nkeynes@359	1711	break;
nkeynes@359	1712	case 0x9:
nkeynes@359	1713	{ /* SWAP.W Rm, Rn */
nkeynes@359	1714	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1715	sh4r.r[Rn] = (sh4r.r[Rm]>>16) \| (sh4r.r[Rm]<<16);
nkeynes@359	1716	}
nkeynes@359	1717	break;
nkeynes@359	1718	case 0xA:
nkeynes@359	1719	{ /* NEGC Rm, Rn */
nkeynes@359	1720	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1721	tmp = 0 - sh4r.r[Rm];
nkeynes@359	1722	sh4r.r[Rn] = tmp - sh4r.t;
nkeynes@359	1723	sh4r.t = ( 0<tmp \|\| tmp<sh4r.r[Rn] ? 1 : 0 );
nkeynes@359	1724	}
nkeynes@359	1725	break;
nkeynes@359	1726	case 0xB:
nkeynes@359	1727	{ /* NEG Rm, Rn */
nkeynes@359	1728	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1729	sh4r.r[Rn] = 0 - sh4r.r[Rm];
nkeynes@359	1730	}
nkeynes@359	1731	break;
nkeynes@359	1732	case 0xC:
nkeynes@359	1733	{ /* EXTU.B Rm, Rn */
nkeynes@359	1734	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1735	sh4r.r[Rn] = sh4r.r[Rm]&0x000000FF;
nkeynes@359	1736	}
nkeynes@359	1737	break;
nkeynes@359	1738	case 0xD:
nkeynes@359	1739	{ /* EXTU.W Rm, Rn */
nkeynes@359	1740	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1741	sh4r.r[Rn] = sh4r.r[Rm]&0x0000FFFF;
nkeynes@359	1742	}
nkeynes@359	1743	break;
nkeynes@359	1744	case 0xE:
nkeynes@359	1745	{ /* EXTS.B Rm, Rn */
nkeynes@359	1746	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1747	sh4r.r[Rn] = SIGNEXT8( sh4r.r[Rm]&0x000000FF );
nkeynes@359	1748	}
nkeynes@359	1749	break;
nkeynes@359	1750	case 0xF:
nkeynes@359	1751	{ /* EXTS.W Rm, Rn */
nkeynes@359	1752	uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	1753	sh4r.r[Rn] = SIGNEXT16( sh4r.r[Rm]&0x0000FFFF );
nkeynes@359	1754	}
nkeynes@359	1755	break;
nkeynes@359	1756	}
nkeynes@359	1757	break;
nkeynes@359	1758	case 0x7:
nkeynes@359	1759	{ /* ADD #imm, Rn */
nkeynes@359	1760	uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
nkeynes@359	1761	sh4r.r[Rn] += imm;
nkeynes@359	1762	}
nkeynes@359	1763	break;
nkeynes@359	1764	case 0x8:
nkeynes@359	1765	switch( (ir&0xF00) >> 8 ) {
nkeynes@359	1766	case 0x0:
nkeynes@359	1767	{ /* MOV.B R0, @(disp, Rn) */
nkeynes@359	1768	uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
nkeynes@359	1769	MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 );
nkeynes@359	1770	}
nkeynes@359	1771	break;
nkeynes@359	1772	case 0x1:
nkeynes@359	1773	{ /* MOV.W R0, @(disp, Rn) */
nkeynes@359	1774	uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
nkeynes@359	1775	tmp = sh4r.r[Rn] + disp;
nkeynes@359	1776	CHECKWALIGN16( tmp );
nkeynes@359	1777	MEM_WRITE_WORD( tmp, R0 );
nkeynes@359	1778	}
nkeynes@359	1779	break;
nkeynes@359	1780	case 0x4:
nkeynes@359	1781	{ /* MOV.B @(disp, Rm), R0 */
nkeynes@359	1782	uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
nkeynes@359	1783	R0 = MEM_READ_BYTE( sh4r.r[Rm] + disp );
nkeynes@359	1784	}
nkeynes@359	1785	break;
nkeynes@359	1786	case 0x5:
nkeynes@359	1787	{ /* MOV.W @(disp, Rm), R0 */
nkeynes@359	1788	uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
nkeynes@359	1789	tmp = sh4r.r[Rm] + disp;
nkeynes@359	1790	CHECKRALIGN16( tmp );
nkeynes@359	1791	R0 = MEM_READ_WORD( tmp );
nkeynes@359	1792	}
nkeynes@359	1793	break;
nkeynes@359	1794	case 0x8:
nkeynes@359	1795	{ /* CMP/EQ #imm, R0 */
nkeynes@359	1796	int32_t imm = SIGNEXT8(ir&0xFF);
nkeynes@359	1797	sh4r.t = ( R0 == imm ? 1 : 0 );
nkeynes@359	1798	}
nkeynes@359	1799	break;
nkeynes@359	1800	case 0x9:
nkeynes@359	1801	{ /* BT disp */
nkeynes@359	1802	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1803	CHECKSLOTILLEGAL();
nkeynes@359	1804	if( sh4r.t ) {
nkeynes@359	1805	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359	1806	sh4r.pc += disp + 4;
nkeynes@359	1807	sh4r.new_pc = sh4r.pc + 2;
nkeynes@27	1808	return TRUE;
nkeynes@359	1809	}
nkeynes@359	1810	}
nkeynes@359	1811	break;
nkeynes@359	1812	case 0xB:
nkeynes@359	1813	{ /* BF disp */
nkeynes@359	1814	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1815	CHECKSLOTILLEGAL();
nkeynes@359	1816	if( !sh4r.t ) {
nkeynes@359	1817	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359	1818	sh4r.pc += disp + 4;
nkeynes@359	1819	sh4r.new_pc = sh4r.pc + 2;
nkeynes@359	1820	return TRUE;
nkeynes@359	1821	}
nkeynes@359	1822	}
nkeynes@359	1823	break;
nkeynes@359	1824	case 0xD:
nkeynes@359	1825	{ /* BT/S disp */
nkeynes@359	1826	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1827	CHECKSLOTILLEGAL();
nkeynes@359	1828	if( sh4r.t ) {
nkeynes@359	1829	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@2	1830	sh4r.in_delay_slot = 1;
nkeynes@1	1831	sh4r.pc = sh4r.new_pc;
nkeynes@359	1832	sh4r.new_pc = pc + disp + 4;
nkeynes@359	1833	sh4r.in_delay_slot = 1;
nkeynes@27	1834	return TRUE;
nkeynes@359	1835	}
nkeynes@359	1836	}
nkeynes@359	1837	break;
nkeynes@359	1838	case 0xF:
nkeynes@359	1839	{ /* BF/S disp */
nkeynes@359	1840	int32_t disp = SIGNEXT8(ir&0xFF)<<1;
nkeynes@359	1841	CHECKSLOTILLEGAL();
nkeynes@359	1842	if( !sh4r.t ) {
nkeynes@359	1843	CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@2	1844	sh4r.in_delay_slot = 1;
nkeynes@1	1845	sh4r.pc = sh4r.new_pc;
nkeynes@359	1846	sh4r.new_pc = pc + disp + 4;
nkeynes@27	1847	return TRUE;
nkeynes@359	1848	}
nkeynes@359	1849	}
nkeynes@359	1850	break;
nkeynes@359	1851	default:
nkeynes@359	1852	UNDEF();
nkeynes@359	1853	break;
nkeynes@359	1854	}
nkeynes@359	1855	break;
nkeynes@359	1856	case 0x9:
nkeynes@359	1857	{ /* MOV.W @(disp, PC), Rn */
nkeynes@359	1858	uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1;
nkeynes@359	1859	CHECKSLOTILLEGAL();
nkeynes@359	1860	tmp = pc + 4 + disp;
nkeynes@359	1861	sh4r.r[Rn] = MEM_READ_WORD( tmp );
nkeynes@359	1862	}
nkeynes@359	1863	break;
nkeynes@359	1864	case 0xA:
nkeynes@359	1865	{ /* BRA disp */
nkeynes@359	1866	int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
nkeynes@359	1867	CHECKSLOTILLEGAL();
nkeynes@359	1868	CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359	1869	sh4r.in_delay_slot = 1;
nkeynes@359	1870	sh4r.pc = sh4r.new_pc;
nkeynes@359	1871	sh4r.new_pc = pc + 4 + disp;
nkeynes@359	1872	return TRUE;
nkeynes@359	1873	}
nkeynes@359	1874	break;
nkeynes@359	1875	case 0xB:
nkeynes@359	1876	{ /* BSR disp */
nkeynes@359	1877	int32_t disp = SIGNEXT12(ir&0xFFF)<<1;
nkeynes@359	1878	CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359	1879	CHECKSLOTILLEGAL();
nkeynes@359	1880	sh4r.in_delay_slot = 1;
nkeynes@359	1881	sh4r.pr = pc + 4;
nkeynes@359	1882	sh4r.pc = sh4r.new_pc;
nkeynes@359	1883	sh4r.new_pc = pc + 4 + disp;
nkeynes@359	1884	TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359	1885	return TRUE;
nkeynes@359	1886	}
nkeynes@359	1887	break;
nkeynes@359	1888	case 0xC:
nkeynes@359	1889	switch( (ir&0xF00) >> 8 ) {
nkeynes@359	1890	case 0x0:
nkeynes@359	1891	{ /* MOV.B R0, @(disp, GBR) */
nkeynes@359	1892	uint32_t disp = (ir&0xFF);
nkeynes@359	1893	MEM_WRITE_BYTE( sh4r.gbr + disp, R0 );
nkeynes@359	1894	}
nkeynes@359	1895	break;
nkeynes@359	1896	case 0x1:
nkeynes@359	1897	{ /* MOV.W R0, @(disp, GBR) */
nkeynes@359	1898	uint32_t disp = (ir&0xFF)<<1;
nkeynes@359	1899	tmp = sh4r.gbr + disp;
nkeynes@359	1900	CHECKWALIGN16( tmp );
nkeynes@359	1901	MEM_WRITE_WORD( tmp, R0 );
nkeynes@359	1902	}
nkeynes@359	1903	break;
nkeynes@359	1904	case 0x2:
nkeynes@359	1905	{ /* MOV.L R0, @(disp, GBR) */
nkeynes@359	1906	uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	1907	tmp = sh4r.gbr + disp;
nkeynes@359	1908	CHECKWALIGN32( tmp );
nkeynes@359	1909	MEM_WRITE_LONG( tmp, R0 );
nkeynes@359	1910	}
nkeynes@359	1911	break;
nkeynes@359	1912	case 0x3:
nkeynes@359	1913	{ /* TRAPA #imm */
nkeynes@359	1914	uint32_t imm = (ir&0xFF);
nkeynes@359	1915	CHECKSLOTILLEGAL();
nkeynes@359	1916	MMIO_WRITE( MMU, TRA, imm<<2 );
nkeynes@359	1917	sh4r.pc += 2;
nkeynes@359	1918	sh4_raise_exception( EXC_TRAP );
nkeynes@359	1919	}
nkeynes@359	1920	break;
nkeynes@359	1921	case 0x4:
nkeynes@359	1922	{ /* MOV.B @(disp, GBR), R0 */
nkeynes@359	1923	uint32_t disp = (ir&0xFF);
nkeynes@359	1924	R0 = MEM_READ_BYTE( sh4r.gbr + disp );
nkeynes@359	1925	}
nkeynes@359	1926	break;
nkeynes@359	1927	case 0x5:
nkeynes@359	1928	{ /* MOV.W @(disp, GBR), R0 */
nkeynes@359	1929	uint32_t disp = (ir&0xFF)<<1;
nkeynes@359	1930	tmp = sh4r.gbr + disp;
nkeynes@359	1931	CHECKRALIGN16( tmp );
nkeynes@359	1932	R0 = MEM_READ_WORD( tmp );
nkeynes@359	1933	}
nkeynes@359	1934	break;
nkeynes@359	1935	case 0x6:
nkeynes@359	1936	{ /* MOV.L @(disp, GBR), R0 */
nkeynes@359	1937	uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	1938	tmp = sh4r.gbr + disp;
nkeynes@359	1939	CHECKRALIGN32( tmp );
nkeynes@359	1940	R0 = MEM_READ_LONG( tmp );
nkeynes@359	1941	}
nkeynes@359	1942	break;
nkeynes@359	1943	case 0x7:
nkeynes@359	1944	{ /* MOVA @(disp, PC), R0 */
nkeynes@359	1945	uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	1946	CHECKSLOTILLEGAL();
nkeynes@359	1947	R0 = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359	1948	}
nkeynes@359	1949	break;
nkeynes@359	1950	case 0x8:
nkeynes@359	1951	{ /* TST #imm, R0 */
nkeynes@359	1952	uint32_t imm = (ir&0xFF);
nkeynes@359	1953	sh4r.t = (R0 & imm ? 0 : 1);
nkeynes@359	1954	}
nkeynes@359	1955	break;
nkeynes@359	1956	case 0x9:
nkeynes@359	1957	{ /* AND #imm, R0 */
nkeynes@359	1958	uint32_t imm = (ir&0xFF);
nkeynes@359	1959	R0 &= imm;
nkeynes@359	1960	}
nkeynes@359	1961	break;
nkeynes@359	1962	case 0xA:
nkeynes@359	1963	{ /* XOR #imm, R0 */
nkeynes@359	1964	uint32_t imm = (ir&0xFF);
nkeynes@359	1965	R0 ^= imm;
nkeynes@359	1966	}
nkeynes@359	1967	break;
nkeynes@359	1968	case 0xB:
nkeynes@359	1969	{ /* OR #imm, R0 */
nkeynes@359	1970	uint32_t imm = (ir&0xFF);
nkeynes@359	1971	R0 \|= imm;
nkeynes@359	1972	}
nkeynes@359	1973	break;
nkeynes@359	1974	case 0xC:
nkeynes@359	1975	{ /* TST.B #imm, @(R0, GBR) */
nkeynes@359	1976	uint32_t imm = (ir&0xFF);
nkeynes@359	1977	sh4r.t = ( MEM_READ_BYTE(R0 + sh4r.gbr) & imm ? 0 : 1 );
nkeynes@359	1978	}
nkeynes@359	1979	break;
nkeynes@359	1980	case 0xD:
nkeynes@359	1981	{ /* AND.B #imm, @(R0, GBR) */
nkeynes@359	1982	uint32_t imm = (ir&0xFF);
nkeynes@359	1983	MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & MEM_READ_BYTE(R0 + sh4r.gbr) );
nkeynes@359	1984	}
nkeynes@359	1985	break;
nkeynes@359	1986	case 0xE:
nkeynes@359	1987	{ /* XOR.B #imm, @(R0, GBR) */
nkeynes@359	1988	uint32_t imm = (ir&0xFF);
nkeynes@359	1989	MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ MEM_READ_BYTE(R0 + sh4r.gbr) );
nkeynes@359	1990	}
nkeynes@359	1991	break;
nkeynes@359	1992	case 0xF:
nkeynes@359	1993	{ /* OR.B #imm, @(R0, GBR) */
nkeynes@359	1994	uint32_t imm = (ir&0xFF);
nkeynes@359	1995	MEM_WRITE_BYTE( R0 + sh4r.gbr, imm \| MEM_READ_BYTE(R0 + sh4r.gbr) );
nkeynes@359	1996	}
nkeynes@359	1997	break;
nkeynes@359	1998	}
nkeynes@359	1999	break;
nkeynes@359	2000	case 0xD:
nkeynes@359	2001	{ /* MOV.L @(disp, PC), Rn */
nkeynes@359	2002	uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2;
nkeynes@359	2003	CHECKSLOTILLEGAL();
nkeynes@359	2004	tmp = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359	2005	sh4r.r[Rn] = MEM_READ_LONG( tmp );
nkeynes@359	2006	}
nkeynes@359	2007	break;
nkeynes@359	2008	case 0xE:
nkeynes@359	2009	{ /* MOV #imm, Rn */
nkeynes@359	2010	uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF);
nkeynes@359	2011	sh4r.r[Rn] = imm;
nkeynes@359	2012	}
nkeynes@359	2013	break;
nkeynes@359	2014	case 0xF:
nkeynes@359	2015	switch( ir&0xF ) {
nkeynes@359	2016	case 0x0:
nkeynes@359	2017	{ /* FADD FRm, FRn */
nkeynes@359	2018	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2019	CHECKFPUEN();
nkeynes@359	2020	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2021	DR(FRn) += DR(FRm);
nkeynes@359	2022	} else {
nkeynes@359	2023	FR(FRn) += FR(FRm);
nkeynes@359	2024	}
nkeynes@359	2025	}
nkeynes@359	2026	break;
nkeynes@359	2027	case 0x1:
nkeynes@359	2028	{ /* FSUB FRm, FRn */
nkeynes@359	2029	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2030	CHECKFPUEN();
nkeynes@359	2031	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2032	DR(FRn) -= DR(FRm);
nkeynes@359	2033	} else {
nkeynes@359	2034	FR(FRn) -= FR(FRm);
nkeynes@359	2035	}
nkeynes@359	2036	}
nkeynes@359	2037	break;
nkeynes@359	2038	case 0x2:
nkeynes@359	2039	{ /* FMUL FRm, FRn */
nkeynes@359	2040	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2041	CHECKFPUEN();
nkeynes@359	2042	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2043	DR(FRn) *= DR(FRm);
nkeynes@359	2044	} else {
nkeynes@359	2045	FR(FRn) *= FR(FRm);
nkeynes@359	2046	}
nkeynes@359	2047	}
nkeynes@359	2048	break;
nkeynes@359	2049	case 0x3:
nkeynes@359	2050	{ /* FDIV FRm, FRn */
nkeynes@359	2051	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2052	CHECKFPUEN();
nkeynes@359	2053	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2054	DR(FRn) /= DR(FRm);
nkeynes@359	2055	} else {
nkeynes@359	2056	FR(FRn) /= FR(FRm);
nkeynes@359	2057	}
nkeynes@359	2058	}
nkeynes@359	2059	break;
nkeynes@359	2060	case 0x4:
nkeynes@359	2061	{ /* FCMP/EQ FRm, FRn */
nkeynes@359	2062	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2063	CHECKFPUEN();
nkeynes@359	2064	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2065	sh4r.t = ( DR(FRn) == DR(FRm) ? 1 : 0 );
nkeynes@359	2066	} else {
nkeynes@359	2067	sh4r.t = ( FR(FRn) == FR(FRm) ? 1 : 0 );
nkeynes@359	2068	}
nkeynes@359	2069	}
nkeynes@359	2070	break;
nkeynes@359	2071	case 0x5:
nkeynes@359	2072	{ /* FCMP/GT FRm, FRn */
nkeynes@359	2073	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2074	CHECKFPUEN();
nkeynes@359	2075	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2076	sh4r.t = ( DR(FRn) > DR(FRm) ? 1 : 0 );
nkeynes@359	2077	} else {
nkeynes@359	2078	sh4r.t = ( FR(FRn) > FR(FRm) ? 1 : 0 );
nkeynes@359	2079	}
nkeynes@359	2080	}
nkeynes@359	2081	break;
nkeynes@359	2082	case 0x6:
nkeynes@359	2083	{ /* FMOV @(R0, Rm), FRn */
nkeynes@359	2084	uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	2085	MEM_FP_READ( sh4r.r[Rm] + R0, FRn );
nkeynes@359	2086	}
nkeynes@359	2087	break;
nkeynes@359	2088	case 0x7:
nkeynes@359	2089	{ /* FMOV FRm, @(R0, Rn) */
nkeynes@359	2090	uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2091	MEM_FP_WRITE( sh4r.r[Rn] + R0, FRm );
nkeynes@359	2092	}
nkeynes@359	2093	break;
nkeynes@359	2094	case 0x8:
nkeynes@359	2095	{ /* FMOV @Rm, FRn */
nkeynes@359	2096	uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	2097	MEM_FP_READ( sh4r.r[Rm], FRn );
nkeynes@359	2098	}
nkeynes@359	2099	break;
nkeynes@359	2100	case 0x9:
nkeynes@359	2101	{ /* FMOV @Rm+, FRn */
nkeynes@359	2102	uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
nkeynes@359	2103	MEM_FP_READ( sh4r.r[Rm], FRn ); sh4r.r[Rm] += FP_WIDTH;
nkeynes@359	2104	}
nkeynes@359	2105	break;
nkeynes@359	2106	case 0xA:
nkeynes@359	2107	{ /* FMOV FRm, @Rn */
nkeynes@359	2108	uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2109	MEM_FP_WRITE( sh4r.r[Rn], FRm );
nkeynes@359	2110	}
nkeynes@359	2111	break;
nkeynes@359	2112	case 0xB:
nkeynes@359	2113	{ /* FMOV FRm, @-Rn */
nkeynes@359	2114	uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2115	sh4r.r[Rn] -= FP_WIDTH; MEM_FP_WRITE( sh4r.r[Rn], FRm );
nkeynes@359	2116	}
nkeynes@359	2117	break;
nkeynes@359	2118	case 0xC:
nkeynes@359	2119	{ /* FMOV FRm, FRn */
nkeynes@359	2120	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2121	if( IS_FPU_DOUBLESIZE() )
nkeynes@359	2122	DR(FRn) = DR(FRm);
nkeynes@359	2123	else
nkeynes@359	2124	FR(FRn) = FR(FRm);
nkeynes@359	2125	}
nkeynes@359	2126	break;
nkeynes@359	2127	case 0xD:
nkeynes@359	2128	switch( (ir&0xF0) >> 4 ) {
nkeynes@359	2129	case 0x0:
nkeynes@359	2130	{ /* FSTS FPUL, FRn */
nkeynes@359	2131	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2132	CHECKFPUEN(); FR(FRn) = FPULf;
nkeynes@359	2133	}
nkeynes@359	2134	break;
nkeynes@359	2135	case 0x1:
nkeynes@359	2136	{ /* FLDS FRm, FPUL */
nkeynes@359	2137	uint32_t FRm = ((ir>>8)&0xF);
nkeynes@359	2138	CHECKFPUEN(); FPULf = FR(FRm);
nkeynes@359	2139	}
nkeynes@359	2140	break;
nkeynes@359	2141	case 0x2:
nkeynes@359	2142	{ /* FLOAT FPUL, FRn */
nkeynes@359	2143	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2144	CHECKFPUEN();
nkeynes@359	2145	if( IS_FPU_DOUBLEPREC() )
nkeynes@359	2146	DR(FRn) = (float)FPULi;
nkeynes@359	2147	else
nkeynes@359	2148	FR(FRn) = (float)FPULi;
nkeynes@359	2149	}
nkeynes@359	2150	break;
nkeynes@359	2151	case 0x3:
nkeynes@359	2152	{ /* FTRC FRm, FPUL */
nkeynes@359	2153	uint32_t FRm = ((ir>>8)&0xF);
nkeynes@359	2154	CHECKFPUEN();
nkeynes@359	2155	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2156	dtmp = DR(FRm);
nkeynes@359	2157	if( dtmp >= MAX_INTF )
nkeynes@359	2158	FPULi = MAX_INT;
nkeynes@359	2159	else if( dtmp <= MIN_INTF )
nkeynes@359	2160	FPULi = MIN_INT;
nkeynes@359	2161	else
nkeynes@359	2162	FPULi = (int32_t)dtmp;
nkeynes@359	2163	} else {
nkeynes@359	2164	ftmp = FR(FRm);
nkeynes@359	2165	if( ftmp >= MAX_INTF )
nkeynes@359	2166	FPULi = MAX_INT;
nkeynes@359	2167	else if( ftmp <= MIN_INTF )
nkeynes@359	2168	FPULi = MIN_INT;
nkeynes@359	2169	else
nkeynes@359	2170	FPULi = (int32_t)ftmp;
nkeynes@359	2171	}
nkeynes@359	2172	}
nkeynes@359	2173	break;
nkeynes@359	2174	case 0x4:
nkeynes@359	2175	{ /* FNEG FRn */
nkeynes@359	2176	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2177	CHECKFPUEN();
nkeynes@359	2178	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2179	DR(FRn) = -DR(FRn);
nkeynes@359	2180	} else {
nkeynes@359	2181	FR(FRn) = -FR(FRn);
nkeynes@359	2182	}
nkeynes@359	2183	}
nkeynes@359	2184	break;
nkeynes@359	2185	case 0x5:
nkeynes@359	2186	{ /* FABS FRn */
nkeynes@359	2187	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2188	CHECKFPUEN();
nkeynes@359	2189	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2190	DR(FRn) = fabs(DR(FRn));
nkeynes@359	2191	} else {
nkeynes@359	2192	FR(FRn) = fabsf(FR(FRn));
nkeynes@359	2193	}
nkeynes@359	2194	}
nkeynes@359	2195	break;
nkeynes@359	2196	case 0x6:
nkeynes@359	2197	{ /* FSQRT FRn */
nkeynes@359	2198	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2199	CHECKFPUEN();
nkeynes@359	2200	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2201	DR(FRn) = sqrt(DR(FRn));
nkeynes@359	2202	} else {
nkeynes@359	2203	FR(FRn) = sqrtf(FR(FRn));
nkeynes@359	2204	}
nkeynes@359	2205	}
nkeynes@359	2206	break;
nkeynes@359	2207	case 0x7:
nkeynes@359	2208	{ /* FSRRA FRn */
nkeynes@359	2209	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2210	CHECKFPUEN();
nkeynes@359	2211	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2212	FR(FRn) = 1.0/sqrtf(FR(FRn));
nkeynes@359	2213	}
nkeynes@359	2214	}
nkeynes@359	2215	break;
nkeynes@359	2216	case 0x8:
nkeynes@359	2217	{ /* FLDI0 FRn */
nkeynes@359	2218	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2219	CHECKFPUEN();
nkeynes@359	2220	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2221	DR(FRn) = 0.0;
nkeynes@359	2222	} else {
nkeynes@359	2223	FR(FRn) = 0.0;
nkeynes@359	2224	}
nkeynes@359	2225	}
nkeynes@359	2226	break;
nkeynes@359	2227	case 0x9:
nkeynes@359	2228	{ /* FLDI1 FRn */
nkeynes@359	2229	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2230	CHECKFPUEN();
nkeynes@359	2231	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2232	DR(FRn) = 1.0;
nkeynes@359	2233	} else {
nkeynes@359	2234	FR(FRn) = 1.0;
nkeynes@359	2235	}
nkeynes@359	2236	}
nkeynes@359	2237	break;
nkeynes@359	2238	case 0xA:
nkeynes@359	2239	{ /* FCNVSD FPUL, FRn */
nkeynes@359	2240	uint32_t FRn = ((ir>>8)&0xF);
nkeynes@359	2241	CHECKFPUEN();
nkeynes@359	2242	if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359	2243	DR(FRn) = (double)FPULf;
nkeynes@359	2244	}
nkeynes@359	2245	}
nkeynes@359	2246	break;
nkeynes@359	2247	case 0xB:
nkeynes@359	2248	{ /* FCNVDS FRm, FPUL */
nkeynes@359	2249	uint32_t FRm = ((ir>>8)&0xF);
nkeynes@359	2250	CHECKFPUEN();
nkeynes@359	2251	if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359	2252	FPULf = (float)DR(FRm);
nkeynes@359	2253	}
nkeynes@359	2254	}
nkeynes@359	2255	break;
nkeynes@359	2256	case 0xE:
nkeynes@359	2257	{ /* FIPR FVm, FVn */
nkeynes@359	2258	uint32_t FVn = ((ir>>10)&0x3); uint32_t FVm = ((ir>>8)&0x3);
nkeynes@359	2259	CHECKFPUEN();
nkeynes@359	2260	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2261	int tmp2 = FVn<<2;
nkeynes@359	2262	tmp = FVm<<2;
nkeynes@359	2263	FR(tmp2+3) = FR(tmp)*FR(tmp2) +
nkeynes@359	2264	FR(tmp+1)*FR(tmp2+1) +
nkeynes@359	2265	FR(tmp+2)*FR(tmp2+2) +
nkeynes@359	2266	FR(tmp+3)*FR(tmp2+3);
nkeynes@359	2267	}
nkeynes@359	2268	}
nkeynes@359	2269	break;
nkeynes@359	2270	case 0xF:
nkeynes@359	2271	switch( (ir&0x100) >> 8 ) {
nkeynes@359	2272	case 0x0:
nkeynes@359	2273	{ /* FSCA FPUL, FRn */
nkeynes@359	2274	uint32_t FRn = ((ir>>9)&0x7)<<1;
nkeynes@359	2275	CHECKFPUEN();
nkeynes@359	2276	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2277	float angle = (((float)(FPULi&0xFFFF))/65536.0) * 2 * M_PI;
nkeynes@359	2278	FR(FRn) = sinf(angle);
nkeynes@359	2279	FR((FRn)+1) = cosf(angle);
nkeynes@359	2280	}
nkeynes@359	2281	}
nkeynes@359	2282	break;
nkeynes@359	2283	case 0x1:
nkeynes@359	2284	switch( (ir&0x200) >> 9 ) {
nkeynes@359	2285	case 0x0:
nkeynes@359	2286	{ /* FTRV XMTRX, FVn */
nkeynes@359	2287	uint32_t FVn = ((ir>>10)&0x3);
nkeynes@359	2288	CHECKFPUEN();
nkeynes@359	2289	if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2290	tmp = FVn<<2;
nkeynes@359	2291	float fv[4] = { FR(tmp), FR(tmp+1), FR(tmp+2), FR(tmp+3) };
nkeynes@359	2292	FR(tmp) = XF(0) * fv[0] + XF(4)*fv[1] +
nkeynes@359	2293	XF(8)fv[2] + XF(12)fv[3];
nkeynes@359	2294	FR(tmp+1) = XF(1) * fv[0] + XF(5)*fv[1] +
nkeynes@359	2295	XF(9)fv[2] + XF(13)fv[3];
nkeynes@359	2296	FR(tmp+2) = XF(2) * fv[0] + XF(6)*fv[1] +
nkeynes@359	2297	XF(10)fv[2] + XF(14)fv[3];
nkeynes@359	2298	FR(tmp+3) = XF(3) * fv[0] + XF(7)*fv[1] +
nkeynes@359	2299	XF(11)fv[2] + XF(15)fv[3];
nkeynes@359	2300	}
nkeynes@359	2301	}
nkeynes@359	2302	break;
nkeynes@359	2303	case 0x1:
nkeynes@359	2304	switch( (ir&0xC00) >> 10 ) {
nkeynes@359	2305	case 0x0:
nkeynes@359	2306	{ /* FSCHG */
nkeynes@359	2307	CHECKFPUEN(); sh4r.fpscr ^= FPSCR_SZ;
nkeynes@359	2308	}
nkeynes@359	2309	break;
nkeynes@359	2310	case 0x2:
nkeynes@359	2311	{ /* FRCHG */
nkeynes@359	2312	CHECKFPUEN(); sh4r.fpscr ^= FPSCR_FR;
nkeynes@359	2313	}
nkeynes@359	2314	break;
nkeynes@359	2315	case 0x3:
nkeynes@359	2316	{ /* UNDEF */
nkeynes@359	2317	UNDEF(ir);
nkeynes@359	2318	}
nkeynes@359	2319	break;
nkeynes@359	2320	default:
nkeynes@359	2321	UNDEF();
nkeynes@359	2322	break;
nkeynes@359	2323	}
nkeynes@359	2324	break;
nkeynes@359	2325	}
nkeynes@359	2326	break;
nkeynes@359	2327	}
nkeynes@359	2328	break;
nkeynes@359	2329	default:
nkeynes@359	2330	UNDEF();
nkeynes@359	2331	break;
nkeynes@359	2332	}
nkeynes@359	2333	break;
nkeynes@359	2334	case 0xE:
nkeynes@359	2335	{ /* FMAC FR0, FRm, FRn */
nkeynes@359	2336	uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF);
nkeynes@359	2337	CHECKFPUEN();
nkeynes@359	2338	if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359	2339	DR(FRn) += DR(FRm)*DR(0);
nkeynes@359	2340	} else {
nkeynes@359	2341	FR(FRn) += FR(FRm)*FR(0);
nkeynes@359	2342	}
nkeynes@359	2343	}
nkeynes@359	2344	break;
nkeynes@359	2345	default:
nkeynes@359	2346	UNDEF();
nkeynes@359	2347	break;
nkeynes@359	2348	}
nkeynes@359	2349	break;
nkeynes@359	2350	}
nkeynes@1	2351
nkeynes@1	2352	sh4r.pc = sh4r.new_pc;
nkeynes@1	2353	sh4r.new_pc += 2;
nkeynes@2	2354	sh4r.in_delay_slot = 0;
nkeynes@273	2355	return TRUE;
nkeynes@1	2356	}