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lxdream.org :: lxdream/src/sh4/sh4mem.c
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4mem.c
changeset 150:c728a442b43f
prev137:41907543d890
next156:3b93648a3b07
author nkeynes
date Tue May 23 13:10:28 2006 +0000 (14 years ago)
permissions -rw-r--r--
last change Add texcache invalidates on direct writes to 64-bit vram.
Technically we should do it on direct writes to 32-bit vram as well, but
noone (sane) is going to try to write a texture there...
file annotate diff log raw
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/**
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 * $Id: sh4mem.c,v 1.11 2006-05-23 13:10:28 nkeynes Exp $
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 * sh4mem.c is responsible for the SH4's access to memory (including memory
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 * mapped I/O), using the page maps created in mem.c
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE sh4_module
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#include <string.h>
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#include <zlib.h>
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#include "dream.h"
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#include "mem.h"
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#include "mmio.h"
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#include "sh4core.h"
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#include "sh4mmio.h"
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#include "dreamcast.h"
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#include "pvr2/pvr2.h"
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#define OC_BASE 0x1C000000
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#define OC_TOP  0x20000000
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#define TRANSLATE_VIDEO_64BIT_ADDRESS(a)  ( (((a)&0x00FFFFF8)>>1)|(((a)&0x00000004)<<20)|((a)&0x03)|0x05000000 )
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#ifdef ENABLE_WATCH
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#define CHECK_READ_WATCH( addr, size ) \
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    if( mem_is_watched(addr,size,WATCH_READ) != NULL ) { \
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        WARN( "Watch triggered at %08X by %d byte read", addr, size ); \
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        dreamcast_stop(); \
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    }
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#define CHECK_WRITE_WATCH( addr, size, val )                  \
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    if( mem_is_watched(addr,size,WATCH_WRITE) != NULL ) { \
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        WARN( "Watch triggered at %08X by %d byte write <= %0*X", addr, size, size*2, val ); \
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        dreamcast_stop(); \
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    }
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#else
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#define CHECK_READ_WATCH( addr, size )
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#define CHECK_WRITE_WATCH( addr, size )
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#endif
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#define TRACE_IO( str, p, r, ... ) if(io_rgn[(uint32_t)p]->trace_flag) \
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TRACE( str " [%s.%s: %s]", __VA_ARGS__, \
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    MMIO_NAME_BYNUM((uint32_t)p), MMIO_REGID_BYNUM((uint32_t)p, r), \
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    MMIO_REGDESC_BYNUM((uint32_t)p, r) )
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extern struct mem_region mem_rgn[];
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extern struct mmio_region *P4_io[];
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int32_t sh4_read_p4( uint32_t addr )
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{
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    struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];
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    if( !io ) {
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        ERROR( "Attempted read from unknown P4 region: %08X", addr );
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        return 0;
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    } else {
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        return io->io_read( addr&0xFFF );
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    }    
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}
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void sh4_write_p4( uint32_t addr, int32_t val )
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{
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    struct mmio_region *io = P4_io[(addr&0x1FFFFFFF)>>19];
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    if( !io ) {
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        if( (addr & 0xFC000000) == 0xE0000000 ) {
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            /* Store queue */
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            SH4_WRITE_STORE_QUEUE( addr, val );
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        } else if( (addr & 0xFF000000) != 0xF4000000 ) {
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	    /* OC address cache isn't implemented, but don't complain about it.
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	     * Complain about anything else though */
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            ERROR( "Attempted write to unknown P4 region: %08X", addr );
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        }
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    } else {
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        io->io_write( addr&0xFFF, val );
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    }
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}
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int32_t sh4_read_phys_word( uint32_t addr )
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{
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    char *page;
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    if( addr >= 0xE0000000 ) /* P4 Area, handled specially */
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        return SIGNEXT16(sh4_read_p4( addr ));
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    if( (addr&0x1F800000) == 0x04000000 ) {
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        addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
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    }
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    page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
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    if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
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        if( page == NULL ) {
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            ERROR( "Attempted word read to missing page: %08X",
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                   addr );
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            return 0;
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        }
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        return SIGNEXT16(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));
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    } else {
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        return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));
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    }
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}
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int32_t sh4_read_long( uint32_t addr )
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{
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    char *page;
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    CHECK_READ_WATCH(addr,4);
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    if( addr >= 0xE0000000 ) /* P4 Area, handled specially */
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        return sh4_read_p4( addr );
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    if( (addr&0x1F800000) == 0x04000000 ) {
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        addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
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    }
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    if( IS_MMU_ENABLED() ) {
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        ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
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        sh4_stop();
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        return 0;
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    }
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    page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
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    if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
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        int32_t val;
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        if( page == NULL ) {
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            ERROR( "Attempted long read to missing page: %08X", addr );
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            return 0;
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        }
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        val = io_rgn[(uint32_t)page]->io_read(addr&0xFFF);
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        TRACE_IO( "Long read %08X <= %08X", page, (addr&0xFFF), val, addr );
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        return val;
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    } else {
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        return *(int32_t *)(page+(addr&0xFFF));
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    }
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}
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int32_t sh4_read_word( uint32_t addr )
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{
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    char *page;
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    CHECK_READ_WATCH(addr,2);
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    if( addr >= 0xE0000000 ) /* P4 Area, handled specially */
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        return SIGNEXT16(sh4_read_p4( addr ));
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    if( (addr&0x1F800000) == 0x04000000 ) {
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        addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
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    }
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    if( IS_MMU_ENABLED() ) {
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        ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
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        sh4_stop();
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        return 0;
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    }
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    page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
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    if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
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        int32_t val;
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        if( page == NULL ) {
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            ERROR( "Attempted word read to missing page: %08X", addr );
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            return 0;
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        }
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        val = SIGNEXT16(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));
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        TRACE_IO( "Word read %04X <= %08X", page, (addr&0xFFF), val&0xFFFF, addr );
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        return val;
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    } else {
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        return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));
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    }
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}
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int32_t sh4_read_byte( uint32_t addr )
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{
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    char *page;
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    CHECK_READ_WATCH(addr,1);
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    if( addr >= 0xE0000000 ) /* P4 Area, handled specially */
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        return SIGNEXT8(sh4_read_p4( addr ));
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    if( (addr&0x1F800000) == 0x04000000 ) {
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        addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
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    }
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    if( IS_MMU_ENABLED() ) {
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        ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
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        sh4_stop();
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        return 0;
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    }
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    page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
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    if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
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        int32_t val;
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        if( page == NULL ) {
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            ERROR( "Attempted byte read to missing page: %08X", addr );
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            return 0;
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        }
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        val = SIGNEXT8(io_rgn[(uint32_t)page]->io_read(addr&0xFFF));
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        TRACE_IO( "Byte read %02X <= %08X", page, (addr&0xFFF), val&0xFF, addr );
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        return val;
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    } else {
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        return SIGNEXT8(*(int8_t *)(page+(addr&0xFFF)));
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    }
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}
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void sh4_write_long( uint32_t addr, uint32_t val )
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{
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    char *page;
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    CHECK_WRITE_WATCH(addr,4,val);
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    if( addr >= 0xE0000000 ) {
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        sh4_write_p4( addr, val );
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        return;
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    }
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    if( (addr&0x1F800000) == 0x04000000 || 
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	(addr&0x1F800000) == 0x11000000 ) {
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	texcache_invalidate_page(addr& 0x7FFFFF);
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        addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
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    }
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    if( IS_MMU_ENABLED() ) {
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        ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
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        sh4_stop();
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        return;
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    }
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    if( (addr&0x1FFFFFFF) < 0x200000 ) {
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        ERROR( "Attempted write to read-only memory: %08X => %08X", val, addr);
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        sh4_stop();
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        return;
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    }
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    if( (addr&0x1F800000) == 0x00800000 )
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	asic_g2_write_word();
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    page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
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    if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
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        if( page == NULL ) {
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	    if( (addr & 0x1F000000) >= 0x04000000 &&
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		(addr & 0x1F000000) < 0x07000000 )
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		return;
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            ERROR( "Long write to missing page: %08X => %08X", val, addr );
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            return;
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        }
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        TRACE_IO( "Long write %08X => %08X", page, (addr&0xFFF), val, addr );
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        io_rgn[(uint32_t)page]->io_write(addr&0xFFF, val);
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    } else {
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        *(uint32_t *)(page+(addr&0xFFF)) = val;
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    }
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}
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void sh4_write_word( uint32_t addr, uint32_t val )
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{
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    char *page;
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nkeynes@10
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    CHECK_WRITE_WATCH(addr,2,val);
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    if( addr >= 0xE0000000 ) {
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        sh4_write_p4( addr, (int16_t)val );
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        return;
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    }
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    if( (addr&0x1F800000) == 0x04000000 ||
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	(addr&0x1F800000) == 0x11000000 ) {
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	texcache_invalidate_page(addr& 0x7FFFFF);
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        addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
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    }
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   272
    if( IS_MMU_ENABLED() ) {
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        ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
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        sh4_stop();
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        return;
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    }
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    page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
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    if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
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   279
        if( page == NULL ) {
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            ERROR( "Attempted word write to missing page: %08X", addr );
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            return;
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   282
        }
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        TRACE_IO( "Word write %04X => %08X", page, (addr&0xFFF), val&0xFFFF, addr );
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        io_rgn[(uint32_t)page]->io_write(addr&0xFFF, val);
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   285
    } else {
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   286
        *(uint16_t *)(page+(addr&0xFFF)) = val;
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   287
    }
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   288
}
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   290
void sh4_write_byte( uint32_t addr, uint32_t val )
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   291
{
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   292
    char *page;
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   293
    
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   294
    CHECK_WRITE_WATCH(addr,1,val);
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   295
nkeynes@83
   296
    if( addr >= 0xE0000000 ) {
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   297
        sh4_write_p4( addr, (int8_t)val );
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        return;
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   299
    }
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   300
    if( (addr&0x1F800000) == 0x04000000 ||
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   301
	(addr&0x1F800000) == 0x11000000 ) {
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   302
	texcache_invalidate_page(addr& 0x7FFFFF);
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   303
        addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
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   304
    }
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   305
    
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   306
    if( IS_MMU_ENABLED() ) {
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   307
        ERROR( "user-mode & mmu translation not implemented, aborting", NULL );
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   308
        sh4_stop();
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   309
        return;
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   310
    }
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   311
    page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
nkeynes@10
   312
    if( ((uint32_t)page) < MAX_IO_REGIONS ) { /* IO Region */
nkeynes@10
   313
        if( page == NULL ) {
nkeynes@10
   314
            ERROR( "Attempted byte write to missing page: %08X", addr );
nkeynes@10
   315
            return;
nkeynes@10
   316
        }
nkeynes@10
   317
        TRACE_IO( "Byte write %02X => %08X", page, (addr&0xFFF), val&0xFF, addr );
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   318
        io_rgn[(uint32_t)page]->io_write( (addr&0xFFF), val);
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   319
    } else {
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   320
        *(uint8_t *)(page+(addr&0xFFF)) = val;
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   321
    }
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   322
}
nkeynes@10
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nkeynes@10
   324
nkeynes@10
   325
nkeynes@10
   326
/* FIXME: Handle all the many special cases when the range doesn't fall cleanly
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 * into the same memory black
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   328
 */
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   329
void mem_copy_from_sh4( char *dest, uint32_t srcaddr, size_t count ) {
nkeynes@103
   330
    if( srcaddr >= 0x04000000 && srcaddr < 0x05000000 ) {
nkeynes@103
   331
	pvr2_vram64_read( dest, srcaddr, count );
nkeynes@103
   332
    } else {
nkeynes@103
   333
	char *src = mem_get_region(srcaddr);
nkeynes@103
   334
	if( src == NULL ) {
nkeynes@103
   335
	    ERROR( "Attempted block read from unknown address %08X", srcaddr );
nkeynes@103
   336
	} else {
nkeynes@103
   337
	    memcpy( dest, src, count );
nkeynes@103
   338
	}
nkeynes@103
   339
    }
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   340
}
nkeynes@10
   341
nkeynes@10
   342
void mem_copy_to_sh4( uint32_t destaddr, char *src, size_t count ) {
nkeynes@130
   343
    if( destaddr >= 0x10000000 && destaddr < 0x11000000 ) {
nkeynes@100
   344
	pvr2_ta_write( src, count );
nkeynes@130
   345
    } else if( destaddr >= 0x04000000 && destaddr < 0x05000000 ||
nkeynes@130
   346
	       destaddr >= 0x11000000 && destaddr < 0x12000000 ) {
nkeynes@103
   347
	pvr2_vram64_write( destaddr, src, count );
nkeynes@90
   348
    } else {
nkeynes@90
   349
	char *dest = mem_get_region(destaddr);
nkeynes@90
   350
	if( dest == NULL )
nkeynes@103
   351
	    ERROR( "Attempted block write to unknown address %08X", destaddr );
nkeynes@103
   352
	else {
nkeynes@90
   353
	    memcpy( dest, src, count );
nkeynes@103
   354
	}
nkeynes@90
   355
    }
nkeynes@10
   356
}
.