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lxdream.org :: lxdream/src/sh4/sh4core.in
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.in
changeset 732:f05753bbe723
prev671:a530ea88eebd
next736:a02d1475ccfd
author nkeynes
date Thu Jul 10 01:46:00 2008 +0000 (11 years ago)
permissions -rw-r--r--
last change Fix alignment check for 64-bit FMOVs
Add missing MMU code etc to FMOV emu implementation
file annotate diff log raw
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/**
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 * $Id$
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 * 
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 * SH4 emulation core, and parent module for all the SH4 peripheral
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 * modules.
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#define MODULE sh4_module
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#include <assert.h>
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#include <math.h>
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#include "dream.h"
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#include "dreamcast.h"
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#include "eventq.h"
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#include "mem.h"
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#include "clock.h"
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#include "syscall.h"
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#include "sh4/sh4core.h"
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#include "sh4/sh4mmio.h"
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#include "sh4/sh4stat.h"
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#include "sh4/intc.h"
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#define SH4_CALLTRACE 1
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#define MAX_INT 0x7FFFFFFF
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#define MIN_INT 0x80000000
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#define MAX_INTF 2147483647.0
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#define MIN_INTF -2147483648.0
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/********************** SH4 Module Definition ****************************/
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uint32_t sh4_run_slice( uint32_t nanosecs ) 
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{
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    int i;
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    sh4r.slice_cycle = 0;
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    if( sh4r.sh4_state != SH4_STATE_RUNNING ) {
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	sh4_sleep_run_slice(nanosecs);
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    }
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    if( sh4_breakpoint_count == 0 ) {
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	for( ; sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    if( !sh4_execute_instruction() ) {
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		break;
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	    }
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	}
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    } else {
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	for( ;sh4r.slice_cycle < nanosecs; sh4r.slice_cycle += sh4_cpu_period ) {
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	    if( SH4_EVENT_PENDING() ) {
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		if( sh4r.event_types & PENDING_EVENT ) {
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		    event_execute();
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		}
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		/* Eventq execute may (quite likely) deliver an immediate IRQ */
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		if( sh4r.event_types & PENDING_IRQ ) {
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		    sh4_accept_interrupt();
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		}
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	    }
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	    if( !sh4_execute_instruction() )
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		break;
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#ifdef ENABLE_DEBUG_MODE
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	    for( i=0; i<sh4_breakpoint_count; i++ ) {
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		if( sh4_breakpoints[i].address == sh4r.pc ) {
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		    break;
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		}
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	    }
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	    if( i != sh4_breakpoint_count ) {
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		dreamcast_stop();
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		if( sh4_breakpoints[i].type == BREAK_ONESHOT )
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		    sh4_clear_breakpoint( sh4r.pc, BREAK_ONESHOT );
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		break;
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	    }
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#endif	
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	}
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    }
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    /* If we aborted early, but the cpu is still technically running,
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     * we're doing a hard abort - cut the timeslice back to what we
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     * actually executed
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     */
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    if( sh4r.slice_cycle != nanosecs && sh4r.sh4_state == SH4_STATE_RUNNING ) {
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	nanosecs = sh4r.slice_cycle;
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    }
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    if( sh4r.sh4_state != SH4_STATE_STANDBY ) {
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	TMU_run_slice( nanosecs );
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	SCIF_run_slice( nanosecs );
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    }
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    return nanosecs;
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}
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/********************** SH4 emulation core  ****************************/
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#define UNDEF(ir) return sh4_raise_slot_exception(EXC_ILLEGAL, EXC_SLOT_ILLEGAL)
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#define UNIMP(ir) do{ ERROR( "Halted on unimplemented instruction at %08x, opcode = %04x", sh4r.pc, ir ); dreamcast_stop(); return FALSE; }while(0)
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#if(SH4_CALLTRACE == 1)
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#define MAX_CALLSTACK 32
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static struct call_stack {
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    sh4addr_t call_addr;
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    sh4addr_t target_addr;
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    sh4addr_t stack_pointer;
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} call_stack[MAX_CALLSTACK];
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static int call_stack_depth = 0;
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int sh4_call_trace_on = 0;
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static inline void trace_call( sh4addr_t source, sh4addr_t dest ) 
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{
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    if( call_stack_depth < MAX_CALLSTACK ) {
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	call_stack[call_stack_depth].call_addr = source;
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	call_stack[call_stack_depth].target_addr = dest;
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	call_stack[call_stack_depth].stack_pointer = sh4r.r[15];
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    }
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    call_stack_depth++;
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}
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static inline void trace_return( sh4addr_t source, sh4addr_t dest )
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{
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    if( call_stack_depth > 0 ) {
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	call_stack_depth--;
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    }
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}
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void fprint_stack_trace( FILE *f )
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{
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    int i = call_stack_depth -1;
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    if( i >= MAX_CALLSTACK )
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	i = MAX_CALLSTACK - 1;
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    for( ; i >= 0; i-- ) {
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	fprintf( f, "%d. Call from %08X => %08X, SP=%08X\n", 
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		 (call_stack_depth - i), call_stack[i].call_addr,
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		 call_stack[i].target_addr, call_stack[i].stack_pointer );
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    }
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}
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#define TRACE_CALL( source, dest ) trace_call(source, dest)
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#define TRACE_RETURN( source, dest ) trace_return(source, dest)
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#else
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#define TRACE_CALL( dest, rts ) 
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#define TRACE_RETURN( source, dest )
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#endif
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#define CHECKPRIV() if( !IS_SH4_PRIVMODE() ) return sh4_raise_slot_exception( EXC_ILLEGAL, EXC_SLOT_ILLEGAL )
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#define CHECKRALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKRALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKRALIGN64(addr) if( (addr)&0x07 ) return sh4_raise_exception( EXC_DATA_ADDR_READ )
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#define CHECKWALIGN16(addr) if( (addr)&0x01 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKWALIGN32(addr) if( (addr)&0x03 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKWALIGN64(addr) if( (addr)&0x07 ) return sh4_raise_exception( EXC_DATA_ADDR_WRITE )
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#define CHECKFPUEN() if( !IS_FPU_ENABLED() ) { if( ir == 0xFFFD ) { UNDEF(ir); } else { return sh4_raise_slot_exception( EXC_FPU_DISABLED, EXC_SLOT_FPU_DISABLED ); } }
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#define CHECKDEST(p) if( (p) == 0 ) { ERROR( "%08X: Branch/jump to NULL, CPU halted", sh4r.pc ); dreamcast_stop(); return FALSE; }
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#define CHECKSLOTILLEGAL() if(sh4r.in_delay_slot) return sh4_raise_exception(EXC_SLOT_ILLEGAL)
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#define MEM_READ_BYTE( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_byte(memtmp); }
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#define MEM_READ_WORD( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_word(memtmp); }
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#define MEM_READ_LONG( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_long(memtmp); }
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#define MEM_WRITE_BYTE( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_byte(memtmp, val); }
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#define MEM_WRITE_WORD( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_word(memtmp, val); }
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#define MEM_WRITE_LONG( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_long(memtmp, val); }
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#define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
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#define MEM_FP_READ( addr, reg ) \
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    if( IS_FPU_DOUBLESIZE() ) { \
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	CHECKRALIGN64(addr); \
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	memtmp = mmu_vma_to_phys_read(addr); \
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	if( memtmp == MMU_VMA_ERROR ) { \
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	    return TRUE; \
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	} else { \
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	    if( reg & 1 ) { \
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                *((uint32_t *)&XF((reg) & 0x0E)) = sh4_read_long(memtmp); \
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	        *((uint32_t *)&XF(reg)) = sh4_read_long(memtmp+4); \
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	    } else { \
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	        *((uint32_t *)&FR(reg)) = sh4_read_long(memtmp); \
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	        *((uint32_t *)&FR((reg) | 0x01)) = sh4_read_long(memtmp+4); \
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	    } \
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	} \
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    } else { \
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        CHECKRALIGN32(addr); \
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        memtmp = mmu_vma_to_phys_read(addr); \
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        if( memtmp == MMU_VMA_ERROR ) { \
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            return TRUE; \
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        } else { \
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	    *((uint32_t *)&FR(reg)) = sh4_read_long(memtmp); \
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	} \
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    }
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#define MEM_FP_WRITE( addr, reg ) \
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    if( IS_FPU_DOUBLESIZE() ) { \
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        CHECKWALIGN64(addr); \
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	memtmp = mmu_vma_to_phys_write(addr); \
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	if( memtmp == MMU_VMA_ERROR ) { \
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	    return TRUE; \
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	} else { \
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            if( reg & 1 ) { \
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	        sh4_write_long( memtmp, *((uint32_t *)&XF((reg)&0x0E)) ); \
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	        sh4_write_long( memtmp+4, *((uint32_t *)&XF(reg)) ); \
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	    } else { \
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	        sh4_write_long( memtmp, *((uint32_t *)&FR(reg)) ); \ 
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	        sh4_write_long( memtmp+4, *((uint32_t *)&FR((reg)|0x01)) ); \
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	    } \
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	} \
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    } else { \
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    	CHECKWALIGN32(addr); \
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	memtmp = mmu_vma_to_phys_write(addr); \
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	if( memtmp == MMU_VMA_ERROR ) { \
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	    return TRUE; \
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	} else { \
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	    sh4_write_long( memtmp, *((uint32_t *)&FR((reg))) ); \
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	} \
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    }
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gboolean sh4_execute_instruction( void )
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{
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    uint32_t pc;
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    unsigned short ir;
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    uint32_t tmp;
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    float ftmp;
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    double dtmp;
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    int64_t memtmp; // temporary holder for memory reads
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#define R0 sh4r.r[0]
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    pc = sh4r.pc;
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    if( pc > 0xFFFFFF00 ) {
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	/* SYSCALL Magic */
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	syscall_invoke( pc );
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	sh4r.in_delay_slot = 0;
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	pc = sh4r.pc = sh4r.pr;
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	sh4r.new_pc = sh4r.pc + 2;
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        return TRUE;
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    }
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    CHECKRALIGN16(pc);
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#ifdef ENABLE_SH4STATS
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    sh4_stats_add_by_pc(sh4r.pc);
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#endif
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    /* Read instruction */
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    if( !IS_IN_ICACHE(pc) ) {
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	if( !mmu_update_icache(pc) ) {
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	    // Fault - look for the fault handler
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	    if( !mmu_update_icache(sh4r.pc) ) {
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		// double fault - halt
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		ERROR( "Double fault - halting" );
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		dreamcast_stop();
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		return FALSE;
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	    }
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	}
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	pc = sh4r.pc;
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    }
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    assert( IS_IN_ICACHE(pc) );
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    ir = *(uint16_t *)GET_ICACHE_PTR(sh4r.pc);
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%%
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AND Rm, Rn {: sh4r.r[Rn] &= sh4r.r[Rm]; :}
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AND #imm, R0 {: R0 &= imm; :}
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 AND.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp ); :}
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NOT Rm, Rn {: sh4r.r[Rn] = ~sh4r.r[Rm]; :}
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OR Rm, Rn {: sh4r.r[Rn] |= sh4r.r[Rm]; :}
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OR #imm, R0  {: R0 |= imm; :}
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 OR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp ); :}
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TAS.B @Rn {:
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    MEM_READ_BYTE( sh4r.r[Rn], tmp );
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    sh4r.t = ( tmp == 0 ? 1 : 0 );
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    MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );
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:}
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TST Rm, Rn {: sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1); :}
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TST #imm, R0 {: sh4r.t = (R0 & imm ? 0 : 1); :}
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 TST.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); sh4r.t = ( tmp & imm ? 0 : 1 ); :}
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XOR Rm, Rn {: sh4r.r[Rn] ^= sh4r.r[Rm]; :}
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XOR #imm, R0 {: R0 ^= imm; :}
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 XOR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp ); :}
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XTRCT Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rn]>>16) | (sh4r.r[Rm]<<16); :}
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ROTL Rn {:
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    sh4r.t = sh4r.r[Rn] >> 31;
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    sh4r.r[Rn] <<= 1;
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    sh4r.r[Rn] |= sh4r.t;
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:}
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ROTR Rn {:
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    sh4r.t = sh4r.r[Rn] & 0x00000001;
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    sh4r.r[Rn] >>= 1;
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    sh4r.r[Rn] |= (sh4r.t << 31);
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:}
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ROTCL Rn {:
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    tmp = sh4r.r[Rn] >> 31;
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    sh4r.r[Rn] <<= 1;
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    sh4r.r[Rn] |= sh4r.t;
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    sh4r.t = tmp;
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   309
:}
nkeynes@359
   310
ROTCR Rn {:
nkeynes@359
   311
    tmp = sh4r.r[Rn] & 0x00000001;
nkeynes@359
   312
    sh4r.r[Rn] >>= 1;
nkeynes@359
   313
    sh4r.r[Rn] |= (sh4r.t << 31 );
nkeynes@359
   314
    sh4r.t = tmp;
nkeynes@359
   315
:}
nkeynes@359
   316
SHAD Rm, Rn {:
nkeynes@359
   317
    tmp = sh4r.r[Rm];
nkeynes@359
   318
    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359
   319
    else if( (tmp & 0x1F) == 0 )  
nkeynes@359
   320
        sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 31;
nkeynes@359
   321
    else 
nkeynes@359
   322
	sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> (((~sh4r.r[Rm]) & 0x1F)+1);
nkeynes@359
   323
:}
nkeynes@359
   324
SHLD Rm, Rn {:
nkeynes@359
   325
    tmp = sh4r.r[Rm];
nkeynes@359
   326
    if( (tmp & 0x80000000) == 0 ) sh4r.r[Rn] <<= (tmp&0x1f);
nkeynes@359
   327
    else if( (tmp & 0x1F) == 0 ) sh4r.r[Rn] = 0;
nkeynes@359
   328
    else sh4r.r[Rn] >>= (((~tmp) & 0x1F)+1);
nkeynes@359
   329
:}
nkeynes@359
   330
SHAL Rn {:
nkeynes@359
   331
    sh4r.t = sh4r.r[Rn] >> 31;
nkeynes@359
   332
    sh4r.r[Rn] <<= 1;
nkeynes@359
   333
:}
nkeynes@359
   334
SHAR Rn {:
nkeynes@359
   335
    sh4r.t = sh4r.r[Rn] & 0x00000001;
nkeynes@359
   336
    sh4r.r[Rn] = ((int32_t)sh4r.r[Rn]) >> 1;
nkeynes@359
   337
:}
nkeynes@359
   338
SHLL Rn {: sh4r.t = sh4r.r[Rn] >> 31; sh4r.r[Rn] <<= 1; :}
nkeynes@359
   339
SHLR Rn {: sh4r.t = sh4r.r[Rn] & 0x00000001; sh4r.r[Rn] >>= 1; :}
nkeynes@359
   340
SHLL2 Rn {: sh4r.r[Rn] <<= 2; :}
nkeynes@359
   341
SHLR2 Rn {: sh4r.r[Rn] >>= 2; :}
nkeynes@359
   342
SHLL8 Rn {: sh4r.r[Rn] <<= 8; :}
nkeynes@359
   343
SHLR8 Rn {: sh4r.r[Rn] >>= 8; :}
nkeynes@359
   344
SHLL16 Rn {: sh4r.r[Rn] <<= 16; :}
nkeynes@359
   345
SHLR16 Rn {: sh4r.r[Rn] >>= 16; :}
nkeynes@359
   346
nkeynes@359
   347
EXTU.B Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x000000FF; :}
nkeynes@359
   348
EXTU.W Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]&0x0000FFFF; :}
nkeynes@359
   349
EXTS.B Rm, Rn {: sh4r.r[Rn] = SIGNEXT8( sh4r.r[Rm]&0x000000FF ); :}
nkeynes@359
   350
EXTS.W Rm, Rn {: sh4r.r[Rn] = SIGNEXT16( sh4r.r[Rm]&0x0000FFFF ); :}
nkeynes@359
   351
SWAP.B Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]&0xFFFF0000) | ((sh4r.r[Rm]&0x0000FF00)>>8) | ((sh4r.r[Rm]&0x000000FF)<<8); :}
nkeynes@359
   352
SWAP.W Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rm]>>16) | (sh4r.r[Rm]<<16); :}
nkeynes@359
   353
nkeynes@359
   354
CLRT {: sh4r.t = 0; :}
nkeynes@359
   355
SETT {: sh4r.t = 1; :}
nkeynes@359
   356
CLRMAC {: sh4r.mac = 0; :}
nkeynes@550
   357
LDTLB {: MMU_ldtlb(); :}
nkeynes@359
   358
CLRS {: sh4r.s = 0; :}
nkeynes@359
   359
SETS {: sh4r.s = 1; :}
nkeynes@359
   360
MOVT Rn {: sh4r.r[Rn] = sh4r.t; :}
nkeynes@359
   361
NOP {: /* NOP */ :}
nkeynes@359
   362
nkeynes@359
   363
PREF @Rn {:
nkeynes@359
   364
     tmp = sh4r.r[Rn];
nkeynes@359
   365
     if( (tmp & 0xFC000000) == 0xE0000000 ) {
nkeynes@369
   366
	 sh4_flush_store_queue(tmp);
nkeynes@359
   367
     }
nkeynes@359
   368
:}
nkeynes@359
   369
OCBI @Rn {: :}
nkeynes@359
   370
OCBP @Rn {: :}
nkeynes@359
   371
OCBWB @Rn {: :}
nkeynes@359
   372
MOVCA.L R0, @Rn {:
nkeynes@359
   373
    tmp = sh4r.r[Rn];
nkeynes@359
   374
    CHECKWALIGN32(tmp);
nkeynes@359
   375
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   376
:}
nkeynes@359
   377
MOV.B Rm, @(R0, Rn) {: MEM_WRITE_BYTE( R0 + sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   378
MOV.W Rm, @(R0, Rn) {: 
nkeynes@359
   379
    CHECKWALIGN16( R0 + sh4r.r[Rn] );
nkeynes@359
   380
    MEM_WRITE_WORD( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   381
:}
nkeynes@359
   382
MOV.L Rm, @(R0, Rn) {:
nkeynes@359
   383
    CHECKWALIGN32( R0 + sh4r.r[Rn] );
nkeynes@359
   384
    MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
nkeynes@359
   385
:}
nkeynes@586
   386
MOV.B @(R0, Rm), Rn {: MEM_READ_BYTE( R0 + sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@359
   387
MOV.W @(R0, Rm), Rn {: CHECKRALIGN16( R0 + sh4r.r[Rm] );
nkeynes@586
   388
    MEM_READ_WORD( R0 + sh4r.r[Rm], sh4r.r[Rn] );
nkeynes@359
   389
:}
nkeynes@359
   390
MOV.L @(R0, Rm), Rn {: CHECKRALIGN32( R0 + sh4r.r[Rm] );
nkeynes@586
   391
    MEM_READ_LONG( R0 + sh4r.r[Rm], sh4r.r[Rn] );
nkeynes@359
   392
:}
nkeynes@359
   393
MOV.L Rm, @(disp, Rn) {:
nkeynes@359
   394
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   395
    CHECKWALIGN32( tmp );
nkeynes@359
   396
    MEM_WRITE_LONG( tmp, sh4r.r[Rm] );
nkeynes@359
   397
:}
nkeynes@359
   398
MOV.B Rm, @Rn {: MEM_WRITE_BYTE( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   399
MOV.W Rm, @Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@359
   400
MOV.L Rm, @Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn], sh4r.r[Rm] ); :}
nkeynes@587
   401
 MOV.B Rm, @-Rn {: MEM_WRITE_BYTE( sh4r.r[Rn]-1, sh4r.r[Rm] ); sh4r.r[Rn]--; :}
nkeynes@587
   402
 MOV.W Rm, @-Rn {: CHECKWALIGN16( sh4r.r[Rn] ); MEM_WRITE_WORD( sh4r.r[Rn]-2, sh4r.r[Rm] ); sh4r.r[Rn] -= 2; :}
nkeynes@587
   403
 MOV.L Rm, @-Rn {: CHECKWALIGN32( sh4r.r[Rn] ); MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.r[Rm] ); sh4r.r[Rn] -= 4; :}
nkeynes@359
   404
MOV.L @(disp, Rm), Rn {:
nkeynes@359
   405
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   406
    CHECKRALIGN32( tmp );
nkeynes@586
   407
    MEM_READ_LONG( tmp, sh4r.r[Rn] );
nkeynes@359
   408
:}
nkeynes@586
   409
MOV.B @Rm, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@586
   410
 MOV.W @Rm, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@586
   411
 MOV.L @Rm, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); :}
nkeynes@359
   412
MOV Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]; :}
nkeynes@586
   413
 MOV.B @Rm+, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] ++; :}
nkeynes@586
   414
 MOV.W @Rm+, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 2; :}
nkeynes@586
   415
 MOV.L @Rm+, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 4; :}
nkeynes@359
   416
MOV.L @(disp, PC), Rn {:
nkeynes@359
   417
    CHECKSLOTILLEGAL();
nkeynes@359
   418
    tmp = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@586
   419
    MEM_READ_LONG( tmp, sh4r.r[Rn] );
nkeynes@359
   420
:}
nkeynes@359
   421
MOV.B R0, @(disp, GBR) {: MEM_WRITE_BYTE( sh4r.gbr + disp, R0 ); :}
nkeynes@359
   422
MOV.W R0, @(disp, GBR) {:
nkeynes@359
   423
    tmp = sh4r.gbr + disp;
nkeynes@359
   424
    CHECKWALIGN16( tmp );
nkeynes@359
   425
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   426
:}
nkeynes@359
   427
MOV.L R0, @(disp, GBR) {:
nkeynes@359
   428
    tmp = sh4r.gbr + disp;
nkeynes@359
   429
    CHECKWALIGN32( tmp );
nkeynes@359
   430
    MEM_WRITE_LONG( tmp, R0 );
nkeynes@359
   431
:}
nkeynes@586
   432
 MOV.B @(disp, GBR), R0 {: MEM_READ_BYTE( sh4r.gbr + disp, R0 ); :}
nkeynes@359
   433
MOV.W @(disp, GBR), R0 {: 
nkeynes@359
   434
    tmp = sh4r.gbr + disp;
nkeynes@359
   435
    CHECKRALIGN16( tmp );
nkeynes@586
   436
    MEM_READ_WORD( tmp, R0 );
nkeynes@359
   437
:}
nkeynes@359
   438
MOV.L @(disp, GBR), R0 {:
nkeynes@359
   439
    tmp = sh4r.gbr + disp;
nkeynes@359
   440
    CHECKRALIGN32( tmp );
nkeynes@586
   441
    MEM_READ_LONG( tmp, R0 );
nkeynes@359
   442
:}
nkeynes@359
   443
MOV.B R0, @(disp, Rn) {: MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 ); :}
nkeynes@359
   444
MOV.W R0, @(disp, Rn) {: 
nkeynes@359
   445
    tmp = sh4r.r[Rn] + disp;
nkeynes@359
   446
    CHECKWALIGN16( tmp );
nkeynes@359
   447
    MEM_WRITE_WORD( tmp, R0 );
nkeynes@359
   448
:}
nkeynes@586
   449
 MOV.B @(disp, Rm), R0 {: MEM_READ_BYTE( sh4r.r[Rm] + disp, R0 ); :}
nkeynes@359
   450
MOV.W @(disp, Rm), R0 {: 
nkeynes@359
   451
    tmp = sh4r.r[Rm] + disp;
nkeynes@359
   452
    CHECKRALIGN16( tmp );
nkeynes@586
   453
    MEM_READ_WORD( tmp, R0 );
nkeynes@359
   454
:}
nkeynes@359
   455
MOV.W @(disp, PC), Rn {:
nkeynes@359
   456
    CHECKSLOTILLEGAL();
nkeynes@359
   457
    tmp = pc + 4 + disp;
nkeynes@586
   458
    MEM_READ_WORD( tmp, sh4r.r[Rn] );
nkeynes@359
   459
:}
nkeynes@359
   460
MOVA @(disp, PC), R0 {:
nkeynes@359
   461
    CHECKSLOTILLEGAL();
nkeynes@359
   462
    R0 = (pc&0xFFFFFFFC) + disp + 4;
nkeynes@359
   463
:}
nkeynes@359
   464
MOV #imm, Rn {:  sh4r.r[Rn] = imm; :}
nkeynes@359
   465
nkeynes@732
   466
FMOV @(R0, Rm), FRn {: MEM_FP_READ( sh4r.r[Rm] + R0, FRn ); :}
nkeynes@732
   467
FMOV FRm, @(R0, Rn) {: MEM_FP_WRITE( sh4r.r[Rn] + R0, FRm ); :}
nkeynes@732
   468
FMOV @Rm, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); :}
nkeynes@732
   469
FMOV @Rm+, FRn {: MEM_FP_READ( sh4r.r[Rm], FRn ); sh4r.r[Rm] += FP_WIDTH; :}
nkeynes@732
   470
FMOV FRm, @Rn {: MEM_FP_WRITE( sh4r.r[Rn], FRm ); :}
nkeynes@732
   471
 FMOV FRm, @-Rn {: MEM_FP_WRITE( sh4r.r[Rn] - FP_WIDTH, FRm ); sh4r.r[Rn] -= FP_WIDTH; :}
nkeynes@732
   472
FMOV FRm, FRn {: 
nkeynes@732
   473
    if( IS_FPU_DOUBLESIZE() )
nkeynes@732
   474
	DR(FRn) = DR(FRm);
nkeynes@732
   475
    else
nkeynes@732
   476
	FR(FRn) = FR(FRm);
nkeynes@732
   477
:}
nkeynes@732
   478
nkeynes@359
   479
CMP/EQ #imm, R0 {: sh4r.t = ( R0 == imm ? 1 : 0 ); :}
nkeynes@359
   480
CMP/EQ Rm, Rn {: sh4r.t = ( sh4r.r[Rm] == sh4r.r[Rn] ? 1 : 0 ); :}
nkeynes@359
   481
CMP/GE Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   482
CMP/GT Rm, Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > ((int32_t)sh4r.r[Rm]) ? 1 : 0 ); :}
nkeynes@359
   483
CMP/HI Rm, Rn {: sh4r.t = ( sh4r.r[Rn] > sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   484
CMP/HS Rm, Rn {: sh4r.t = ( sh4r.r[Rn] >= sh4r.r[Rm] ? 1 : 0 ); :}
nkeynes@359
   485
CMP/PL Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) > 0 ? 1 : 0 ); :}
nkeynes@359
   486
CMP/PZ Rn {: sh4r.t = ( ((int32_t)sh4r.r[Rn]) >= 0 ? 1 : 0 ); :}
nkeynes@359
   487
CMP/STR Rm, Rn {: 
nkeynes@359
   488
    /* set T = 1 if any byte in RM & RN is the same */
nkeynes@359
   489
    tmp = sh4r.r[Rm] ^ sh4r.r[Rn];
nkeynes@359
   490
    sh4r.t = ((tmp&0x000000FF)==0 || (tmp&0x0000FF00)==0 ||
nkeynes@359
   491
             (tmp&0x00FF0000)==0 || (tmp&0xFF000000)==0)?1:0;
nkeynes@359
   492
:}
nkeynes@359
   493
nkeynes@359
   494
ADD Rm, Rn {: sh4r.r[Rn] += sh4r.r[Rm]; :}
nkeynes@359
   495
ADD #imm, Rn {: sh4r.r[Rn] += imm; :}
nkeynes@359
   496
ADDC Rm, Rn {:
nkeynes@359
   497
    tmp = sh4r.r[Rn];
nkeynes@359
   498
    sh4r.r[Rn] += sh4r.r[Rm] + sh4r.t;
nkeynes@359
   499
    sh4r.t = ( sh4r.r[Rn] < tmp || (sh4r.r[Rn] == tmp && sh4r.t != 0) ? 1 : 0 );
nkeynes@359
   500
:}
nkeynes@359
   501
ADDV Rm, Rn {:
nkeynes@359
   502
    tmp = sh4r.r[Rn] + sh4r.r[Rm];
nkeynes@359
   503
    sh4r.t = ( (sh4r.r[Rn]>>31) == (sh4r.r[Rm]>>31) && ((sh4r.r[Rn]>>31) != (tmp>>31)) );
nkeynes@359
   504
    sh4r.r[Rn] = tmp;
nkeynes@359
   505
:}
nkeynes@359
   506
DIV0U {: sh4r.m = sh4r.q = sh4r.t = 0; :}
nkeynes@359
   507
DIV0S Rm, Rn {: 
nkeynes@359
   508
    sh4r.q = sh4r.r[Rn]>>31;
nkeynes@359
   509
    sh4r.m = sh4r.r[Rm]>>31;
nkeynes@359
   510
    sh4r.t = sh4r.q ^ sh4r.m;
nkeynes@359
   511
:}
nkeynes@359
   512
DIV1 Rm, Rn {:
nkeynes@384
   513
    /* This is derived from the sh4 manual with some simplifications */
nkeynes@359
   514
    uint32_t tmp0, tmp1, tmp2, dir;
nkeynes@359
   515
nkeynes@359
   516
    dir = sh4r.q ^ sh4r.m;
nkeynes@359
   517
    sh4r.q = (sh4r.r[Rn] >> 31);
nkeynes@359
   518
    tmp2 = sh4r.r[Rm];
nkeynes@359
   519
    sh4r.r[Rn] = (sh4r.r[Rn] << 1) | sh4r.t;
nkeynes@359
   520
    tmp0 = sh4r.r[Rn];
nkeynes@359
   521
    if( dir ) {
nkeynes@359
   522
         sh4r.r[Rn] += tmp2;
nkeynes@359
   523
         tmp1 = (sh4r.r[Rn]<tmp0 ? 1 : 0 );
nkeynes@359
   524
    } else {
nkeynes@359
   525
         sh4r.r[Rn] -= tmp2;
nkeynes@359
   526
         tmp1 = (sh4r.r[Rn]>tmp0 ? 1 : 0 );
nkeynes@359
   527
    }
nkeynes@359
   528
    sh4r.q ^= sh4r.m ^ tmp1;
nkeynes@359
   529
    sh4r.t = ( sh4r.q == sh4r.m ? 1 : 0 );
nkeynes@359
   530
:}
nkeynes@359
   531
DMULS.L Rm, Rn {: sh4r.mac = SIGNEXT32(sh4r.r[Rm]) * SIGNEXT32(sh4r.r[Rn]); :}
nkeynes@359
   532
DMULU.L Rm, Rn {: sh4r.mac = ((uint64_t)sh4r.r[Rm]) * ((uint64_t)sh4r.r[Rn]); :}
nkeynes@359
   533
DT Rn {:
nkeynes@359
   534
    sh4r.r[Rn] --;
nkeynes@359
   535
    sh4r.t = ( sh4r.r[Rn] == 0 ? 1 : 0 );
nkeynes@359
   536
:}
nkeynes@359
   537
MAC.W @Rm+, @Rn+ {:
nkeynes@587
   538
    int32_t stmp;
nkeynes@587
   539
    if( Rm == Rn ) {
nkeynes@587
   540
	CHECKRALIGN16(sh4r.r[Rn]);
nkeynes@587
   541
	MEM_READ_WORD( sh4r.r[Rn], tmp );
nkeynes@587
   542
	stmp = SIGNEXT16(tmp);
nkeynes@587
   543
	MEM_READ_WORD( sh4r.r[Rn]+2, tmp );
nkeynes@587
   544
	stmp *= SIGNEXT16(tmp);
nkeynes@587
   545
	sh4r.r[Rn] += 4;
nkeynes@587
   546
    } else {
nkeynes@587
   547
	CHECKRALIGN16( sh4r.r[Rn] );
nkeynes@587
   548
	CHECKRALIGN16( sh4r.r[Rm] );
nkeynes@587
   549
	MEM_READ_WORD(sh4r.r[Rn], tmp);
nkeynes@587
   550
	stmp = SIGNEXT16(tmp);
nkeynes@587
   551
	MEM_READ_WORD(sh4r.r[Rm], tmp);
nkeynes@587
   552
	stmp = stmp * SIGNEXT16(tmp);
nkeynes@587
   553
	sh4r.r[Rn] += 2;
nkeynes@587
   554
	sh4r.r[Rm] += 2;
nkeynes@587
   555
    }
nkeynes@359
   556
    if( sh4r.s ) {
nkeynes@359
   557
	int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
nkeynes@359
   558
	if( tmpl > (int64_t)0x000000007FFFFFFFLL ) {
nkeynes@359
   559
	    sh4r.mac = 0x000000017FFFFFFFLL;
nkeynes@359
   560
	} else if( tmpl < (int64_t)0xFFFFFFFF80000000LL ) {
nkeynes@359
   561
	    sh4r.mac = 0x0000000180000000LL;
nkeynes@359
   562
	} else {
nkeynes@359
   563
	    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   564
		((uint32_t)(sh4r.mac + stmp));
nkeynes@359
   565
	}
nkeynes@359
   566
    } else {
nkeynes@359
   567
	sh4r.mac += SIGNEXT32(stmp);
nkeynes@359
   568
    }
nkeynes@359
   569
:}
nkeynes@359
   570
MAC.L @Rm+, @Rn+ {:
nkeynes@587
   571
    int64_t tmpl;
nkeynes@587
   572
    if( Rm == Rn ) {
nkeynes@587
   573
	CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@587
   574
	MEM_READ_LONG(sh4r.r[Rn], tmp);
nkeynes@587
   575
	tmpl = SIGNEXT32(tmp);
nkeynes@587
   576
	MEM_READ_LONG(sh4r.r[Rn]+4, tmp);
nkeynes@587
   577
	tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
nkeynes@587
   578
	sh4r.r[Rn] += 8;
nkeynes@587
   579
    } else {
nkeynes@587
   580
	CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@587
   581
	CHECKRALIGN32( sh4r.r[Rn] );
nkeynes@587
   582
	MEM_READ_LONG(sh4r.r[Rn], tmp);
nkeynes@587
   583
	tmpl = SIGNEXT32(tmp);
nkeynes@587
   584
	MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@587
   585
	tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
nkeynes@587
   586
	sh4r.r[Rn] += 4;
nkeynes@587
   587
	sh4r.r[Rm] += 4;
nkeynes@587
   588
    }
nkeynes@359
   589
    if( sh4r.s ) {
nkeynes@359
   590
        /* 48-bit Saturation. Yuch */
nkeynes@359
   591
        if( tmpl < (int64_t)0xFFFF800000000000LL )
nkeynes@359
   592
            tmpl = 0xFFFF800000000000LL;
nkeynes@359
   593
        else if( tmpl > (int64_t)0x00007FFFFFFFFFFFLL )
nkeynes@359
   594
            tmpl = 0x00007FFFFFFFFFFFLL;
nkeynes@359
   595
    }
nkeynes@359
   596
    sh4r.mac = tmpl;
nkeynes@359
   597
:}
nkeynes@359
   598
MUL.L Rm, Rn {: sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   599
                        (sh4r.r[Rm] * sh4r.r[Rn]); :}
nkeynes@359
   600
MULU.W Rm, Rn {:
nkeynes@359
   601
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   602
               (uint32_t)((sh4r.r[Rm]&0xFFFF) * (sh4r.r[Rn]&0xFFFF));
nkeynes@359
   603
:}
nkeynes@359
   604
MULS.W Rm, Rn {:
nkeynes@359
   605
    sh4r.mac = (sh4r.mac&0xFFFFFFFF00000000LL) |
nkeynes@359
   606
               (uint32_t)(SIGNEXT32(sh4r.r[Rm]&0xFFFF) * SIGNEXT32(sh4r.r[Rn]&0xFFFF));
nkeynes@359
   607
:}
nkeynes@359
   608
NEGC Rm, Rn {:
nkeynes@359
   609
    tmp = 0 - sh4r.r[Rm];
nkeynes@359
   610
    sh4r.r[Rn] = tmp - sh4r.t;
nkeynes@359
   611
    sh4r.t = ( 0<tmp || tmp<sh4r.r[Rn] ? 1 : 0 );
nkeynes@359
   612
:}
nkeynes@359
   613
NEG Rm, Rn {: sh4r.r[Rn] = 0 - sh4r.r[Rm]; :}
nkeynes@359
   614
SUB Rm, Rn {: sh4r.r[Rn] -= sh4r.r[Rm]; :}
nkeynes@359
   615
SUBC Rm, Rn {: 
nkeynes@359
   616
    tmp = sh4r.r[Rn];
nkeynes@359
   617
    sh4r.r[Rn] = sh4r.r[Rn] - sh4r.r[Rm] - sh4r.t;
nkeynes@359
   618
    sh4r.t = (sh4r.r[Rn] > tmp || (sh4r.r[Rn] == tmp && sh4r.t == 1));
nkeynes@359
   619
:}
nkeynes@359
   620
nkeynes@359
   621
BRAF Rn {:
nkeynes@359
   622
     CHECKSLOTILLEGAL();
nkeynes@359
   623
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   624
     sh4r.in_delay_slot = 1;
nkeynes@359
   625
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   626
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   627
     return TRUE;
nkeynes@359
   628
:}
nkeynes@359
   629
BSRF Rn {:
nkeynes@359
   630
     CHECKSLOTILLEGAL();
nkeynes@359
   631
     CHECKDEST( pc + 4 + sh4r.r[Rn] );
nkeynes@359
   632
     sh4r.in_delay_slot = 1;
nkeynes@359
   633
     sh4r.pr = sh4r.pc + 4;
nkeynes@359
   634
     sh4r.pc = sh4r.new_pc;
nkeynes@359
   635
     sh4r.new_pc = pc + 4 + sh4r.r[Rn];
nkeynes@359
   636
     TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   637
     return TRUE;
nkeynes@359
   638
:}
nkeynes@359
   639
BT disp {:
nkeynes@359
   640
    CHECKSLOTILLEGAL();
nkeynes@359
   641
    if( sh4r.t ) {
nkeynes@359
   642
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   643
        sh4r.pc += disp + 4;
nkeynes@359
   644
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   645
        return TRUE;
nkeynes@359
   646
    }
nkeynes@359
   647
:}
nkeynes@359
   648
BF disp {:
nkeynes@359
   649
    CHECKSLOTILLEGAL();
nkeynes@359
   650
    if( !sh4r.t ) {
nkeynes@359
   651
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   652
        sh4r.pc += disp + 4;
nkeynes@359
   653
        sh4r.new_pc = sh4r.pc + 2;
nkeynes@359
   654
        return TRUE;
nkeynes@359
   655
    }
nkeynes@359
   656
:}
nkeynes@359
   657
BT/S disp {:
nkeynes@359
   658
    CHECKSLOTILLEGAL();
nkeynes@359
   659
    if( sh4r.t ) {
nkeynes@359
   660
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   661
        sh4r.in_delay_slot = 1;
nkeynes@359
   662
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   663
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   664
        sh4r.in_delay_slot = 1;
nkeynes@359
   665
        return TRUE;
nkeynes@359
   666
    }
nkeynes@359
   667
:}
nkeynes@359
   668
BF/S disp {:
nkeynes@359
   669
    CHECKSLOTILLEGAL();
nkeynes@359
   670
    if( !sh4r.t ) {
nkeynes@359
   671
        CHECKDEST( sh4r.pc + disp + 4 )
nkeynes@359
   672
        sh4r.in_delay_slot = 1;
nkeynes@359
   673
        sh4r.pc = sh4r.new_pc;
nkeynes@359
   674
        sh4r.new_pc = pc + disp + 4;
nkeynes@359
   675
        return TRUE;
nkeynes@359
   676
    }
nkeynes@359
   677
:}
nkeynes@359
   678
BRA disp {:
nkeynes@359
   679
    CHECKSLOTILLEGAL();
nkeynes@359
   680
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   681
    sh4r.in_delay_slot = 1;
nkeynes@359
   682
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   683
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   684
    return TRUE;
nkeynes@359
   685
:}
nkeynes@359
   686
BSR disp {:
nkeynes@359
   687
    CHECKDEST( sh4r.pc + disp + 4 );
nkeynes@359
   688
    CHECKSLOTILLEGAL();
nkeynes@359
   689
    sh4r.in_delay_slot = 1;
nkeynes@359
   690
    sh4r.pr = pc + 4;
nkeynes@359
   691
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   692
    sh4r.new_pc = pc + 4 + disp;
nkeynes@359
   693
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   694
    return TRUE;
nkeynes@359
   695
:}
nkeynes@359
   696
TRAPA #imm {:
nkeynes@359
   697
    CHECKSLOTILLEGAL();
nkeynes@359
   698
    sh4r.pc += 2;
nkeynes@586
   699
    sh4_raise_trap( imm );
nkeynes@586
   700
    return TRUE;
nkeynes@359
   701
:}
nkeynes@359
   702
RTS {: 
nkeynes@359
   703
    CHECKSLOTILLEGAL();
nkeynes@359
   704
    CHECKDEST( sh4r.pr );
nkeynes@359
   705
    sh4r.in_delay_slot = 1;
nkeynes@359
   706
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   707
    sh4r.new_pc = sh4r.pr;
nkeynes@359
   708
    TRACE_RETURN( pc, sh4r.new_pc );
nkeynes@359
   709
    return TRUE;
nkeynes@359
   710
:}
nkeynes@359
   711
SLEEP {:
nkeynes@359
   712
    if( MMIO_READ( CPG, STBCR ) & 0x80 ) {
nkeynes@359
   713
	sh4r.sh4_state = SH4_STATE_STANDBY;
nkeynes@359
   714
    } else {
nkeynes@359
   715
	sh4r.sh4_state = SH4_STATE_SLEEP;
nkeynes@359
   716
    }
nkeynes@359
   717
    return FALSE; /* Halt CPU */
nkeynes@359
   718
:}
nkeynes@359
   719
RTE {:
nkeynes@359
   720
    CHECKPRIV();
nkeynes@359
   721
    CHECKDEST( sh4r.spc );
nkeynes@359
   722
    CHECKSLOTILLEGAL();
nkeynes@359
   723
    sh4r.in_delay_slot = 1;
nkeynes@359
   724
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   725
    sh4r.new_pc = sh4r.spc;
nkeynes@374
   726
    sh4_write_sr( sh4r.ssr );
nkeynes@359
   727
    return TRUE;
nkeynes@359
   728
:}
nkeynes@359
   729
JMP @Rn {:
nkeynes@359
   730
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   731
    CHECKSLOTILLEGAL();
nkeynes@359
   732
    sh4r.in_delay_slot = 1;
nkeynes@359
   733
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   734
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   735
    return TRUE;
nkeynes@359
   736
:}
nkeynes@359
   737
JSR @Rn {:
nkeynes@359
   738
    CHECKDEST( sh4r.r[Rn] );
nkeynes@359
   739
    CHECKSLOTILLEGAL();
nkeynes@359
   740
    sh4r.in_delay_slot = 1;
nkeynes@359
   741
    sh4r.pc = sh4r.new_pc;
nkeynes@359
   742
    sh4r.new_pc = sh4r.r[Rn];
nkeynes@359
   743
    sh4r.pr = pc + 4;
nkeynes@359
   744
    TRACE_CALL( pc, sh4r.new_pc );
nkeynes@359
   745
    return TRUE;
nkeynes@359
   746
:}
nkeynes@359
   747
STS MACH, Rn {: sh4r.r[Rn] = (sh4r.mac>>32); :}
nkeynes@359
   748
STS.L MACH, @-Rn {:
nkeynes@587
   749
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   750
    MEM_WRITE_LONG( sh4r.r[Rn]-4, (sh4r.mac>>32) );
nkeynes@359
   751
    sh4r.r[Rn] -= 4;
nkeynes@359
   752
:}
nkeynes@359
   753
STC.L SR, @-Rn {:
nkeynes@359
   754
    CHECKPRIV();
nkeynes@587
   755
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   756
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4_read_sr() );
nkeynes@359
   757
    sh4r.r[Rn] -= 4;
nkeynes@359
   758
:}
nkeynes@359
   759
LDS.L @Rm+, MACH {:
nkeynes@359
   760
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   761
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   762
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@586
   763
	(((uint64_t)tmp)<<32);
nkeynes@359
   764
    sh4r.r[Rm] += 4;
nkeynes@359
   765
:}
nkeynes@359
   766
LDC.L @Rm+, SR {:
nkeynes@359
   767
    CHECKSLOTILLEGAL();
nkeynes@359
   768
    CHECKPRIV();
nkeynes@359
   769
    CHECKWALIGN32( sh4r.r[Rm] );
nkeynes@586
   770
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@586
   771
    sh4_write_sr( tmp );
nkeynes@359
   772
    sh4r.r[Rm] +=4;
nkeynes@359
   773
:}
nkeynes@359
   774
LDS Rm, MACH {:
nkeynes@359
   775
    sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
nkeynes@359
   776
               (((uint64_t)sh4r.r[Rm])<<32);
nkeynes@359
   777
:}
nkeynes@359
   778
LDC Rm, SR {:
nkeynes@359
   779
    CHECKSLOTILLEGAL();
nkeynes@359
   780
    CHECKPRIV();
nkeynes@374
   781
    sh4_write_sr( sh4r.r[Rm] );
nkeynes@359
   782
:}
nkeynes@359
   783
LDC Rm, SGR {:
nkeynes@359
   784
    CHECKPRIV();
nkeynes@359
   785
    sh4r.sgr = sh4r.r[Rm];
nkeynes@359
   786
:}
nkeynes@359
   787
LDC.L @Rm+, SGR {:
nkeynes@359
   788
    CHECKPRIV();
nkeynes@359
   789
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   790
    MEM_READ_LONG(sh4r.r[Rm], sh4r.sgr);
nkeynes@359
   791
    sh4r.r[Rm] +=4;
nkeynes@359
   792
:}
nkeynes@359
   793
STS MACL, Rn {: sh4r.r[Rn] = (uint32_t)sh4r.mac; :}
nkeynes@359
   794
STS.L MACL, @-Rn {:
nkeynes@587
   795
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   796
    MEM_WRITE_LONG( sh4r.r[Rn]-4, (uint32_t)sh4r.mac );
nkeynes@359
   797
    sh4r.r[Rn] -= 4;
nkeynes@359
   798
:}
nkeynes@359
   799
STC.L GBR, @-Rn {:
nkeynes@587
   800
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   801
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.gbr );
nkeynes@359
   802
    sh4r.r[Rn] -= 4;
nkeynes@359
   803
:}
nkeynes@359
   804
LDS.L @Rm+, MACL {:
nkeynes@359
   805
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   806
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   807
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@586
   808
               (uint64_t)((uint32_t)tmp);
nkeynes@359
   809
    sh4r.r[Rm] += 4;
nkeynes@359
   810
:}
nkeynes@359
   811
LDC.L @Rm+, GBR {:
nkeynes@359
   812
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   813
    MEM_READ_LONG(sh4r.r[Rm], sh4r.gbr);
nkeynes@359
   814
    sh4r.r[Rm] +=4;
nkeynes@359
   815
:}
nkeynes@359
   816
LDS Rm, MACL {:
nkeynes@359
   817
    sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
nkeynes@359
   818
               (uint64_t)((uint32_t)(sh4r.r[Rm]));
nkeynes@359
   819
:}
nkeynes@359
   820
LDC Rm, GBR {: sh4r.gbr = sh4r.r[Rm]; :}
nkeynes@359
   821
STS PR, Rn {: sh4r.r[Rn] = sh4r.pr; :}
nkeynes@359
   822
STS.L PR, @-Rn {:
nkeynes@587
   823
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   824
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.pr );
nkeynes@359
   825
    sh4r.r[Rn] -= 4;
nkeynes@359
   826
:}
nkeynes@359
   827
STC.L VBR, @-Rn {:
nkeynes@359
   828
    CHECKPRIV();
nkeynes@587
   829
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   830
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.vbr );
nkeynes@359
   831
    sh4r.r[Rn] -= 4;
nkeynes@359
   832
:}
nkeynes@359
   833
LDS.L @Rm+, PR {:
nkeynes@359
   834
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   835
    MEM_READ_LONG( sh4r.r[Rm], sh4r.pr );
nkeynes@359
   836
    sh4r.r[Rm] += 4;
nkeynes@359
   837
:}
nkeynes@359
   838
LDC.L @Rm+, VBR {:
nkeynes@359
   839
    CHECKPRIV();
nkeynes@359
   840
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   841
    MEM_READ_LONG(sh4r.r[Rm], sh4r.vbr);
nkeynes@359
   842
    sh4r.r[Rm] +=4;
nkeynes@359
   843
:}
nkeynes@359
   844
LDS Rm, PR {: sh4r.pr = sh4r.r[Rm]; :}
nkeynes@359
   845
LDC Rm, VBR {:
nkeynes@359
   846
    CHECKPRIV();
nkeynes@359
   847
    sh4r.vbr = sh4r.r[Rm];
nkeynes@359
   848
:}
nkeynes@359
   849
STC SGR, Rn {:
nkeynes@359
   850
    CHECKPRIV();
nkeynes@359
   851
    sh4r.r[Rn] = sh4r.sgr;
nkeynes@359
   852
:}
nkeynes@359
   853
STC.L SGR, @-Rn {:
nkeynes@359
   854
    CHECKPRIV();
nkeynes@587
   855
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   856
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.sgr );
nkeynes@359
   857
    sh4r.r[Rn] -= 4;
nkeynes@359
   858
:}
nkeynes@359
   859
STC.L SSR, @-Rn {:
nkeynes@359
   860
    CHECKPRIV();
nkeynes@587
   861
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   862
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.ssr );
nkeynes@359
   863
    sh4r.r[Rn] -= 4;
nkeynes@359
   864
:}
nkeynes@359
   865
LDC.L @Rm+, SSR {:
nkeynes@359
   866
    CHECKPRIV();
nkeynes@359
   867
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   868
    MEM_READ_LONG(sh4r.r[Rm], sh4r.ssr);
nkeynes@359
   869
    sh4r.r[Rm] +=4;
nkeynes@359
   870
:}
nkeynes@359
   871
LDC Rm, SSR {:
nkeynes@359
   872
    CHECKPRIV();
nkeynes@359
   873
    sh4r.ssr = sh4r.r[Rm];
nkeynes@359
   874
:}
nkeynes@359
   875
STC.L SPC, @-Rn {:
nkeynes@359
   876
    CHECKPRIV();
nkeynes@587
   877
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   878
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.spc );
nkeynes@359
   879
    sh4r.r[Rn] -= 4;
nkeynes@359
   880
:}
nkeynes@359
   881
LDC.L @Rm+, SPC {:
nkeynes@359
   882
    CHECKPRIV();
nkeynes@359
   883
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   884
    MEM_READ_LONG(sh4r.r[Rm], sh4r.spc);
nkeynes@359
   885
    sh4r.r[Rm] +=4;
nkeynes@359
   886
:}
nkeynes@359
   887
LDC Rm, SPC {:
nkeynes@359
   888
    CHECKPRIV();
nkeynes@359
   889
    sh4r.spc = sh4r.r[Rm];
nkeynes@359
   890
:}
nkeynes@626
   891
STS FPUL, Rn {: 
nkeynes@626
   892
    CHECKFPUEN();
nkeynes@669
   893
    sh4r.r[Rn] = FPULi; 
nkeynes@626
   894
:}
nkeynes@359
   895
STS.L FPUL, @-Rn {:
nkeynes@626
   896
    CHECKFPUEN();
nkeynes@587
   897
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@669
   898
    MEM_WRITE_LONG( sh4r.r[Rn]-4, FPULi );
nkeynes@359
   899
    sh4r.r[Rn] -= 4;
nkeynes@359
   900
:}
nkeynes@359
   901
LDS.L @Rm+, FPUL {:
nkeynes@626
   902
    CHECKFPUEN();
nkeynes@359
   903
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@669
   904
    MEM_READ_LONG(sh4r.r[Rm], FPULi);
nkeynes@359
   905
    sh4r.r[Rm] +=4;
nkeynes@359
   906
:}
nkeynes@626
   907
LDS Rm, FPUL {:
nkeynes@626
   908
    CHECKFPUEN();
nkeynes@669
   909
    FPULi = sh4r.r[Rm]; 
nkeynes@626
   910
:}
nkeynes@626
   911
STS FPSCR, Rn {: 
nkeynes@626
   912
    CHECKFPUEN();
nkeynes@626
   913
    sh4r.r[Rn] = sh4r.fpscr; 
nkeynes@626
   914
:}
nkeynes@359
   915
STS.L FPSCR, @-Rn {:
nkeynes@626
   916
    CHECKFPUEN();
nkeynes@587
   917
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   918
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.fpscr );
nkeynes@359
   919
    sh4r.r[Rn] -= 4;
nkeynes@359
   920
:}
nkeynes@359
   921
LDS.L @Rm+, FPSCR {:
nkeynes@626
   922
    CHECKFPUEN();
nkeynes@359
   923
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@669
   924
    MEM_READ_LONG(sh4r.r[Rm], tmp);
nkeynes@359
   925
    sh4r.r[Rm] +=4;
nkeynes@669
   926
    sh4_write_fpscr( tmp );
nkeynes@359
   927
:}
nkeynes@374
   928
LDS Rm, FPSCR {: 
nkeynes@626
   929
    CHECKFPUEN();
nkeynes@669
   930
    sh4_write_fpscr( sh4r.r[Rm] );
nkeynes@374
   931
:}
nkeynes@359
   932
STC DBR, Rn {: CHECKPRIV(); sh4r.r[Rn] = sh4r.dbr; :}
nkeynes@359
   933
STC.L DBR, @-Rn {:
nkeynes@359
   934
    CHECKPRIV();
nkeynes@587
   935
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   936
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.dbr );
nkeynes@359
   937
    sh4r.r[Rn] -= 4;
nkeynes@359
   938
:}
nkeynes@359
   939
LDC.L @Rm+, DBR {:
nkeynes@359
   940
    CHECKPRIV();
nkeynes@359
   941
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   942
    MEM_READ_LONG(sh4r.r[Rm], sh4r.dbr);
nkeynes@359
   943
    sh4r.r[Rm] +=4;
nkeynes@359
   944
:}
nkeynes@359
   945
LDC Rm, DBR {:
nkeynes@359
   946
    CHECKPRIV();
nkeynes@359
   947
    sh4r.dbr = sh4r.r[Rm];
nkeynes@359
   948
:}
nkeynes@359
   949
STC.L Rm_BANK, @-Rn {:
nkeynes@359
   950
    CHECKPRIV();
nkeynes@587
   951
    CHECKWALIGN32( sh4r.r[Rn] );
nkeynes@587
   952
    MEM_WRITE_LONG( sh4r.r[Rn]-4, sh4r.r_bank[Rm_BANK] );
nkeynes@359
   953
    sh4r.r[Rn] -= 4;
nkeynes@359
   954
:}
nkeynes@359
   955
LDC.L @Rm+, Rn_BANK {:
nkeynes@359
   956
    CHECKPRIV();
nkeynes@359
   957
    CHECKRALIGN32( sh4r.r[Rm] );
nkeynes@586
   958
    MEM_READ_LONG( sh4r.r[Rm], sh4r.r_bank[Rn_BANK] );
nkeynes@359
   959
    sh4r.r[Rm] += 4;
nkeynes@359
   960
:}
nkeynes@359
   961
LDC Rm, Rn_BANK {:
nkeynes@359
   962
    CHECKPRIV();
nkeynes@359
   963
    sh4r.r_bank[Rn_BANK] = sh4r.r[Rm];
nkeynes@359
   964
:}
nkeynes@359
   965
STC SR, Rn {: 
nkeynes@359
   966
    CHECKPRIV();
nkeynes@359
   967
    sh4r.r[Rn] = sh4_read_sr();
nkeynes@359
   968
:}
nkeynes@359
   969
STC GBR, Rn {:
nkeynes@359
   970
    sh4r.r[Rn] = sh4r.gbr;
nkeynes@359
   971
:}
nkeynes@359
   972
STC VBR, Rn {:
nkeynes@359
   973
    CHECKPRIV();
nkeynes@359
   974
    sh4r.r[Rn] = sh4r.vbr;
nkeynes@359
   975
:}
nkeynes@359
   976
STC SSR, Rn {:
nkeynes@359
   977
    CHECKPRIV();
nkeynes@359
   978
    sh4r.r[Rn] = sh4r.ssr;
nkeynes@359
   979
:}
nkeynes@359
   980
STC SPC, Rn {:
nkeynes@359
   981
    CHECKPRIV();
nkeynes@359
   982
    sh4r.r[Rn] = sh4r.spc;
nkeynes@359
   983
:}
nkeynes@359
   984
STC Rm_BANK, Rn {:
nkeynes@359
   985
    CHECKPRIV();
nkeynes@359
   986
    sh4r.r[Rn] = sh4r.r_bank[Rm_BANK];
nkeynes@359
   987
:}
nkeynes@359
   988
nkeynes@359
   989
FADD FRm, FRn {:
nkeynes@359
   990
    CHECKFPUEN();
nkeynes@359
   991
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
   992
	DR(FRn) += DR(FRm);
nkeynes@359
   993
    } else {
nkeynes@359
   994
	FR(FRn) += FR(FRm);
nkeynes@359
   995
    }
nkeynes@359
   996
:}
nkeynes@359
   997
FSUB FRm, FRn {:
nkeynes@359
   998
    CHECKFPUEN();
nkeynes@359
   999
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1000
	DR(FRn) -= DR(FRm);
nkeynes@359
  1001
    } else {
nkeynes@359
  1002
	FR(FRn) -= FR(FRm);
nkeynes@359
  1003
    }
nkeynes@359
  1004
:}
nkeynes@359
  1005
nkeynes@359
  1006
FMUL FRm, FRn {:
nkeynes@359
  1007
    CHECKFPUEN();
nkeynes@359
  1008
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1009
	DR(FRn) *= DR(FRm);
nkeynes@359
  1010
    } else {
nkeynes@359
  1011
	FR(FRn) *= FR(FRm);
nkeynes@359
  1012
    }
nkeynes@359
  1013
:}
nkeynes@359
  1014
nkeynes@359
  1015
FDIV FRm, FRn {:
nkeynes@359
  1016
    CHECKFPUEN();
nkeynes@359
  1017
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1018
	DR(FRn) /= DR(FRm);
nkeynes@359
  1019
    } else {
nkeynes@359
  1020
	FR(FRn) /= FR(FRm);
nkeynes@359
  1021
    }
nkeynes@359
  1022
:}
nkeynes@359
  1023
nkeynes@359
  1024
FCMP/EQ FRm, FRn {:
nkeynes@359
  1025
    CHECKFPUEN();
nkeynes@359
  1026
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1027
	sh4r.t = ( DR(FRn) == DR(FRm) ? 1 : 0 );
nkeynes@359
  1028
    } else {
nkeynes@359
  1029
	sh4r.t = ( FR(FRn) == FR(FRm) ? 1 : 0 );
nkeynes@359
  1030
    }
nkeynes@359
  1031
:}
nkeynes@359
  1032
nkeynes@359
  1033
FCMP/GT FRm, FRn {:
nkeynes@359
  1034
    CHECKFPUEN();
nkeynes@359
  1035
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1036
	sh4r.t = ( DR(FRn) > DR(FRm) ? 1 : 0 );
nkeynes@359
  1037
    } else {
nkeynes@359
  1038
	sh4r.t = ( FR(FRn) > FR(FRm) ? 1 : 0 );
nkeynes@359
  1039
    }
nkeynes@359
  1040
:}
nkeynes@359
  1041
nkeynes@359
  1042
FSTS FPUL, FRn {: CHECKFPUEN(); FR(FRn) = FPULf; :}
nkeynes@359
  1043
FLDS FRm, FPUL {: CHECKFPUEN(); FPULf = FR(FRm); :}
nkeynes@359
  1044
FLOAT FPUL, FRn {: 
nkeynes@359
  1045
    CHECKFPUEN();
nkeynes@374
  1046
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
  1047
	if( FRn&1 ) { // No, really...
nkeynes@374
  1048
	    dtmp = (double)FPULi;
nkeynes@374
  1049
	    FR(FRn) = *(((float *)&dtmp)+1);
nkeynes@374
  1050
	} else {
nkeynes@374
  1051
	    DRF(FRn>>1) = (double)FPULi;
nkeynes@374
  1052
	}
nkeynes@374
  1053
    } else {
nkeynes@359
  1054
	FR(FRn) = (float)FPULi;
nkeynes@374
  1055
    }
nkeynes@359
  1056
:}
nkeynes@359
  1057
FTRC FRm, FPUL {:
nkeynes@359
  1058
    CHECKFPUEN();
nkeynes@359
  1059
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@374
  1060
	if( FRm&1 ) {
nkeynes@374
  1061
	    dtmp = 0;
nkeynes@374
  1062
	    *(((float *)&dtmp)+1) = FR(FRm);
nkeynes@374
  1063
	} else {
nkeynes@374
  1064
	    dtmp = DRF(FRm>>1);
nkeynes@374
  1065
	}
nkeynes@359
  1066
        if( dtmp >= MAX_INTF )
nkeynes@359
  1067
            FPULi = MAX_INT;
nkeynes@359
  1068
        else if( dtmp <= MIN_INTF )
nkeynes@359
  1069
            FPULi = MIN_INT;
nkeynes@359
  1070
        else 
nkeynes@359
  1071
            FPULi = (int32_t)dtmp;
nkeynes@359
  1072
    } else {
nkeynes@359
  1073
	ftmp = FR(FRm);
nkeynes@359
  1074
	if( ftmp >= MAX_INTF )
nkeynes@359
  1075
	    FPULi = MAX_INT;
nkeynes@359
  1076
	else if( ftmp <= MIN_INTF )
nkeynes@359
  1077
	    FPULi = MIN_INT;
nkeynes@359
  1078
	else
nkeynes@359
  1079
	    FPULi = (int32_t)ftmp;
nkeynes@359
  1080
    }
nkeynes@359
  1081
:}
nkeynes@359
  1082
FNEG FRn {:
nkeynes@359
  1083
    CHECKFPUEN();
nkeynes@359
  1084
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1085
	DR(FRn) = -DR(FRn);
nkeynes@359
  1086
    } else {
nkeynes@359
  1087
        FR(FRn) = -FR(FRn);
nkeynes@359
  1088
    }
nkeynes@359
  1089
:}
nkeynes@359
  1090
FABS FRn {:
nkeynes@359
  1091
    CHECKFPUEN();
nkeynes@359
  1092
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1093
	DR(FRn) = fabs(DR(FRn));
nkeynes@359
  1094
    } else {
nkeynes@359
  1095
        FR(FRn) = fabsf(FR(FRn));
nkeynes@359
  1096
    }
nkeynes@359
  1097
:}
nkeynes@359
  1098
FSQRT FRn {:
nkeynes@359
  1099
    CHECKFPUEN();
nkeynes@359
  1100
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1101
	DR(FRn) = sqrt(DR(FRn));
nkeynes@359
  1102
    } else {
nkeynes@359
  1103
        FR(FRn) = sqrtf(FR(FRn));
nkeynes@359
  1104
    }
nkeynes@359
  1105
:}
nkeynes@359
  1106
FLDI0 FRn {:
nkeynes@359
  1107
    CHECKFPUEN();
nkeynes@359
  1108
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1109
	DR(FRn) = 0.0;
nkeynes@359
  1110
    } else {
nkeynes@359
  1111
        FR(FRn) = 0.0;
nkeynes@359
  1112
    }
nkeynes@359
  1113
:}
nkeynes@359
  1114
FLDI1 FRn {:
nkeynes@359
  1115
    CHECKFPUEN();
nkeynes@359
  1116
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1117
	DR(FRn) = 1.0;
nkeynes@359
  1118
    } else {
nkeynes@359
  1119
        FR(FRn) = 1.0;
nkeynes@359
  1120
    }
nkeynes@359
  1121
:}
nkeynes@359
  1122
FMAC FR0, FRm, FRn {:
nkeynes@359
  1123
    CHECKFPUEN();
nkeynes@359
  1124
    if( IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1125
        DR(FRn) += DR(FRm)*DR(0);
nkeynes@359
  1126
    } else {
nkeynes@359
  1127
	FR(FRn) += FR(FRm)*FR(0);
nkeynes@359
  1128
    }
nkeynes@359
  1129
:}
nkeynes@374
  1130
FRCHG {: 
nkeynes@374
  1131
    CHECKFPUEN(); 
nkeynes@374
  1132
    sh4r.fpscr ^= FPSCR_FR; 
nkeynes@669
  1133
    sh4_switch_fr_banks();
nkeynes@374
  1134
:}
nkeynes@359
  1135
FSCHG {: CHECKFPUEN(); sh4r.fpscr ^= FPSCR_SZ; :}
nkeynes@359
  1136
FCNVSD FPUL, FRn {:
nkeynes@359
  1137
    CHECKFPUEN();
nkeynes@359
  1138
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1139
	DR(FRn) = (double)FPULf;
nkeynes@359
  1140
    }
nkeynes@359
  1141
:}
nkeynes@359
  1142
FCNVDS FRm, FPUL {:
nkeynes@359
  1143
    CHECKFPUEN();
nkeynes@359
  1144
    if( IS_FPU_DOUBLEPREC() && !IS_FPU_DOUBLESIZE() ) {
nkeynes@359
  1145
	FPULf = (float)DR(FRm);
nkeynes@359
  1146
    }
nkeynes@359
  1147
:}
nkeynes@359
  1148
nkeynes@359
  1149
FSRRA FRn {:
nkeynes@359
  1150
    CHECKFPUEN();
nkeynes@359
  1151
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1152
	FR(FRn) = 1.0/sqrtf(FR(FRn));
nkeynes@359
  1153
    }
nkeynes@359
  1154
:}
nkeynes@359
  1155
FIPR FVm, FVn {:
nkeynes@359
  1156
    CHECKFPUEN();
nkeynes@359
  1157
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@359
  1158
        int tmp2 = FVn<<2;
nkeynes@359
  1159
        tmp = FVm<<2;
nkeynes@359
  1160
        FR(tmp2+3) = FR(tmp)*FR(tmp2) +
nkeynes@359
  1161
            FR(tmp+1)*FR(tmp2+1) +
nkeynes@359
  1162
            FR(tmp+2)*FR(tmp2+2) +
nkeynes@359
  1163
            FR(tmp+3)*FR(tmp2+3);
nkeynes@359
  1164
    }
nkeynes@359
  1165
:}
nkeynes@359
  1166
FSCA FPUL, FRn {:
nkeynes@359
  1167
    CHECKFPUEN();
nkeynes@359
  1168
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@391
  1169
	sh4_fsca( FPULi, &(DRF(FRn>>1)) );
nkeynes@391
  1170
	/*
nkeynes@359
  1171
        float angle = (((float)(FPULi&0xFFFF))/65536.0) * 2 * M_PI;
nkeynes@359
  1172
        FR(FRn) = sinf(angle);
nkeynes@359
  1173
        FR((FRn)+1) = cosf(angle);
nkeynes@391
  1174
	*/
nkeynes@359
  1175
    }
nkeynes@359
  1176
:}
nkeynes@359
  1177
FTRV XMTRX, FVn {:
nkeynes@359
  1178
    CHECKFPUEN();
nkeynes@359
  1179
    if( !IS_FPU_DOUBLEPREC() ) {
nkeynes@669
  1180
	sh4_ftrv(&(DRF(FVn<<1)) );
nkeynes@359
  1181
    }
nkeynes@359
  1182
:}
nkeynes@359
  1183
UNDEF {:
nkeynes@359
  1184
    UNDEF(ir);
nkeynes@359
  1185
:}
nkeynes@359
  1186
%%
nkeynes@359
  1187
    sh4r.pc = sh4r.new_pc;
nkeynes@359
  1188
    sh4r.new_pc += 2;
nkeynes@359
  1189
    sh4r.in_delay_slot = 0;
nkeynes@359
  1190
    return TRUE;
nkeynes@359
  1191
}
.