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lxdream.org :: lxdream/src/pvr2/pvr2.h
lxdream 0.9.1
released Jun 29
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filename src/pvr2/pvr2.h
changeset 335:fb890e1814c0
prev333:e29561c998f5
next337:cdd757aa8e8c
author nkeynes
date Sat Jan 27 12:03:53 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Start working towards more thorough interlaced support
file annotate diff log raw
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/**
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 * $Id: pvr2.h,v 1.31 2007-01-27 12:03:53 nkeynes Exp $
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 *
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 * PVR2 (video chip) functions and macros.
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 *
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 * Copyright (c) 2005 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#include "dream.h"
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#include "mem.h"
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#include "display.h"
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#include "pvr2/pvr2mmio.h"
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#include <GL/gl.h>
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typedef unsigned int pvraddr_t;
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typedef unsigned int pvr64addr_t;
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#define DISPMODE_ENABLE      0x00000001 /* Display enable */
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#define DISPMODE_LINEDOUBLE  0x00000002 /* scanline double */
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#define DISPMODE_COLFMT      0x0000000C /* Colour mode */
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#define DISPMODE_CLOCKDIV    0x08000000 /* Clock divide-by-2 */
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#define DISPSIZE_MODULO 0x3FF00000 /* line skip +1 (32-bit words)*/
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#define DISPSIZE_LPF    0x000FFC00 /* lines per field */
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#define DISPSIZE_PPL    0x000003FF /* pixel words (32 bit) per line */
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#define DISPCFG_VP 0x00000001 /* V-sync polarity */
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#define DISPCFG_HP 0x00000002 /* H-sync polarity */
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#define DISPCFG_I  0x00000010 /* Interlace enable */
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#define DISPCFG_BS 0x000000C0 /* Broadcast standard */
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#define DISPCFG_VO 0x00000100 /* Video output enable */
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#define BS_NTSC 0x00000000
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#define BS_PAL  0x00000040
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#define BS_PALM 0x00000080 /* ? */
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#define BS_PALN 0x000000C0 /* ? */
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#define PVR2_RAM_BASE 0x05000000
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#define PVR2_RAM_BASE_INT 0x04000000
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#define PVR2_RAM_SIZE (8 * 1024 * 1024)
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#define PVR2_RAM_PAGES (PVR2_RAM_SIZE>>12)
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#define PVR2_RAM_MASK 0x7FFFFF
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#define RENDER_ZONLY  0
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#define RENDER_NORMAL 1     /* Render non-modified polygons */
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#define RENDER_CHEAPMOD 2   /* Render cheap-modified polygons */
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#define RENDER_FULLMOD 3    /* Render the fully-modified version of the polygons */
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void pvr2_next_frame( void );
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void pvr2_set_base_address( uint32_t );
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int pvr2_get_frame_count( void );
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gboolean pvr2_save_next_scene( const gchar *filename );
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#define PVR2_CMD_END_OF_LIST 0x00
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#define PVR2_CMD_USER_CLIP   0x20
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#define PVR2_CMD_POLY_OPAQUE 0x80
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#define PVR2_CMD_MOD_OPAQUE  0x81
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#define PVR2_CMD_POLY_TRANS  0x82
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#define PVR2_CMD_MOD_TRANS   0x83
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#define PVR2_CMD_POLY_PUNCHOUT 0x84
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#define PVR2_CMD_VERTEX      0xE0
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#define PVR2_CMD_VERTEX_LAST 0xF0
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#define PVR2_POLY_TEXTURED 0x00000008
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#define PVR2_POLY_SPECULAR 0x00000004
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#define PVR2_POLY_SHADED   0x00000002
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#define PVR2_POLY_UV_16BIT 0x00000001
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#define PVR2_POLY_MODE_CLAMP_RGB 0x00200000
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#define PVR2_POLY_MODE_ALPHA    0x00100000
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#define PVR2_POLY_MODE_TEXALPHA 0x00080000
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#define PVR2_POLY_MODE_FLIP_S   0x00040000
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#define PVR2_POLY_MODE_FLIP_T   0x00020000
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#define PVR2_POLY_MODE_CLAMP_S  0x00010000
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#define PVR2_POLY_MODE_CLAMP_T  0x00008000
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#define PVR2_TEX_FORMAT_ARGB1555 0x00000000
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#define PVR2_TEX_FORMAT_RGB565   0x08000000
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#define PVR2_TEX_FORMAT_ARGB4444 0x10000000
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#define PVR2_TEX_FORMAT_YUV422   0x18000000
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#define PVR2_TEX_FORMAT_BUMPMAP  0x20000000
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#define PVR2_TEX_FORMAT_IDX4     0x28000000
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#define PVR2_TEX_FORMAT_IDX8     0x30000000
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#define PVR2_TEX_MIPMAP      0x80000000
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#define PVR2_TEX_COMPRESSED  0x40000000
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#define PVR2_TEX_FORMAT_MASK 0x38000000
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#define PVR2_TEX_UNTWIDDLED  0x04000000
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#define PVR2_TEX_STRIDE      0x02000000
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#define PVR2_TEX_ADDR(x) ( ((x)&0x01FFFFF)<<3 );
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#define PVR2_TEX_IS_MIPMAPPED(x) ( (x) & PVR2_TEX_MIPMAP )
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#define PVR2_TEX_IS_COMPRESSED(x) ( (x) & PVR2_TEX_COMPRESSED )
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#define PVR2_TEX_IS_TWIDDLED(x) (((x) & PVR2_TEX_UNTWIDDLED) == 0)
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#define PVR2_TEX_IS_STRIDE(x) (((x) & 0x06000000) == 0x06000000)
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/****************************** Frame Buffer *****************************/
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/**
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 * Write a block of data to an address in the DMA range (0x10000000 - 
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 * 0x13FFFFFF), ie TA, YUV, or texture ram.
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 */
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void pvr2_dma_write( sh4addr_t dest, char *src, uint32_t length );
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/**
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 * Write to the interleaved memory address space (aka 64-bit address space).
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 */
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void pvr2_vram64_write( sh4addr_t dest, char *src, uint32_t length );
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/**
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 * Write to the interleaved memory address space (aka 64-bit address space),
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 * using a line length and stride.
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 */
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void pvr2_vram64_write_stride( sh4addr_t dest, char *src, uint32_t line_bytes,
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			       uint32_t line_stride_bytes, uint32_t line_count );
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/**
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 * Read from the interleaved memory address space (aka 64-bit address space)
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 */
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void pvr2_vram64_read( char *dest, sh4addr_t src, uint32_t length );
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/**
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 * Read a twiddled image from interleaved memory address space (aka 64-bit address
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 * space), writing the image to the destination buffer in detwiddled format. 
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 * Width and height must be powers of 2
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 * This version reads 4-bit pixels.
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 */
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void pvr2_vram64_read_twiddled_4( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
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/**
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 * Read a twiddled image from interleaved memory address space (aka 64-bit address
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 * space), writing the image to the destination buffer in detwiddled format. 
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 * Width and height must be powers of 2
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 * This version reads 8-bit pixels.
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 */
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void pvr2_vram64_read_twiddled_8( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
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/**
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 * Read a twiddled image from interleaved memory address space (aka 64-bit address
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 * space), writing the image to the destination buffer in detwiddled format. 
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 * Width and height must be powers of 2, and src must be 16-bit aligned.
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 * This version reads 16-bit pixels.
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 */
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void pvr2_vram64_read_twiddled_16( char *dest, sh4addr_t src, uint32_t width, uint32_t height );
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/**
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 * Read an image from the interleaved memory address space (aka 64-bit address space) 
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 * where the source and destination line sizes may differ. Note that both byte
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 * counts must be a multiple of 4, and the src address must be 32-bit aligned.
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 */
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void pvr2_vram64_read_stride( char *dest, uint32_t dest_line_bytes, sh4addr_t srcaddr,
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			       uint32_t src_line_bytes, uint32_t line_count );
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/**
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 * Dump a portion of vram to a stream from the interleaved memory address 
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 * space.
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 */
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void pvr2_vram64_dump( sh4addr_t addr, uint32_t length, FILE *f );
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/**
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 * Describes a rendering buffer that's actually held in GL, for when we need
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 * to fetch the bits back to vram.
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 */
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typedef struct pvr2_render_buffer {
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    sh4addr_t render_addr; /* The actual address rendered to in pvr ram */
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    uint32_t size; /* Length of rendering region in bytes */
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    int width, height;
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    int colour_format;
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    int scale;
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} *pvr2_render_buffer_t;
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/**
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 * Flush the indicated render buffer back to PVR. Caller is responsible for
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 * tracking whether there is actually anything in the buffer.
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 *
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 * @param buffer A render buffer indicating the address to store to, and the
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 * format the data needs to be in.
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 * @param backBuffer TRUE to flush the back buffer, FALSE for 
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 * the front buffer.
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 */
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void pvr2_render_buffer_copy_to_sh4( pvr2_render_buffer_t buffer, 
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				     gboolean backBuffer );
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/**
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 * Copy data from PVR ram into the GL render buffer. 
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 *
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 * @param buffer A render buffer indicating the address to read from, and the
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 * format the data is in.
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 * @param backBuffer TRUE to write the back buffer, FALSE for 
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 * the front buffer.
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 */
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void pvr2_render_buffer_copy_from_sh4( pvr2_render_buffer_t buffer, 
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				       gboolean backBuffer );
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/**
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 * Invalidate any caching on the supplied SH4 address
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 */
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gboolean pvr2_render_buffer_invalidate( sh4addr_t addr );
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/**************************** Tile Accelerator ***************************/
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/**
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 * Process the data in the supplied buffer as an array of TA command lists.
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 * Any excess bytes are held pending until a complete list is sent
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 */
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void pvr2_ta_write( char *buf, uint32_t length );
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/**
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 * (Re)initialize the tile accelerator in preparation for the next scene.
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 * Normally called immediately before commencing polygon transmission.
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 */
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void pvr2_ta_init( void );
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/****************************** YUV Converter ****************************/
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/**
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 * Process a block of YUV data.
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 */
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void pvr2_yuv_write( char *buf, uint32_t length );
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/**
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 * Initialize the YUV converter.
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 */
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void pvr2_yuv_init( uint32_t target_addr );
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void pvr2_yuv_set_config( uint32_t config );
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/********************************* Renderer ******************************/
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/**
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 * Initialize the rendering pipeline.
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 * @return TRUE on success, FALSE on failure.
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 */
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gboolean pvr2_render_init( void );
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/**
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 * Render the current scene stored in PVR ram to the GL back buffer.
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 */
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void pvr2_render_scene( void );
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/**
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 * Display the scene rendered to the supplied address.
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 * @return TRUE if there was an available render that was displayed,
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 * otherwise FALSE (and no action was taken)
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 */
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gboolean pvr2_render_display_frame( uint32_t address );
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void render_backplane( uint32_t *polygon, uint32_t width, uint32_t height, uint32_t mode );
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void render_set_context( uint32_t *context, int render_mode );
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void pvr2_render_tilebuffer( int width, int height, int clipx1, int clipy1, 
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			     int clipx2, int clipy2 );
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float pvr2_render_find_maximum_z();
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/**
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 * Structure to hold a complete unpacked vertex (excluding modifier
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 * volume parameters - generate separate vertexes in that case).
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 */
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struct vertex_unpacked {
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    float x,y,z;
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    float u,v;            /* Texture coordinates */
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    float rgba[4];        /* Fragment colour (RGBA order) */
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    float offset_rgba[4]; /* Offset color (RGBA order) */
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};
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void render_unpacked_vertex_array( uint32_t poly1, struct vertex_unpacked *vertexes[], 
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				   int num_vertexes );
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void render_vertex_array( uint32_t poly1, uint32_t *vertexes[], int num_vertexes, 
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			  int vertex_size, int render_mode );
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/****************************** Texture Cache ****************************/
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/**
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 * Initialize the texture cache.
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 */
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void texcache_init( void );
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/**
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 * Initialize the GL side of the texture cache (texture ids and such).
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 */
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void texcache_gl_init( void );
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/**
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 * Flush all textures and delete. The cache will be non-functional until
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 * the next call to texcache_init(). This would typically be done if
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 * switching GL targets.
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 */    
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void texcache_shutdown( void );
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/**
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 * Evict all textures contained in the page identified by a texture address.
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 */
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void texcache_invalidate_page( uint32_t texture_addr );
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/**
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 * Return a texture ID for the texture specified at the supplied address
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 * and given parameters (the same sequence of bytes could in theory have
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 * multiple interpretations). We use the texture address as the primary
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 * index, but allow for multiple instances at each address. The texture
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 * will be bound to the GL_TEXTURE_2D target before being returned.
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 * 
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 * If the texture has already been bound, return the ID to which it was
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 * bound. Otherwise obtain an unused texture ID and set it up appropriately.
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 */
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GLuint texcache_get_texture( uint32_t texture_addr, int width, int height,
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			     int mode );
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/************************* Rendering support macros **************************/
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#define POLY1_DEPTH_MODE(poly1) ( pvr2_poly_depthmode[(poly1)>>29] )
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#define POLY1_DEPTH_ENABLE(poly1) (((poly1)&0x04000000) == 0 )
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#define POLY1_CULL_MODE(poly1) (((poly1)>>27)&0x03)
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#define POLY1_TEXTURED(poly1) (((poly1)&0x02000000))
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#define POLY1_SPECULAR(poly1) (((poly1)&0x01000000))
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#define POLY1_GOURAUD_SHADED(poly1) ((poly1)&0x00800000)
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#define POLY1_SHADE_MODEL(poly1) (((poly1)&0x00800000) ? GL_SMOOTH : GL_FLAT)
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#define POLY1_UV16(poly1)   (((poly1)&0x00400000))
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#define POLY1_SINGLE_TILE(poly1) (((poly1)&0x00200000))
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#define POLY2_SRC_BLEND(poly2) ( pvr2_poly_srcblend[(poly2) >> 29] )
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#define POLY2_DEST_BLEND(poly2) ( pvr2_poly_dstblend[((poly2)>>26)&0x07] )
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#define POLY2_SRC_BLEND_TARGET(poly2)    ((poly2)&0x02000000)
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#define POLY2_DEST_BLEND_TARGET(poly2)   ((poly2)&0x01000000)
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#define POLY2_COLOUR_CLAMP_ENABLE(poly2) ((poly2)&0x00200000)
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#define POLY2_ALPHA_ENABLE(poly2)        ((poly2)&0x00100000)
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#define POLY2_TEX_ALPHA_ENABLE(poly2)   (((poly2)&0x00080000) == 0 )
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#define POLY2_TEX_CLAMP_U(poly2)         ((poly2)&0x00010000)
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#define POLY2_TEX_CLAMP_V(poly2)         ((poly2)&0x00008000)
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#define POLY2_TEX_WIDTH(poly2) ( 1<< ((((poly2) >> 3) & 0x07 ) + 3) )
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#define POLY2_TEX_HEIGHT(poly2) ( 1<< (((poly2) & 0x07 ) + 3) )
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#define POLY2_TEX_BLEND(poly2) ( pvr2_poly_texblend[((poly2) >> 6)&0x03] )
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extern int pvr2_poly_depthmode[8];
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extern int pvr2_poly_srcblend[8];
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extern int pvr2_poly_dstblend[8];
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extern int pvr2_poly_texblend[4];
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extern int pvr2_render_colour_format[8];
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float halftofloat(uint16_t half);
.