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lxdream.org :: lxdream/src/sh4/x86op.h
lxdream 0.9.1
released Jun 29
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filename src/sh4/x86op.h
changeset 929:fd8cb0c82f5f
prev927:17b6b9e245d8
next930:07e5b11419db
author nkeynes
date Sat Dec 20 03:01:40 2008 +0000 (12 years ago)
branchlxdream-mem
permissions -rw-r--r--
last change First pass experiment using cached decoding.
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/**
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 * $Id$
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 * 
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 * Definitions of x86 opcodes for use by the translator.
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 *
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 * Copyright (c) 2007 Nathan Keynes.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 */
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#ifndef lxdream_x86op_H
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#define lxdream_x86op_H 1
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define R_NONE -1
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#define R_EAX 0
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#define R_ECX 1
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#define R_EDX 2
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#define R_EBX 3
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#define R_ESP 4
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#define R_EBP 5
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#define R_ESI 6 
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#define R_EDI 7 
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#define R_AL 0
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#define R_CL 1
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#define R_DL 2
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#define R_BL 3
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#define R_AH 4
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#define R_CH 5
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#define R_DH 6
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#define R_BH 7
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#define MARK_JMP8(x) uint8_t *_mark_jmp_##x = xlat_output
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#define MARK_JMP32(x) uint32_t *_mark_jmp_##x = (uint32_t *)xlat_output
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#define JMP_TARGET(x) *_mark_jmp_##x += (xlat_output - _mark_jmp_##x)
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#define OP(x) *xlat_output++ = (x)
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#define OP32(x) *((uint32_t *)xlat_output) = (x); xlat_output+=4
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#define OP64(x) *((uint64_t *)xlat_output) = (x); xlat_output+=8
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#if SIZEOF_VOID_P == 8
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#define OPPTR(x) OP64((uint64_t)(x))
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#define AND_imm8s_rptr(imm, r1)  REXW(); AND_imm8s_r32( imm, r1 )
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#define LEA_sh4r_rptr(disp, r1) REXW(); LEA_sh4r_r32(disp,r1)
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#define MOV_moffptr_EAX(offptr)  REXW(); MOV_moff32_EAX( offptr )
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#define load_exc_backpatch( x86reg )  REXW(); OP(0xB8 + x86reg); sh4_x86_add_backpatch( xlat_output, pc, -2 ); OP64( 0 )
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#else /* 32-bit system */
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#define OPPTR(x) OP32((uint32_t)(x))
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#define AND_imm8s_rptr(imm, r1) AND_imm8s_r32( imm, r1 )
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#define LEA_sh4r_rptr(disp, r1) LEA_sh4r_r32(disp,r1)
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#define MOV_moffptr_EAX(offptr) MOV_moff32_EAX( offptr )
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#define load_exc_backpatch( x86reg )  OP(0xB8 + x86reg); sh4_x86_add_backpatch( xlat_output, pc, -2 ); OP32( 0 )
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#endif
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#define STACK_ALIGN 16
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#define POP_r32(r1)           OP(0x58 + r1)
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#define PUSH_r32(r1)          OP(0x50 + r1)
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#define PUSH_imm32(imm)       OP(0x68); OP32(imm)
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#define PUSH_imm64(imm)       REXW(); OP(0x68); OP64(imm);
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#ifdef STACK_ALIGN
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#else
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#define POP_r32(r1)           OP(0x58 + r1)
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#define PUSH_r32(r1)          OP(0x50 + r1)
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#endif
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/* Offset of a reg relative to the sh4r structure */
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#define REG_OFFSET(reg)  (((char *)&sh4r.reg) - ((char *)&sh4r) - 128)
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#define R_T   REG_OFFSET(t)
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#define R_Q   REG_OFFSET(q)
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#define R_S   REG_OFFSET(s)
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#define R_M   REG_OFFSET(m)
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#define R_SR  REG_OFFSET(sr)
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#define R_GBR REG_OFFSET(gbr)
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#define R_SSR REG_OFFSET(ssr)
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#define R_SPC REG_OFFSET(spc)
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#define R_VBR REG_OFFSET(vbr)
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#define R_MACH REG_OFFSET(mac)+4
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#define R_MACL REG_OFFSET(mac)
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#define R_PC REG_OFFSET(pc)
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#define R_NEW_PC REG_OFFSET(new_pc)
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#define R_PR REG_OFFSET(pr)
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#define R_SGR REG_OFFSET(sgr)
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#define R_FPUL REG_OFFSET(fpul)
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#define R_FPSCR REG_OFFSET(fpscr)
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#define R_DBR REG_OFFSET(dbr)
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/**************** Basic X86 operations *********************/
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/* Note: operands follow SH4 convention (source, dest) rather than x86 
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 * conventions (dest, source)
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 */
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/* Two-reg modrm form - first arg is the r32 reg, second arg is the r/m32 reg */
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#define MODRM_r32_rm32(r1,r2) OP(0xC0 | (r1<<3) | r2)
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#define MODRM_rm32_r32(r1,r2) OP(0xC0 | (r2<<3) | r1)
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/* ebp+disp8 modrm form */
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#define MODRM_r32_ebp8(r1,disp) OP(0x45 | (r1<<3)); OP(disp)
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/* ebp+disp32 modrm form */
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#define MODRM_r32_ebp32(r1,disp) OP(0x85 | (r1<<3)); OP32(disp)
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/* esp+disp32 modrm+sib form */
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#define MODRM_r32_esp8(r1,disp) OP(0x44 | (r1<<3)); OP(0x24); OP(disp)
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#define MODRM_r32_sh4r(r1,disp) if(disp>127){ MODRM_r32_ebp32(r1,disp);}else{ MODRM_r32_ebp8(r1,(unsigned char)disp); }
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#define REXW() OP(0x48)
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/* Major opcodes */
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#define ADD_sh4r_r32(disp,r1) OP(0x03); MODRM_r32_sh4r(r1,disp)
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#define ADD_r32_sh4r(r1,disp) OP(0x01); MODRM_r32_sh4r(r1,disp)
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#define ADD_r32_r32(r1,r2) OP(0x03); MODRM_rm32_r32(r1,r2)
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#define ADD_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1, 0); OP(imm)
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#define ADD_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(0,disp); OP(imm)
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#define ADD_imm8s_esp8(imm,disp) OP(0x83); MODRM_r32_esp8(0,disp); OP(imm)
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#define ADD_imm32_r32(imm32,r1) OP(0x81); MODRM_rm32_r32(r1,0); OP32(imm32)
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#define ADC_r32_r32(r1,r2)    OP(0x13); MODRM_rm32_r32(r1,r2)
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#define ADC_sh4r_r32(disp,r1) OP(0x13); MODRM_r32_sh4r(r1,disp)
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#define ADC_r32_sh4r(r1,disp) OP(0x11); MODRM_r32_sh4r(r1,disp)
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#define AND_r32_r32(r1,r2)    OP(0x23); MODRM_rm32_r32(r1,r2)
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#define AND_imm8_r8(imm8, r1) OP(0x80); MODRM_rm32_r32(r1,4); OP(imm8)
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#define AND_imm8s_r32(imm8,r1) OP(0x83); MODRM_rm32_r32(r1,4); OP(imm8)
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#define AND_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,4); OP32(imm)
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#define AND_sh4r_r32(disp,r1)   OP(0x23); MODRM_r32_sh4r(r1, disp)
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#define CALL_r32(r1)          OP(0xFF); MODRM_rm32_r32(r1,2)
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#define CALL_ptr(ptr)         OP(0xE8); OP32( (((char *)ptr) - (char *)xlat_output) - 4)
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#define CALL_sh4r(disp)       OP(0xFF); MODRM_r32_sh4r(2, disp)
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#define CALL_r32ind(r1,disp)  OP(0xFF); OP(0x50 + r1); OP(disp)
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#define CLC()                 OP(0xF8)
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#define CMC()                 OP(0xF5)
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#define CMP_sh4r_r32(disp,r1)  OP(0x3B); MODRM_r32_sh4r(r1,disp)
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#define CMP_r32_r32(r1,r2)    OP(0x3B); MODRM_rm32_r32(r1,r2)
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#define CMP_imm32_r32(imm32, r1) OP(0x81); MODRM_rm32_r32(r1,7); OP32(imm32)
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#define CMP_imm8s_r32(imm,r1) OP(0x83); MODRM_rm32_r32(r1,7); OP(imm)
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#define CMP_imm8s_sh4r(imm,disp) OP(0x83); MODRM_r32_sh4r(7,disp) OP(imm)
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#define DEC_r32(r1)           OP(0x48+r1)
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#define IMUL_r32(r1)          OP(0xF7); MODRM_rm32_r32(r1,5)
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#define INC_r32(r1)           OP(0x40+r1)
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#define JMP_rel8(label)  OP(0xEB); MARK_JMP8(label); OP(-1); 
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#define LEA_sh4r_r32(disp,r1) OP(0x8D); MODRM_r32_sh4r(r1,disp)
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#define LEA_r32disp8_r32(r1, disp, r2) OP(0x8D); OP( 0x40 + (r2<<3) + r1); OP(disp)
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#define MOV_r32_r32(r1,r2)    OP(0x89); MODRM_r32_rm32(r1,r2)
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#define MOV_r32_sh4r(r1,disp) OP(0x89); MODRM_r32_sh4r(r1,disp)
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#define MOV_moff32_EAX(off)   OP(0xA1); OPPTR(off)
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#define MOV_sh4r_r32(disp, r1)  OP(0x8B); MODRM_r32_sh4r(r1,disp)
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#define MOV_r32_r32ind(r2,r1) OP(0x89); OP(0 + (r2<<3) + r1 )
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#define MOV_r32ind_r32(r1,r2) OP(0x8B); OP(0 + (r2<<3) + r1 )
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#define MOV_r32_esp8(r1,disp) OP(0x89); MODRM_r32_esp8(r1,disp)
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#define MOV_esp8_r32(disp,r1) OP(0x8B); MODRM_r32_esp8(r1,disp)
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#define MOVSX_r8_r32(r1,r2)   OP(0x0F); OP(0xBE); MODRM_rm32_r32(r1,r2)
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#define MOVSX_r16_r32(r1,r2)  OP(0x0F); OP(0xBF); MODRM_rm32_r32(r1,r2)
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#define MOVZX_r8_r32(r1,r2)   OP(0x0F); OP(0xB6); MODRM_rm32_r32(r1,r2)
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#define MOVZX_r16_r32(r1,r2)  OP(0x0F); OP(0xB7); MODRM_rm32_r32(r1,r2)
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#define MOVZX_sh4r8_r32(disp,r1) OP(0x0F); OP(0xB6); MODRM_r32_sh4r(r1,disp)
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#define MOVZX_sh4r16_r32(disp,r1) OP(0x0F); OP(0xB7); MODRM_r32_sh4r(r1,disp)
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#define MUL_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,4)
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#define NEG_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,3)
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#define NOT_r32(r1)           OP(0xF7); MODRM_rm32_r32(r1,2)
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#define OR_r32_r32(r1,r2)     OP(0x0B); MODRM_rm32_r32(r1,r2)
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#define OR_imm8_r8(imm,r1)    OP(0x80); MODRM_rm32_r32(r1,1); OP(imm)
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#define OR_imm32_r32(imm,r1)  OP(0x81); MODRM_rm32_r32(r1,1); OP32(imm)
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#define OR_sh4r_r32(disp,r1)  OP(0x0B); MODRM_r32_sh4r(r1,disp)
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#define RCL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,2)
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#define RCR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,3)
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#define RET()                 OP(0xC3)
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#define ROL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,0)
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#define ROR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,1)
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#define SAR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,7)
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#define SAR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,7); OP(imm)
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#define SAR_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,7)
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#define SBB_r32_r32(r1,r2)    OP(0x1B); MODRM_rm32_r32(r1,r2)
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#define SHL1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,4)
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#define SHL_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,4)
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#define SHL_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,4); OP(imm)
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#define SHR1_r32(r1)          OP(0xD1); MODRM_rm32_r32(r1,5)
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#define SHR_r32_CL(r1)        OP(0xD3); MODRM_rm32_r32(r1,5)
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#define SHR_imm8_r32(imm,r1)  OP(0xC1); MODRM_rm32_r32(r1,5); OP(imm)
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#define STC()                 OP(0xF9)
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#define SUB_r32_r32(r1,r2)    OP(0x2B); MODRM_rm32_r32(r1,r2)
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#define SUB_sh4r_r32(disp,r1)  OP(0x2B); MODRM_r32_sh4r(r1, disp)
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#define SUB_imm8s_r32(imm,r1) ADD_imm8s_r32(-(imm),r1)
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#define TEST_r8_r8(r1,r2)     OP(0x84); MODRM_r32_rm32(r1,r2)
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#define TEST_r32_r32(r1,r2)   OP(0x85); MODRM_rm32_r32(r1,r2)
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#define TEST_imm8_r8(imm8,r1) OP(0xF6); MODRM_rm32_r32(r1,0); OP(imm8)
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#define TEST_imm32_r32(imm,r1) OP(0xF7); MODRM_rm32_r32(r1,0); OP32(imm)
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#define XCHG_r8_r8(r1,r2)     OP(0x86); MODRM_rm32_r32(r1,r2)
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#define XOR_r8_r8(r1,r2)      OP(0x32); MODRM_rm32_r32(r1,r2)
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#define XOR_imm8s_r32(imm,r1)   OP(0x83); MODRM_rm32_r32(r1,6); OP(imm)
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#define XOR_r32_r32(r1,r2)    OP(0x33); MODRM_rm32_r32(r1,r2)
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#define XOR_sh4r_r32(disp,r1)    OP(0x33); MODRM_r32_sh4r(r1,disp)
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#define XOR_imm32_r32(imm,r1) OP(0x81); MODRM_rm32_r32(r1,6); OP32(imm)
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/* Floating point ops */
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#define FABS_st0() OP(0xD9); OP(0xE1)
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#define FADDP_st(st) OP(0xDE); OP(0xC0+st)
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#define FCHS_st0() OP(0xD9); OP(0xE0)
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#define FCOMIP_st(st) OP(0xDF); OP(0xF0+st)
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#define FDIVP_st(st) OP(0xDE); OP(0xF8+st)
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#define FILD_r32ind(r32) OP(0xDB); OP(0x00+r32)
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#define FLD0_st0() OP(0xD9); OP(0xEE);
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#define FLD1_st0() OP(0xD9); OP(0xE8);
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#define FLDf_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(0, disp)
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#define FLDd_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(0, disp)
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#define FLDCW_r32ind(r32) OP(0xD9); OP(0x28+r32)
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#define FMULP_st(st) OP(0xDE); OP(0xC8+st)
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#define FNSTCW_r32ind(r32) OP(0xD9); OP(0x38+r32)
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#define FPOP_st()  OP(0xDD); OP(0xC0); OP(0xD9); OP(0xF7)
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#define FSTPf_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(3, disp)
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#define FSTPd_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(3, disp)
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#define FSUBP_st(st) OP(0xDE); OP(0xE8+st)
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#define FSQRT_st0() OP(0xD9); OP(0xFA)
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#define FILD_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(0, disp)
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#define FLDF_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(0, disp)
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#define FLDD_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(0, disp)
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#define FISTP_sh4r(disp) OP(0xDB); MODRM_r32_sh4r(3, disp)
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#define FSTPF_sh4r(disp) OP(0xD9); MODRM_r32_sh4r(3,disp)
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#define FSTPD_sh4r(disp) OP(0xDD); MODRM_r32_sh4r(3,disp)
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/* Conditional branches */
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#define JE_rel8(label)   OP(0x74); MARK_JMP8(label); OP(-1)
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#define JA_rel8(label)   OP(0x77); MARK_JMP8(label); OP(-1)
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#define JAE_rel8(label)  OP(0x73); MARK_JMP8(label); OP(-1)
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#define JG_rel8(label)   OP(0x7F); MARK_JMP8(label); OP(-1)
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#define JGE_rel8(label)  OP(0x7D); MARK_JMP8(label); OP(-1)
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#define JC_rel8(label)   OP(0x72); MARK_JMP8(label); OP(-1)
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#define JO_rel8(label)   OP(0x70); MARK_JMP8(label); OP(-1)
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#define JNE_rel8(label)  OP(0x75); MARK_JMP8(label); OP(-1)
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#define JNA_rel8(label)  OP(0x76); MARK_JMP8(label); OP(-1)
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#define JNAE_rel8(label) OP(0x72); MARK_JMP8(label); OP(-1)
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#define JNG_rel8(label)  OP(0x7E); MARK_JMP8(label); OP(-1)
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#define JNGE_rel8(label) OP(0x7C); MARK_JMP8(label); OP(-1)
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#define JNC_rel8(label)  OP(0x73); MARK_JMP8(label); OP(-1)
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#define JNO_rel8(label)  OP(0x71); MARK_JMP8(label); OP(-1)
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#define JNS_rel8(label)  OP(0x79); MARK_JMP8(label); OP(-1)
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#define JS_rel8(label)   OP(0x78); MARK_JMP8(label); OP(-1)
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/** JMP relative 8 or 32 depending on size of rel. rel offset
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 * from the start of the instruction (not end)
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 */
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#define JMP_rel(rel) if((rel)<-126||(rel)>129) { OP(0xE9); OP32((rel)-5); } else { OP(0xEB); OP((rel)-2); }
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/* 32-bit long forms w/ backpatching to an exception routine */
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#define JMP_exc(exc)  OP(0xE9); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JE_exc(exc)  OP(0x0F); OP(0x84); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JA_exc(exc)  OP(0x0F); OP(0x87); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JAE_exc(exc) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JG_exc(exc)  OP(0x0F); OP(0x8F); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JGE_exc(exc) OP(0x0F); OP(0x8D); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JC_exc(exc)  OP(0x0F); OP(0x82); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JO_exc(exc)  OP(0x0F); OP(0x80); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JNE_exc(exc) OP(0x0F); OP(0x85); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JNA_exc(exc) OP(0x0F); OP(0x86); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JNAE_exc(exc) OP(0x0F);OP(0x82); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JNG_exc(exc) OP(0x0F); OP(0x8E); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JNGE_exc(exc) OP(0x0F);OP(0x8C); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JNC_exc(exc) OP(0x0F); OP(0x83); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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#define JNO_exc(exc) OP(0x0F); OP(0x81); sh4_x86_add_backpatch(xlat_output, pc, exc); OP32(0)
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   273
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#define EXPJE_rel8(label) OP(0x3E); JE_rel8(label)
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   275
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/* Conditional moves ebp-rel */
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#define CMOVE_r32_r32(r1,r2)  OP(0x0F); OP(0x44); MODRM_rm32_r32(r1,r2)
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   278
#define CMOVA_r32_r32(r1,r2)  OP(0x0F); OP(0x47); MODRM_rm32_r32(r1,r2)
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   279
#define CMOVAE_r32_r32(r1,r2) OP(0x0F); OP(0x43); MODRM_rm32_r32(r1,r2)
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   280
#define CMOVG_r32_r32(r1,r2)  OP(0x0F); OP(0x4F); MODRM_rm32_r32(r1,r2)
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   281
#define CMOVGE_r32_r32(r1,r2)  OP(0x0F); OP(0x4D); MODRM_rm32_r32(r1,r2)
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   282
#define CMOVC_r32_r32(r1,r2)  OP(0x0F); OP(0x42); MODRM_rm32_r32(r1,r2)
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   283
#define CMOVO_r32_r32(r1,r2)  OP(0x0F); OP(0x40); MODRM_rm32_r32(r1,r2)
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   284
nkeynes@368
   285
nkeynes@359
   286
/* Conditional setcc - writeback to sh4r.t */
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#define SETE_sh4r(disp)    OP(0x0F); OP(0x94); MODRM_r32_sh4r(0, disp);
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   288
#define SETA_sh4r(disp)    OP(0x0F); OP(0x97); MODRM_r32_sh4r(0, disp);
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   289
#define SETAE_sh4r(disp)   OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
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   290
#define SETG_sh4r(disp)    OP(0x0F); OP(0x9F); MODRM_r32_sh4r(0, disp);
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   291
#define SETGE_sh4r(disp)   OP(0x0F); OP(0x9D); MODRM_r32_sh4r(0, disp);
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   292
#define SETC_sh4r(disp)    OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
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   293
#define SETO_sh4r(disp)    OP(0x0F); OP(0x90); MODRM_r32_sh4r(0, disp);
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   294
nkeynes@374
   295
#define SETNE_sh4r(disp)   OP(0x0F); OP(0x95); MODRM_r32_sh4r(0, disp);
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   296
#define SETNA_sh4r(disp)   OP(0x0F); OP(0x96); MODRM_r32_sh4r(0, disp);
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   297
#define SETNAE_sh4r(disp)  OP(0x0F); OP(0x92); MODRM_r32_sh4r(0, disp);
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   298
#define SETNG_sh4r(disp)   OP(0x0F); OP(0x9E); MODRM_r32_sh4r(0, disp);
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   299
#define SETNGE_sh4r(disp)  OP(0x0F); OP(0x9C); MODRM_r32_sh4r(0, disp);
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   300
#define SETNC_sh4r(disp)   OP(0x0F); OP(0x93); MODRM_r32_sh4r(0, disp);
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   301
#define SETNO_sh4r(disp)   OP(0x0F); OP(0x91); MODRM_r32_sh4r(0, disp);
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   302
nkeynes@374
   303
#define SETE_t() SETE_sh4r(R_T)
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   304
#define SETA_t() SETA_sh4r(R_T)
nkeynes@374
   305
#define SETAE_t() SETAE_sh4r(R_T)
nkeynes@374
   306
#define SETG_t() SETG_sh4r(R_T)
nkeynes@374
   307
#define SETGE_t() SETGE_sh4r(R_T)
nkeynes@374
   308
#define SETC_t() SETC_sh4r(R_T)
nkeynes@374
   309
#define SETO_t() SETO_sh4r(R_T)
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   310
#define SETNE_t() SETNE_sh4r(R_T)
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   311
nkeynes@386
   312
#define SETC_r8(r1)      OP(0x0F); OP(0x92); MODRM_rm32_r32(r1, 0)
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   313
nkeynes@359
   314
/* Pseudo-op Load carry from T: CMP [EBP+t], #01 ; CMC */
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   315
#define LDC_t()     OP(0x83); MODRM_r32_sh4r(7,R_T); OP(0x01); CMC()
nkeynes@359
   316
nkeynes@903
   317
/* SSE instructions */
nkeynes@903
   318
#define ADDPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x58); MODRM_rm32_r32(xmm1,xmm2) 
nkeynes@903
   319
#define HADDPS_xmm_xmm(xmm1,xmm2) OP(0xF2); OP(0x0F); OP(0x7C); MODRM_rm32_r32(xmm1,xmm2)
nkeynes@903
   320
#define MOVHLPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x12); MODRM_rm32_r32(xmm1,xmm2)
nkeynes@903
   321
#define MOVLHPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x16); MODRM_rm32_r32(xmm1,xmm2)
nkeynes@903
   322
#define MOVSHDUP_sh4r_xmm(disp,xmm) OP(0xF3); OP(0x0F); OP(0x16); MODRM_r32_sh4r(xmm,disp)
nkeynes@903
   323
#define MOVSLDUP_sh4r_xmm(disp,xmm) OP(0xF3); OP(0x0F); OP(0x12); MODRM_r32_sh4r(xmm,disp)
nkeynes@903
   324
#define MOVAPS_sh4r_xmm(disp, xmm) OP(0x0F); OP(0x28); MODRM_r32_sh4r(xmm,disp)
nkeynes@903
   325
#define MOVAPS_xmm_sh4r(xmm,disp) OP(0x0F); OP(0x29); MODRM_r32_sh4r(xmm,disp)
nkeynes@903
   326
#define MOVAPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x28); MODRM_rm32_r32(xmm1,xmm2)
nkeynes@903
   327
#define MOVSS_xmm_sh4r(xmm,disp) OP(0xF3); OP(0x0F); OP(0x11); MODRM_r32_sh4r(xmm,disp)
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   328
#define MULPS_sh4r_xmm(disp, xmm) OP(0x0F); OP(0x59); MODRM_r32_sh4r(xmm,disp)
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   329
#define MULPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x59); MODRM_rm32_r32(xmm1,xmm2)
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   330
#define SHUFPS_sh4r_xmm(disp,xmm,imm8) OP(0x0F); OP(0xC6); MODRM_r32_sh4r(xmm, disp); OP(imm8) 
nkeynes@903
   331
#define SHUFPS_xmm_xmm(xmm1,xmm2,imm8) OP(0x0F); OP(0xC6); MODRM_rm32_r32(xmm1,xmm2); OP(imm8)
nkeynes@903
   332
#define UNPCKHPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x15); MODRM_rm32_r32(xmm1,xmm2)
nkeynes@903
   333
#define UNPCKLPS_xmm_xmm(xmm1,xmm2) OP(0x0F); OP(0x14); MODRM_rm32_r32(xmm1,xmm2)
nkeynes@903
   334
nkeynes@736
   335
#ifdef __cplusplus
nkeynes@736
   336
}
nkeynes@736
   337
#endif
nkeynes@736
   338
nkeynes@736
   339
#endif /* !lxdream_x86op_H */
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