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lxdream.org :: lxdream/src/sh4/mmu.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/mmu.c
changeset 1202:01ae5cbad4c8
prev1198:407659e01ef0
next1217:677b1d85f1b4
author nkeynes
date Fri Dec 23 08:20:17 2011 +1000 (8 years ago)
permissions -rw-r--r--
last change Move the exception exit macros up to sh4core.h
file annotate diff log raw
1.1 --- a/src/sh4/mmu.c Fri Dec 16 10:08:45 2011 +1000
1.2 +++ b/src/sh4/mmu.c Fri Dec 23 08:20:17 2011 +1000
1.3 @@ -27,13 +27,6 @@
1.4 #include "mem.h"
1.5 #include "mmu.h"
1.6
1.7 -#define RAISE_TLB_ERROR(code, vpn) sh4_raise_tlb_exception(code, vpn)
1.8 -#define RAISE_MEM_ERROR(code, vpn) \
1.9 - MMIO_WRITE(MMU, TEA, vpn); \
1.10 - MMIO_WRITE(MMU, PTEH, ((MMIO_READ(MMU, PTEH) & 0x000003FF) | (vpn&0xFFFFFC00))); \
1.11 - sh4_raise_exception(code);
1.12 -#define RAISE_TLB_MULTIHIT_ERROR(vpn) sh4_raise_tlb_multihit(vpn)
1.13 -
1.14 /* An entry is a 1K entry if it's one of the mmu_utlb_1k_pages entries */
1.15 #define IS_1K_PAGE_ENTRY(ent) ( ((uintptr_t)(((struct utlb_1k_entry *)ent) - &mmu_utlb_1k_pages[0])) < UTLB_ENTRY_COUNT )
1.16
1.17 @@ -1198,13 +1191,6 @@
1.18 }
1.19
1.20 /********************** TLB Direct-Access Regions ***************************/
1.21 -#ifdef HAVE_FRAME_ADDRESS
1.22 -#define EXCEPTION_EXIT() do{ *(((void * volatile *)__builtin_frame_address(0))+1) = exc; } while(0)
1.23 -#else
1.24 -#define EXCEPTION_EXIT() sh4_core_exit(CORE_EXIT_EXCEPTION)
1.25 -#endif
1.26 -
1.27 -
1.28 #define ITLB_ENTRY(addr) ((addr>>7)&0x03)
1.29
1.30 int32_t FASTCALL mmu_itlb_addr_read( sh4addr_t addr )
1.31 @@ -1326,7 +1312,7 @@
1.32
1.33 if( itlb == -2 || utlb == -2 ) {
1.34 RAISE_TLB_MULTIHIT_ERROR(addr); /* FIXME: should this only be raised if TLB is enabled? */
1.35 - EXCEPTION_EXIT();
1.36 + SH4_EXCEPTION_EXIT();
1.37 return;
1.38 }
1.39 } else {
1.40 @@ -1389,60 +1375,60 @@
1.41 static void FASTCALL address_error_read( sh4addr_t addr, void *exc )
1.42 {
1.43 RAISE_MEM_ERROR(EXC_DATA_ADDR_READ, addr);
1.44 - EXCEPTION_EXIT();
1.45 + SH4_EXCEPTION_EXIT();
1.46 }
1.47
1.48 static void FASTCALL address_error_read_for_write( sh4addr_t addr, void *exc )
1.49 {
1.50 RAISE_MEM_ERROR(EXC_DATA_ADDR_WRITE, addr);
1.51 - EXCEPTION_EXIT();
1.52 + SH4_EXCEPTION_EXIT();
1.53 }
1.54
1.55 static void FASTCALL address_error_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
1.56 {
1.57 RAISE_MEM_ERROR(EXC_DATA_ADDR_READ, addr);
1.58 - EXCEPTION_EXIT();
1.59 + SH4_EXCEPTION_EXIT();
1.60 }
1.61
1.62 static void FASTCALL address_error_write( sh4addr_t addr, uint32_t val, void *exc )
1.63 {
1.64 RAISE_MEM_ERROR(EXC_DATA_ADDR_WRITE, addr);
1.65 - EXCEPTION_EXIT();
1.66 + SH4_EXCEPTION_EXIT();
1.67 }
1.68
1.69 static void FASTCALL tlb_miss_read( sh4addr_t addr, void *exc )
1.70 {
1.71 mmu_urc++;
1.72 RAISE_TLB_ERROR(EXC_TLB_MISS_READ, addr);
1.73 - EXCEPTION_EXIT();
1.74 + SH4_EXCEPTION_EXIT();
1.75 }
1.76
1.77 static void FASTCALL tlb_miss_read_for_write( sh4addr_t addr, void *exc )
1.78 {
1.79 mmu_urc++;
1.80 RAISE_TLB_ERROR(EXC_TLB_MISS_WRITE, addr);
1.81 - EXCEPTION_EXIT();
1.82 + SH4_EXCEPTION_EXIT();
1.83 }
1.84
1.85 static void FASTCALL tlb_miss_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
1.86 {
1.87 mmu_urc++;
1.88 RAISE_TLB_ERROR(EXC_TLB_MISS_READ, addr);
1.89 - EXCEPTION_EXIT();
1.90 + SH4_EXCEPTION_EXIT();
1.91 }
1.92
1.93 static void FASTCALL tlb_miss_write( sh4addr_t addr, uint32_t val, void *exc )
1.94 {
1.95 mmu_urc++;
1.96 RAISE_TLB_ERROR(EXC_TLB_MISS_WRITE, addr);
1.97 - EXCEPTION_EXIT();
1.98 + SH4_EXCEPTION_EXIT();
1.99 }
1.100
1.101 static int32_t FASTCALL tlb_protected_read( sh4addr_t addr, void *exc )
1.102 {
1.103 mmu_urc++;
1.104 RAISE_MEM_ERROR(EXC_TLB_PROT_READ, addr);
1.105 - EXCEPTION_EXIT();
1.106 + SH4_EXCEPTION_EXIT();
1.107 return 0;
1.108 }
1.109
1.110 @@ -1450,7 +1436,7 @@
1.111 {
1.112 mmu_urc++;
1.113 RAISE_MEM_ERROR(EXC_TLB_PROT_WRITE, addr);
1.114 - EXCEPTION_EXIT();
1.115 + SH4_EXCEPTION_EXIT();
1.116 return 0;
1.117 }
1.118
1.119 @@ -1458,7 +1444,7 @@
1.120 {
1.121 mmu_urc++;
1.122 RAISE_MEM_ERROR(EXC_TLB_PROT_READ, addr);
1.123 - EXCEPTION_EXIT();
1.124 + SH4_EXCEPTION_EXIT();
1.125 return 0;
1.126 }
1.127
1.128 @@ -1466,41 +1452,41 @@
1.129 {
1.130 mmu_urc++;
1.131 RAISE_MEM_ERROR(EXC_TLB_PROT_WRITE, addr);
1.132 - EXCEPTION_EXIT();
1.133 + SH4_EXCEPTION_EXIT();
1.134 }
1.135
1.136 static void FASTCALL tlb_initial_write( sh4addr_t addr, uint32_t val, void *exc )
1.137 {
1.138 mmu_urc++;
1.139 RAISE_MEM_ERROR(EXC_INIT_PAGE_WRITE, addr);
1.140 - EXCEPTION_EXIT();
1.141 + SH4_EXCEPTION_EXIT();
1.142 }
1.143
1.144 static int32_t FASTCALL tlb_initial_read_for_write( sh4addr_t addr, void *exc )
1.145 {
1.146 mmu_urc++;
1.147 RAISE_MEM_ERROR(EXC_INIT_PAGE_WRITE, addr);
1.148 - EXCEPTION_EXIT();
1.149 + SH4_EXCEPTION_EXIT();
1.150 return 0;
1.151 }
1.152
1.153 static int32_t FASTCALL tlb_multi_hit_read( sh4addr_t addr, void *exc )
1.154 {
1.155 sh4_raise_tlb_multihit(addr);
1.156 - EXCEPTION_EXIT();
1.157 + SH4_EXCEPTION_EXIT();
1.158 return 0;
1.159 }
1.160
1.161 static int32_t FASTCALL tlb_multi_hit_read_burst( unsigned char *dest, sh4addr_t addr, void *exc )
1.162 {
1.163 sh4_raise_tlb_multihit(addr);
1.164 - EXCEPTION_EXIT();
1.165 + SH4_EXCEPTION_EXIT();
1.166 return 0;
1.167 }
1.168 static void FASTCALL tlb_multi_hit_write( sh4addr_t addr, uint32_t val, void *exc )
1.169 {
1.170 sh4_raise_tlb_multihit(addr);
1.171 - EXCEPTION_EXIT();
1.172 + SH4_EXCEPTION_EXIT();
1.173 }
1.174
1.175 /**
.