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lxdream.org :: lxdream/src/sh4/sh4core.h :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.h
changeset 559:06714bc64271
prev550:a27e31340147
next561:533f6b478071
author nkeynes
date Tue Jan 01 04:58:57 2008 +0000 (12 years ago)
branchlxdream-mmu
permissions -rw-r--r--
last change Commit first pass at full TLB support - still needs a lot more work
file annotate diff log raw
1.1 --- a/src/sh4/sh4core.h Thu Dec 06 10:43:30 2007 +0000
1.2 +++ b/src/sh4/sh4core.h Tue Jan 01 04:58:57 2008 +0000
1.3 @@ -102,6 +102,7 @@
1.4
1.5 gboolean sh4_execute_instruction( void );
1.6 gboolean sh4_raise_exception( int );
1.7 +gboolean sh4_raise_reset( int );
1.8 gboolean sh4_raise_trap( int );
1.9 gboolean sh4_raise_slot_exception( int, int );
1.10 gboolean sh4_raise_tlb_exception( int );
1.11 @@ -114,16 +115,21 @@
1.12 #define BREAK_PERM 2
1.13
1.14 /* SH4 Memory */
1.15 +uint64_t mmu_vma_to_phys_read( sh4addr_t addr );
1.16 +uint64_t mmu_vma_to_phys_write( sh4addr_t addr );
1.17 +uint64_t mmu_vma_to_phys_exec( sh4addr_t addr );
1.18 +
1.19 int64_t sh4_read_quad( sh4addr_t addr );
1.20 -int32_t sh4_read_long( sh4addr_t addr );
1.21 -int32_t sh4_read_word( sh4addr_t addr );
1.22 -int32_t sh4_read_byte( sh4addr_t addr );
1.23 +int64_t sh4_read_long( sh4addr_t addr );
1.24 +int64_t sh4_read_word( sh4addr_t addr );
1.25 +int64_t sh4_read_byte( sh4addr_t addr );
1.26 void sh4_write_quad( sh4addr_t addr, uint64_t val );
1.27 -void sh4_write_long( sh4addr_t addr, uint32_t val );
1.28 -void sh4_write_word( sh4addr_t addr, uint32_t val );
1.29 -void sh4_write_byte( sh4addr_t addr, uint32_t val );
1.30 +int32_t sh4_write_long( sh4addr_t addr, uint32_t val );
1.31 +int32_t sh4_write_word( sh4addr_t addr, uint32_t val );
1.32 +int32_t sh4_write_byte( sh4addr_t addr, uint32_t val );
1.33 int32_t sh4_read_phys_word( sh4addr_t addr );
1.34 void sh4_flush_store_queue( sh4addr_t addr );
1.35 +sh4ptr_t sh4_get_region_by_vma( sh4addr_t addr );
1.36
1.37 /* SH4 Support methods */
1.38 uint32_t sh4_read_sr(void);
1.39 @@ -160,6 +166,7 @@
1.40 #define SIGNEXT16(n) ((int32_t)((int16_t)(n)))
1.41 #define SIGNEXT32(n) ((int64_t)((int32_t)(n)))
1.42 #define SIGNEXT48(n) ((((int64_t)(n))<<16)>>16)
1.43 +#define ZEROEXT32(n) ((int64_t)((uint64_t)((uint32_t)(n))))
1.44
1.45 /* Status Register (SR) bits */
1.46 #define SR_MD 0x40000000 /* Processor mode ( User=0, Privileged=1 ) */
1.47 @@ -201,16 +208,26 @@
1.48 #define FPULi (sh4r.fpul)
1.49
1.50 /* CPU-generated exception code/vector pairs */
1.51 -#define EXC_POWER_RESET 0x000 /* vector special */
1.52 -#define EXC_MANUAL_RESET 0x020
1.53 -#define EXC_DATA_ADDR_READ 0x0E0
1.54 +#define EXC_POWER_RESET 0x000 /* vector special */
1.55 +#define EXC_MANUAL_RESET 0x020
1.56 +#define EXC_TLB_MISS_READ 0x040
1.57 +#define EXC_TLB_MISS_WRITE 0x060
1.58 +#define EXC_INIT_PAGE_WRITE 0x080
1.59 +#define EXC_TLB_PROT_READ 0x0A0
1.60 +#define EXC_TLB_PROT_WRITE 0x0C0
1.61 +#define EXC_DATA_ADDR_READ 0x0E0
1.62 #define EXC_DATA_ADDR_WRITE 0x100
1.63 -#define EXC_SLOT_ILLEGAL 0x1A0
1.64 -#define EXC_ILLEGAL 0x180
1.65 -#define EXC_TRAP 0x160
1.66 -#define EXC_FPU_DISABLED 0x800
1.67 +#define EXC_TLB_MULTI_HIT 0x140
1.68 +#define EXC_SLOT_ILLEGAL 0x1A0
1.69 +#define EXC_ILLEGAL 0x180
1.70 +#define EXC_TRAP 0x160
1.71 +#define EXC_FPU_DISABLED 0x800
1.72 #define EXC_SLOT_FPU_DISABLED 0x820
1.73
1.74 +#define EXV_EXCEPTION 0x100 /* General exception vector */
1.75 +#define EXV_TLBMISS 0x400 /* TLB-miss exception vector */
1.76 +#define EXV_INTERRUPT 0x600 /* External interrupt vector */
1.77 +
1.78 /* Exceptions (for use with sh4_raise_exception) */
1.79
1.80 #define EX_ILLEGAL_INSTRUCTION 0x180, 0x100
.