filename | src/xlat/xltcache.h |
changeset | 1195:072131b61d2a |
prev | 1188:1cc9bb0b3848 |
next | 1214:49152b3d8b75 |
author | nkeynes |
date | Mon Dec 12 21:15:44 2011 +1000 (12 years ago) |
permissions | -rw-r--r-- |
last change | Handle branch delay-slot instruction that falls on the next page correctly. - Generate the right end PC in the first place (sh4trans.c) - Allow blocks to be marked as both entry point + continuation, and specifically handle invalidation when first entry of a page is a continuation == flush previous page as well. |
file | annotate | diff | log | raw |
1.1 --- a/src/xlat/xltcache.h Thu Dec 01 01:50:44 2011 +10001.2 +++ b/src/xlat/xltcache.h Mon Dec 12 21:15:44 2011 +10001.3 @@ -78,9 +78,11 @@1.4 /**1.5 * Commit the current translation block1.6 * @param destsize final size of the translation in bytes.1.7 - * @param srcsize size of the original data that was translated in bytes1.8 + * @param startpc PC at the start of the translation block.1.9 + * @param endpc PC at the end of the translation block (i.e. the address of the1.10 + * next instruction after the block).1.11 */1.12 -void xlat_commit_block( uint32_t destsize, uint32_t srcsize );1.13 +void xlat_commit_block( uint32_t destsize, sh4addr_t startpc, sh4addr_t endpc );1.15 /**1.16 * Dump the disassembly of the specified code block to a stream
.