filename | src/aica/armcore.h |
changeset | 11:0a82ef380c45 |
prev | 7:976a16e92aab |
next | 14:fc481a638848 |
author | nkeynes |
date | Sun Dec 11 12:00:09 2005 +0000 (15 years ago) |
permissions | -rw-r--r-- |
last change | Moved arm material under aica/ Hooked arm disasm up |
file | annotate | diff | log | raw |
1.1 --- a/src/aica/armcore.h Sun Dec 12 07:44:09 2004 +00001.2 +++ b/src/aica/armcore.h Sun Dec 11 12:00:09 2005 +00001.3 @@ -8,23 +8,24 @@1.4 #define ROTATE_RIGHT_LONG(operand,shift) ((((uint32_t)operand) >> shift) | ((operand<<(32-shift))) )1.6 struct arm_registers {1.7 - uint32_t r[16]; /* Current register bank */1.8 -1.9 - uint32_t cpsr;1.10 - uint32_t spsr;1.11 -1.12 - /* Various banked versions of the registers. */1.13 - uint32_t fiq_r[7]; /* FIQ bank 8..14 */1.14 - uint32_t irq_r[2]; /* IRQ bank 13..14 */1.15 - uint32_t und_r[2]; /* UND bank 13..14 */1.16 - uint32_t abt_r[2]; /* ABT bank 13..14 */1.17 - uint32_t svc_r[2]; /* SVC bank 13..14 */1.18 - uint32_t user_r[7]; /* User/System bank 8..14 */1.19 -1.20 - uint32_t c,n,z,v,t;1.21 -1.22 - /* "fake" registers */1.23 - uint32_t shift_c; /* used for temporary storage of shifter results */1.24 + uint32_t r[16]; /* Current register bank */1.25 +1.26 + uint32_t cpsr;1.27 + uint32_t spsr;1.28 +1.29 + /* Various banked versions of the registers. */1.30 + uint32_t fiq_r[7]; /* FIQ bank 8..14 */1.31 + uint32_t irq_r[2]; /* IRQ bank 13..14 */1.32 + uint32_t und_r[2]; /* UND bank 13..14 */1.33 + uint32_t abt_r[2]; /* ABT bank 13..14 */1.34 + uint32_t svc_r[2]; /* SVC bank 13..14 */1.35 + uint32_t user_r[7]; /* User/System bank 8..14 */1.36 +1.37 + uint32_t c,n,z,v,t;1.38 +1.39 + /* "fake" registers */1.40 + uint32_t shift_c; /* used for temporary storage of shifter results */1.41 + uint32_t icount; /* Instruction counter */1.42 };1.44 #define CPSR_N 0x80000000 /* Negative flag */1.45 @@ -48,4 +49,13 @@1.47 #define CARRY_FLAG (armr.cpsr&CPSR_C)1.49 +/* ARM Memory */1.50 +int32_t arm_read_long( uint32_t addr );1.51 +int32_t arm_read_word( uint32_t addr );1.52 +int32_t arm_read_byte( uint32_t addr );1.53 +void arm_write_long( uint32_t addr, uint32_t val );1.54 +void arm_write_word( uint32_t addr, uint32_t val );1.55 +void arm_write_byte( uint32_t addr, uint32_t val );1.56 +int32_t arm_read_phys_word( uint32_t addr );1.57 +1.58 #endif /* !dream_armcore_H */
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