filename | src/sh4/sh4dasm.c |
changeset | 11:0a82ef380c45 |
prev | 10:c898b37506e0 |
next | 14:fc481a638848 |
author | nkeynes |
date | Sun Dec 11 12:00:09 2005 +0000 (17 years ago) |
permissions | -rw-r--r-- |
last change | Moved arm material under aica/ Hooked arm disasm up |
file | annotate | diff | log | raw |
1.1 --- a/src/sh4/sh4dasm.c Sun Dec 11 05:15:36 2005 +00001.2 +++ b/src/sh4/sh4dasm.c Sun Dec 11 12:00:09 2005 +00001.3 @@ -5,7 +5,7 @@1.4 #define UNIMP(ir) snprintf( buf, len, "??? " )1.7 -struct reg_desc_struct sh4_reg_map[] =1.8 +const struct reg_desc_struct sh4_reg_map[] =1.9 { {"R0", REG_INT, &sh4r.r[0]}, {"R1", REG_INT, &sh4r.r[1]},1.10 {"R2", REG_INT, &sh4r.r[2]}, {"R3", REG_INT, &sh4r.r[3]},1.11 {"R4", REG_INT, &sh4r.r[4]}, {"R5", REG_INT, &sh4r.r[5]},1.12 @@ -24,11 +24,11 @@1.13 {NULL, 0, NULL} };1.16 -struct cpu_desc_struct sh4_cpu_desc = { "SH4", sh4_disasm_instruction, 2,1.17 +const struct cpu_desc_struct sh4_cpu_desc = { "SH4", sh4_disasm_instruction, 2,1.18 (char *)&sh4r, sizeof(sh4r), sh4_reg_map,1.19 &sh4r.pc, &sh4r.icount };1.21 -uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len )1.22 +uint32_t sh4_disasm_instruction( uint32_t pc, char *buf, int len, char *opcode )1.23 {1.24 uint16_t ir = sh4_read_word(pc);1.26 @@ -44,6 +44,8 @@1.27 #define FVN(ir) ((ir&0x0C00)>>10)1.28 #define FVM(ir) ((ir&0x0300)>>8)1.30 + sprintf( opcode, "%02X %02X", ir&0xFF, ir>>8 );1.31 +1.32 switch( (ir&0xF000)>>12 ) {1.33 case 0: /* 0000nnnnmmmmxxxx */1.34 switch( ir&0x000F ) {1.35 @@ -362,12 +364,12 @@1.36 {1.37 int pc;1.38 char buf[80];1.39 + char opcode[16];1.41 for( pc = from; pc < to; pc+=2 ) {1.42 - uint16_t op = sh4_read_word( pc );1.43 buf[0] = '\0';1.44 sh4_disasm_instruction( pc,1.45 - buf, sizeof(buf) );1.46 - fprintf( f, " %08x: %04x %s\n", pc + load_addr, op, buf );1.47 + buf, sizeof(buf), opcode );1.48 + fprintf( f, " %08x: %s %s\n", pc + load_addr, opcode, buf );1.49 }1.50 }
.