lxdream.org :: lxdream/src/aica/armdasm.c r1091:186558374345

filename	src/aica/armdasm.c
changeset	1091:186558374345
prev	998:1754a8c6a9cf
author	nkeynes
date	Tue Dec 15 08:46:37 2009 +1000 (14 years ago)
permissions	-rw-r--r--
last change	Add side-by-side x86+sh4 disassembly output Print SH4 state information and disassembly of the current block when crashing. Fix delay slot instruction in conditional branch not being marked as a delay-slot instruction in the branch-not-taken path. Rename REG_* defines in cpu.h to avoid conflict with translation defs

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     1.1 --- a/src/aica/armdasm.c	Tue Mar 24 11:15:57 2009 +0000
     1.2 +++ b/src/aica/armdasm.c	Tue Dec 15 08:46:37 2009 +1000
     1.3 @@ -49,25 +49,25 @@
     1.4  
     1.5  
     1.6  const struct reg_desc_struct arm_reg_map[] = 
     1.7 -{ {"R0", REG_INT, &armr.r[0]}, {"R1", REG_INT, &armr.r[1]},
     1.8 -        {"R2", REG_INT, &armr.r[2]}, {"R3", REG_INT, &armr.r[3]},
     1.9 -        {"R4", REG_INT, &armr.r[4]}, {"R5", REG_INT, &armr.r[5]},
    1.10 -        {"R6", REG_INT, &armr.r[6]}, {"R7", REG_INT, &armr.r[7]},
    1.11 -        {"R8", REG_INT, &armr.r[8]}, {"R9", REG_INT, &armr.r[9]},
    1.12 -        {"R10",REG_INT, &armr.r[10]}, {"R11",REG_INT, &armr.r[11]},
    1.13 -        {"R12",REG_INT, &armr.r[12]}, {"R13",REG_INT, &armr.r[13]},
    1.14 -        {"R14",REG_INT, &armr.r[14]}, {"R15",REG_INT, &armr.r[15]},
    1.15 +{ {"R0", REG_TYPE_INT, &armr.r[0]}, {"R1", REG_TYPE_INT, &armr.r[1]},
    1.16 +        {"R2", REG_TYPE_INT, &armr.r[2]}, {"R3", REG_TYPE_INT, &armr.r[3]},
    1.17 +        {"R4", REG_TYPE_INT, &armr.r[4]}, {"R5", REG_TYPE_INT, &armr.r[5]},
    1.18 +        {"R6", REG_TYPE_INT, &armr.r[6]}, {"R7", REG_TYPE_INT, &armr.r[7]},
    1.19 +        {"R8", REG_TYPE_INT, &armr.r[8]}, {"R9", REG_TYPE_INT, &armr.r[9]},
    1.20 +        {"R10",REG_TYPE_INT, &armr.r[10]}, {"R11",REG_TYPE_INT, &armr.r[11]},
    1.21 +        {"R12",REG_TYPE_INT, &armr.r[12]}, {"R13",REG_TYPE_INT, &armr.r[13]},
    1.22 +        {"R14",REG_TYPE_INT, &armr.r[14]}, {"R15",REG_TYPE_INT, &armr.r[15]},
    1.23          
    1.24          /* Block of FPA registers (arm-elf-gdb seems to expect these).
    1.25           * Oddly enough the ARM7TDMI doesn't have them */
    1.26 -        {"F0",REG_NONE, NULL}, {"F1",REG_NONE, NULL},
    1.27 -        {"F2",REG_NONE, NULL}, {"F3",REG_NONE, NULL},
    1.28 -        {"F4",REG_NONE, NULL}, {"F5",REG_NONE, NULL},
    1.29 -        {"F6",REG_NONE, NULL}, {"F7",REG_NONE, NULL},
    1.30 -        {"FPS",REG_NONE, NULL},
    1.31 +        {"F0",REG_TYPE_NONE, NULL}, {"F1",REG_TYPE_NONE, NULL},
    1.32 +        {"F2",REG_TYPE_NONE, NULL}, {"F3",REG_TYPE_NONE, NULL},
    1.33 +        {"F4",REG_TYPE_NONE, NULL}, {"F5",REG_TYPE_NONE, NULL},
    1.34 +        {"F6",REG_TYPE_NONE, NULL}, {"F7",REG_TYPE_NONE, NULL},
    1.35 +        {"FPS",REG_TYPE_NONE, NULL},
    1.36          
    1.37          /* System registers */
    1.38 -        {"CPSR", REG_INT, &armr.cpsr}, {"SPSR", REG_INT, &armr.spsr},
    1.39 +        {"CPSR", REG_TYPE_INT, &armr.cpsr}, {"SPSR", REG_TYPE_INT, &armr.spsr},
    1.40          {NULL, 0, NULL} };
    1.41  
    1.42  /* Implementation of get_register - ARM has no pseudo registers so this