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lxdream.org :: lxdream/src/aica/aica.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/aica/aica.c
changeset 37:1d84f4c18816
prev35:21a4be098304
next43:0cf3e339cc59
author nkeynes
date Mon Dec 26 06:38:51 2005 +0000 (14 years ago)
permissions -rw-r--r--
last change More ARM work-in-progress - idle loop works now :)
file annotate diff log raw
1.1 --- a/src/aica/aica.c Mon Dec 26 03:54:55 2005 +0000
1.2 +++ b/src/aica/aica.c Mon Dec 26 06:38:51 2005 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: aica.c,v 1.6 2005-12-26 03:54:55 nkeynes Exp $
1.6 + * $Id: aica.c,v 1.7 2005-12-26 06:38:51 nkeynes Exp $
1.7 *
1.8 * This is the core sound system (ie the bit which does the actual work)
1.9 *
1.10 @@ -50,6 +50,7 @@
1.11 MMIO_NOTRACE(AICA0);
1.12 MMIO_NOTRACE(AICA1);
1.13 arm_mem_init();
1.14 + arm_reset();
1.15 }
1.16
1.17 void aica_reset( void )
1.18 @@ -113,7 +114,7 @@
1.19 {
1.20 // aica_write_channel( reg >> 7, reg % 128, val );
1.21 MMIO_WRITE( AICA0, reg, val );
1.22 -
1.23 + // DEBUG( "AICA0 Write %08X => %08X", val, reg );
1.24 }
1.25
1.26 /* Write to channels 32-64 */
1.27 @@ -121,6 +122,7 @@
1.28 {
1.29 // aica_write_channel( (reg >> 7) + 32, reg % 128, val );
1.30 MMIO_WRITE( AICA1, reg, val );
1.31 + // DEBUG( "AICA1 Write %08X => %08X", val, reg );
1.32 }
1.33
1.34 /* General registers */
1.35 @@ -130,10 +132,12 @@
1.36 switch( reg ) {
1.37 case AICA_RESET:
1.38 tmp = MMIO_READ( AICA2, AICA_RESET );
1.39 - if( tmp & 1 == 1 && val & 1 == 0 ) {
1.40 + if( (tmp & 1) == 1 && (val & 1) == 0 ) {
1.41 /* ARM enabled - execute a core reset */
1.42 - INFO( "ARM enabled" );
1.43 + DEBUG( "ARM enabled" );
1.44 arm_reset();
1.45 + } else if( (tmp&1) == 0 && (val&1) == 1 ) {
1.46 + DEBUG( "ARM disabled" );
1.47 }
1.48 MMIO_WRITE( AICA2, AICA_RESET, val );
1.49 break;
.