1.1 --- a/src/sh4/sh4x86.in	Tue Oct 14 06:52:06 2008 +0000
     1.2 +++ b/src/sh4/sh4x86.in	Tue Oct 14 08:44:37 2008 +0000
     1.3 @@ -232,6 +232,7 @@
     1.4  	} else {\
     1.5  	    JE_exc( EXC_ILLEGAL );\
     1.6  	}\
     1.7 +	sh4_x86.tstate = TSTATE_NONE; \
     1.8      }\
     1.9  
    1.10  #define check_fpuen( ) \
    1.11 @@ -244,6 +245,7 @@
    1.12  	} else {\
    1.13  	    JNE_exc(EXC_FPU_DISABLED);\
    1.14  	}\
    1.15 +	sh4_x86.tstate = TSTATE_NONE; \
    1.16      }
    1.17  
    1.18  #define check_ralign16( x86reg ) \
    1.19 @@ -326,6 +328,7 @@
    1.20  {
    1.21      load_imm32( R_EAX, pc );
    1.22      call_func1( sh4_translate_breakpoint_hit, R_EAX );
    1.23 +    sh4_x86.tstate = TSTATE_NONE;
    1.24  }
    1.25  
    1.26  
    1.27 @@ -2587,6 +2590,7 @@
    1.28  LDTLB {:  
    1.29      COUNT_INST(I_LDTLB);
    1.30      call_func0( MMU_ldtlb );
    1.31 +    sh4_x86.tstate = TSTATE_NONE;
    1.32  :}
    1.33  OCBI @Rn {:
    1.34      COUNT_INST(I_OCBI);