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tree revision 9:2784c7660165
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filename src/sh4/sh4core.c
changeset 9:2784c7660165
prev2:42349f6ea216
next10:c898b37506e0
author nkeynes
date Thu Dec 08 13:38:00 2005 +0000 (17 years ago)
permissions -rw-r--r--
last change Generalise the core debug window to allow multiple instances.
Add cpu description structure to define different cpus for use by the
debug window, in preparation for ARM implementation
file annotate diff log raw 
     1.1 --- a/src/sh4/sh4core.c	Sat Aug 21 06:15:49 2004 +0000

     1.2 +++ b/src/sh4/sh4core.c	Thu Dec 08 13:38:00 2005 +0000

     1.3 @@ -820,8 +820,10 @@

     1.4                          /* SHAD    Rm, Rn */

     1.5                          tmp = RM(ir);

     1.6                          if( (tmp & 0x80000000) == 0 ) RN(ir) <<= (tmp&0x1f);

     1.7 -                        else if( (tmp & 0x1F) == 0 )  ((int32_t)RN(ir)) >>=31;

     1.8 -                        else ((int32_t)RN(ir)) >>= (((~RM(ir)) & 0x1F)+1);

     1.9 +                        else if( (tmp & 0x1F) == 0 )  

    1.10 +			  RN(ir) = ((int32_t)RN(ir)) >> 31;

    1.11 +                        else 

    1.12 +			  RN(ir) = ((int32_t)RN(ir)) >> (((~RM(ir)) & 0x1F)+1);

    1.13                      } else if( (ir&0x000F) == 0x0D ) {

    1.14                          /* SHLD    Rm, Rn */

    1.15                          tmp = RM(ir);
.