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lxdream.org :: lxdream/src/sh4/sh4core.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.c
changeset 586:2a3ba82cf243
prev550:a27e31340147
next587:739a3136f269
author nkeynes
date Tue Jan 15 20:50:23 2008 +0000 (12 years ago)
permissions -rw-r--r--
last change Merged lxdream-mmu r570:596 to trunk
file annotate diff log raw
1.1 --- a/src/sh4/sh4core.c Thu Dec 06 10:43:30 2007 +0000
1.2 +++ b/src/sh4/sh4core.c Tue Jan 15 20:50:23 2008 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4core.in,v 1.10 2007-11-04 08:49:18 nkeynes Exp $
1.6 + * $Id$
1.7 *
1.8 * SH4 emulation core, and parent module for all the SH4 peripheral
1.9 * modules.
1.10 @@ -18,6 +18,7 @@
1.11 */
1.12
1.13 #define MODULE sh4_module
1.14 +#include <assert.h>
1.15 #include <math.h>
1.16 #include "dream.h"
1.17 #include "dreamcast.h"
1.18 @@ -38,9 +39,6 @@
1.19
1.20 /********************** SH4 Module Definition ****************************/
1.21
1.22 -uint16_t *sh4_icache = NULL;
1.23 -uint32_t sh4_icache_addr = 0;
1.24 -
1.25 uint32_t sh4_run_slice( uint32_t nanosecs )
1.26 {
1.27 int i;
1.28 @@ -164,12 +162,12 @@
1.29 #define TRACE_RETURN( source, dest )
1.30 #endif
1.31
1.32 -#define MEM_READ_BYTE( addr ) sh4_read_byte(addr)
1.33 -#define MEM_READ_WORD( addr ) sh4_read_word(addr)
1.34 -#define MEM_READ_LONG( addr ) sh4_read_long(addr)
1.35 -#define MEM_WRITE_BYTE( addr, val ) sh4_write_byte(addr, val)
1.36 -#define MEM_WRITE_WORD( addr, val ) sh4_write_word(addr, val)
1.37 -#define MEM_WRITE_LONG( addr, val ) sh4_write_long(addr, val)
1.38 +#define MEM_READ_BYTE( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_byte(memtmp); }
1.39 +#define MEM_READ_WORD( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_word(memtmp); }
1.40 +#define MEM_READ_LONG( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_long(memtmp); }
1.41 +#define MEM_WRITE_BYTE( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_byte(memtmp, val); }
1.42 +#define MEM_WRITE_WORD( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_word(memtmp, val); }
1.43 +#define MEM_WRITE_LONG( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_long(memtmp, val); }
1.44
1.45 #define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
1.46
1.47 @@ -223,6 +221,7 @@
1.48 uint32_t tmp;
1.49 float ftmp;
1.50 double dtmp;
1.51 + int64_t memtmp; // temporary holder for memory reads
1.52
1.53 #define R0 sh4r.r[0]
1.54 pc = sh4r.pc;
1.55 @@ -236,22 +235,20 @@
1.56 CHECKRALIGN16(pc);
1.57
1.58 /* Read instruction */
1.59 - uint32_t pageaddr = pc >> 12;
1.60 - if( sh4_icache != NULL && pageaddr == sh4_icache_addr ) {
1.61 - ir = sh4_icache[(pc&0xFFF)>>1];
1.62 - } else {
1.63 - sh4_icache = (uint16_t *)mem_get_page(pc);
1.64 - if( ((uintptr_t)sh4_icache) < MAX_IO_REGIONS ) {
1.65 - /* If someone's actually been so daft as to try to execute out of an IO
1.66 - * region, fallback on the full-blown memory read
1.67 - */
1.68 - sh4_icache = NULL;
1.69 - ir = MEM_READ_WORD(pc);
1.70 - } else {
1.71 - sh4_icache_addr = pageaddr;
1.72 - ir = sh4_icache[(pc&0xFFF)>>1];
1.73 + if( !IS_IN_ICACHE(pc) ) {
1.74 + if( !mmu_update_icache(pc) ) {
1.75 + // Fault - look for the fault handler
1.76 + if( !mmu_update_icache(sh4r.pc) ) {
1.77 + // double fault - halt
1.78 + ERROR( "Double fault - halting" );
1.79 + dreamcast_stop();
1.80 + return FALSE;
1.81 + }
1.82 }
1.83 + pc = sh4r.pc;
1.84 }
1.85 + assert( IS_IN_ICACHE(pc) );
1.86 + ir = *(uint16_t *)GET_ICACHE_PTR(sh4r.pc);
1.87 switch( (ir&0xF000) >> 12 ) {
1.88 case 0x0:
1.89 switch( ir&0xF ) {
1.90 @@ -551,21 +548,21 @@
1.91 case 0xC:
1.92 { /* MOV.B @(R0, Rm), Rn */
1.93 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.94 - sh4r.r[Rn] = MEM_READ_BYTE( R0 + sh4r.r[Rm] );
1.95 + MEM_READ_BYTE( R0 + sh4r.r[Rm], sh4r.r[Rn] );
1.96 }
1.97 break;
1.98 case 0xD:
1.99 { /* MOV.W @(R0, Rm), Rn */
1.100 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.101 CHECKRALIGN16( R0 + sh4r.r[Rm] );
1.102 - sh4r.r[Rn] = MEM_READ_WORD( R0 + sh4r.r[Rm] );
1.103 + MEM_READ_WORD( R0 + sh4r.r[Rm], sh4r.r[Rn] );
1.104 }
1.105 break;
1.106 case 0xE:
1.107 { /* MOV.L @(R0, Rm), Rn */
1.108 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.109 CHECKRALIGN32( R0 + sh4r.r[Rm] );
1.110 - sh4r.r[Rn] = MEM_READ_LONG( R0 + sh4r.r[Rm] );
1.111 + MEM_READ_LONG( R0 + sh4r.r[Rm], sh4r.r[Rn] );
1.112 }
1.113 break;
1.114 case 0xF:
1.115 @@ -573,9 +570,11 @@
1.116 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.117 CHECKRALIGN32( sh4r.r[Rm] );
1.118 CHECKRALIGN32( sh4r.r[Rn] );
1.119 - int64_t tmpl = SIGNEXT32(MEM_READ_LONG(sh4r.r[Rn]));
1.120 + MEM_READ_LONG(sh4r.r[Rn], tmp);
1.121 + int64_t tmpl = SIGNEXT32(tmp);
1.122 sh4r.r[Rn] += 4;
1.123 - tmpl = tmpl * SIGNEXT32(MEM_READ_LONG(sh4r.r[Rm])) + sh4r.mac;
1.124 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.125 + tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
1.126 sh4r.r[Rm] += 4;
1.127 if( sh4r.s ) {
1.128 /* 48-bit Saturation. Yuch */
1.129 @@ -1058,8 +1057,9 @@
1.130 { /* LDS.L @Rm+, MACH */
1.131 uint32_t Rm = ((ir>>8)&0xF);
1.132 CHECKRALIGN32( sh4r.r[Rm] );
1.133 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.134 sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
1.135 - (((uint64_t)MEM_READ_LONG(sh4r.r[Rm]))<<32);
1.136 + (((uint64_t)tmp)<<32);
1.137 sh4r.r[Rm] += 4;
1.138 }
1.139 break;
1.140 @@ -1067,8 +1067,9 @@
1.141 { /* LDS.L @Rm+, MACL */
1.142 uint32_t Rm = ((ir>>8)&0xF);
1.143 CHECKRALIGN32( sh4r.r[Rm] );
1.144 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.145 sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
1.146 - (uint64_t)((uint32_t)MEM_READ_LONG(sh4r.r[Rm]));
1.147 + (uint64_t)((uint32_t)tmp);
1.148 sh4r.r[Rm] += 4;
1.149 }
1.150 break;
1.151 @@ -1076,7 +1077,7 @@
1.152 { /* LDS.L @Rm+, PR */
1.153 uint32_t Rm = ((ir>>8)&0xF);
1.154 CHECKRALIGN32( sh4r.r[Rm] );
1.155 - sh4r.pr = MEM_READ_LONG( sh4r.r[Rm] );
1.156 + MEM_READ_LONG( sh4r.r[Rm], sh4r.pr );
1.157 sh4r.r[Rm] += 4;
1.158 }
1.159 break;
1.160 @@ -1085,7 +1086,7 @@
1.161 uint32_t Rm = ((ir>>8)&0xF);
1.162 CHECKPRIV();
1.163 CHECKRALIGN32( sh4r.r[Rm] );
1.164 - sh4r.sgr = MEM_READ_LONG(sh4r.r[Rm]);
1.165 + MEM_READ_LONG(sh4r.r[Rm], sh4r.sgr);
1.166 sh4r.r[Rm] +=4;
1.167 }
1.168 break;
1.169 @@ -1093,7 +1094,7 @@
1.170 { /* LDS.L @Rm+, FPUL */
1.171 uint32_t Rm = ((ir>>8)&0xF);
1.172 CHECKRALIGN32( sh4r.r[Rm] );
1.173 - sh4r.fpul = MEM_READ_LONG(sh4r.r[Rm]);
1.174 + MEM_READ_LONG(sh4r.r[Rm], sh4r.fpul);
1.175 sh4r.r[Rm] +=4;
1.176 }
1.177 break;
1.178 @@ -1101,7 +1102,7 @@
1.179 { /* LDS.L @Rm+, FPSCR */
1.180 uint32_t Rm = ((ir>>8)&0xF);
1.181 CHECKRALIGN32( sh4r.r[Rm] );
1.182 - sh4r.fpscr = MEM_READ_LONG(sh4r.r[Rm]);
1.183 + MEM_READ_LONG(sh4r.r[Rm], sh4r.fpscr);
1.184 sh4r.r[Rm] +=4;
1.185 sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
1.186 }
1.187 @@ -1111,7 +1112,7 @@
1.188 uint32_t Rm = ((ir>>8)&0xF);
1.189 CHECKPRIV();
1.190 CHECKRALIGN32( sh4r.r[Rm] );
1.191 - sh4r.dbr = MEM_READ_LONG(sh4r.r[Rm]);
1.192 + MEM_READ_LONG(sh4r.r[Rm], sh4r.dbr);
1.193 sh4r.r[Rm] +=4;
1.194 }
1.195 break;
1.196 @@ -1130,7 +1131,8 @@
1.197 CHECKSLOTILLEGAL();
1.198 CHECKPRIV();
1.199 CHECKWALIGN32( sh4r.r[Rm] );
1.200 - sh4_write_sr( MEM_READ_LONG(sh4r.r[Rm]) );
1.201 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.202 + sh4_write_sr( tmp );
1.203 sh4r.r[Rm] +=4;
1.204 }
1.205 break;
1.206 @@ -1138,7 +1140,7 @@
1.207 { /* LDC.L @Rm+, GBR */
1.208 uint32_t Rm = ((ir>>8)&0xF);
1.209 CHECKRALIGN32( sh4r.r[Rm] );
1.210 - sh4r.gbr = MEM_READ_LONG(sh4r.r[Rm]);
1.211 + MEM_READ_LONG(sh4r.r[Rm], sh4r.gbr);
1.212 sh4r.r[Rm] +=4;
1.213 }
1.214 break;
1.215 @@ -1147,7 +1149,7 @@
1.216 uint32_t Rm = ((ir>>8)&0xF);
1.217 CHECKPRIV();
1.218 CHECKRALIGN32( sh4r.r[Rm] );
1.219 - sh4r.vbr = MEM_READ_LONG(sh4r.r[Rm]);
1.220 + MEM_READ_LONG(sh4r.r[Rm], sh4r.vbr);
1.221 sh4r.r[Rm] +=4;
1.222 }
1.223 break;
1.224 @@ -1156,7 +1158,7 @@
1.225 uint32_t Rm = ((ir>>8)&0xF);
1.226 CHECKPRIV();
1.227 CHECKRALIGN32( sh4r.r[Rm] );
1.228 - sh4r.ssr = MEM_READ_LONG(sh4r.r[Rm]);
1.229 + MEM_READ_LONG(sh4r.r[Rm], sh4r.ssr);
1.230 sh4r.r[Rm] +=4;
1.231 }
1.232 break;
1.233 @@ -1165,7 +1167,7 @@
1.234 uint32_t Rm = ((ir>>8)&0xF);
1.235 CHECKPRIV();
1.236 CHECKRALIGN32( sh4r.r[Rm] );
1.237 - sh4r.spc = MEM_READ_LONG(sh4r.r[Rm]);
1.238 + MEM_READ_LONG(sh4r.r[Rm], sh4r.spc);
1.239 sh4r.r[Rm] +=4;
1.240 }
1.241 break;
1.242 @@ -1179,7 +1181,7 @@
1.243 uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7);
1.244 CHECKPRIV();
1.245 CHECKRALIGN32( sh4r.r[Rm] );
1.246 - sh4r.r_bank[Rn_BANK] = MEM_READ_LONG( sh4r.r[Rm] );
1.247 + MEM_READ_LONG( sh4r.r[Rm], sh4r.r_bank[Rn_BANK] );
1.248 sh4r.r[Rm] += 4;
1.249 }
1.250 break;
1.251 @@ -1307,7 +1309,7 @@
1.252 case 0x1:
1.253 { /* TAS.B @Rn */
1.254 uint32_t Rn = ((ir>>8)&0xF);
1.255 - tmp = MEM_READ_BYTE( sh4r.r[Rn] );
1.256 + MEM_READ_BYTE( sh4r.r[Rn], tmp );
1.257 sh4r.t = ( tmp == 0 ? 1 : 0 );
1.258 MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );
1.259 }
1.260 @@ -1406,9 +1408,11 @@
1.261 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.262 CHECKRALIGN16( sh4r.r[Rn] );
1.263 CHECKRALIGN16( sh4r.r[Rm] );
1.264 - int32_t stmp = SIGNEXT16(MEM_READ_WORD(sh4r.r[Rn]));
1.265 + MEM_READ_WORD(sh4r.r[Rn], tmp);
1.266 + int32_t stmp = SIGNEXT16(tmp);
1.267 sh4r.r[Rn] += 2;
1.268 - stmp = stmp * SIGNEXT16(MEM_READ_WORD(sh4r.r[Rm]));
1.269 + MEM_READ_WORD(sh4r.r[Rm], tmp);
1.270 + stmp = stmp * SIGNEXT16(tmp);
1.271 sh4r.r[Rm] += 2;
1.272 if( sh4r.s ) {
1.273 int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
1.274 @@ -1432,7 +1436,7 @@
1.275 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2;
1.276 tmp = sh4r.r[Rm] + disp;
1.277 CHECKRALIGN32( tmp );
1.278 - sh4r.r[Rn] = MEM_READ_LONG( tmp );
1.279 + MEM_READ_LONG( tmp, sh4r.r[Rn] );
1.280 }
1.281 break;
1.282 case 0x6:
1.283 @@ -1440,19 +1444,19 @@
1.284 case 0x0:
1.285 { /* MOV.B @Rm, Rn */
1.286 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.287 - sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] );
1.288 + MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] );
1.289 }
1.290 break;
1.291 case 0x1:
1.292 { /* MOV.W @Rm, Rn */
1.293 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.294 - CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] );
1.295 + CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] );
1.296 }
1.297 break;
1.298 case 0x2:
1.299 { /* MOV.L @Rm, Rn */
1.300 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.301 - CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] );
1.302 + CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] );
1.303 }
1.304 break;
1.305 case 0x3:
1.306 @@ -1464,19 +1468,19 @@
1.307 case 0x4:
1.308 { /* MOV.B @Rm+, Rn */
1.309 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.310 - sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] ); sh4r.r[Rm] ++;
1.311 + MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] ++;
1.312 }
1.313 break;
1.314 case 0x5:
1.315 { /* MOV.W @Rm+, Rn */
1.316 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.317 - CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] ); sh4r.r[Rm] += 2;
1.318 + CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 2;
1.319 }
1.320 break;
1.321 case 0x6:
1.322 { /* MOV.L @Rm+, Rn */
1.323 uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF);
1.324 - CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] ); sh4r.r[Rm] += 4;
1.325 + CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 4;
1.326 }
1.327 break;
1.328 case 0x7:
1.329 @@ -1562,7 +1566,7 @@
1.330 case 0x4:
1.331 { /* MOV.B @(disp, Rm), R0 */
1.332 uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF);
1.333 - R0 = MEM_READ_BYTE( sh4r.r[Rm] + disp );
1.334 + MEM_READ_BYTE( sh4r.r[Rm] + disp, R0 );
1.335 }
1.336 break;
1.337 case 0x5:
1.338 @@ -1570,7 +1574,7 @@
1.339 uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1;
1.340 tmp = sh4r.r[Rm] + disp;
1.341 CHECKRALIGN16( tmp );
1.342 - R0 = MEM_READ_WORD( tmp );
1.343 + MEM_READ_WORD( tmp, R0 );
1.344 }
1.345 break;
1.346 case 0x8:
1.347 @@ -1640,7 +1644,7 @@
1.348 uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1;
1.349 CHECKSLOTILLEGAL();
1.350 tmp = pc + 4 + disp;
1.351 - sh4r.r[Rn] = MEM_READ_WORD( tmp );
1.352 + MEM_READ_WORD( tmp, sh4r.r[Rn] );
1.353 }
1.354 break;
1.355 case 0xA:
1.356 @@ -1695,15 +1699,15 @@
1.357 { /* TRAPA #imm */
1.358 uint32_t imm = (ir&0xFF);
1.359 CHECKSLOTILLEGAL();
1.360 - MMIO_WRITE( MMU, TRA, imm<<2 );
1.361 sh4r.pc += 2;
1.362 - sh4_raise_exception( EXC_TRAP );
1.363 + sh4_raise_trap( imm );
1.364 + return TRUE;
1.365 }
1.366 break;
1.367 case 0x4:
1.368 { /* MOV.B @(disp, GBR), R0 */
1.369 uint32_t disp = (ir&0xFF);
1.370 - R0 = MEM_READ_BYTE( sh4r.gbr + disp );
1.371 + MEM_READ_BYTE( sh4r.gbr + disp, R0 );
1.372 }
1.373 break;
1.374 case 0x5:
1.375 @@ -1711,7 +1715,7 @@
1.376 uint32_t disp = (ir&0xFF)<<1;
1.377 tmp = sh4r.gbr + disp;
1.378 CHECKRALIGN16( tmp );
1.379 - R0 = MEM_READ_WORD( tmp );
1.380 + MEM_READ_WORD( tmp, R0 );
1.381 }
1.382 break;
1.383 case 0x6:
1.384 @@ -1719,7 +1723,7 @@
1.385 uint32_t disp = (ir&0xFF)<<2;
1.386 tmp = sh4r.gbr + disp;
1.387 CHECKRALIGN32( tmp );
1.388 - R0 = MEM_READ_LONG( tmp );
1.389 + MEM_READ_LONG( tmp, R0 );
1.390 }
1.391 break;
1.392 case 0x7:
1.393 @@ -1756,25 +1760,25 @@
1.394 case 0xC:
1.395 { /* TST.B #imm, @(R0, GBR) */
1.396 uint32_t imm = (ir&0xFF);
1.397 - sh4r.t = ( MEM_READ_BYTE(R0 + sh4r.gbr) & imm ? 0 : 1 );
1.398 + MEM_READ_BYTE(R0+sh4r.gbr, tmp); sh4r.t = ( tmp & imm ? 0 : 1 );
1.399 }
1.400 break;
1.401 case 0xD:
1.402 { /* AND.B #imm, @(R0, GBR) */
1.403 uint32_t imm = (ir&0xFF);
1.404 - MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & MEM_READ_BYTE(R0 + sh4r.gbr) );
1.405 + MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp );
1.406 }
1.407 break;
1.408 case 0xE:
1.409 { /* XOR.B #imm, @(R0, GBR) */
1.410 uint32_t imm = (ir&0xFF);
1.411 - MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ MEM_READ_BYTE(R0 + sh4r.gbr) );
1.412 + MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp );
1.413 }
1.414 break;
1.415 case 0xF:
1.416 { /* OR.B #imm, @(R0, GBR) */
1.417 uint32_t imm = (ir&0xFF);
1.418 - MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | MEM_READ_BYTE(R0 + sh4r.gbr) );
1.419 + MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp );
1.420 }
1.421 break;
1.422 }
1.423 @@ -1784,7 +1788,7 @@
1.424 uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2;
1.425 CHECKSLOTILLEGAL();
1.426 tmp = (pc&0xFFFFFFFC) + disp + 4;
1.427 - sh4r.r[Rn] = MEM_READ_LONG( tmp );
1.428 + MEM_READ_LONG( tmp, sh4r.r[Rn] );
1.429 }
1.430 break;
1.431 case 0xE:
.