Search
lxdream.org :: lxdream/src/sh4/sh4core.in :: diff
lxdream 0.9.1
released Jun 29
Download Now
filename src/sh4/sh4core.in
changeset 586:2a3ba82cf243
prev550:a27e31340147
next587:739a3136f269
author nkeynes
date Tue Jan 15 20:50:23 2008 +0000 (12 years ago)
permissions -rw-r--r--
last change Merged lxdream-mmu r570:596 to trunk
file annotate diff log raw
1.1 --- a/src/sh4/sh4core.in Thu Dec 06 10:43:30 2007 +0000
1.2 +++ b/src/sh4/sh4core.in Tue Jan 15 20:50:23 2008 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4core.in,v 1.10 2007-11-04 08:49:18 nkeynes Exp $
1.6 + * $Id$
1.7 *
1.8 * SH4 emulation core, and parent module for all the SH4 peripheral
1.9 * modules.
1.10 @@ -18,6 +18,7 @@
1.11 */
1.12
1.13 #define MODULE sh4_module
1.14 +#include <assert.h>
1.15 #include <math.h>
1.16 #include "dream.h"
1.17 #include "dreamcast.h"
1.18 @@ -38,9 +39,6 @@
1.19
1.20 /********************** SH4 Module Definition ****************************/
1.21
1.22 -uint16_t *sh4_icache = NULL;
1.23 -uint32_t sh4_icache_addr = 0;
1.24 -
1.25 uint32_t sh4_run_slice( uint32_t nanosecs )
1.26 {
1.27 int i;
1.28 @@ -164,12 +162,12 @@
1.29 #define TRACE_RETURN( source, dest )
1.30 #endif
1.31
1.32 -#define MEM_READ_BYTE( addr ) sh4_read_byte(addr)
1.33 -#define MEM_READ_WORD( addr ) sh4_read_word(addr)
1.34 -#define MEM_READ_LONG( addr ) sh4_read_long(addr)
1.35 -#define MEM_WRITE_BYTE( addr, val ) sh4_write_byte(addr, val)
1.36 -#define MEM_WRITE_WORD( addr, val ) sh4_write_word(addr, val)
1.37 -#define MEM_WRITE_LONG( addr, val ) sh4_write_long(addr, val)
1.38 +#define MEM_READ_BYTE( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_byte(memtmp); }
1.39 +#define MEM_READ_WORD( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_word(memtmp); }
1.40 +#define MEM_READ_LONG( addr, val ) memtmp = mmu_vma_to_phys_read(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { val = sh4_read_long(memtmp); }
1.41 +#define MEM_WRITE_BYTE( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_byte(memtmp, val); }
1.42 +#define MEM_WRITE_WORD( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_word(memtmp, val); }
1.43 +#define MEM_WRITE_LONG( addr, val ) memtmp = mmu_vma_to_phys_write(addr); if( memtmp == MMU_VMA_ERROR ) { return TRUE; } else { sh4_write_long(memtmp, val); }
1.44
1.45 #define FP_WIDTH (IS_FPU_DOUBLESIZE() ? 8 : 4)
1.46
1.47 @@ -223,6 +221,7 @@
1.48 uint32_t tmp;
1.49 float ftmp;
1.50 double dtmp;
1.51 + int64_t memtmp; // temporary holder for memory reads
1.52
1.53 #define R0 sh4r.r[0]
1.54 pc = sh4r.pc;
1.55 @@ -236,41 +235,39 @@
1.56 CHECKRALIGN16(pc);
1.57
1.58 /* Read instruction */
1.59 - uint32_t pageaddr = pc >> 12;
1.60 - if( sh4_icache != NULL && pageaddr == sh4_icache_addr ) {
1.61 - ir = sh4_icache[(pc&0xFFF)>>1];
1.62 - } else {
1.63 - sh4_icache = (uint16_t *)mem_get_page(pc);
1.64 - if( ((uintptr_t)sh4_icache) < MAX_IO_REGIONS ) {
1.65 - /* If someone's actually been so daft as to try to execute out of an IO
1.66 - * region, fallback on the full-blown memory read
1.67 - */
1.68 - sh4_icache = NULL;
1.69 - ir = MEM_READ_WORD(pc);
1.70 - } else {
1.71 - sh4_icache_addr = pageaddr;
1.72 - ir = sh4_icache[(pc&0xFFF)>>1];
1.73 + if( !IS_IN_ICACHE(pc) ) {
1.74 + if( !mmu_update_icache(pc) ) {
1.75 + // Fault - look for the fault handler
1.76 + if( !mmu_update_icache(sh4r.pc) ) {
1.77 + // double fault - halt
1.78 + ERROR( "Double fault - halting" );
1.79 + dreamcast_stop();
1.80 + return FALSE;
1.81 + }
1.82 }
1.83 + pc = sh4r.pc;
1.84 }
1.85 + assert( IS_IN_ICACHE(pc) );
1.86 + ir = *(uint16_t *)GET_ICACHE_PTR(sh4r.pc);
1.87 %%
1.88 AND Rm, Rn {: sh4r.r[Rn] &= sh4r.r[Rm]; :}
1.89 AND #imm, R0 {: R0 &= imm; :}
1.90 -AND.B #imm, @(R0, GBR) {: MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & MEM_READ_BYTE(R0 + sh4r.gbr) ); :}
1.91 + AND.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm & tmp ); :}
1.92 NOT Rm, Rn {: sh4r.r[Rn] = ~sh4r.r[Rm]; :}
1.93 OR Rm, Rn {: sh4r.r[Rn] |= sh4r.r[Rm]; :}
1.94 OR #imm, R0 {: R0 |= imm; :}
1.95 -OR.B #imm, @(R0, GBR) {: MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | MEM_READ_BYTE(R0 + sh4r.gbr) ); :}
1.96 + OR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm | tmp ); :}
1.97 TAS.B @Rn {:
1.98 - tmp = MEM_READ_BYTE( sh4r.r[Rn] );
1.99 + MEM_READ_BYTE( sh4r.r[Rn], tmp );
1.100 sh4r.t = ( tmp == 0 ? 1 : 0 );
1.101 MEM_WRITE_BYTE( sh4r.r[Rn], tmp | 0x80 );
1.102 :}
1.103 TST Rm, Rn {: sh4r.t = (sh4r.r[Rn]&sh4r.r[Rm] ? 0 : 1); :}
1.104 TST #imm, R0 {: sh4r.t = (R0 & imm ? 0 : 1); :}
1.105 -TST.B #imm, @(R0, GBR) {: sh4r.t = ( MEM_READ_BYTE(R0 + sh4r.gbr) & imm ? 0 : 1 ); :}
1.106 + TST.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); sh4r.t = ( tmp & imm ? 0 : 1 ); :}
1.107 XOR Rm, Rn {: sh4r.r[Rn] ^= sh4r.r[Rm]; :}
1.108 XOR #imm, R0 {: R0 ^= imm; :}
1.109 -XOR.B #imm, @(R0, GBR) {: MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ MEM_READ_BYTE(R0 + sh4r.gbr) ); :}
1.110 + XOR.B #imm, @(R0, GBR) {: MEM_READ_BYTE(R0+sh4r.gbr, tmp); MEM_WRITE_BYTE( R0 + sh4r.gbr, imm ^ tmp ); :}
1.111 XTRCT Rm, Rn {: sh4r.r[Rn] = (sh4r.r[Rn]>>16) | (sh4r.r[Rm]<<16); :}
1.112
1.113 ROTL Rn {:
1.114 @@ -365,12 +362,12 @@
1.115 CHECKWALIGN32( R0 + sh4r.r[Rn] );
1.116 MEM_WRITE_LONG( R0 + sh4r.r[Rn], sh4r.r[Rm] );
1.117 :}
1.118 -MOV.B @(R0, Rm), Rn {: sh4r.r[Rn] = MEM_READ_BYTE( R0 + sh4r.r[Rm] ); :}
1.119 +MOV.B @(R0, Rm), Rn {: MEM_READ_BYTE( R0 + sh4r.r[Rm], sh4r.r[Rn] ); :}
1.120 MOV.W @(R0, Rm), Rn {: CHECKRALIGN16( R0 + sh4r.r[Rm] );
1.121 - sh4r.r[Rn] = MEM_READ_WORD( R0 + sh4r.r[Rm] );
1.122 + MEM_READ_WORD( R0 + sh4r.r[Rm], sh4r.r[Rn] );
1.123 :}
1.124 MOV.L @(R0, Rm), Rn {: CHECKRALIGN32( R0 + sh4r.r[Rm] );
1.125 - sh4r.r[Rn] = MEM_READ_LONG( R0 + sh4r.r[Rm] );
1.126 + MEM_READ_LONG( R0 + sh4r.r[Rm], sh4r.r[Rn] );
1.127 :}
1.128 MOV.L Rm, @(disp, Rn) {:
1.129 tmp = sh4r.r[Rn] + disp;
1.130 @@ -386,19 +383,19 @@
1.131 MOV.L @(disp, Rm), Rn {:
1.132 tmp = sh4r.r[Rm] + disp;
1.133 CHECKRALIGN32( tmp );
1.134 - sh4r.r[Rn] = MEM_READ_LONG( tmp );
1.135 + MEM_READ_LONG( tmp, sh4r.r[Rn] );
1.136 :}
1.137 -MOV.B @Rm, Rn {: sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] ); :}
1.138 -MOV.W @Rm, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] ); :}
1.139 -MOV.L @Rm, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] ); :}
1.140 +MOV.B @Rm, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); :}
1.141 + MOV.W @Rm, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); :}
1.142 + MOV.L @Rm, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); :}
1.143 MOV Rm, Rn {: sh4r.r[Rn] = sh4r.r[Rm]; :}
1.144 -MOV.B @Rm+, Rn {: sh4r.r[Rn] = MEM_READ_BYTE( sh4r.r[Rm] ); sh4r.r[Rm] ++; :}
1.145 -MOV.W @Rm+, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_WORD( sh4r.r[Rm] ); sh4r.r[Rm] += 2; :}
1.146 -MOV.L @Rm+, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); sh4r.r[Rn] = MEM_READ_LONG( sh4r.r[Rm] ); sh4r.r[Rm] += 4; :}
1.147 + MOV.B @Rm+, Rn {: MEM_READ_BYTE( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] ++; :}
1.148 + MOV.W @Rm+, Rn {: CHECKRALIGN16( sh4r.r[Rm] ); MEM_READ_WORD( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 2; :}
1.149 + MOV.L @Rm+, Rn {: CHECKRALIGN32( sh4r.r[Rm] ); MEM_READ_LONG( sh4r.r[Rm], sh4r.r[Rn] ); sh4r.r[Rm] += 4; :}
1.150 MOV.L @(disp, PC), Rn {:
1.151 CHECKSLOTILLEGAL();
1.152 tmp = (pc&0xFFFFFFFC) + disp + 4;
1.153 - sh4r.r[Rn] = MEM_READ_LONG( tmp );
1.154 + MEM_READ_LONG( tmp, sh4r.r[Rn] );
1.155 :}
1.156 MOV.B R0, @(disp, GBR) {: MEM_WRITE_BYTE( sh4r.gbr + disp, R0 ); :}
1.157 MOV.W R0, @(disp, GBR) {:
1.158 @@ -411,16 +408,16 @@
1.159 CHECKWALIGN32( tmp );
1.160 MEM_WRITE_LONG( tmp, R0 );
1.161 :}
1.162 -MOV.B @(disp, GBR), R0 {: R0 = MEM_READ_BYTE( sh4r.gbr + disp ); :}
1.163 + MOV.B @(disp, GBR), R0 {: MEM_READ_BYTE( sh4r.gbr + disp, R0 ); :}
1.164 MOV.W @(disp, GBR), R0 {:
1.165 tmp = sh4r.gbr + disp;
1.166 CHECKRALIGN16( tmp );
1.167 - R0 = MEM_READ_WORD( tmp );
1.168 + MEM_READ_WORD( tmp, R0 );
1.169 :}
1.170 MOV.L @(disp, GBR), R0 {:
1.171 tmp = sh4r.gbr + disp;
1.172 CHECKRALIGN32( tmp );
1.173 - R0 = MEM_READ_LONG( tmp );
1.174 + MEM_READ_LONG( tmp, R0 );
1.175 :}
1.176 MOV.B R0, @(disp, Rn) {: MEM_WRITE_BYTE( sh4r.r[Rn] + disp, R0 ); :}
1.177 MOV.W R0, @(disp, Rn) {:
1.178 @@ -428,16 +425,16 @@
1.179 CHECKWALIGN16( tmp );
1.180 MEM_WRITE_WORD( tmp, R0 );
1.181 :}
1.182 -MOV.B @(disp, Rm), R0 {: R0 = MEM_READ_BYTE( sh4r.r[Rm] + disp ); :}
1.183 + MOV.B @(disp, Rm), R0 {: MEM_READ_BYTE( sh4r.r[Rm] + disp, R0 ); :}
1.184 MOV.W @(disp, Rm), R0 {:
1.185 tmp = sh4r.r[Rm] + disp;
1.186 CHECKRALIGN16( tmp );
1.187 - R0 = MEM_READ_WORD( tmp );
1.188 + MEM_READ_WORD( tmp, R0 );
1.189 :}
1.190 MOV.W @(disp, PC), Rn {:
1.191 CHECKSLOTILLEGAL();
1.192 tmp = pc + 4 + disp;
1.193 - sh4r.r[Rn] = MEM_READ_WORD( tmp );
1.194 + MEM_READ_WORD( tmp, sh4r.r[Rn] );
1.195 :}
1.196 MOVA @(disp, PC), R0 {:
1.197 CHECKSLOTILLEGAL();
1.198 @@ -506,9 +503,11 @@
1.199 MAC.W @Rm+, @Rn+ {:
1.200 CHECKRALIGN16( sh4r.r[Rn] );
1.201 CHECKRALIGN16( sh4r.r[Rm] );
1.202 - int32_t stmp = SIGNEXT16(MEM_READ_WORD(sh4r.r[Rn]));
1.203 + MEM_READ_WORD(sh4r.r[Rn], tmp);
1.204 + int32_t stmp = SIGNEXT16(tmp);
1.205 sh4r.r[Rn] += 2;
1.206 - stmp = stmp * SIGNEXT16(MEM_READ_WORD(sh4r.r[Rm]));
1.207 + MEM_READ_WORD(sh4r.r[Rm], tmp);
1.208 + stmp = stmp * SIGNEXT16(tmp);
1.209 sh4r.r[Rm] += 2;
1.210 if( sh4r.s ) {
1.211 int64_t tmpl = (int64_t)((int32_t)sh4r.mac) + (int64_t)stmp;
1.212 @@ -527,9 +526,11 @@
1.213 MAC.L @Rm+, @Rn+ {:
1.214 CHECKRALIGN32( sh4r.r[Rm] );
1.215 CHECKRALIGN32( sh4r.r[Rn] );
1.216 - int64_t tmpl = SIGNEXT32(MEM_READ_LONG(sh4r.r[Rn]));
1.217 + MEM_READ_LONG(sh4r.r[Rn], tmp);
1.218 + int64_t tmpl = SIGNEXT32(tmp);
1.219 sh4r.r[Rn] += 4;
1.220 - tmpl = tmpl * SIGNEXT32(MEM_READ_LONG(sh4r.r[Rm])) + sh4r.mac;
1.221 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.222 + tmpl = tmpl * SIGNEXT32(tmp) + sh4r.mac;
1.223 sh4r.r[Rm] += 4;
1.224 if( sh4r.s ) {
1.225 /* 48-bit Saturation. Yuch */
1.226 @@ -640,9 +641,9 @@
1.227 :}
1.228 TRAPA #imm {:
1.229 CHECKSLOTILLEGAL();
1.230 - MMIO_WRITE( MMU, TRA, imm<<2 );
1.231 sh4r.pc += 2;
1.232 - sh4_raise_exception( EXC_TRAP );
1.233 + sh4_raise_trap( imm );
1.234 + return TRUE;
1.235 :}
1.236 RTS {:
1.237 CHECKSLOTILLEGAL();
1.238 @@ -703,15 +704,17 @@
1.239 :}
1.240 LDS.L @Rm+, MACH {:
1.241 CHECKRALIGN32( sh4r.r[Rm] );
1.242 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.243 sh4r.mac = (sh4r.mac & 0x00000000FFFFFFFF) |
1.244 - (((uint64_t)MEM_READ_LONG(sh4r.r[Rm]))<<32);
1.245 + (((uint64_t)tmp)<<32);
1.246 sh4r.r[Rm] += 4;
1.247 :}
1.248 LDC.L @Rm+, SR {:
1.249 CHECKSLOTILLEGAL();
1.250 CHECKPRIV();
1.251 CHECKWALIGN32( sh4r.r[Rm] );
1.252 - sh4_write_sr( MEM_READ_LONG(sh4r.r[Rm]) );
1.253 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.254 + sh4_write_sr( tmp );
1.255 sh4r.r[Rm] +=4;
1.256 :}
1.257 LDS Rm, MACH {:
1.258 @@ -730,7 +733,7 @@
1.259 LDC.L @Rm+, SGR {:
1.260 CHECKPRIV();
1.261 CHECKRALIGN32( sh4r.r[Rm] );
1.262 - sh4r.sgr = MEM_READ_LONG(sh4r.r[Rm]);
1.263 + MEM_READ_LONG(sh4r.r[Rm], sh4r.sgr);
1.264 sh4r.r[Rm] +=4;
1.265 :}
1.266 STS MACL, Rn {: sh4r.r[Rn] = (uint32_t)sh4r.mac; :}
1.267 @@ -746,13 +749,14 @@
1.268 :}
1.269 LDS.L @Rm+, MACL {:
1.270 CHECKRALIGN32( sh4r.r[Rm] );
1.271 + MEM_READ_LONG(sh4r.r[Rm], tmp);
1.272 sh4r.mac = (sh4r.mac & 0xFFFFFFFF00000000LL) |
1.273 - (uint64_t)((uint32_t)MEM_READ_LONG(sh4r.r[Rm]));
1.274 + (uint64_t)((uint32_t)tmp);
1.275 sh4r.r[Rm] += 4;
1.276 :}
1.277 LDC.L @Rm+, GBR {:
1.278 CHECKRALIGN32( sh4r.r[Rm] );
1.279 - sh4r.gbr = MEM_READ_LONG(sh4r.r[Rm]);
1.280 + MEM_READ_LONG(sh4r.r[Rm], sh4r.gbr);
1.281 sh4r.r[Rm] +=4;
1.282 :}
1.283 LDS Rm, MACL {:
1.284 @@ -774,13 +778,13 @@
1.285 :}
1.286 LDS.L @Rm+, PR {:
1.287 CHECKRALIGN32( sh4r.r[Rm] );
1.288 - sh4r.pr = MEM_READ_LONG( sh4r.r[Rm] );
1.289 + MEM_READ_LONG( sh4r.r[Rm], sh4r.pr );
1.290 sh4r.r[Rm] += 4;
1.291 :}
1.292 LDC.L @Rm+, VBR {:
1.293 CHECKPRIV();
1.294 CHECKRALIGN32( sh4r.r[Rm] );
1.295 - sh4r.vbr = MEM_READ_LONG(sh4r.r[Rm]);
1.296 + MEM_READ_LONG(sh4r.r[Rm], sh4r.vbr);
1.297 sh4r.r[Rm] +=4;
1.298 :}
1.299 LDS Rm, PR {: sh4r.pr = sh4r.r[Rm]; :}
1.300 @@ -807,7 +811,7 @@
1.301 LDC.L @Rm+, SSR {:
1.302 CHECKPRIV();
1.303 CHECKRALIGN32( sh4r.r[Rm] );
1.304 - sh4r.ssr = MEM_READ_LONG(sh4r.r[Rm]);
1.305 + MEM_READ_LONG(sh4r.r[Rm], sh4r.ssr);
1.306 sh4r.r[Rm] +=4;
1.307 :}
1.308 LDC Rm, SSR {:
1.309 @@ -823,7 +827,7 @@
1.310 LDC.L @Rm+, SPC {:
1.311 CHECKPRIV();
1.312 CHECKRALIGN32( sh4r.r[Rm] );
1.313 - sh4r.spc = MEM_READ_LONG(sh4r.r[Rm]);
1.314 + MEM_READ_LONG(sh4r.r[Rm], sh4r.spc);
1.315 sh4r.r[Rm] +=4;
1.316 :}
1.317 LDC Rm, SPC {:
1.318 @@ -838,7 +842,7 @@
1.319 :}
1.320 LDS.L @Rm+, FPUL {:
1.321 CHECKRALIGN32( sh4r.r[Rm] );
1.322 - sh4r.fpul = MEM_READ_LONG(sh4r.r[Rm]);
1.323 + MEM_READ_LONG(sh4r.r[Rm], sh4r.fpul);
1.324 sh4r.r[Rm] +=4;
1.325 :}
1.326 LDS Rm, FPUL {: sh4r.fpul = sh4r.r[Rm]; :}
1.327 @@ -850,7 +854,7 @@
1.328 :}
1.329 LDS.L @Rm+, FPSCR {:
1.330 CHECKRALIGN32( sh4r.r[Rm] );
1.331 - sh4r.fpscr = MEM_READ_LONG(sh4r.r[Rm]);
1.332 + MEM_READ_LONG(sh4r.r[Rm], sh4r.fpscr);
1.333 sh4r.r[Rm] +=4;
1.334 sh4r.fr_bank = &sh4r.fr[(sh4r.fpscr&FPSCR_FR)>>21][0];
1.335 :}
1.336 @@ -868,7 +872,7 @@
1.337 LDC.L @Rm+, DBR {:
1.338 CHECKPRIV();
1.339 CHECKRALIGN32( sh4r.r[Rm] );
1.340 - sh4r.dbr = MEM_READ_LONG(sh4r.r[Rm]);
1.341 + MEM_READ_LONG(sh4r.r[Rm], sh4r.dbr);
1.342 sh4r.r[Rm] +=4;
1.343 :}
1.344 LDC Rm, DBR {:
1.345 @@ -884,7 +888,7 @@
1.346 LDC.L @Rm+, Rn_BANK {:
1.347 CHECKPRIV();
1.348 CHECKRALIGN32( sh4r.r[Rm] );
1.349 - sh4r.r_bank[Rn_BANK] = MEM_READ_LONG( sh4r.r[Rm] );
1.350 + MEM_READ_LONG( sh4r.r[Rm], sh4r.r_bank[Rn_BANK] );
1.351 sh4r.r[Rm] += 4;
1.352 :}
1.353 LDC Rm, Rn_BANK {:
.