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lxdream.org :: lxdream/src/sh4/sh4mem.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4mem.c
changeset 586:2a3ba82cf243
prev550:a27e31340147
next598:8798c3f0bf78
author nkeynes
date Tue Jan 15 20:50:23 2008 +0000 (12 years ago)
permissions -rw-r--r--
last change Merged lxdream-mmu r570:596 to trunk
file annotate diff log raw
1.1 --- a/src/sh4/sh4mem.c Thu Dec 06 10:43:30 2007 +0000
1.2 +++ b/src/sh4/sh4mem.c Tue Jan 15 20:50:23 2008 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4mem.c,v 1.31 2007-11-08 12:01:57 nkeynes Exp $
1.6 + * $Id$
1.7 * sh4mem.c is responsible for the SH4's access to memory (including memory
1.8 * mapped I/O), using the page maps created in mem.c
1.9 *
1.10 @@ -17,7 +17,6 @@
1.11 */
1.12
1.13 #define MODULE sh4_module
1.14 -#define ENABLE_TRACE_IO 1
1.15
1.16 #include <string.h>
1.17 #include <zlib.h>
1.18 @@ -68,7 +67,6 @@
1.19
1.20 extern struct mem_region mem_rgn[];
1.21 extern struct mmio_region *P4_io[];
1.22 -sh4ptr_t sh4_main_ram;
1.23
1.24 int32_t sh4_read_p4( sh4addr_t addr )
1.25 {
1.26 @@ -163,9 +161,9 @@
1.27 CHECK_READ_WATCH(addr,4);
1.28
1.29 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */
1.30 - return sh4_read_p4( addr );
1.31 + return ZEROEXT32(sh4_read_p4( addr ));
1.32 } else if( (addr&0x1C000000) == 0x0C000000 ) {
1.33 - return *(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF));
1.34 + return ZEROEXT32(*(int32_t *)(sh4_main_ram + (addr&0x00FFFFFF)));
1.35 } else if( (addr&0x1F800000) == 0x04000000 ) {
1.36 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
1.37 pvr2_render_buffer_invalidate(addr, FALSE);
1.38 @@ -182,9 +180,9 @@
1.39 }
1.40 val = io_rgn[(uintptr_t)page]->io_read(addr&0xFFF);
1.41 TRACE_IO( "Long read %08X <= %08X", page, (addr&0xFFF), val, addr );
1.42 - return val;
1.43 + return ZEROEXT32(val);
1.44 } else {
1.45 - return *(int32_t *)(page+(addr&0xFFF));
1.46 + return ZEROEXT32(*(int32_t *)(page+(addr&0xFFF)));
1.47 }
1.48 }
1.49
1.50 @@ -195,9 +193,9 @@
1.51 CHECK_READ_WATCH(addr,2);
1.52
1.53 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */
1.54 - return SIGNEXT16(sh4_read_p4( addr ));
1.55 + return ZEROEXT32(SIGNEXT16(sh4_read_p4( addr )));
1.56 } else if( (addr&0x1C000000) == 0x0C000000 ) {
1.57 - return SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF)));
1.58 + return ZEROEXT32(SIGNEXT16(*(int16_t *)(sh4_main_ram + (addr&0x00FFFFFF))));
1.59 } else if( (addr&0x1F800000) == 0x04000000 ) {
1.60 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
1.61 pvr2_render_buffer_invalidate(addr, FALSE);
1.62 @@ -214,9 +212,9 @@
1.63 }
1.64 val = SIGNEXT16(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));
1.65 TRACE_IO( "Word read %04X <= %08X", page, (addr&0xFFF), val&0xFFFF, addr );
1.66 - return val;
1.67 + return ZEROEXT32(val);
1.68 } else {
1.69 - return SIGNEXT16(*(int16_t *)(page+(addr&0xFFF)));
1.70 + return ZEROEXT32(SIGNEXT16(*(int16_t *)(page+(addr&0xFFF))));
1.71 }
1.72 }
1.73
1.74 @@ -227,9 +225,9 @@
1.75 CHECK_READ_WATCH(addr,1);
1.76
1.77 if( addr >= 0xE0000000 ) { /* P4 Area, handled specially */
1.78 - return SIGNEXT8(sh4_read_p4( addr ));
1.79 + return ZEROEXT32(SIGNEXT8(sh4_read_p4( addr )));
1.80 } else if( (addr&0x1C000000) == 0x0C000000 ) {
1.81 - return SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF)));
1.82 + return ZEROEXT32(SIGNEXT8(*(int8_t *)(sh4_main_ram + (addr&0x00FFFFFF))));
1.83 } else if( (addr&0x1F800000) == 0x04000000 ) {
1.84 addr = TRANSLATE_VIDEO_64BIT_ADDRESS(addr);
1.85 pvr2_render_buffer_invalidate(addr, FALSE);
1.86 @@ -247,9 +245,9 @@
1.87 }
1.88 val = SIGNEXT8(io_rgn[(uintptr_t)page]->io_read(addr&0xFFF));
1.89 TRACE_IO( "Byte read %02X <= %08X", page, (addr&0xFFF), val&0xFF, addr );
1.90 - return val;
1.91 + return ZEROEXT32(val);
1.92 } else {
1.93 - return SIGNEXT8(*(int8_t *)(page+(addr&0xFFF)));
1.94 + return ZEROEXT32(SIGNEXT8(*(int8_t *)(page+(addr&0xFFF))));
1.95 }
1.96 }
1.97
1.98 @@ -351,7 +349,7 @@
1.99 void sh4_write_byte( sh4addr_t addr, uint32_t val )
1.100 {
1.101 sh4ptr_t page;
1.102 -
1.103 +
1.104 CHECK_WRITE_WATCH(addr,1,val);
1.105
1.106 if( addr >= 0xE0000000 ) {
1.107 @@ -425,12 +423,19 @@
1.108 }
1.109 }
1.110
1.111 -void sh4_flush_store_queue( sh4addr_t addr )
1.112 +sh4ptr_t sh4_get_region_by_vma( sh4addr_t vma )
1.113 {
1.114 - /* Store queue operation */
1.115 - int queue = (addr&0x20)>>2;
1.116 - sh4ptr_t src = (sh4ptr_t)&sh4r.store_queue[queue];
1.117 - uint32_t hi = (MMIO_READ( MMU, (queue == 0 ? QACR0 : QACR1) ) & 0x1C) << 24;
1.118 - uint32_t target = (addr&0x03FFFFE0) | hi;
1.119 - mem_copy_to_sh4( target, src, 32 );
1.120 + uint64_t ppa = mmu_vma_to_phys_read(vma);
1.121 + if( ppa>>32 ) {
1.122 + return 0;
1.123 + }
1.124 +
1.125 + sh4addr_t addr = (sh4addr_t)ppa;
1.126 + sh4ptr_t page = page_map[ (addr & 0x1FFFFFFF) >> 12 ];
1.127 + if( ((uintptr_t)page) < MAX_IO_REGIONS ) { /* IO Region */
1.128 + return NULL;
1.129 + } else {
1.130 + return page+(addr&0xFFF);
1.131 + }
1.132 }
1.133 +
.