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lxdream.org :: lxdream/src/sh4/sh4core.c :: diff
lxdream 0.9.1
released Jun 29
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filename src/sh4/sh4core.c
changeset 312:2c34bdc36cbd
prev302:96b5cc24309c
next359:c588dce7ebde
author nkeynes
date Tue Jan 23 08:17:06 2007 +0000 (13 years ago)
permissions -rw-r--r--
last change Save/restore MMU state (specifically the OC cache ram) correctly
file annotate diff log raw
1.1 --- a/src/sh4/sh4core.c Wed Jan 17 21:27:20 2007 +0000
1.2 +++ b/src/sh4/sh4core.c Tue Jan 23 08:17:06 2007 +0000
1.3 @@ -1,5 +1,5 @@
1.4 /**
1.5 - * $Id: sh4core.c,v 1.39 2007-01-17 21:27:20 nkeynes Exp $
1.6 + * $Id: sh4core.c,v 1.40 2007-01-23 08:17:06 nkeynes Exp $
1.7 *
1.8 * SH4 emulation core, and parent module for all the SH4 peripheral
1.9 * modules.
1.10 @@ -69,7 +69,7 @@
1.11 void sh4_init(void)
1.12 {
1.13 register_io_regions( mmio_list_sh4mmio );
1.14 - mmu_init();
1.15 + MMU_init();
1.16 sh4_reset();
1.17 }
1.18
1.19 @@ -93,6 +93,7 @@
1.20 /* Peripheral modules */
1.21 CPG_reset();
1.22 INTC_reset();
1.23 + MMU_reset();
1.24 TMU_reset();
1.25 SCIF_reset();
1.26 }
1.27 @@ -216,6 +217,7 @@
1.28 void sh4_save_state( FILE *f )
1.29 {
1.30 fwrite( &sh4r, sizeof(sh4r), 1, f );
1.31 + MMU_save_state( f );
1.32 INTC_save_state( f );
1.33 TMU_save_state( f );
1.34 SCIF_save_state( f );
1.35 @@ -224,6 +226,7 @@
1.36 int sh4_load_state( FILE * f )
1.37 {
1.38 fread( &sh4r, sizeof(sh4r), 1, f );
1.39 + MMU_load_state( f );
1.40 INTC_load_state( f );
1.41 TMU_load_state( f );
1.42 return SCIF_load_state( f );
.