filename | src/aica/armcore.h |
changeset | 46:30d123047e16 |
prev | 43:0cf3e339cc59 |
next | 51:ed6c27067502 |
author | nkeynes |
date | Tue Dec 27 08:42:57 2005 +0000 (17 years ago) |
permissions | -rw-r--r-- |
last change | Implement LDM/STM opcodes Add a few more unknown aica registers |
file | annotate | diff | log | raw |
1.1 --- a/src/aica/armcore.h Mon Dec 26 11:47:15 2005 +00001.2 +++ b/src/aica/armcore.h Tue Dec 27 08:42:57 2005 +00001.3 @@ -1,5 +1,5 @@1.4 /**1.5 - * $Id: armcore.h,v 1.9 2005-12-26 11:47:15 nkeynes Exp $1.6 + * $Id: armcore.h,v 1.10 2005-12-27 08:42:57 nkeynes Exp $1.7 *1.8 * Interface definitions for the ARM CPU emulation core proper.1.9 *1.10 @@ -73,6 +73,7 @@1.12 #define IS_PRIVILEGED_MODE() ((armr.cpsr & CPSR_MODE) != MODE_USER)1.13 #define IS_EXCEPTION_MODE() (IS_PRIVILEGED_MODE() && (armr.cpsr & CPSR_MODE) != MODE_SYS)1.14 +#define IS_FIQ_MODE() ((armr.cpsr & CPSR_MODE) == MODE_FIQ)1.16 extern struct arm_registers armr;
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