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filename src/sh4/sh4stat.c
changeset 387:38e9fddbf0e3
next500:848e66eee418
author nkeynes
date Tue Sep 18 08:58:23 2007 +0000 (16 years ago)
permissions -rw-r--r--
last change Add instruction statistics gathering module
file annotate diff log raw 
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000

     1.2 +++ b/src/sh4/sh4stat.c	Tue Sep 18 08:58:23 2007 +0000

     1.3 @@ -0,0 +1,1670 @@

     1.4 +/**

     1.5 + * $Id: sh4stat.c,v 1.1 2007-09-18 08:58:23 nkeynes Exp $

     1.6 + * 

     1.7 + * Support module for collecting instruction stats

     1.8 + *

     1.9 + * Copyright (c) 2005 Nathan Keynes.

    1.10 + *

    1.11 + * This program is free software; you can redistribute it and/or modify

    1.12 + * it under the terms of the GNU General Public License as published by

    1.13 + * the Free Software Foundation; either version 2 of the License, or

    1.14 + * (at your option) any later version.

    1.15 + *

    1.16 + * This program is distributed in the hope that it will be useful,

    1.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of

    1.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    1.19 + * GNU General Public License for more details.

    1.20 + */

    1.21 +

    1.22 +#include "dream.h"

    1.23 +#include "sh4stat.h"

    1.24 +#include "sh4core.h"

    1.25 +

    1.26 +static uint64_t sh4_stats[SH4_INSTRUCTION_COUNT+1];

    1.27 +static uint64_t sh4_stats_total;

    1.28 +static const char *sh4_stats_names[] = {

    1.29 +    "???",

    1.30 +"ADD Rm, Rn",

    1.31 +"ADD #imm, Rn",

    1.32 +"ADDC Rm, Rn",

    1.33 +"ADDV Rm, Rn",

    1.34 +"AND Rm, Rn",

    1.35 +"AND #imm, R0",

    1.36 +"AND.B #imm, @(R0, GBR)",

    1.37 +"BF disp",

    1.38 +"BF/S disp",

    1.39 +"BRA disp",

    1.40 +"BRAF Rn",

    1.41 +"BSR disp",

    1.42 +"BSRF Rn",

    1.43 +"BT disp",

    1.44 +"BT/S disp",

    1.45 +"CLRMAC",

    1.46 +"CLRS",

    1.47 +"CLRT",

    1.48 +"CMP/EQ Rm, Rn",

    1.49 +"CMP/EQ #imm, R0",

    1.50 +"CMP/GE Rm, Rn",

    1.51 +"CMP/GT Rm, Rn",

    1.52 +"CMP/HI Rm, Rn",

    1.53 +"CMP/HS Rm, Rn",

    1.54 +"CMP/PL Rn",

    1.55 +"CMP/PZ Rn",

    1.56 +"CMP/STR Rm, Rn",

    1.57 +"DIV0S Rm, Rn",

    1.58 +"DIV0U",

    1.59 +"DIV1 Rm, Rn",

    1.60 +"DMULS.L Rm, Rn",

    1.61 +"DMULU.L Rm, Rn",

    1.62 +"DT Rn",

    1.63 +"EXTS.B Rm, Rn",

    1.64 +"EXTS.W Rm, Rn",

    1.65 +"EXTU.B Rm, Rn",

    1.66 +"EXTU.W Rm, Rn",

    1.67 +"FABS FRn",

    1.68 +"FADD FRm, FRn",

    1.69 +"FCMP/EQ FRm, FRn",

    1.70 +"FCMP/GT FRm, FRn",

    1.71 +"FCNVDS FRm, FPUL",

    1.72 +"FCNVSD FPUL, FRn",

    1.73 +"FDIV FRm, FRn",

    1.74 +"FIPR FVm, FVn",

    1.75 +"FLDS FRm, FPUL",

    1.76 +"FLDI0 FRn",

    1.77 +"FLDI1 FRn",

    1.78 +"FLOAT FPUL, FRn",

    1.79 +"FMAC FR0, FRm, FRn",

    1.80 +"FMOV FRm, FRn",

    1.81 +"FMOV FRm, @Rn",

    1.82 +"FMOV FRm, @-Rn",

    1.83 +"FMOV FRm, @(R0, Rn)",

    1.84 +"FMOV @Rm, FRn",

    1.85 +"FMOV @Rm+, FRn",

    1.86 +"FMOV @(R0, Rm), FRn",

    1.87 +"FMUL FRm, FRn",

    1.88 +"FNEG FRn",

    1.89 +"FRCHG",

    1.90 +"FSCA FPUL, FRn",

    1.91 +"FSCHG",

    1.92 +"FSQRT FRn",

    1.93 +"FSRRA FRn",

    1.94 +"FSTS FPUL, FRn",

    1.95 +"FSUB FRm, FRn",

    1.96 +"FTRC FRm, FPUL",

    1.97 +"FTRV XMTRX, FVn",

    1.98 +"JMP @Rn",

    1.99 +"JSR @Rn",

   1.100 +"LDC Rm, SR",

   1.101 +"LDC Rm, *",

   1.102 +"LDC.L @Rm+, SR",

   1.103 +"LDC.L @Rm+, *",

   1.104 +"LDS Rm, *",

   1.105 +"LDS.L @Rm+, *",

   1.106 +"LDTLB",

   1.107 +"MAC.L @Rm+, @Rn+",

   1.108 +"MAC.W @Rm+, @Rn+",

   1.109 +"MOV Rm, Rn",

   1.110 +"MOV #imm, Rn",

   1.111 +"MOV.B ...",

   1.112 +"MOV.L ...",

   1.113 +"MOV.L @(disp, PC)",

   1.114 +"MOV.W ...",

   1.115 +"MOVA @(disp, PC), R0",

   1.116 +"MOVCA.L R0, @Rn",

   1.117 +"MOVT Rn",

   1.118 +"MUL.L Rm, Rn",

   1.119 +"MULS.W Rm, Rn",

   1.120 +"MULU.W Rm, Rn",

   1.121 +"NEG Rm, Rn",

   1.122 +"NEGC Rm, Rn",

   1.123 +"NOP",

   1.124 +"NOT Rm, Rn",

   1.125 +"OCBI @Rn",

   1.126 +"OCBP @Rn",

   1.127 +"OCBWB @Rn",

   1.128 +"OR Rm, Rn",

   1.129 +"OR #imm, R0",

   1.130 +"OR.B #imm, @(R0, GBR)",

   1.131 +"PREF @Rn",

   1.132 +"ROTCL Rn",

   1.133 +"ROTCR Rn",

   1.134 +"ROTL Rn",

   1.135 +"ROTR Rn",

   1.136 +"RTE",

   1.137 +"RTS",

   1.138 +"SETS",

   1.139 +"SETT",

   1.140 +"SHAD Rm, Rn",

   1.141 +"SHAL Rn",

   1.142 +"SHAR Rn",

   1.143 +"SHLD Rm, Rn",

   1.144 +"SHLL* Rn",

   1.145 +"SHLR* Rn",

   1.146 +"SLEEP",

   1.147 +"STC SR, Rn",

   1.148 +"STC *, Rn",

   1.149 +"STC.L SR, @-Rn",

   1.150 +"STC.L *, @-Rn",

   1.151 +"STS *, Rn",

   1.152 +"STS.L *, @-Rn",

   1.153 +"SUB Rm, Rn",

   1.154 +"SUBC Rm, Rn",

   1.155 +"SUBV Rm, Rn",

   1.156 +"SWAP.B Rm, Rn",

   1.157 +"SWAP.W Rm, Rn",

   1.158 +"TAS.B @Rn",

   1.159 +"TRAPA #imm",

   1.160 +"TST Rm, Rn",

   1.161 +"TST #imm, R0",

   1.162 +"TST.B #imm, @(R0, GBR)",

   1.163 +"XOR Rm, Rn",

   1.164 +"XOR #imm, R0",

   1.165 +"XOR.B #imm, @(R0, GBR)",

   1.166 +"XTRCT Rm, Rn",

   1.167 +"UNDEF"

   1.168 +};

   1.169 +

   1.170 +void sh4_stats_reset( void )

   1.171 +{

   1.172 +    int i;

   1.173 +    for( i=0; i<= I_UNDEF; i++ ) {

   1.174 +	sh4_stats[i] = 0;

   1.175 +    }

   1.176 +    sh4_stats_total = 0;

   1.177 +}

   1.178 +

   1.179 +void sh4_stats_print( FILE *out )

   1.180 +{

   1.181 +    int i;

   1.182 +    for( i=0; i<= I_UNDEF; i++ ) {

   1.183 +	fprintf( out, "%-20s\t%d\t%.2f%\n", sh4_stats_names[i], (uint32_t)sh4_stats[i], ((double)sh4_stats[i])*100.0/(double)sh4_stats_total );

   1.184 +    }

   1.185 +    fprintf( out, "Total: %d\n", sh4_stats_total );

   1.186 +}

   1.187 +

   1.188 +void sh4_stats_add( uint32_t pc ) 

   1.189 +{

   1.190 +    uint16_t ir = sh4_read_word(pc);

   1.191 +#define UNDEF() sh4_stats[0]++

   1.192 +        switch( (ir&0xF000) >> 12 ) {

   1.193 +            case 0x0:

   1.194 +                switch( ir&0xF ) {

   1.195 +                    case 0x2:

   1.196 +                        switch( (ir&0x80) >> 7 ) {

   1.197 +                            case 0x0:

   1.198 +                                switch( (ir&0x70) >> 4 ) {

   1.199 +                                    case 0x0:

   1.200 +                                        { /* STC SR, Rn */

   1.201 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.202 +                                        sh4_stats[I_STCSR]++;

   1.203 +                                        }

   1.204 +                                        break;

   1.205 +                                    case 0x1:

   1.206 +                                        { /* STC GBR, Rn */

   1.207 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.208 +                                        sh4_stats[I_STC]++;

   1.209 +                                        }

   1.210 +                                        break;

   1.211 +                                    case 0x2:

   1.212 +                                        { /* STC VBR, Rn */

   1.213 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.214 +                                        sh4_stats[I_STC]++;

   1.215 +                                        }

   1.216 +                                        break;

   1.217 +                                    case 0x3:

   1.218 +                                        { /* STC SSR, Rn */

   1.219 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.220 +                                        sh4_stats[I_STC]++;

   1.221 +                                        }

   1.222 +                                        break;

   1.223 +                                    case 0x4:

   1.224 +                                        { /* STC SPC, Rn */

   1.225 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.226 +                                        sh4_stats[I_STC]++;

   1.227 +                                        }

   1.228 +                                        break;

   1.229 +                                    default:

   1.230 +                                        UNDEF();

   1.231 +                                        break;

   1.232 +                                }

   1.233 +                                break;

   1.234 +                            case 0x1:

   1.235 +                                { /* STC Rm_BANK, Rn */

   1.236 +                                uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7); 

   1.237 +                                sh4_stats[I_STC]++;

   1.238 +                                }

   1.239 +                                break;

   1.240 +                        }

   1.241 +                        break;

   1.242 +                    case 0x3:

   1.243 +                        switch( (ir&0xF0) >> 4 ) {

   1.244 +                            case 0x0:

   1.245 +                                { /* BSRF Rn */

   1.246 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.247 +                                sh4_stats[I_BSRF]++;

   1.248 +                                }

   1.249 +                                break;

   1.250 +                            case 0x2:

   1.251 +                                { /* BRAF Rn */

   1.252 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.253 +                                sh4_stats[I_BRAF]++;

   1.254 +                                }

   1.255 +                                break;

   1.256 +                            case 0x8:

   1.257 +                                { /* PREF @Rn */

   1.258 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.259 +                                sh4_stats[I_PREF]++;

   1.260 +                                }

   1.261 +                                break;

   1.262 +                            case 0x9:

   1.263 +                                { /* OCBI @Rn */

   1.264 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.265 +                                sh4_stats[I_OCBI]++;

   1.266 +                                }

   1.267 +                                break;

   1.268 +                            case 0xA:

   1.269 +                                { /* OCBP @Rn */

   1.270 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.271 +                                sh4_stats[I_OCBP]++;

   1.272 +                                }

   1.273 +                                break;

   1.274 +                            case 0xB:

   1.275 +                                { /* OCBWB @Rn */

   1.276 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.277 +                                sh4_stats[I_OCBWB]++;

   1.278 +                                }

   1.279 +                                break;

   1.280 +                            case 0xC:

   1.281 +                                { /* MOVCA.L R0, @Rn */

   1.282 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.283 +                                sh4_stats[I_MOVCA]++;

   1.284 +                                }

   1.285 +                                break;

   1.286 +                            default:

   1.287 +                                UNDEF();

   1.288 +                                break;

   1.289 +                        }

   1.290 +                        break;

   1.291 +                    case 0x4:

   1.292 +                        { /* MOV.B Rm, @(R0, Rn) */

   1.293 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.294 +                        sh4_stats[I_MOVB]++;

   1.295 +                        }

   1.296 +                        break;

   1.297 +                    case 0x5:

   1.298 +                        { /* MOV.W Rm, @(R0, Rn) */

   1.299 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.300 +                        sh4_stats[I_MOVW]++;

   1.301 +                        }

   1.302 +                        break;

   1.303 +                    case 0x6:

   1.304 +                        { /* MOV.L Rm, @(R0, Rn) */

   1.305 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.306 +                        sh4_stats[I_MOVL]++;

   1.307 +                        }

   1.308 +                        break;

   1.309 +                    case 0x7:

   1.310 +                        { /* MUL.L Rm, Rn */

   1.311 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.312 +                        sh4_stats[I_MULL]++;

   1.313 +                        }

   1.314 +                        break;

   1.315 +                    case 0x8:

   1.316 +                        switch( (ir&0xFF0) >> 4 ) {

   1.317 +                            case 0x0:

   1.318 +                                { /* CLRT */

   1.319 +                                sh4_stats[I_CLRT]++;

   1.320 +                                }

   1.321 +                                break;

   1.322 +                            case 0x1:

   1.323 +                                { /* SETT */

   1.324 +                                sh4_stats[I_SETT]++;

   1.325 +                                }

   1.326 +                                break;

   1.327 +                            case 0x2:

   1.328 +                                { /* CLRMAC */

   1.329 +                                sh4_stats[I_CLRMAC]++;

   1.330 +                                }

   1.331 +                                break;

   1.332 +                            case 0x3:

   1.333 +                                { /* LDTLB */

   1.334 +                                sh4_stats[I_LDTLB]++;

   1.335 +                                }

   1.336 +                                break;

   1.337 +                            case 0x4:

   1.338 +                                { /* CLRS */

   1.339 +                                sh4_stats[I_CLRS]++;

   1.340 +                                }

   1.341 +                                break;

   1.342 +                            case 0x5:

   1.343 +                                { /* SETS */

   1.344 +                                sh4_stats[I_SETS]++;

   1.345 +                                }

   1.346 +                                break;

   1.347 +                            default:

   1.348 +                                UNDEF();

   1.349 +                                break;

   1.350 +                        }

   1.351 +                        break;

   1.352 +                    case 0x9:

   1.353 +                        switch( (ir&0xF0) >> 4 ) {

   1.354 +                            case 0x0:

   1.355 +                                { /* NOP */

   1.356 +                                sh4_stats[I_NOP]++;

   1.357 +                                }

   1.358 +                                break;

   1.359 +                            case 0x1:

   1.360 +                                { /* DIV0U */

   1.361 +                                sh4_stats[I_DIV0U]++;

   1.362 +                                }

   1.363 +                                break;

   1.364 +                            case 0x2:

   1.365 +                                { /* MOVT Rn */

   1.366 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.367 +                                sh4_stats[I_MOVT]++;

   1.368 +                                }

   1.369 +                                break;

   1.370 +                            default:

   1.371 +                                UNDEF();

   1.372 +                                break;

   1.373 +                        }

   1.374 +                        break;

   1.375 +                    case 0xA:

   1.376 +                        switch( (ir&0xF0) >> 4 ) {

   1.377 +                            case 0x0:

   1.378 +                                { /* STS MACH, Rn */

   1.379 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.380 +                                sh4_stats[I_STS]++;

   1.381 +                                }

   1.382 +                                break;

   1.383 +                            case 0x1:

   1.384 +                                { /* STS MACL, Rn */

   1.385 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.386 +                                sh4_stats[I_STS]++;

   1.387 +                                }

   1.388 +                                break;

   1.389 +                            case 0x2:

   1.390 +                                { /* STS PR, Rn */

   1.391 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.392 +                                sh4_stats[I_STS]++;

   1.393 +                                }

   1.394 +                                break;

   1.395 +                            case 0x3:

   1.396 +                                { /* STC SGR, Rn */

   1.397 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.398 +                                sh4_stats[I_STC]++;

   1.399 +                                }

   1.400 +                                break;

   1.401 +                            case 0x5:

   1.402 +                                { /* STS FPUL, Rn */

   1.403 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.404 +                                sh4_stats[I_STS]++;

   1.405 +                                }

   1.406 +                                break;

   1.407 +                            case 0x6:

   1.408 +                                { /* STS FPSCR, Rn */

   1.409 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.410 +                                sh4_stats[I_STS]++;

   1.411 +                                }

   1.412 +                                break;

   1.413 +                            case 0xF:

   1.414 +                                { /* STC DBR, Rn */

   1.415 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.416 +                                sh4_stats[I_STC]++;

   1.417 +                                }

   1.418 +                                break;

   1.419 +                            default:

   1.420 +                                UNDEF();

   1.421 +                                break;

   1.422 +                        }

   1.423 +                        break;

   1.424 +                    case 0xB:

   1.425 +                        switch( (ir&0xFF0) >> 4 ) {

   1.426 +                            case 0x0:

   1.427 +                                { /* RTS */

   1.428 +                                sh4_stats[I_RTS]++;

   1.429 +                                }

   1.430 +                                break;

   1.431 +                            case 0x1:

   1.432 +                                { /* SLEEP */

   1.433 +                                sh4_stats[I_SLEEP]++;

   1.434 +                                }

   1.435 +                                break;

   1.436 +                            case 0x2:

   1.437 +                                { /* RTE */

   1.438 +                                sh4_stats[I_RTE]++;

   1.439 +                                }

   1.440 +                                break;

   1.441 +                            default:

   1.442 +                                UNDEF();

   1.443 +                                break;

   1.444 +                        }

   1.445 +                        break;

   1.446 +                    case 0xC:

   1.447 +                        { /* MOV.B @(R0, Rm), Rn */

   1.448 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.449 +                        sh4_stats[I_MOVB]++;

   1.450 +                        }

   1.451 +                        break;

   1.452 +                    case 0xD:

   1.453 +                        { /* MOV.W @(R0, Rm), Rn */

   1.454 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.455 +                        sh4_stats[I_MOVW]++;

   1.456 +                        }

   1.457 +                        break;

   1.458 +                    case 0xE:

   1.459 +                        { /* MOV.L @(R0, Rm), Rn */

   1.460 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.461 +                        sh4_stats[I_MOVL]++;

   1.462 +                        }

   1.463 +                        break;

   1.464 +                    case 0xF:

   1.465 +                        { /* MAC.L @Rm+, @Rn+ */

   1.466 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.467 +                        sh4_stats[I_MACL]++;

   1.468 +                        }

   1.469 +                        break;

   1.470 +                    default:

   1.471 +                        UNDEF();

   1.472 +                        break;

   1.473 +                }

   1.474 +                break;

   1.475 +            case 0x1:

   1.476 +                { /* MOV.L Rm, @(disp, Rn) */

   1.477 +                uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2; 

   1.478 +                sh4_stats[I_MOVL]++;

   1.479 +                }

   1.480 +                break;

   1.481 +            case 0x2:

   1.482 +                switch( ir&0xF ) {

   1.483 +                    case 0x0:

   1.484 +                        { /* MOV.B Rm, @Rn */

   1.485 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.486 +                        sh4_stats[I_MOVB]++;

   1.487 +                        }

   1.488 +                        break;

   1.489 +                    case 0x1:

   1.490 +                        { /* MOV.W Rm, @Rn */

   1.491 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.492 +                        sh4_stats[I_MOVW]++;

   1.493 +                        }

   1.494 +                        break;

   1.495 +                    case 0x2:

   1.496 +                        { /* MOV.L Rm, @Rn */

   1.497 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.498 +                        sh4_stats[I_MOVL]++;

   1.499 +                        }

   1.500 +                        break;

   1.501 +                    case 0x4:

   1.502 +                        { /* MOV.B Rm, @-Rn */

   1.503 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.504 +                        sh4_stats[I_MOVB]++;

   1.505 +                        }

   1.506 +                        break;

   1.507 +                    case 0x5:

   1.508 +                        { /* MOV.W Rm, @-Rn */

   1.509 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.510 +                        sh4_stats[I_MOVW]++;

   1.511 +                        }

   1.512 +                        break;

   1.513 +                    case 0x6:

   1.514 +                        { /* MOV.L Rm, @-Rn */

   1.515 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.516 +                        sh4_stats[I_MOVL]++;

   1.517 +                        }

   1.518 +                        break;

   1.519 +                    case 0x7:

   1.520 +                        { /* DIV0S Rm, Rn */

   1.521 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.522 +                        sh4_stats[I_DIV0S]++;

   1.523 +                        }

   1.524 +                        break;

   1.525 +                    case 0x8:

   1.526 +                        { /* TST Rm, Rn */

   1.527 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.528 +                        sh4_stats[I_TST]++;

   1.529 +                        }

   1.530 +                        break;

   1.531 +                    case 0x9:

   1.532 +                        { /* AND Rm, Rn */

   1.533 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.534 +                        sh4_stats[I_AND]++;

   1.535 +                        }

   1.536 +                        break;

   1.537 +                    case 0xA:

   1.538 +                        { /* XOR Rm, Rn */

   1.539 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.540 +                        sh4_stats[I_XOR]++;

   1.541 +                        }

   1.542 +                        break;

   1.543 +                    case 0xB:

   1.544 +                        { /* OR Rm, Rn */

   1.545 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.546 +                        sh4_stats[I_OR]++;

   1.547 +                        }

   1.548 +                        break;

   1.549 +                    case 0xC:

   1.550 +                        { /* CMP/STR Rm, Rn */

   1.551 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.552 +                        sh4_stats[I_CMPSTR]++;

   1.553 +                        }

   1.554 +                        break;

   1.555 +                    case 0xD:

   1.556 +                        { /* XTRCT Rm, Rn */

   1.557 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.558 +                        sh4_stats[I_XTRCT]++;

   1.559 +                        }

   1.560 +                        break;

   1.561 +                    case 0xE:

   1.562 +                        { /* MULU.W Rm, Rn */

   1.563 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.564 +                        sh4_stats[I_MULUW]++;

   1.565 +                        }

   1.566 +                        break;

   1.567 +                    case 0xF:

   1.568 +                        { /* MULS.W Rm, Rn */

   1.569 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.570 +                        sh4_stats[I_MULSW]++;

   1.571 +                        }

   1.572 +                        break;

   1.573 +                    default:

   1.574 +                        UNDEF();

   1.575 +                        break;

   1.576 +                }

   1.577 +                break;

   1.578 +            case 0x3:

   1.579 +                switch( ir&0xF ) {

   1.580 +                    case 0x0:

   1.581 +                        { /* CMP/EQ Rm, Rn */

   1.582 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.583 +                        sh4_stats[I_CMPEQ]++;

   1.584 +                        }

   1.585 +                        break;

   1.586 +                    case 0x2:

   1.587 +                        { /* CMP/HS Rm, Rn */

   1.588 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.589 +                        sh4_stats[I_CMPHS]++;

   1.590 +                        }

   1.591 +                        break;

   1.592 +                    case 0x3:

   1.593 +                        { /* CMP/GE Rm, Rn */

   1.594 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.595 +                        sh4_stats[I_CMPGE]++;

   1.596 +                        }

   1.597 +                        break;

   1.598 +                    case 0x4:

   1.599 +                        { /* DIV1 Rm, Rn */

   1.600 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.601 +                        sh4_stats[I_DIV1]++;

   1.602 +                        }

   1.603 +                        break;

   1.604 +                    case 0x5:

   1.605 +                        { /* DMULU.L Rm, Rn */

   1.606 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.607 +                        sh4_stats[I_DMULU]++;

   1.608 +                        }

   1.609 +                        break;

   1.610 +                    case 0x6:

   1.611 +                        { /* CMP/HI Rm, Rn */

   1.612 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.613 +                        sh4_stats[I_CMPHI]++;

   1.614 +                        }

   1.615 +                        break;

   1.616 +                    case 0x7:

   1.617 +                        { /* CMP/GT Rm, Rn */

   1.618 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.619 +                        sh4_stats[I_CMPGT]++;

   1.620 +                        }

   1.621 +                        break;

   1.622 +                    case 0x8:

   1.623 +                        { /* SUB Rm, Rn */

   1.624 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.625 +                        sh4_stats[I_SUB]++;

   1.626 +                        }

   1.627 +                        break;

   1.628 +                    case 0xA:

   1.629 +                        { /* SUBC Rm, Rn */

   1.630 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.631 +                        sh4_stats[I_SUBC]++;

   1.632 +                        }

   1.633 +                        break;

   1.634 +                    case 0xB:

   1.635 +                        { /* SUBV Rm, Rn */

   1.636 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.637 +                        sh4_stats[I_SUBV]++;

   1.638 +                        }

   1.639 +                        break;

   1.640 +                    case 0xC:

   1.641 +                        { /* ADD Rm, Rn */

   1.642 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.643 +                        sh4_stats[I_ADD]++;

   1.644 +                        }

   1.645 +                        break;

   1.646 +                    case 0xD:

   1.647 +                        { /* DMULS.L Rm, Rn */

   1.648 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.649 +                        sh4_stats[I_DMULS]++;

   1.650 +                        }

   1.651 +                        break;

   1.652 +                    case 0xE:

   1.653 +                        { /* ADDC Rm, Rn */

   1.654 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.655 +                        sh4_stats[I_ADDC]++;

   1.656 +                        }

   1.657 +                        break;

   1.658 +                    case 0xF:

   1.659 +                        { /* ADDV Rm, Rn */

   1.660 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

   1.661 +                        sh4_stats[I_ADDV]++;

   1.662 +                        }

   1.663 +                        break;

   1.664 +                    default:

   1.665 +                        UNDEF();

   1.666 +                        break;

   1.667 +                }

   1.668 +                break;

   1.669 +            case 0x4:

   1.670 +                switch( ir&0xF ) {

   1.671 +                    case 0x0:

   1.672 +                        switch( (ir&0xF0) >> 4 ) {

   1.673 +                            case 0x0:

   1.674 +                                { /* SHLL Rn */

   1.675 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.676 +                                sh4_stats[I_SHLL]++;

   1.677 +                                }

   1.678 +                                break;

   1.679 +                            case 0x1:

   1.680 +                                { /* DT Rn */

   1.681 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.682 +                                sh4_stats[I_DT]++;

   1.683 +                                }

   1.684 +                                break;

   1.685 +                            case 0x2:

   1.686 +                                { /* SHAL Rn */

   1.687 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.688 +                                sh4_stats[I_SHAL]++;

   1.689 +                                }

   1.690 +                                break;

   1.691 +                            default:

   1.692 +                                UNDEF();

   1.693 +                                break;

   1.694 +                        }

   1.695 +                        break;

   1.696 +                    case 0x1:

   1.697 +                        switch( (ir&0xF0) >> 4 ) {

   1.698 +                            case 0x0:

   1.699 +                                { /* SHLR Rn */

   1.700 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.701 +                                sh4_stats[I_SHLR]++;

   1.702 +                                }

   1.703 +                                break;

   1.704 +                            case 0x1:

   1.705 +                                { /* CMP/PZ Rn */

   1.706 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.707 +                                sh4_stats[I_CMPPZ]++;

   1.708 +                                }

   1.709 +                                break;

   1.710 +                            case 0x2:

   1.711 +                                { /* SHAR Rn */

   1.712 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.713 +                                sh4_stats[I_SHAR]++;

   1.714 +                                }

   1.715 +                                break;

   1.716 +                            default:

   1.717 +                                UNDEF();

   1.718 +                                break;

   1.719 +                        }

   1.720 +                        break;

   1.721 +                    case 0x2:

   1.722 +                        switch( (ir&0xF0) >> 4 ) {

   1.723 +                            case 0x0:

   1.724 +                                { /* STS.L MACH, @-Rn */

   1.725 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.726 +                                sh4_stats[I_STSM]++;

   1.727 +                                }

   1.728 +                                break;

   1.729 +                            case 0x1:

   1.730 +                                { /* STS.L MACL, @-Rn */

   1.731 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.732 +                                sh4_stats[I_STSM]++;

   1.733 +                                }

   1.734 +                                break;

   1.735 +                            case 0x2:

   1.736 +                                { /* STS.L PR, @-Rn */

   1.737 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.738 +                                sh4_stats[I_STSM]++;

   1.739 +                                }

   1.740 +                                break;

   1.741 +                            case 0x3:

   1.742 +                                { /* STC.L SGR, @-Rn */

   1.743 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.744 +                                sh4_stats[I_STCM]++;

   1.745 +                                }

   1.746 +                                break;

   1.747 +                            case 0x5:

   1.748 +                                { /* STS.L FPUL, @-Rn */

   1.749 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.750 +                                sh4_stats[I_STSM]++;

   1.751 +                                }

   1.752 +                                break;

   1.753 +                            case 0x6:

   1.754 +                                { /* STS.L FPSCR, @-Rn */

   1.755 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.756 +                                sh4_stats[I_STSM]++;

   1.757 +                                }

   1.758 +                                break;

   1.759 +                            case 0xF:

   1.760 +                                { /* STC.L DBR, @-Rn */

   1.761 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.762 +                                sh4_stats[I_STCM]++;

   1.763 +                                }

   1.764 +                                break;

   1.765 +                            default:

   1.766 +                                UNDEF();

   1.767 +                                break;

   1.768 +                        }

   1.769 +                        break;

   1.770 +                    case 0x3:

   1.771 +                        switch( (ir&0x80) >> 7 ) {

   1.772 +                            case 0x0:

   1.773 +                                switch( (ir&0x70) >> 4 ) {

   1.774 +                                    case 0x0:

   1.775 +                                        { /* STC.L SR, @-Rn */

   1.776 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.777 +                                        sh4_stats[I_STCSRM]++;

   1.778 +                                        }

   1.779 +                                        break;

   1.780 +                                    case 0x1:

   1.781 +                                        { /* STC.L GBR, @-Rn */

   1.782 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.783 +                                        sh4_stats[I_STCM]++;

   1.784 +                                        }

   1.785 +                                        break;

   1.786 +                                    case 0x2:

   1.787 +                                        { /* STC.L VBR, @-Rn */

   1.788 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.789 +                                        sh4_stats[I_STCM]++;

   1.790 +                                        }

   1.791 +                                        break;

   1.792 +                                    case 0x3:

   1.793 +                                        { /* STC.L SSR, @-Rn */

   1.794 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.795 +                                        sh4_stats[I_STCM]++;

   1.796 +                                        }

   1.797 +                                        break;

   1.798 +                                    case 0x4:

   1.799 +                                        { /* STC.L SPC, @-Rn */

   1.800 +                                        uint32_t Rn = ((ir>>8)&0xF); 

   1.801 +                                        sh4_stats[I_STCM]++;

   1.802 +                                        }

   1.803 +                                        break;

   1.804 +                                    default:

   1.805 +                                        UNDEF();

   1.806 +                                        break;

   1.807 +                                }

   1.808 +                                break;

   1.809 +                            case 0x1:

   1.810 +                                { /* STC.L Rm_BANK, @-Rn */

   1.811 +                                uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm_BANK = ((ir>>4)&0x7); 

   1.812 +                                sh4_stats[I_STCM]++;

   1.813 +                                }

   1.814 +                                break;

   1.815 +                        }

   1.816 +                        break;

   1.817 +                    case 0x4:

   1.818 +                        switch( (ir&0xF0) >> 4 ) {

   1.819 +                            case 0x0:

   1.820 +                                { /* ROTL Rn */

   1.821 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.822 +                                sh4_stats[I_ROTL]++;

   1.823 +                                }

   1.824 +                                break;

   1.825 +                            case 0x2:

   1.826 +                                { /* ROTCL Rn */

   1.827 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.828 +                                sh4_stats[I_ROTCL]++;

   1.829 +                                }

   1.830 +                                break;

   1.831 +                            default:

   1.832 +                                UNDEF();

   1.833 +                                break;

   1.834 +                        }

   1.835 +                        break;

   1.836 +                    case 0x5:

   1.837 +                        switch( (ir&0xF0) >> 4 ) {

   1.838 +                            case 0x0:

   1.839 +                                { /* ROTR Rn */

   1.840 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.841 +                                sh4_stats[I_ROTR]++;

   1.842 +                                }

   1.843 +                                break;

   1.844 +                            case 0x1:

   1.845 +                                { /* CMP/PL Rn */

   1.846 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.847 +                                sh4_stats[I_CMPPL]++;

   1.848 +                                }

   1.849 +                                break;

   1.850 +                            case 0x2:

   1.851 +                                { /* ROTCR Rn */

   1.852 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.853 +                                sh4_stats[I_ROTCR]++;

   1.854 +                                }

   1.855 +                                break;

   1.856 +                            default:

   1.857 +                                UNDEF();

   1.858 +                                break;

   1.859 +                        }

   1.860 +                        break;

   1.861 +                    case 0x6:

   1.862 +                        switch( (ir&0xF0) >> 4 ) {

   1.863 +                            case 0x0:

   1.864 +                                { /* LDS.L @Rm+, MACH */

   1.865 +                                uint32_t Rm = ((ir>>8)&0xF); 

   1.866 +                                sh4_stats[I_LDSM]++;

   1.867 +                                }

   1.868 +                                break;

   1.869 +                            case 0x1:

   1.870 +                                { /* LDS.L @Rm+, MACL */

   1.871 +                                uint32_t Rm = ((ir>>8)&0xF); 

   1.872 +                                sh4_stats[I_LDSM]++;

   1.873 +                                }

   1.874 +                                break;

   1.875 +                            case 0x2:

   1.876 +                                { /* LDS.L @Rm+, PR */

   1.877 +                                uint32_t Rm = ((ir>>8)&0xF); 

   1.878 +                                sh4_stats[I_LDSM]++;

   1.879 +                                }

   1.880 +                                break;

   1.881 +                            case 0x3:

   1.882 +                                { /* LDC.L @Rm+, SGR */

   1.883 +                                uint32_t Rm = ((ir>>8)&0xF); 

   1.884 +                                sh4_stats[I_LDCM]++;

   1.885 +                                }

   1.886 +                                break;

   1.887 +                            case 0x5:

   1.888 +                                { /* LDS.L @Rm+, FPUL */

   1.889 +                                uint32_t Rm = ((ir>>8)&0xF); 

   1.890 +                                sh4_stats[I_LDSM]++;

   1.891 +                                }

   1.892 +                                break;

   1.893 +                            case 0x6:

   1.894 +                                { /* LDS.L @Rm+, FPSCR */

   1.895 +                                uint32_t Rm = ((ir>>8)&0xF); 

   1.896 +                                sh4_stats[I_LDSM]++;

   1.897 +                                }

   1.898 +                                break;

   1.899 +                            case 0xF:

   1.900 +                                { /* LDC.L @Rm+, DBR */

   1.901 +                                uint32_t Rm = ((ir>>8)&0xF); 

   1.902 +                                sh4_stats[I_LDCM]++;

   1.903 +                                }

   1.904 +                                break;

   1.905 +                            default:

   1.906 +                                UNDEF();

   1.907 +                                break;

   1.908 +                        }

   1.909 +                        break;

   1.910 +                    case 0x7:

   1.911 +                        switch( (ir&0x80) >> 7 ) {

   1.912 +                            case 0x0:

   1.913 +                                switch( (ir&0x70) >> 4 ) {

   1.914 +                                    case 0x0:

   1.915 +                                        { /* LDC.L @Rm+, SR */

   1.916 +                                        uint32_t Rm = ((ir>>8)&0xF); 

   1.917 +                                        sh4_stats[I_LDCSRM]++;

   1.918 +                                        }

   1.919 +                                        break;

   1.920 +                                    case 0x1:

   1.921 +                                        { /* LDC.L @Rm+, GBR */

   1.922 +                                        uint32_t Rm = ((ir>>8)&0xF); 

   1.923 +                                        sh4_stats[I_LDCM]++;

   1.924 +                                        }

   1.925 +                                        break;

   1.926 +                                    case 0x2:

   1.927 +                                        { /* LDC.L @Rm+, VBR */

   1.928 +                                        uint32_t Rm = ((ir>>8)&0xF); 

   1.929 +                                        sh4_stats[I_LDCM]++;

   1.930 +                                        }

   1.931 +                                        break;

   1.932 +                                    case 0x3:

   1.933 +                                        { /* LDC.L @Rm+, SSR */

   1.934 +                                        uint32_t Rm = ((ir>>8)&0xF); 

   1.935 +                                        sh4_stats[I_LDCM]++;

   1.936 +                                        }

   1.937 +                                        break;

   1.938 +                                    case 0x4:

   1.939 +                                        { /* LDC.L @Rm+, SPC */

   1.940 +                                        uint32_t Rm = ((ir>>8)&0xF); 

   1.941 +                                        sh4_stats[I_LDCM]++;

   1.942 +                                        }

   1.943 +                                        break;

   1.944 +                                    default:

   1.945 +                                        UNDEF();

   1.946 +                                        break;

   1.947 +                                }

   1.948 +                                break;

   1.949 +                            case 0x1:

   1.950 +                                { /* LDC.L @Rm+, Rn_BANK */

   1.951 +                                uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7); 

   1.952 +                                sh4_stats[I_LDCM]++;

   1.953 +                                }

   1.954 +                                break;

   1.955 +                        }

   1.956 +                        break;

   1.957 +                    case 0x8:

   1.958 +                        switch( (ir&0xF0) >> 4 ) {

   1.959 +                            case 0x0:

   1.960 +                                { /* SHLL2 Rn */

   1.961 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.962 +                                sh4_stats[I_SHLL]++;

   1.963 +                                }

   1.964 +                                break;

   1.965 +                            case 0x1:

   1.966 +                                { /* SHLL8 Rn */

   1.967 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.968 +                                sh4_stats[I_SHLL]++;

   1.969 +                                }

   1.970 +                                break;

   1.971 +                            case 0x2:

   1.972 +                                { /* SHLL16 Rn */

   1.973 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.974 +                                sh4_stats[I_SHLL]++;

   1.975 +                                }

   1.976 +                                break;

   1.977 +                            default:

   1.978 +                                UNDEF();

   1.979 +                                break;

   1.980 +                        }

   1.981 +                        break;

   1.982 +                    case 0x9:

   1.983 +                        switch( (ir&0xF0) >> 4 ) {

   1.984 +                            case 0x0:

   1.985 +                                { /* SHLR2 Rn */

   1.986 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.987 +                                sh4_stats[I_SHLR]++;

   1.988 +                                }

   1.989 +                                break;

   1.990 +                            case 0x1:

   1.991 +                                { /* SHLR8 Rn */

   1.992 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.993 +                                sh4_stats[I_SHLR]++;

   1.994 +                                }

   1.995 +                                break;

   1.996 +                            case 0x2:

   1.997 +                                { /* SHLR16 Rn */

   1.998 +                                uint32_t Rn = ((ir>>8)&0xF); 

   1.999 +                                sh4_stats[I_SHLR]++;

  1.1000 +                                }

  1.1001 +                                break;

  1.1002 +                            default:

  1.1003 +                                UNDEF();

  1.1004 +                                break;

  1.1005 +                        }

  1.1006 +                        break;

  1.1007 +                    case 0xA:

  1.1008 +                        switch( (ir&0xF0) >> 4 ) {

  1.1009 +                            case 0x0:

  1.1010 +                                { /* LDS Rm, MACH */

  1.1011 +                                uint32_t Rm = ((ir>>8)&0xF); 

  1.1012 +                                sh4_stats[I_LDS]++;

  1.1013 +                                }

  1.1014 +                                break;

  1.1015 +                            case 0x1:

  1.1016 +                                { /* LDS Rm, MACL */

  1.1017 +                                uint32_t Rm = ((ir>>8)&0xF); 

  1.1018 +                                sh4_stats[I_LDS]++;

  1.1019 +                                }

  1.1020 +                                break;

  1.1021 +                            case 0x2:

  1.1022 +                                { /* LDS Rm, PR */

  1.1023 +                                uint32_t Rm = ((ir>>8)&0xF); 

  1.1024 +                                sh4_stats[I_LDS]++;

  1.1025 +                                }

  1.1026 +                                break;

  1.1027 +                            case 0x3:

  1.1028 +                                { /* LDC Rm, SGR */

  1.1029 +                                uint32_t Rm = ((ir>>8)&0xF); 

  1.1030 +                                sh4_stats[I_LDC]++;

  1.1031 +                                }

  1.1032 +                                break;

  1.1033 +                            case 0x5:

  1.1034 +                                { /* LDS Rm, FPUL */

  1.1035 +                                uint32_t Rm = ((ir>>8)&0xF); 

  1.1036 +                                sh4_stats[I_LDS]++;

  1.1037 +                                }

  1.1038 +                                break;

  1.1039 +                            case 0x6:

  1.1040 +                                { /* LDS Rm, FPSCR */

  1.1041 +                                uint32_t Rm = ((ir>>8)&0xF); 

  1.1042 +                                sh4_stats[I_LDS]++;

  1.1043 +                                }

  1.1044 +                                break;

  1.1045 +                            case 0xF:

  1.1046 +                                { /* LDC Rm, DBR */

  1.1047 +                                uint32_t Rm = ((ir>>8)&0xF); 

  1.1048 +                                sh4_stats[I_LDC]++;

  1.1049 +                                }

  1.1050 +                                break;

  1.1051 +                            default:

  1.1052 +                                UNDEF();

  1.1053 +                                break;

  1.1054 +                        }

  1.1055 +                        break;

  1.1056 +                    case 0xB:

  1.1057 +                        switch( (ir&0xF0) >> 4 ) {

  1.1058 +                            case 0x0:

  1.1059 +                                { /* JSR @Rn */

  1.1060 +                                uint32_t Rn = ((ir>>8)&0xF); 

  1.1061 +                                sh4_stats[I_JSR]++;

  1.1062 +                                }

  1.1063 +                                break;

  1.1064 +                            case 0x1:

  1.1065 +                                { /* TAS.B @Rn */

  1.1066 +                                uint32_t Rn = ((ir>>8)&0xF); 

  1.1067 +                                sh4_stats[I_TASB]++;

  1.1068 +                                }

  1.1069 +                                break;

  1.1070 +                            case 0x2:

  1.1071 +                                { /* JMP @Rn */

  1.1072 +                                uint32_t Rn = ((ir>>8)&0xF); 

  1.1073 +                                sh4_stats[I_JMP]++;

  1.1074 +                                }

  1.1075 +                                break;

  1.1076 +                            default:

  1.1077 +                                UNDEF();

  1.1078 +                                break;

  1.1079 +                        }

  1.1080 +                        break;

  1.1081 +                    case 0xC:

  1.1082 +                        { /* SHAD Rm, Rn */

  1.1083 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1084 +                        sh4_stats[I_SHAD]++;

  1.1085 +                        }

  1.1086 +                        break;

  1.1087 +                    case 0xD:

  1.1088 +                        { /* SHLD Rm, Rn */

  1.1089 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1090 +                        sh4_stats[I_SHLD]++;

  1.1091 +                        }

  1.1092 +                        break;

  1.1093 +                    case 0xE:

  1.1094 +                        switch( (ir&0x80) >> 7 ) {

  1.1095 +                            case 0x0:

  1.1096 +                                switch( (ir&0x70) >> 4 ) {

  1.1097 +                                    case 0x0:

  1.1098 +                                        { /* LDC Rm, SR */

  1.1099 +                                        uint32_t Rm = ((ir>>8)&0xF); 

  1.1100 +                                        sh4_stats[I_LDCSR]++;

  1.1101 +                                        }

  1.1102 +                                        break;

  1.1103 +                                    case 0x1:

  1.1104 +                                        { /* LDC Rm, GBR */

  1.1105 +                                        uint32_t Rm = ((ir>>8)&0xF); 

  1.1106 +                                        sh4_stats[I_LDC]++;

  1.1107 +                                        }

  1.1108 +                                        break;

  1.1109 +                                    case 0x2:

  1.1110 +                                        { /* LDC Rm, VBR */

  1.1111 +                                        uint32_t Rm = ((ir>>8)&0xF); 

  1.1112 +                                        sh4_stats[I_LDC]++;

  1.1113 +                                        }

  1.1114 +                                        break;

  1.1115 +                                    case 0x3:

  1.1116 +                                        { /* LDC Rm, SSR */

  1.1117 +                                        uint32_t Rm = ((ir>>8)&0xF); 

  1.1118 +                                        sh4_stats[I_LDC]++;

  1.1119 +                                        }

  1.1120 +                                        break;

  1.1121 +                                    case 0x4:

  1.1122 +                                        { /* LDC Rm, SPC */

  1.1123 +                                        uint32_t Rm = ((ir>>8)&0xF); 

  1.1124 +                                        sh4_stats[I_LDC]++;

  1.1125 +                                        }

  1.1126 +                                        break;

  1.1127 +                                    default:

  1.1128 +                                        UNDEF();

  1.1129 +                                        break;

  1.1130 +                                }

  1.1131 +                                break;

  1.1132 +                            case 0x1:

  1.1133 +                                { /* LDC Rm, Rn_BANK */

  1.1134 +                                uint32_t Rm = ((ir>>8)&0xF); uint32_t Rn_BANK = ((ir>>4)&0x7); 

  1.1135 +                                sh4_stats[I_LDC]++;

  1.1136 +                                }

  1.1137 +                                break;

  1.1138 +                        }

  1.1139 +                        break;

  1.1140 +                    case 0xF:

  1.1141 +                        { /* MAC.W @Rm+, @Rn+ */

  1.1142 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1143 +                        sh4_stats[I_MACW]++;

  1.1144 +                        }

  1.1145 +                        break;

  1.1146 +                }

  1.1147 +                break;

  1.1148 +            case 0x5:

  1.1149 +                { /* MOV.L @(disp, Rm), Rn */

  1.1150 +                uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<2; 

  1.1151 +                sh4_stats[I_MOVL]++;

  1.1152 +                }

  1.1153 +                break;

  1.1154 +            case 0x6:

  1.1155 +                switch( ir&0xF ) {

  1.1156 +                    case 0x0:

  1.1157 +                        { /* MOV.B @Rm, Rn */

  1.1158 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1159 +                        sh4_stats[I_MOVB]++;

  1.1160 +                        }

  1.1161 +                        break;

  1.1162 +                    case 0x1:

  1.1163 +                        { /* MOV.W @Rm, Rn */

  1.1164 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1165 +                        sh4_stats[I_MOVW]++;

  1.1166 +                        }

  1.1167 +                        break;

  1.1168 +                    case 0x2:

  1.1169 +                        { /* MOV.L @Rm, Rn */

  1.1170 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1171 +                        sh4_stats[I_MOVL]++;

  1.1172 +                        }

  1.1173 +                        break;

  1.1174 +                    case 0x3:

  1.1175 +                        { /* MOV Rm, Rn */

  1.1176 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1177 +                        sh4_stats[I_MOV]++;

  1.1178 +                        }

  1.1179 +                        break;

  1.1180 +                    case 0x4:

  1.1181 +                        { /* MOV.B @Rm+, Rn */

  1.1182 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1183 +                        sh4_stats[I_MOVB]++;

  1.1184 +                        }

  1.1185 +                        break;

  1.1186 +                    case 0x5:

  1.1187 +                        { /* MOV.W @Rm+, Rn */

  1.1188 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1189 +                        sh4_stats[I_MOVW]++;

  1.1190 +                        }

  1.1191 +                        break;

  1.1192 +                    case 0x6:

  1.1193 +                        { /* MOV.L @Rm+, Rn */

  1.1194 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1195 +                        sh4_stats[I_MOVL]++;

  1.1196 +                        }

  1.1197 +                        break;

  1.1198 +                    case 0x7:

  1.1199 +                        { /* NOT Rm, Rn */

  1.1200 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1201 +                        sh4_stats[I_NOT]++;

  1.1202 +                        }

  1.1203 +                        break;

  1.1204 +                    case 0x8:

  1.1205 +                        { /* SWAP.B Rm, Rn */

  1.1206 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1207 +                        sh4_stats[I_SWAPB]++;

  1.1208 +                        }

  1.1209 +                        break;

  1.1210 +                    case 0x9:

  1.1211 +                        { /* SWAP.W Rm, Rn */

  1.1212 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1213 +                        sh4_stats[I_SWAPW]++;

  1.1214 +                        }

  1.1215 +                        break;

  1.1216 +                    case 0xA:

  1.1217 +                        { /* NEGC Rm, Rn */

  1.1218 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1219 +                        sh4_stats[I_NEGC]++;

  1.1220 +                        }

  1.1221 +                        break;

  1.1222 +                    case 0xB:

  1.1223 +                        { /* NEG Rm, Rn */

  1.1224 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1225 +                        sh4_stats[I_NEG]++;

  1.1226 +                        }

  1.1227 +                        break;

  1.1228 +                    case 0xC:

  1.1229 +                        { /* EXTU.B Rm, Rn */

  1.1230 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1231 +                        sh4_stats[I_EXTUB]++;

  1.1232 +                        }

  1.1233 +                        break;

  1.1234 +                    case 0xD:

  1.1235 +                        { /* EXTU.W Rm, Rn */

  1.1236 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1237 +                        sh4_stats[I_EXTUW]++;

  1.1238 +                        }

  1.1239 +                        break;

  1.1240 +                    case 0xE:

  1.1241 +                        { /* EXTS.B Rm, Rn */

  1.1242 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1243 +                        sh4_stats[I_EXTSB]++;

  1.1244 +                        }

  1.1245 +                        break;

  1.1246 +                    case 0xF:

  1.1247 +                        { /* EXTS.W Rm, Rn */

  1.1248 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1249 +                        sh4_stats[I_EXTSW]++;

  1.1250 +                        }

  1.1251 +                        break;

  1.1252 +                }

  1.1253 +                break;

  1.1254 +            case 0x7:

  1.1255 +                { /* ADD #imm, Rn */

  1.1256 +                uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF); 

  1.1257 +                sh4_stats[I_ADDI]++;

  1.1258 +                }

  1.1259 +                break;

  1.1260 +            case 0x8:

  1.1261 +                switch( (ir&0xF00) >> 8 ) {

  1.1262 +                    case 0x0:

  1.1263 +                        { /* MOV.B R0, @(disp, Rn) */

  1.1264 +                        uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF); 

  1.1265 +                        sh4_stats[I_MOVB]++;

  1.1266 +                        }

  1.1267 +                        break;

  1.1268 +                    case 0x1:

  1.1269 +                        { /* MOV.W R0, @(disp, Rn) */

  1.1270 +                        uint32_t Rn = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1; 

  1.1271 +                        sh4_stats[I_MOVW]++;

  1.1272 +                        }

  1.1273 +                        break;

  1.1274 +                    case 0x4:

  1.1275 +                        { /* MOV.B @(disp, Rm), R0 */

  1.1276 +                        uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF); 

  1.1277 +                        sh4_stats[I_MOVB]++;

  1.1278 +                        }

  1.1279 +                        break;

  1.1280 +                    case 0x5:

  1.1281 +                        { /* MOV.W @(disp, Rm), R0 */

  1.1282 +                        uint32_t Rm = ((ir>>4)&0xF); uint32_t disp = (ir&0xF)<<1; 

  1.1283 +                        sh4_stats[I_MOVW]++;

  1.1284 +                        }

  1.1285 +                        break;

  1.1286 +                    case 0x8:

  1.1287 +                        { /* CMP/EQ #imm, R0 */

  1.1288 +                        int32_t imm = SIGNEXT8(ir&0xFF); 

  1.1289 +                        sh4_stats[I_CMPEQI]++;

  1.1290 +                        }

  1.1291 +                        break;

  1.1292 +                    case 0x9:

  1.1293 +                        { /* BT disp */

  1.1294 +                        int32_t disp = SIGNEXT8(ir&0xFF)<<1; 

  1.1295 +                        sh4_stats[I_BT]++;

  1.1296 +                        }

  1.1297 +                        break;

  1.1298 +                    case 0xB:

  1.1299 +                        { /* BF disp */

  1.1300 +                        int32_t disp = SIGNEXT8(ir&0xFF)<<1; 

  1.1301 +                        sh4_stats[I_BF]++;

  1.1302 +                        }

  1.1303 +                        break;

  1.1304 +                    case 0xD:

  1.1305 +                        { /* BT/S disp */

  1.1306 +                        int32_t disp = SIGNEXT8(ir&0xFF)<<1; 

  1.1307 +                        sh4_stats[I_BTS]++;

  1.1308 +                        }

  1.1309 +                        break;

  1.1310 +                    case 0xF:

  1.1311 +                        { /* BF/S disp */

  1.1312 +                        int32_t disp = SIGNEXT8(ir&0xFF)<<1; 

  1.1313 +                        sh4_stats[I_BFS]++;

  1.1314 +                        }

  1.1315 +                        break;

  1.1316 +                    default:

  1.1317 +                        UNDEF();

  1.1318 +                        break;

  1.1319 +                }

  1.1320 +                break;

  1.1321 +            case 0x9:

  1.1322 +                { /* MOV.W @(disp, PC), Rn */

  1.1323 +                uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<1; 

  1.1324 +                sh4_stats[I_MOVW]++;

  1.1325 +                }

  1.1326 +                break;

  1.1327 +            case 0xA:

  1.1328 +                { /* BRA disp */

  1.1329 +                int32_t disp = SIGNEXT12(ir&0xFFF)<<1; 

  1.1330 +                sh4_stats[I_BRA]++;

  1.1331 +                }

  1.1332 +                break;

  1.1333 +            case 0xB:

  1.1334 +                { /* BSR disp */

  1.1335 +                int32_t disp = SIGNEXT12(ir&0xFFF)<<1; 

  1.1336 +                sh4_stats[I_BSR]++;

  1.1337 +                }

  1.1338 +                break;

  1.1339 +            case 0xC:

  1.1340 +                switch( (ir&0xF00) >> 8 ) {

  1.1341 +                    case 0x0:

  1.1342 +                        { /* MOV.B R0, @(disp, GBR) */

  1.1343 +                        uint32_t disp = (ir&0xFF); 

  1.1344 +                        sh4_stats[I_MOVB]++;

  1.1345 +                        }

  1.1346 +                        break;

  1.1347 +                    case 0x1:

  1.1348 +                        { /* MOV.W R0, @(disp, GBR) */

  1.1349 +                        uint32_t disp = (ir&0xFF)<<1; 

  1.1350 +                        sh4_stats[I_MOVW]++;

  1.1351 +                        }

  1.1352 +                        break;

  1.1353 +                    case 0x2:

  1.1354 +                        { /* MOV.L R0, @(disp, GBR) */

  1.1355 +                        uint32_t disp = (ir&0xFF)<<2; 

  1.1356 +                        sh4_stats[I_MOVL]++;

  1.1357 +                        }

  1.1358 +                        break;

  1.1359 +                    case 0x3:

  1.1360 +                        { /* TRAPA #imm */

  1.1361 +                        uint32_t imm = (ir&0xFF); 

  1.1362 +                        sh4_stats[I_TRAPA]++;

  1.1363 +                        }

  1.1364 +                        break;

  1.1365 +                    case 0x4:

  1.1366 +                        { /* MOV.B @(disp, GBR), R0 */

  1.1367 +                        uint32_t disp = (ir&0xFF); 

  1.1368 +                        sh4_stats[I_MOVB]++;

  1.1369 +                        }

  1.1370 +                        break;

  1.1371 +                    case 0x5:

  1.1372 +                        { /* MOV.W @(disp, GBR), R0 */

  1.1373 +                        uint32_t disp = (ir&0xFF)<<1; 

  1.1374 +                        sh4_stats[I_MOVW]++;

  1.1375 +                        }

  1.1376 +                        break;

  1.1377 +                    case 0x6:

  1.1378 +                        { /* MOV.L @(disp, GBR), R0 */

  1.1379 +                        uint32_t disp = (ir&0xFF)<<2; 

  1.1380 +                        sh4_stats[I_MOVL]++;

  1.1381 +                        }

  1.1382 +                        break;

  1.1383 +                    case 0x7:

  1.1384 +                        { /* MOVA @(disp, PC), R0 */

  1.1385 +                        uint32_t disp = (ir&0xFF)<<2; 

  1.1386 +                        sh4_stats[I_MOVA]++;

  1.1387 +                        }

  1.1388 +                        break;

  1.1389 +                    case 0x8:

  1.1390 +                        { /* TST #imm, R0 */

  1.1391 +                        uint32_t imm = (ir&0xFF); 

  1.1392 +                        sh4_stats[I_TSTI]++;

  1.1393 +                        }

  1.1394 +                        break;

  1.1395 +                    case 0x9:

  1.1396 +                        { /* AND #imm, R0 */

  1.1397 +                        uint32_t imm = (ir&0xFF); 

  1.1398 +                        sh4_stats[I_ANDI]++;

  1.1399 +                        }

  1.1400 +                        break;

  1.1401 +                    case 0xA:

  1.1402 +                        { /* XOR #imm, R0 */

  1.1403 +                        uint32_t imm = (ir&0xFF); 

  1.1404 +                        sh4_stats[I_XORI]++;

  1.1405 +                        }

  1.1406 +                        break;

  1.1407 +                    case 0xB:

  1.1408 +                        { /* OR #imm, R0 */

  1.1409 +                        uint32_t imm = (ir&0xFF); 

  1.1410 +                        sh4_stats[I_ORI]++;

  1.1411 +                        }

  1.1412 +                        break;

  1.1413 +                    case 0xC:

  1.1414 +                        { /* TST.B #imm, @(R0, GBR) */

  1.1415 +                        uint32_t imm = (ir&0xFF); 

  1.1416 +                        sh4_stats[I_TSTB]++;

  1.1417 +                        }

  1.1418 +                        break;

  1.1419 +                    case 0xD:

  1.1420 +                        { /* AND.B #imm, @(R0, GBR) */

  1.1421 +                        uint32_t imm = (ir&0xFF); 

  1.1422 +                        sh4_stats[I_ANDB]++;

  1.1423 +                        }

  1.1424 +                        break;

  1.1425 +                    case 0xE:

  1.1426 +                        { /* XOR.B #imm, @(R0, GBR) */

  1.1427 +                        uint32_t imm = (ir&0xFF); 

  1.1428 +                        sh4_stats[I_XORB]++;

  1.1429 +                        }

  1.1430 +                        break;

  1.1431 +                    case 0xF:

  1.1432 +                        { /* OR.B #imm, @(R0, GBR) */

  1.1433 +                        uint32_t imm = (ir&0xFF); 

  1.1434 +                        sh4_stats[I_ORB]++;

  1.1435 +                        }

  1.1436 +                        break;

  1.1437 +                }

  1.1438 +                break;

  1.1439 +            case 0xD:

  1.1440 +                { /* MOV.L @(disp, PC), Rn */

  1.1441 +                uint32_t Rn = ((ir>>8)&0xF); uint32_t disp = (ir&0xFF)<<2; 

  1.1442 +                sh4_stats[I_MOVLPC]++;

  1.1443 +                }

  1.1444 +                break;

  1.1445 +            case 0xE:

  1.1446 +                { /* MOV #imm, Rn */

  1.1447 +                uint32_t Rn = ((ir>>8)&0xF); int32_t imm = SIGNEXT8(ir&0xFF); 

  1.1448 +                sh4_stats[I_MOVI]++;

  1.1449 +                }

  1.1450 +                break;

  1.1451 +            case 0xF:

  1.1452 +                switch( ir&0xF ) {

  1.1453 +                    case 0x0:

  1.1454 +                        { /* FADD FRm, FRn */

  1.1455 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1456 +                        sh4_stats[I_FADD]++;

  1.1457 +                        }

  1.1458 +                        break;

  1.1459 +                    case 0x1:

  1.1460 +                        { /* FSUB FRm, FRn */

  1.1461 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1462 +                        sh4_stats[I_FSUB]++;

  1.1463 +                        }

  1.1464 +                        break;

  1.1465 +                    case 0x2:

  1.1466 +                        { /* FMUL FRm, FRn */

  1.1467 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1468 +                        sh4_stats[I_FMUL]++;

  1.1469 +                        }

  1.1470 +                        break;

  1.1471 +                    case 0x3:

  1.1472 +                        { /* FDIV FRm, FRn */

  1.1473 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1474 +                        sh4_stats[I_FDIV]++;

  1.1475 +                        }

  1.1476 +                        break;

  1.1477 +                    case 0x4:

  1.1478 +                        { /* FCMP/EQ FRm, FRn */

  1.1479 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1480 +                        sh4_stats[I_FCMPEQ]++;

  1.1481 +                        }

  1.1482 +                        break;

  1.1483 +                    case 0x5:

  1.1484 +                        { /* FCMP/GT FRm, FRn */

  1.1485 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1486 +                        sh4_stats[I_FCMPGT]++;

  1.1487 +                        }

  1.1488 +                        break;

  1.1489 +                    case 0x6:

  1.1490 +                        { /* FMOV @(R0, Rm), FRn */

  1.1491 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1492 +                        sh4_stats[I_FMOV7]++;

  1.1493 +                        }

  1.1494 +                        break;

  1.1495 +                    case 0x7:

  1.1496 +                        { /* FMOV FRm, @(R0, Rn) */

  1.1497 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1498 +                        sh4_stats[I_FMOV4]++;

  1.1499 +                        }

  1.1500 +                        break;

  1.1501 +                    case 0x8:

  1.1502 +                        { /* FMOV @Rm, FRn */

  1.1503 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1504 +                        sh4_stats[I_FMOV5]++;

  1.1505 +                        }

  1.1506 +                        break;

  1.1507 +                    case 0x9:

  1.1508 +                        { /* FMOV @Rm+, FRn */

  1.1509 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t Rm = ((ir>>4)&0xF); 

  1.1510 +                        sh4_stats[I_FMOV6]++;

  1.1511 +                        }

  1.1512 +                        break;

  1.1513 +                    case 0xA:

  1.1514 +                        { /* FMOV FRm, @Rn */

  1.1515 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1516 +                        sh4_stats[I_FMOV2]++;

  1.1517 +                        }

  1.1518 +                        break;

  1.1519 +                    case 0xB:

  1.1520 +                        { /* FMOV FRm, @-Rn */

  1.1521 +                        uint32_t Rn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1522 +                        sh4_stats[I_FMOV3]++;

  1.1523 +                        }

  1.1524 +                        break;

  1.1525 +                    case 0xC:

  1.1526 +                        { /* FMOV FRm, FRn */

  1.1527 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1528 +                        sh4_stats[I_FMOV1]++;

  1.1529 +                        }

  1.1530 +                        break;

  1.1531 +                    case 0xD:

  1.1532 +                        switch( (ir&0xF0) >> 4 ) {

  1.1533 +                            case 0x0:

  1.1534 +                                { /* FSTS FPUL, FRn */

  1.1535 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1536 +                                sh4_stats[I_FSTS]++;

  1.1537 +                                }

  1.1538 +                                break;

  1.1539 +                            case 0x1:

  1.1540 +                                { /* FLDS FRm, FPUL */

  1.1541 +                                uint32_t FRm = ((ir>>8)&0xF); 

  1.1542 +                                sh4_stats[I_FLDS]++;

  1.1543 +                                }

  1.1544 +                                break;

  1.1545 +                            case 0x2:

  1.1546 +                                { /* FLOAT FPUL, FRn */

  1.1547 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1548 +                                sh4_stats[I_FLOAT]++;

  1.1549 +                                }

  1.1550 +                                break;

  1.1551 +                            case 0x3:

  1.1552 +                                { /* FTRC FRm, FPUL */

  1.1553 +                                uint32_t FRm = ((ir>>8)&0xF); 

  1.1554 +                                sh4_stats[I_FTRC]++;

  1.1555 +                                }

  1.1556 +                                break;

  1.1557 +                            case 0x4:

  1.1558 +                                { /* FNEG FRn */

  1.1559 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1560 +                                sh4_stats[I_FNEG]++;

  1.1561 +                                }

  1.1562 +                                break;

  1.1563 +                            case 0x5:

  1.1564 +                                { /* FABS FRn */

  1.1565 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1566 +                                sh4_stats[I_FABS]++;

  1.1567 +                                }

  1.1568 +                                break;

  1.1569 +                            case 0x6:

  1.1570 +                                { /* FSQRT FRn */

  1.1571 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1572 +                                sh4_stats[I_FSQRT]++;

  1.1573 +                                }

  1.1574 +                                break;

  1.1575 +                            case 0x7:

  1.1576 +                                { /* FSRRA FRn */

  1.1577 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1578 +                                sh4_stats[I_FSRRA]++;

  1.1579 +                                }

  1.1580 +                                break;

  1.1581 +                            case 0x8:

  1.1582 +                                { /* FLDI0 FRn */

  1.1583 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1584 +                                sh4_stats[I_FLDI0]++;

  1.1585 +                                }

  1.1586 +                                break;

  1.1587 +                            case 0x9:

  1.1588 +                                { /* FLDI1 FRn */

  1.1589 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1590 +                                sh4_stats[I_FLDI1]++;

  1.1591 +                                }

  1.1592 +                                break;

  1.1593 +                            case 0xA:

  1.1594 +                                { /* FCNVSD FPUL, FRn */

  1.1595 +                                uint32_t FRn = ((ir>>8)&0xF); 

  1.1596 +                                sh4_stats[I_FCNVSD]++;

  1.1597 +                                }

  1.1598 +                                break;

  1.1599 +                            case 0xB:

  1.1600 +                                { /* FCNVDS FRm, FPUL */

  1.1601 +                                uint32_t FRm = ((ir>>8)&0xF); 

  1.1602 +                                sh4_stats[I_FCNVDS]++;

  1.1603 +                                }

  1.1604 +                                break;

  1.1605 +                            case 0xE:

  1.1606 +                                { /* FIPR FVm, FVn */

  1.1607 +                                uint32_t FVn = ((ir>>10)&0x3); uint32_t FVm = ((ir>>8)&0x3); 

  1.1608 +                                sh4_stats[I_FIPR]++;

  1.1609 +                                }

  1.1610 +                                break;

  1.1611 +                            case 0xF:

  1.1612 +                                switch( (ir&0x100) >> 8 ) {

  1.1613 +                                    case 0x0:

  1.1614 +                                        { /* FSCA FPUL, FRn */

  1.1615 +                                        uint32_t FRn = ((ir>>9)&0x7)<<1; 

  1.1616 +                                        sh4_stats[I_FSCA]++;

  1.1617 +                                        }

  1.1618 +                                        break;

  1.1619 +                                    case 0x1:

  1.1620 +                                        switch( (ir&0x200) >> 9 ) {

  1.1621 +                                            case 0x0:

  1.1622 +                                                { /* FTRV XMTRX, FVn */

  1.1623 +                                                uint32_t FVn = ((ir>>10)&0x3); 

  1.1624 +                                                sh4_stats[I_FTRV]++;

  1.1625 +                                                }

  1.1626 +                                                break;

  1.1627 +                                            case 0x1:

  1.1628 +                                                switch( (ir&0xC00) >> 10 ) {

  1.1629 +                                                    case 0x0:

  1.1630 +                                                        { /* FSCHG */

  1.1631 +                                                        sh4_stats[I_FSCHG]++;

  1.1632 +                                                        }

  1.1633 +                                                        break;

  1.1634 +                                                    case 0x2:

  1.1635 +                                                        { /* FRCHG */

  1.1636 +                                                        sh4_stats[I_FRCHG]++;

  1.1637 +                                                        }

  1.1638 +                                                        break;

  1.1639 +                                                    case 0x3:

  1.1640 +                                                        { /* UNDEF */

  1.1641 +                                                        sh4_stats[I_UNDEF]++;

  1.1642 +                                                        }

  1.1643 +                                                        break;

  1.1644 +                                                    default:

  1.1645 +                                                        UNDEF();

  1.1646 +                                                        break;

  1.1647 +                                                }

  1.1648 +                                                break;

  1.1649 +                                        }

  1.1650 +                                        break;

  1.1651 +                                }

  1.1652 +                                break;

  1.1653 +                            default:

  1.1654 +                                UNDEF();

  1.1655 +                                break;

  1.1656 +                        }

  1.1657 +                        break;

  1.1658 +                    case 0xE:

  1.1659 +                        { /* FMAC FR0, FRm, FRn */

  1.1660 +                        uint32_t FRn = ((ir>>8)&0xF); uint32_t FRm = ((ir>>4)&0xF); 

  1.1661 +                        sh4_stats[I_FMAC]++;

  1.1662 +                        }

  1.1663 +                        break;

  1.1664 +                    default:

  1.1665 +                        UNDEF();

  1.1666 +                        break;

  1.1667 +                }

  1.1668 +                break;

  1.1669 +        }

  1.1670 +

  1.1671 +

  1.1672 +sh4_stats_total++;

  1.1673 +}
.