lxdream 0.9.1| filename | test/testide.c |
| changeset | 251:3c5953d944e0 |
| prev | 248:f8022f2ef2a2 |
| next | 252:cfd0ec3bfeec |
| author | nkeynes |
| date | Wed Dec 20 11:24:16 2006 +0000 (13 years ago) |
| permissions | -rw-r--r-- |
| last change | Tidy up the core IDE test case - now passes (usually) on the real thing. Main surprise was that it seems to always fail the first packet command after a reset with code 06,29 (drive reset), no matter how long its been since the reset. |
| file | annotate | diff | log | raw |
1.1 --- a/test/testide.c Tue Dec 19 11:53:39 2006 +00001.2 +++ b/test/testide.c Wed Dec 20 11:24:16 2006 +00001.3 @@ -1,5 +1,5 @@1.4 /**1.5 - * $Id: testide.c,v 1.2 2006-12-19 11:53:39 nkeynes Exp $1.6 + * $Id: testide.c,v 1.3 2006-12-20 11:24:16 nkeynes Exp $1.7 *1.8 * IDE interface test cases. Covers all (known) IDE registers in the1.9 * 5F7000 - 5F74FF range including DMA, but does not cover any GD-Rom1.10 @@ -99,6 +99,95 @@1.12 #define CHECK_REGS( r ) if( check_regs(r, __FILE__, __LINE__, __func__) != 0 ) { return -1; }1.14 +1.15 +uint32_t post_packet_ready_regs[] =1.16 + { IDE_ALTSTATUS, 0x58,1.17 + IDE_COUNT, 0x01,1.18 + IDE_LBA1, 8,1.19 + IDE_LBA2, 0,1.20 + IDE_DEVICE, 0,1.21 + IDE_STATUS, 0x58, 0, 0 };1.22 +1.23 +uint32_t post_packet_cmd_regs[] =1.24 + { IDE_ALTSTATUS, 0xD0,1.25 + IDE_ERROR, 0x00,1.26 + IDE_COUNT, 0x01,1.27 + IDE_LBA1, 8,1.28 + IDE_LBA2, 0,1.29 + IDE_DEVICE, 0,1.30 + IDE_STATUS, 0xD0, 0, 0 };1.31 +1.32 +uint32_t packet_cmd_error6_regs[] =1.33 + { IDE_ALTSTATUS, 0x51,1.34 + IDE_ERROR, 0x60,1.35 + IDE_COUNT, 0x03,1.36 + IDE_LBA1, 8,1.37 + IDE_LBA2, 0,1.38 + IDE_DEVICE, 0,1.39 + IDE_STATUS, 0x51, 0, 0 };1.40 +1.41 +uint32_t packet_data_ready_regs[] =1.42 + { IDE_ALTSTATUS, 0x58,1.43 + IDE_ERROR, 0x00,1.44 + IDE_COUNT, 0x02,1.45 + IDE_LBA0, 0x00,1.46 + IDE_LBA1, 0x0C,1.47 + IDE_LBA2, 0,1.48 + IDE_DEVICE, 0,1.49 + IDE_STATUS, 0x58, 0, 0 };1.50 +1.51 +1.52 +uint32_t post_packet_data_regs[] =1.53 + { IDE_ALTSTATUS, 0xD0,1.54 + IDE_ERROR, 0x00,1.55 + IDE_COUNT, 0x02,1.56 + IDE_LBA0, 0x00,1.57 + IDE_LBA1, 0x0C,1.58 + IDE_LBA2, 0,1.59 + IDE_DEVICE, 0,1.60 + IDE_STATUS, 0xD0, 0, 0 };1.61 +1.62 +uint32_t packet_complete_regs[] =1.63 + { IDE_ALTSTATUS, 0x50,1.64 + IDE_ERROR, 0x00,1.65 + IDE_COUNT, 0x03,1.66 + IDE_LBA1, 0x0C,1.67 + IDE_LBA2, 0,1.68 + IDE_DEVICE, 0,1.69 + IDE_STATUS, 0x50, 0, 0 };1.70 +1.71 +int send_packet_command( char *cmd )1.72 +{1.73 + unsigned short *spkt = (unsigned short *)cmd;1.74 + int i;1.75 +1.76 + EXPECT_READY();1.77 + byte_write( IDE_FEATURE, 0 );1.78 + byte_write( IDE_COUNT, 0 );1.79 + byte_write( IDE_LBA0, 0 );1.80 + byte_write( IDE_LBA1, 8 );1.81 + byte_write( IDE_LBA2, 0 );1.82 + byte_write( IDE_DEVICE, 0 );1.83 + byte_write( IDE_COMMAND, 0xA0 );1.84 + byte_read(IDE_ALTSTATUS); /* delay 1 PIO cycle */1.85 + EXPECT_READY(); /* Wait until device is ready to accept command (usually immediate) */1.86 + CHECK_INTRQ_CLEAR();1.87 + CHECK_REGS( post_packet_ready_regs );1.88 +1.89 + /* Write the command */1.90 + for( i=0; i<6; i++ ) {1.91 + word_write( IDE_DATA, spkt[i] );1.92 + }1.93 +1.94 + byte_read(IDE_ALTSTATUS);1.95 +1.96 + // CHECK_REGS( post_packet_cmd_regs );1.97 + EXPECT_INTRQ();1.98 + EXPECT_READY();1.99 + return 0;1.100 +}1.101 +1.102 +1.103 uint32_t abort_regs[] = {1.104 IDE_ALTSTATUS, 0x51,1.105 IDE_ERROR, 0x04,1.106 @@ -183,6 +272,18 @@1.107 return 0;1.108 }1.110 +1.111 +uint32_t drive_ready_regs[] = {1.112 + IDE_ALTSTATUS, 0x50,1.113 + IDE_ERROR, 0x00,1.114 + IDE_COUNT, 0x03,1.115 + IDE_LBA1, 0x08,1.116 + IDE_LBA2, 0x00,1.117 + IDE_DEVICE, 0,1.118 + IDE_DATA, 0xFFFF,1.119 + IDE_STATUS, 0x50,1.120 + 0, 0 };1.121 +1.122 /**1.123 * Test the reset command1.124 */1.125 @@ -211,69 +312,25 @@1.126 CHECK_INTRQ_CLEAR();1.127 CHECK_REGS( post_set_feature2_regs );1.129 + char test_ready_cmd[12] = { 0,0,0,0, 0,0,0,0, 0,0,0,0 };1.130 + if( send_packet_command(test_ready_cmd) != 0 ) {1.131 + return -1;1.132 + }1.133 +1.134 + CHECK_REGS( packet_cmd_error6_regs );1.135 + int sense = ide_get_sense_code();1.136 + CHECK_IEQUALS( 0x2906, sense );1.137 +1.138 + if( send_packet_command(test_ready_cmd) != 0 ) {1.139 + return -1;1.140 + }1.141 + CHECK_REGS( drive_ready_regs );1.142 return 0;1.143 }1.145 -uint32_t post_packet_ready_regs[] =1.146 - { IDE_ALTSTATUS, 0x58,1.147 - IDE_ERROR, 0x00,1.148 - IDE_COUNT, 0x01,1.149 - IDE_LBA0, 0x00,1.150 - IDE_LBA1, 8,1.151 - IDE_LBA2, 0,1.152 - IDE_DEVICE, 0,1.153 - IDE_STATUS, 0x58, 0, 0 };1.154 -1.155 -uint32_t post_packet_cmd_regs[] =1.156 - { IDE_ALTSTATUS, 0xD0,1.157 - IDE_ERROR, 0x00,1.158 - IDE_COUNT, 0x01,1.159 - IDE_LBA1, 8,1.160 - IDE_LBA2, 0,1.161 - IDE_DEVICE, 0,1.162 - IDE_STATUS, 0xD0, 0, 0 };1.163 -1.164 -uint32_t packet_cmd_error6_regs[] =1.165 - { IDE_ALTSTATUS, 0x51,1.166 - IDE_ERROR, 0x60,1.167 - IDE_COUNT, 0x03,1.168 - IDE_LBA1, 8,1.169 - IDE_LBA2, 0,1.170 - IDE_DEVICE, 0,1.171 - IDE_STATUS, 0x51, 0, 0 };1.172 -1.173 -uint32_t packet_data_ready_regs[] =1.174 - { IDE_ALTSTATUS, 0x58,1.175 - IDE_ERROR, 0x00,1.176 - IDE_COUNT, 0x02,1.177 - IDE_LBA0, 0x00,1.178 - IDE_LBA1, 0x0C,1.179 - IDE_LBA2, 0,1.180 - IDE_DEVICE, 0,1.181 - IDE_STATUS, 0x58, 0, 0 };1.182 -1.183 -1.184 -uint32_t post_packet_data_regs[] =1.185 - { IDE_ALTSTATUS, 0xD0,1.186 - IDE_ERROR, 0x00,1.187 - IDE_COUNT, 0x02,1.188 - IDE_LBA0, 0x00,1.189 - IDE_LBA1, 0x0C,1.190 - IDE_LBA2, 0,1.191 - IDE_DEVICE, 0,1.192 - IDE_STATUS, 0xD0, 0, 0 };1.193 -1.194 -uint32_t packet_complete_regs[] =1.195 - { IDE_ALTSTATUS, 0x50,1.196 - IDE_ERROR, 0x00,1.197 - IDE_COUNT, 0x03,1.198 - IDE_LBA1, 0x0C,1.199 - IDE_LBA2, 0,1.200 - IDE_DEVICE, 0,1.201 - IDE_STATUS, 0x50, 0, 0 };1.202 -1.203 char expect_ident[] = { 0x00, 0xb4, 0x19, 0x00,1.204 0x00, 0x08, 0x53, 0x45, 0x20, 0x20, 0x20, 0x20 };1.205 +1.206 /**1.207 * Test the PACKET command (using the Inquiry command)1.208 */1.209 @@ -282,35 +339,11 @@1.210 int i;1.211 char cmd[12] = { 0x11, 0, 4, 0, 12, 0, 0, 0, 0, 0, 0, 0 };1.212 // char cmd[12] = { 0x00,0,0,0, 0,0,0,0, 0,0,0,0 };1.213 - unsigned short *spkt = (unsigned short *)cmd;1.214 + unsigned short *spkt;1.215 char result[12];1.217 - ide_print_sense_error();1.218 - EXPECT_READY();1.219 - byte_write( IDE_FEATURE, 0 );1.220 - byte_write( IDE_COUNT, 0 );1.221 - byte_write( IDE_LBA0, 0 );1.222 - byte_write( IDE_LBA1, 8 );1.223 - byte_write( IDE_LBA2, 0 );1.224 - byte_write( IDE_DEVICE, 0 );1.225 - byte_write( IDE_COMMAND, 0xA0 );1.226 - byte_read(IDE_ALTSTATUS); /* delay 1 PIO cycle */1.227 - EXPECT_READY(); /* Wait until device is ready to accept command (usually immediate) */1.228 - CHECK_INTRQ_CLEAR();1.229 - CHECK_REGS( post_packet_ready_regs );1.230 -1.231 - /* Write the command */1.232 - for( i=0; i<6; i++ ) {1.233 - word_write( IDE_DATA, spkt[i] );1.234 - }1.235 -1.236 - byte_read(IDE_ALTSTATUS);1.237 -1.238 - CHECK_REGS( post_packet_cmd_regs );1.239 - EXPECT_INTRQ();1.240 - EXPECT_READY();1.241 + send_packet_command( cmd );1.242 CHECK_REGS( packet_data_ready_regs );1.243 -1.244 spkt = (unsigned short *)result;1.245 *spkt++ = word_read(IDE_DATA);1.246 *spkt++ = word_read(IDE_DATA);1.247 @@ -321,8 +354,9 @@1.248 *spkt++ = word_read(IDE_DATA);1.249 CHECK_REGS( post_packet_data_regs );1.250 EXPECT_READY();1.251 - CHECK_INTRQ_CLEAR();1.252 + EXPECT_INTRQ();1.253 CHECK_REGS( packet_complete_regs );1.254 +1.255 if( memcmp( result, expect_ident, 12 ) != 0 ) {1.256 fwrite_diff( stderr, expect_ident, 12, result, 12 );1.257 }1.258 @@ -355,7 +389,7 @@1.260 typedef int (*test_func_t)();1.262 -test_func_t test_fns[] = { test_packet, test_enable, test_reset,1.263 +test_func_t test_fns[] = { test_enable, test_reset, test_packet,1.264 test_dma, test_dma_abort, NULL };1.266 int main()
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