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lxdream 0.9.1
released Jun 29
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filename src/asic.c
changeset 20:3ffb66aa25c7
prev15:5194dd0fdb60
next23:1ec3acd0594d
author nkeynes
date Thu Dec 22 13:28:16 2005 +0000 (14 years ago)
permissions -rw-r--r--
last change Add scif.c (oops)
Convert interrupts to be level-triggered rather than edge-triggered
(although shouldn't be any visible difference)
file annotate diff log raw
1.1 --- a/src/asic.c Mon Dec 12 13:11:11 2005 +0000
1.2 +++ b/src/asic.c Thu Dec 22 13:28:16 2005 +0000
1.3 @@ -13,8 +13,6 @@
1.4 * Open questions:
1.5 * 1) Does changing the mask after event occurance result in the
1.6 * interrupt being delivered immediately?
1.7 - * 2) If the pending register is not cleared after an interrupt, does
1.8 - * the interrupt line remain high? (ie does the IRQ reoccur?)
1.9 * TODO: Logic diagram of ASIC event/interrupt logic.
1.10 *
1.11 * ... don't even get me started on the "EXTDMA" page, about which, apparently,
1.12 @@ -24,6 +22,8 @@
1.13 struct dreamcast_module asic_module = { "ASIC", asic_init, NULL, NULL, NULL,
1.14 NULL, NULL };
1.15
1.16 +void asic_check_cleared_events( void );
1.17 +
1.18 void asic_init( void )
1.19 {
1.20 register_io_region( &mmio_region_ASIC );
1.21 @@ -40,6 +40,8 @@
1.22 case PIRQ2:
1.23 /* Clear any interrupts */
1.24 MMIO_WRITE( ASIC, reg, MMIO_READ(ASIC, reg)&~val );
1.25 + DEBUG( "ASIC Write %08X => %08X", val, reg );
1.26 + asic_check_cleared_events();
1.27 break;
1.28 case MAPLE_STATE:
1.29 MMIO_WRITE( ASIC, reg, val );
1.30 @@ -98,6 +100,23 @@
1.31 intc_raise_interrupt( INT_IRQ9 );
1.32 }
1.33
1.34 +void asic_check_cleared_events( )
1.35 +{
1.36 + int i, setA = 0, setB = 0, setC = 0;
1.37 + uint32_t bits;
1.38 + for( i=0; i<3; i++ ) {
1.39 + bits = MMIO_READ( ASIC, PIRQ0 + i );
1.40 + setA |= (bits & MMIO_READ(ASIC, IRQA0 + i ));
1.41 + setB |= (bits & MMIO_READ(ASIC, IRQB0 + i ));
1.42 + setC |= (bits & MMIO_READ(ASIC, IRQC0 + i ));
1.43 + }
1.44 + if( setA == 0 )
1.45 + intc_clear_interrupt( INT_IRQ13 );
1.46 + if( setB == 0 )
1.47 + intc_clear_interrupt( INT_IRQ11 );
1.48 + if( setC == 0 )
1.49 + intc_clear_interrupt( INT_IRQ9 );
1.50 +}
1.51
1.52
1.53 MMIO_REGION_WRITE_FN( EXTDMA, reg, val )
.