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lxdream 0.9.1
released Jun 29
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filename src/asic.h
changeset 2:42349f6ea216
prev1:eea311cfd33e
next31:495e480360d7
author nkeynes
date Sat Aug 21 06:15:49 2004 +0000 (15 years ago)
permissions -rw-r--r--
last change Commit changes into cvs
file annotate diff log raw
1.1 --- a/src/asic.h Sat Mar 13 00:03:32 2004 +0000
1.2 +++ b/src/asic.h Sat Aug 21 06:15:49 2004 +0000
1.3 @@ -9,6 +9,7 @@
1.4 LONG_PORT( 0x884, ASICUNK1, PORT_MRW, 0, "ASIC <unknown1>" )
1.5 LONG_PORT( 0x888, ASICUNK2, PORT_MRW, 0, "ASIC <unknown2>" )
1.6 LONG_PORT( 0x88C, G2STATUS, PORT_MR, 0, "G2 Bus status" )
1.7 + LONG_PORT( 0x89C, ASICUNK3, PORT_MRW, 0xB, "Unknown, always 0xB?" )
1.8 LONG_PORT( 0x900, PIRQ0, PORT_MRW, 0, "Pending interrupts 0" )
1.9 LONG_PORT( 0x904, PIRQ1, PORT_MRW, 0, "Pending interrupts 1" )
1.10 LONG_PORT( 0x908, PIRQ2, PORT_MRW, 0, "Pending interrupts 2" )
1.11 @@ -21,24 +22,48 @@
1.12 LONG_PORT( 0x930, IRQC0, PORT_MRW, 0, "IRQ C event map 0" )
1.13 LONG_PORT( 0x934, IRQC1, PORT_MRW, 0, "IRQ C event map 1" )
1.14 LONG_PORT( 0x938, IRQC2, PORT_MRW, 0, "IRQ C event map 2" )
1.15 + LONG_PORT( 0x940, ASIC9UNK1, PORT_MRW, 0, "Unknown 1" )
1.16 + LONG_PORT( 0x944, ASIC9UNK2, PORT_MRW, 0, "Unknown 2" )
1.17 + LONG_PORT( 0x950, ASIC9UNK3, PORT_MRW, 0, "Unknown 3" )
1.18 + LONG_PORT( 0x954, ASIC9UNK4, PORT_MRW, 0, "Unknown 4" )
1.19 +/* ASIC events repeats at 0x980..0x9FF, then the whole region 800..9ff
1.20 + * repeats at 000..1ff, 200..3ff, 400..5ff, 600..7ff, a00..bff.
1.21 + * The whole region 800..8ff is long-readable, but since I so far have no idea
1.22 + * what any of it means (nor have I seen any of it accessed), they're not
1.23 + * listed above.
1.24 + */
1.25 +
1.26
1.27 LONG_PORT( 0xC04, MAPLE_DMA, PORT_MRW, UNDEFINED, "Maple DMA Address" )
1.28 LONG_PORT( 0xC10, MAPLE_RESET2, PORT_MRW, UNDEFINED, "Maple Reset 2" )
1.29 LONG_PORT( 0xC14, MAPLE_ENABLE, PORT_MRW, UNDEFINED, "Maple Enable" )
1.30 LONG_PORT( 0xC18, MAPLE_STATE, PORT_MRW, 0, "Maple State" )
1.31 + LONG_PORT( 0xC70, MAPLE_UNK1, PORT_MRW, 0, "Maple unknown 1" )
1.32 + LONG_PORT( 0xC74, MAPLE_UNK2, PORT_MRW, 0, "Maple unknown 2" )
1.33 + LONG_PORT( 0xC78, MAPLE_UNK3, PORT_MRW, 0, "Maple unknown 3" )
1.34 + LONG_PORT( 0xC7C, MAPLE_UNK4, PORT_MRW, 0, "Maple unknown 4" )
1.35 LONG_PORT( 0xC80, MAPLE_SPEED, PORT_MRW, UNDEFINED, "Maple Speed" )
1.36 + LONG_PORT( 0xC84, MAPLE_UNK5, PORT_MRW, 0, "Maple unknown 5" )
1.37 LONG_PORT( 0xC8C, MAPLE_RESET1, PORT_MRW, UNDEFINED, "Maple Reset 1" )
1.38 + LONG_PORT( 0xCE8, MAPLE_UNK6, PORT_MRW, 0, "Maple unknown 6" )
1.39 + LONG_PORT( 0xCF4, MAPLE_SRC, PORT_MRW, 0, "Maple current source" )
1.40 + LONG_PORT( 0xCF8, MAPLE_DEST1, PORT_MRW, 0, "Maple current destination" )
1.41 + LONG_PORT( 0xCFC, MAPLE_DEST2, PORT_MRW, 0, "Maple current destination 2?" )
1.42 +/* Note: Maple registers repeat at 0xD00..0xDFF,
1.43 + * 0xE00..0xEFF and 0xF00..0xFFF */
1.44 MMIO_REGION_END
1.45
1.46 MMIO_REGION_BEGIN( 0x005F7000, EXTDMA, "ASIC External DMA" )
1.47 - BYTE_PORT( 0x018, GDBUSY, PORT_MRW, 0, "GD-Rom Busy" )
1.48 - WORD_PORT( 0x080, GDDATA, PORT_MRW, 0, "GD-Rom Data" )
1.49 - BYTE_PORT( 0x084, GDFEAT, PORT_MRW, 0, "GD-Rom Feature" )
1.50 - BYTE_PORT( 0x088, GDSECTOR, PORT_MRW, 0, "GD-Rom Sector Count" )
1.51 - BYTE_PORT( 0x08C, GDNSECTOR, PORT_MRW, 0, "GD-Rom Sector" )
1.52 - BYTE_PORT( 0x090, GDCMDLENLO, PORT_MRW, 0, "GD-Rom Command length low" )
1.53 - BYTE_PORT( 0x094, GDCMDLENHI, PORT_MRW, 0, "GD-Rom Command length hi" )
1.54 - BYTE_PORT( 0x09C, GDSTATUS, PORT_MRW, 0, "GD-Rom Status" )
1.55 + BYTE_PORT( 0x018, IDEALTSTATUS, PORT_RW, 0, "IDE Device Control / Alt-status" ) /* 10110 */
1.56 + BYTE_PORT( 0x01C, IDEUNK1, PORT_MRW, 0, "IDE Unknown" )
1.57 + WORD_PORT( 0x080, IDEDATA, PORT_RW, 0, "IDE Data" )
1.58 + BYTE_PORT( 0x084, IDEFEAT, PORT_RW, 0, "IDE Feature / Error" )
1.59 + BYTE_PORT( 0x088, IDECOUNT, PORT_RW, 0, "IDE Sector Count" )
1.60 + BYTE_PORT( 0x08C, IDELBA0, PORT_RW, 0, "IDE LBA lo" ) /* AKA sector */
1.61 + BYTE_PORT( 0x090, IDELBA1, PORT_RW, 0, "IDE LBA mid" ) /* AKA Cyl lo */
1.62 + BYTE_PORT( 0x094, IDELBA2, PORT_RW, 0, "IDE LBA hi" ) /* AKA Cyl hi */
1.63 + BYTE_PORT( 0x098, IDEDEV, PORT_RW, 0, "IDE Device" )
1.64 + BYTE_PORT( 0x09C, IDECMD, PORT_RW, 0, "IDE Command/Status" )
1.65 LONG_PORT( 0x404, EXTDMASH4, PORT_MRW, 0, "Ext DMA SH4 address" )
1.66 LONG_PORT( 0x408, EXTDMASIZ, PORT_MRW, 0, "Ext DMA Size" )
1.67 LONG_PORT( 0x40C, EXTDMADIR, PORT_MRW, 0, "Ext DMA Direction" )
1.68 @@ -54,7 +79,7 @@
1.69 LONG_PORT( 0x4A4, EXTDMAUNK7, PORT_MRW, 0, "Ext DMA <unknown7>" )
1.70 LONG_PORT( 0x4B4, EXTDMAUNK8, PORT_MRW, 0, "Ext DMA <unknown8>" )
1.71 LONG_PORT( 0x4B8, EXTDMAUNK9, PORT_MRW, 0, "Ext DMA <unknown9>" )
1.72 - LONG_PORT( 0x4E4, GDACTIVATE, PORT_MRW, 0, "GD-Rom activate" )
1.73 + LONG_PORT( 0x4E4, IDEACTIVATE, PORT_MRW, 0, "IDE activate" )
1.74 LONG_PORT( 0x800, SPUDMA0EXT, PORT_MRW, 0, "SPU DMA0 External address" )
1.75 LONG_PORT( 0x804, SPUDMA0SH4, PORT_MRW, 0, "SPU DMA0 SH4-based address" )
1.76 LONG_PORT( 0x808, SPUDMA0SIZ, PORT_MRW, 0, "SPU DMA0 Size" )
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