1.1 --- a/src/sh4/ia32abi.h Sun Jan 06 12:24:18 2008 +0000
1.2 +++ b/src/sh4/ia32abi.h Mon Jan 14 09:08:58 2008 +0000
1.6 call_func0(sh4_read_long);
1.10 - ADD_imm8s_r32( 4, addr );
1.12 + ADD_imm8s_r32( 4, R_ECX );
1.14 call_func0(sh4_read_long);
1.15 ADD_imm8s_r32( 4, R_ESP );
1.16 MOV_r32_r32( R_EAX, arg2b );
1.20 -#define EXIT_BLOCK_SIZE 29
1.24 * Emit the 'start of block' assembly. Sets up the stack frame and save
1.27 sh4_x86.fpuen_checked = FALSE;
1.28 sh4_x86.branch_taken = FALSE;
1.29 sh4_x86.backpatch_posn = 0;
1.30 + sh4_x86.recovery_posn = 0;
1.31 sh4_x86.block_start_pc = pc;
1.32 - sh4_x86.tlb_on = MMIO_READ(MMU,MMUCR)&MMUCR_AT;
1.33 + sh4_x86.tlb_on = IS_MMU_ENABLED();
1.34 sh4_x86.tstate = TSTATE_NONE;
1.36 sh4_x86.stack_posn = 8;
1.41 +#define EXIT_BLOCK_SIZE(pc) (24 + (IS_IN_ICACHE(pc)?5:CALL_FUNC1_SIZE))
1.45 * Exit the block to an absolute PC
1.47 @@ -141,7 +142,37 @@
1.49 load_imm32( R_ECX, pc ); // 5
1.50 store_spreg( R_ECX, REG_OFFSET(pc) ); // 3
1.51 - MOV_moff32_EAX( xlat_get_lut_entry(pc) ); // 5
1.52 + if( IS_IN_ICACHE(pc) ) {
1.53 + MOV_moff32_EAX( xlat_get_lut_entry(GET_ICACHE_PHYS(pc)) ); // 5
1.54 + } else if( sh4_x86.tlb_on ) {
1.55 + call_func1(xlat_get_code_by_vma,R_ECX);
1.57 + call_func1(xlat_get_code,R_ECX);
1.59 + AND_imm8s_r32( 0xFC, R_EAX ); // 3
1.60 + load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
1.61 + ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
1.66 +#define EXIT_BLOCK_REL_SIZE(pc) (27 + (IS_IN_ICACHE(pc)?5:CALL_FUNC1_SIZE))
1.69 + * Exit the block to a relative PC
1.71 +void exit_block_rel( sh4addr_t pc, sh4addr_t endpc )
1.73 + load_imm32( R_ECX, pc - sh4_x86.block_start_pc ); // 5
1.74 + ADD_sh4r_r32( R_PC, R_ECX );
1.75 + store_spreg( R_ECX, REG_OFFSET(pc) ); // 3
1.76 + if( IS_IN_ICACHE(pc) ) {
1.77 + MOV_moff32_EAX( xlat_get_lut_entry(GET_ICACHE_PHYS(pc)) ); // 5
1.78 + } else if( sh4_x86.tlb_on ) {
1.79 + call_func1(xlat_get_code_by_vma,R_ECX);
1.81 + call_func1(xlat_get_code,R_ECX);
1.83 AND_imm8s_r32( 0xFC, R_EAX ); // 3
1.84 load_imm32( R_ECX, ((endpc - sh4_x86.block_start_pc)>>1)*sh4_cpu_period ); // 5
1.85 ADD_r32_sh4r( R_ECX, REG_OFFSET(slice_cycle) ); // 6
1.86 @@ -155,23 +186,22 @@
1.87 void sh4_translate_end_block( sh4addr_t pc ) {
1.88 if( sh4_x86.branch_taken == FALSE ) {
1.89 // Didn't exit unconditionally already, so write the termination here
1.90 - exit_block( pc, pc );
1.91 + exit_block_rel( pc, pc );
1.93 if( sh4_x86.backpatch_posn != 0 ) {
1.96 uint8_t *end_ptr = xlat_output;
1.97 - load_spreg( R_ECX, REG_OFFSET(pc) );
1.98 + MOV_r32_r32( R_EDX, R_ECX );
1.99 ADD_r32_r32( R_EDX, R_ECX );
1.100 - ADD_r32_r32( R_EDX, R_ECX );
1.101 - store_spreg( R_ECX, REG_OFFSET(pc) );
1.102 + ADD_r32_sh4r( R_ECX, R_PC );
1.103 MOV_moff32_EAX( &sh4_cpu_period );
1.105 ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
1.107 call_func0( sh4_raise_exception );
1.108 ADD_imm8s_r32( 4, R_ESP );
1.109 - load_spreg( R_EAX, REG_OFFSET(pc) );
1.110 + load_spreg( R_EAX, R_PC );
1.111 if( sh4_x86.tlb_on ) {
1.112 call_func1(xlat_get_code_by_vma,R_EAX);
1.114 @@ -182,14 +212,13 @@
1.116 // Exception already raised - just cleanup
1.117 uint8_t *preexc_ptr = xlat_output;
1.118 - load_imm32( R_ECX, sh4_x86.block_start_pc );
1.119 + MOV_r32_r32( R_EDX, R_ECX );
1.120 ADD_r32_r32( R_EDX, R_ECX );
1.121 - ADD_r32_r32( R_EDX, R_ECX );
1.122 - store_spreg( R_ECX, REG_OFFSET(spc) );
1.123 + ADD_r32_sh4r( R_ECX, R_SPC );
1.124 MOV_moff32_EAX( &sh4_cpu_period );
1.126 ADD_r32_sh4r( R_EAX, REG_OFFSET(slice_cycle) );
1.127 - load_spreg( R_EAX, REG_OFFSET(pc) );
1.128 + load_spreg( R_EAX, R_PC );
1.129 if( sh4_x86.tlb_on ) {
1.130 call_func1(xlat_get_code_by_vma,R_EAX);